September 2015 - U-Boot

[U-Boot] [PATCH 1/2] sun4i: Add defconfig and dts for inet9f-rev03 based tablets
by Hans de Goede 09 Sep '15

09 Sep '15

The inet9f-rev03 pcb is specially designed for gaming tablets, such as the qware tb-g100 tablet. These 7" tablets feature a dpad, firebuttons and 2 joysticks on the sides of the screen. Besides this they have the usual connectors: power-barrel, mini usb, mini hdmi, headphone and micro-sd slot. The dts is identical to the dts submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun4i-a10-inet9f-rev03.dts | 219 ++++++++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 1 + configs/inet9f_rev03_defconfig | 20 +++ 4 files changed, 241 insertions(+) create mode 100644 arch/arm/dts/sun4i-a10-inet9f-rev03.dts create mode 100644 configs/inet9f_rev03_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 275948d..1c60dd7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -81,6 +81,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-inet-3f.dtb \ sun4i-a10-inet-3w.dtb \ sun4i-a10-inet97fv2.dtb \ + sun4i-a10-inet9f-rev03.dtb \ sun4i-a10-itead-iteaduino-plus.dtb \ sun4i-a10-jesurun-q5.dtb \ sun4i-a10-marsboard.dtb \ diff --git a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts new file mode 100644 index 0000000..8446465 --- /dev/null +++ b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts @@ -0,0 +1,219 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + model = "iNet-9F Rev 03"; + compatible = "inet-tek,inet9f-rev03", "allwinner,sun4i-a10"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + +&ehci1 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupts = <0>; + }; +}; + +#include "axp209.dtsi" + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <&reg_ldo2>; + status = "okay"; + + button@200 { + label = "Menu"; + linux,code = <KEY_MENU>; + channel = <0>; + voltage = <200000>; + }; + + button@600 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <600000>; + }; + + button@800 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <800000>; + }; + + button@1000 { + label = "Home"; + linux,code = <KEY_HOMEPAGE>; + channel = <0>; + voltage = <1000000>; + }; + + button@1200 { + label = "Esc"; + linux,code = <KEY_ESC>; + channel = <0>; + voltage = <1200000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd-int-dll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +&reg_usb0_vbus { + status = "okay"; +}; + +&reg_usb2_vbus { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <&reg_usb0_vbus>; + usb2_vbus-supply = <&reg_usb2_vbus>; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 7f29b58..b22702e 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -9,6 +9,7 @@ F: configs/Chuwi_V7_CW0825_defconfig F: configs/Cubieboard_defconfig F: configs/Hyundai_A7HD_defconfig F: configs/inet97fv2_defconfig +F: configs/inet9f_rev03_defconfig F: configs/jesurun_q5_defconfig F: configs/Mele_A1000_defconfig F: configs/Mele_M3_defconfig diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig new file mode 100644 index 0000000..fdfb02a --- /dev/null +++ b/configs/inet9f_rev03_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN4I=y +CONFIG_DRAM_CLK=408 +CONFIG_DRAM_EMR1=4 +CONFIG_USB0_VBUS_PIN="PB9" +CONFIG_USB0_VBUS_DET="PH5" +CONFIG_USB0_ID_DET="PH4" +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_POWER="PH8" +CONFIG_VIDEO_LCD_BL_EN="PH7" +CONFIG_VIDEO_LCD_BL_PWM="PB2" +CONFIG_USB_MUSB_HOST=y +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet9f-rev03" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set -- 2.4.3

2 3

[U-Boot] [PATCH] sunxi: Add defconfig and dts for the pov protab2-ips9 tablet
by Hans de Goede 09 Sep '15

09 Sep '15

The Point of View protab2-ips9 is a tablet with a 9" ips 1024x768 lcd screen, microsd slot, headphones, mini hdmi, mini usb b and power barrel connectors. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts | 209 ++++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 1 + configs/pov_protab2_ips9_defconfig | 21 +++ 4 files changed, 233 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts create mode 100644 configs/pov_protab2_ips9_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9b787b3..52b6275 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -88,7 +88,8 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-mk802.dtb \ sun4i-a10-mk802ii.dtb \ sun4i-a10-olinuxino-lime.dtb \ - sun4i-a10-pcduino.dtb + sun4i-a10-pcduino.dtb \ + sun4i-a10-pov-protab2-ips9.dtb dtb-$(CONFIG_MACH_SUN5I) += \ sun5i-a10s-auxtek-t003.dtb \ sun5i-a10s-auxtek-t004.dtb \ diff --git a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts new file mode 100644 index 0000000..223515e --- /dev/null +++ b/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts @@ -0,0 +1,209 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> + +/ { + model = "Point of View Protab2-IPS9"; + compatible = "pov,protab2-ips9", "allwinner,sun4i-a10"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupts = <0>; + }; +}; + +#include "axp209.dtsi" + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <&reg_ldo2>; + status = "okay"; + + button@400 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <400000>; + }; + + button@800 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <800000>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd-int-dll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +&reg_ldo3 { + /* + * We need to always power the camera sensor, otherwhise all access + * to i2c1 is blocked. + */ + regulator-always-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vdd-csi"; +}; + +&reg_usb0_vbus { + status = "okay"; +}; + +&reg_usb1_vbus { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <&reg_usb0_vbus>; + usb1_vbus-supply = <&reg_usb1_vbus>; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 3a4d1fb..3f897f8 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -15,6 +15,7 @@ F: configs/Mele_M3_defconfig F: configs/Mini-X_defconfig F: configs/mk802_defconfig F: configs/mk802ii_defconfig +F: configs/pov_protab2_ips9_defconfig F: include/configs/sun5i.h F: configs/A10s-OLinuXino-M_defconfig F: configs/A13-OLinuXino_defconfig diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig new file mode 100644 index 0000000..3107f31 --- /dev/null +++ b/configs/pov_protab2_ips9_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN4I=y +CONFIG_DRAM_CLK=432 +CONFIG_USB0_VBUS_PIN="PB9" +CONFIG_USB0_VBUS_DET="PH5" +CONFIG_USB0_ID_DET="PH4" +CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:480,ri:260,up:6,lo:16,hs:320,vs:10,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_PANEL_LVDS=y +CONFIG_VIDEO_LCD_POWER="PH8" +CONFIG_VIDEO_LCD_BL_EN="PH7" +CONFIG_VIDEO_LCD_BL_PWM="PB2" +CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pov-protab2-ips9" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_USB_MUSB_HOST=y -- 2.4.3

2 1

[U-Boot] [PATCH] sunxi: Add q8_a13_tablet defconfig and dts
by Hans de Goede 09 Sep '15

09 Sep '15

This commits adds a generic support for q8 formfactor a13 based tablets. These tablets ship in many variants, with the difference mainly being the touchscreen controller / accelerometer / wifi chip used. The wifi is USB based, and thus not listed in devicetree. ATM the kernel does not support the touchscreen / accelerometer on these devices. In the future we may need multiple configs with different CONFIG_DEFAULT_DEVICE_TREE settings, this depends on how we solve the hw differences on the kernel side. For now this will suffice. The dts files are identical to the dts files submitted to the upstream kernel for these tablets. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun5i-a13-q8-tablet.dts | 60 +++++++++++++ arch/arm/dts/sun5i-q8-common.dtsi | 170 +++++++++++++++++++++++++++++++++++ arch/arm/dts/sunxi-q8-common.dtsi | 77 ++++++++++++++++ board/sunxi/MAINTAINERS | 1 + configs/q8_a13_tablet_defconfig | 23 +++++ 6 files changed, 332 insertions(+) create mode 100644 arch/arm/dts/sun5i-a13-q8-tablet.dts create mode 100644 arch/arm/dts/sun5i-q8-common.dtsi create mode 100644 arch/arm/dts/sunxi-q8-common.dtsi create mode 100644 configs/q8_a13_tablet_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 52b6275..275948d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -103,6 +103,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \ sun5i-a13-inet-98v-rev2.dtb \ sun5i-a13-olinuxino.dtb \ sun5i-a13-olinuxino-micro.dtb \ + sun5i-a13-q8-tablet.dtb \ sun5i-a13-tzx-q8-713b7.dtb \ sun5i-a13-utoo-p66.dtb \ sun5i-r8-chip.dtb diff --git a/arch/arm/dts/sun5i-a13-q8-tablet.dts b/arch/arm/dts/sun5i-a13-q8-tablet.dts new file mode 100644 index 0000000..72e93ac --- /dev/null +++ b/arch/arm/dts/sun5i-a13-q8-tablet.dts @@ -0,0 +1,60 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun5i-a13.dtsi" +#include "sun5i-q8-common.dtsi" + +/ { + model = "Q8 A13 Tablet"; + compatible = "allwinner,q8-a13", "allwinner,sun5i-a13"; +}; + +&reg_ldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +&usbphy { + usb1_vbus-supply = <&reg_ldo3>; +}; diff --git a/arch/arm/dts/sun5i-q8-common.dtsi b/arch/arm/dts/sun5i-q8-common.dtsi new file mode 100644 index 0000000..0641d68 --- /dev/null +++ b/arch/arm/dts/sun5i-q8-common.dtsi @@ -0,0 +1,170 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ +#include "sunxi-q8-common.dtsi" + +/ { + aliases { + serial0 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&i2c0 { + axp209: pmic@34 { + reg = <0x34>; + interrupts = <0>; + }; +}; + +&i2c1 { + pcf8563: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +#include "axp209.dtsi" + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8>; + vmmc-supply = <&reg_vcc3v0>; + bus-width = <4>; + cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ + cd-inverted; + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&pio { + mmc0_cd_pin_q8: mmc0_cd_pin@0 { + allwinner,pins = "PG0"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PG2"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_pin_a: usb0_vbus_pin@0 { + allwinner,pins = "PG12"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-pll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +&reg_usb0_vbus { + gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins_b>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ + usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ + usb0_vbus-supply = <&reg_usb0_vbus>; + status = "okay"; +}; diff --git a/arch/arm/dts/sunxi-q8-common.dtsi b/arch/arm/dts/sunxi-q8-common.dtsi new file mode 100644 index 0000000..17b26ff --- /dev/null +++ b/arch/arm/dts/sunxi-q8-common.dtsi @@ -0,0 +1,77 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> +#include "sunxi-common-regulators.dtsi" + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&lradc { + vref-supply = <&reg_vcc3v0>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <400000>; + }; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 3f897f8..7f29b58 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -24,6 +24,7 @@ F: configs/Auxtek-T003_defconfig F: configs/Auxtek-T004_defconfig F: configs/inet98v_rev2_defconfig F: configs/mk802_a10s_defconfig +F: configs/q8_a13_tablet_defconfig F: configs/r7-tv-dongle_defconfig F: configs/UTOO_P66_defconfig F: include/configs/sun6i.h diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig new file mode 100644 index 0000000..d38e41f --- /dev/null +++ b/configs/q8_a13_tablet_defconfig @@ -0,0 +1,23 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN5I=y +CONFIG_DRAM_CLK=384 +CONFIG_DRAM_EMR1=0 +CONFIG_MMC0_CD_PIN="PG0" +CONFIG_USB0_VBUS_PIN="PG12" +CONFIG_USB0_VBUS_DET="PG1" +CONFIG_USB0_ID_DET="PG2" +CONFIG_AXP_GPIO=y +# CONFIG_VIDEO_HDMI is not set +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:45,ri:82,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_POWER="AXP0-0" +CONFIG_VIDEO_LCD_BL_EN="AXP0-1" +CONFIG_VIDEO_LCD_BL_PWM="PB2" +CONFIG_USB_MUSB_HOST=y +CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2,AXP209_POWER" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set -- 2.4.3

2 1

[U-Boot] [PATCH 0/8] x86: Support booting Linux kernel on Intel Galileo
by Bin Meng 09 Sep '15

09 Sep '15

Currently U-Boot works great on Intel Galileo board, but it still has some issues when booting a Linux kernel. The issues are mainly with Isolated Memory Region (IMR) and thermal sensor support in the Linux kernel for Intel Quark SoC. For example, kernel just hangs after kernel IMR driver is probed. It turns out U-Boot still misses some key register programming. Add those register initializtion so that Linux kernel can boot succesfully. Tested on Intel Galileo board, with an AHCI Mini-PCIe card with an SSD attached (to test PCI IRQ behind the root port), as well as a micro-SD card, a USB flash disk and ethernet under Linux. Note the mainline Linux designware Ethernet driver uses an API dmi_get_system_info() to determine the PHY address. Since U-Boot currently does not support the DMI, to test the Ethernet under Linux we need patch the kernel driver, but in the long term, we should add DMI support in U-Boot. Add a TODO in README.x86 for now. Bin Meng (8): x86: galileo: Enable random mac address for Quark x86: quark: Add clrbits, setbits, clrsetbits macros for message port access x86: quark: Convert to use clrbits, setbits, clrsetbits macros x86: quark: Lock HMBOUND register before jumping to kernel x86: quark: Initialize thermal sensor properly x86: galileo: Add PCIe root port IRQ routing x86: doc: Document some porting hints about Intel Quark x86: doc: Add DMI to the TODO list arch/x86/cpu/quark/quark.c | 115 ++++++++++++++++------------- arch/x86/dts/galileo.dts | 12 +++ arch/x86/include/asm/arch-quark/msg_port.h | 39 ++++++++++ arch/x86/include/asm/arch-quark/quark.h | 15 ++++ configs/galileo_defconfig | 1 + doc/README.x86 | 25 +++++++ 6 files changed, 156 insertions(+), 51 deletions(-) -- 1.8.2.1

2 16

[U-Boot] [PATCH v2] pinctrl: move dm_scan_fdt_node() out of pinctrl uclass
by Masahiro Yamada 09 Sep '15

09 Sep '15

Commit c5acf4a2b3c6 ("pinctrl: Add the concept of peripheral IDs") added some additional change that was not mentioned in the git-log. That commit added dm_scan_fdt_node() in the pinctrl uclass binding. It should be handled by the simple-bus driver or the low-level driver, not by the pinctrl framework. I guess Simon's motivation was to bind GPIO banks located under the Rockchip pinctrl device. It is true some chips have sub-devices under their pinctrl devices, but it is basically SoC-specific matter. This commit partly reverts commit c5acf4a2b3c6 to keep the only pinctrl-generic features in the uclass. The dm_scan_fdt_node() should be called from the rk3288_pinctrl driver. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> Acked-by: Simon Glass <sjg(a)chromium.org> Tested-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Drop "By the way ..." part from git-log drivers/pinctrl/pinctrl-uclass.c | 15 +++++++++------ drivers/pinctrl/rockchip/pinctrl_rk3288.c | 8 ++++++++ 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index 58001ef..b5fdcd1 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -11,7 +11,6 @@ #include <dm/device.h> #include <dm/lists.h> #include <dm/pinctrl.h> -#include <dm/root.h> #include <dm/uclass.h> DECLARE_GLOBAL_DATA_PTR; @@ -160,8 +159,7 @@ static int pinctrl_select_state_full(struct udevice *dev, const char *statename) static int pinconfig_post_bind(struct udevice *dev) { - /* Scan the bus for devices */ - return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); + return 0; } #endif @@ -249,10 +247,15 @@ static int pinctrl_post_bind(struct udevice *dev) } /* - * The pinctrl driver child nodes should be bound so that peripheral - * devices can easily search in parent devices during later DT-parsing. + * If set_state callback is set, we assume this pinctrl driver is the + * full implementation. In this case, its child nodes should be bound + * so that peripheral devices can easily search in parent devices + * during later DT-parsing. */ - return pinconfig_post_bind(dev); + if (ops->set_state) + return pinconfig_post_bind(dev); + + return 0; } UCLASS_DRIVER(pinctrl) = { diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c index 5205498..c432a00 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c @@ -17,6 +17,7 @@ #include <asm/arch/periph.h> #include <asm/arch/pmu_rk3288.h> #include <dm/pinctrl.h> +#include <dm/root.h> DECLARE_GLOBAL_DATA_PTR; @@ -415,6 +416,12 @@ static struct pinctrl_ops rk3288_pinctrl_ops = { .get_periph_id = rk3288_pinctrl_get_periph_id, }; +static int rk3288_pinctrl_bind(struct udevice *dev) +{ + /* scan child GPIO banks */ + return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); +} + static int rk3288_pinctrl_probe(struct udevice *dev) { struct rk3288_pinctrl_priv *priv = dev_get_priv(dev); @@ -437,5 +444,6 @@ U_BOOT_DRIVER(pinctrl_rk3288) = { .of_match = rk3288_pinctrl_ids, .priv_auto_alloc_size = sizeof(struct rk3288_pinctrl_priv), .ops = &rk3288_pinctrl_ops, + .bind = rk3288_pinctrl_bind, .probe = rk3288_pinctrl_probe, }; -- 1.9.1

2 1

[U-Boot] [PATCH] arm: serial: Add debug UART capability to the pl01x driver
by Sergey Temerkhanov 09 Sep '15

09 Sep '15

This patch adds an ability to use pl01x as a debug UART. It must be configured like other types of debug UARTs Signed-off-by: Sergey Temerkhanov <s.temerkhanov(a)gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla(a)cavium.com> --- drivers/serial/Kconfig | 20 ++++++++++++++++++++ drivers/serial/serial_pl01x.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index ccb80d2..b471adc 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -77,6 +77,13 @@ config DEBUG_UART_S5P will need to provide parameters to make this work. The driver will be available until the real driver-model serial is running. +config DEBUG_UART_PL01X + bool "pl01x" + help + Select this to enable a debug UART using the pl01x driver. You + will need to provide parameters to make this work. The driver will + be available until the real driver model serial is running. + endchoice config DEBUG_UART_BASE @@ -109,6 +116,19 @@ config DEBUG_UART_SHIFT value. Use this value to specify the shift to use, where 0=byte registers, 2=32-bit word registers, etc. +config DEBUG_UART_SKIP_INIT + bool "Skip UART initialition" + help + Select this if the UART you want to use for debug output is already + initialized by the time U-Boot starts its execution. + +config DEBUG_UART_PL011 + bool "PL011 UART type" + depends on DEBUG_UART_PL01X + help + Select this if the UART you want to use for debug output is of type + PL011. + config ROCKCHIP_SERIAL bool "Rockchip on-chip UART support" depends on ARCH_UNIPHIER && DM_SERIAL diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index e6ceaa1..5e96bf4 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -391,3 +391,31 @@ U_BOOT_DRIVER(serial_pl01x) = { }; #endif + +#ifdef CONFIG_DEBUG_UART_PL01X + +#include <debug_uart.h> + +void debug_uart_init(void) +{ +#ifndef CONFIG_DEBUG_UART_SKIP_INIT + struct pl01x_regs *regs = (struct pl01x_regs *)CONFIG_DEBUG_UART_BASE; + enum pl01x_type type = CONFIG_IS_ENABLED(DEBUG_UART_PL011) ? + TYPE_PL011 : TYPE_PL010; + + pl01x_generic_serial_init(regs, type); + pl01x_generic_setbrg(regs, type, + CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); +#endif +} + +static inline void _debug_uart_putc(int ch) +{ + struct pl01x_regs *regs = (struct pl01x_regs *)CONFIG_DEBUG_UART_BASE; + + pl01x_putc(regs, ch); +} + +DEBUG_UART_FUNCS + +#endif -- 2.2.0

2 1

[U-Boot] [PATCH 1/7] mx6ul_14x14_evk: Remove CONFIG_CMD_FUSE option
by Fabio Estevam 09 Sep '15

09 Sep '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> CONFIG_CMD_FUSE and CONFIG_MXC_OCOTP are selected by mx6_common.h, so there is no need to define them locally. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- include/configs/mx6ul_14x14_evk.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index e785925..08738c3 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -33,11 +33,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_CMD_FUSE -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* MMC Configs */ #ifdef CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -- 1.9.1

2 11

[U-Boot] [UBOOT PATCH 1/1] gpio: lpc32xx: fix issues with port3 gpio
by slemieux.tyco＠gmail.com 09 Sep '15

09 Sep '15

From: Sylvain Lemieux <slemieux(a)tycoint.com> The current simplify lpc32xx gpio driver implementation assume a maximum of 32 GPIO per port; there are a total of 22 GPI, 24 GPO and 6 GPIO to managed on port 3. Update the driver to fix the following: 1) When requesting GPI_xx and GPO_xx on port 3 (xx is the same number) the second call to "gpio_request" will return -EBUSY. 2) The status of GPO_xx pin report the status of the corresponding GPI_xx pin when using the "gpio status" command. 3) The gpio driver may setup the direction register for the wrong gpio when calling "gpio_direction_input" (GPI_xx) or "gpio_direction_output" (GPO_xx) on port 3; the call to the direction is require to use the "gpio status" command. The following change were done in the driver: 1) port3 GPI are cache in a separate 32 bits in the array. 2) port3 direction register written only for GPIO pins. 3) port3 GPO & GPIO (as output) are read using "p3_outp_state". 4) LPC32XX_GPI_P3_GRP updated to match the change. Signed-off-by: Sylvain Lemieux <slemieux(a)tycoint.com> --- To reproduce the issues, the following test can be execute: 1) Add to source code: int ret1 = gpio_request(LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 19), "GPO_19"); int ret2 = gpio_request(LPC32XX_GPIO(LPC32XX_GPI_P3_GRP, 19), "GPI_19"); The second call return "-EBUSY". 2) Setup a logical 0 on GPI_19 pin --> gpio set 115 gpio: pin 115 (gpio 115) value is 1 --> gpio status 115: output: 0 [x] GPO_19 Setup a logic 1 on GPI_19 pin --> gpio clear115 gpio: pin 115 (gpio 115) value is 0 --> gpio status 115: output: 1 [x] GPO_19 3) Add to source code: (void)gpio_request(LPC32XX_GPIO(LPC32XX_GPI_P3_GRP, 25), "GPI_25"); --> gpio status 121: unknown Add to source code: (void)gpio_request(LPC32XX_GPIO(LPC32XX_GPI_P3_GRP, 25), "GPI_25"); (void)gpio_direction_input(LPC32XX_GPIO(LPC32XX_GPI_P3_GRP, 25)); --> gpio status 121: input: 0 [x] GPI_25 The direction register is written and GPIO_0 is configured as input. Note: I am sending the patch using <slemieux.tyco(a)gmail.com>, until I can submit patch using my regular e-mail <slemieux(a)tycoint.com>. arch/arm/include/asm/arch-lpc32xx/gpio_grp.h | 4 +-- drivers/gpio/lpc32xx_gpio.c | 41 ++++++++++++++++++++++++---- 2 files changed, 37 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/arch-lpc32xx/gpio_grp.h b/arch/arm/include/asm/arch-lpc32xx/gpio_grp.h index aa85337..3cc8a37 100644 --- a/arch/arm/include/asm/arch-lpc32xx/gpio_grp.h +++ b/arch/arm/include/asm/arch-lpc32xx/gpio_grp.h @@ -12,7 +12,7 @@ /* * Macro to map the pin for the lpc32xx_gpio driver. - * Note: - GPIOS are considered here as homogeneous and linear, from 0 to 127; + * Note: - GPIOS are considered here as homogeneous and linear from 0 to 159; * mapping is done per register, as group of 32. * (see drivers/gpio/lpc32xx_gpio.c for details). * - macros can be use with the following pins: @@ -26,9 +26,9 @@ #define LPC32XX_GPIO_P0_GRP 0 #define LPC32XX_GPIO_P1_GRP 32 #define LPC32XX_GPIO_P2_GRP 64 -#define LPC32XX_GPI_P3_GRP 96 #define LPC32XX_GPO_P3_GRP 96 #define LPC32XX_GPIO_P3_GRP (LPC32XX_GPO_P3_GRP + 25) +#define LPC32XX_GPI_P3_GRP 128 /* * A specific GPIO can be selected with this macro diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c index 8a9826e..9674ee7 100644 --- a/drivers/gpio/lpc32xx_gpio.c +++ b/drivers/gpio/lpc32xx_gpio.c @@ -22,7 +22,7 @@ * read on another one. * * In order to keep this code simple, GPIOS are considered here as - * homogeneous and linear, from 0 to 127. + * homogeneous and linear, from 0 to 159. * * ** WARNING #1 ** * @@ -35,7 +35,7 @@ * Please read NOTE in description of lpc32xx_gpio_get_function(). */ -#define LPC32XX_GPIOS 128 +#define LPC32XX_GPIOS 160 struct lpc32xx_gpio_priv { struct gpio_regs *regs; @@ -45,11 +45,18 @@ struct lpc32xx_gpio_priv { /** * We have 4 GPIO ports of 32 bits each + * + * Port mapping offset (32 bits each): + * - Port 0: 0 + * - Port 1: 32 + * - Port 2: 64 + * - Port 3: GPO / GPIO (output): 96 + * - Port 3: GPI: 128 */ -#define MAX_GPIO 128 +#define MAX_GPIO 160 -#define GPIO_TO_PORT(gpio) ((gpio / 32) & 3) +#define GPIO_TO_PORT(gpio) ((gpio / 32) & 7) #define GPIO_TO_RANK(gpio) (gpio % 32) #define GPIO_TO_MASK(gpio) (1 << (gpio % 32)) @@ -75,9 +82,16 @@ static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset) break; case 2: /* ports 2 and 3 share a common direction */ - case 3: writel(mask, &regs->p2_p3_dir_clr); break; + case 3: + /* Setup direction only for GPIO_xx. */ + if ((mask >= 25) && (mask <= 30)) + writel(mask, &regs->p2_p3_dir_clr); + break; + case 4: + /* GPI_xx; nothing to do. */ + break; default: return -1; } @@ -111,6 +125,11 @@ static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset) value = readl(&regs->p2_inp_state); break; case 3: + /* Read GPO_xx and GPIO_xx (as output) using p3_outp_state. */ + value = readl(&regs->p3_outp_state); + break; + case 4: + /* Read GPI_xx and GPIO_xx (as input) using p3_inp_state. */ value = readl(&regs->p3_inp_state); break; default: @@ -149,6 +168,8 @@ static int gpio_set(struct udevice *dev, unsigned gpio) case 3: writel(mask, &regs->p3_outp_set); break; + case 4: + /* GPI_xx; invalid. */ default: return -1; } @@ -181,6 +202,8 @@ static int gpio_clr(struct udevice *dev, unsigned gpio) case 3: writel(mask, &regs->p3_outp_clr); break; + case 4: + /* GPI_xx; invalid. */ default: return -1; } @@ -223,9 +246,15 @@ static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset, break; case 2: /* ports 2 and 3 share a common direction */ - case 3: writel(mask, &regs->p2_p3_dir_set); break; + case 3: + /* Setup direction only for GPIO_xx. */ + if ((mask >= 25) && (mask <= 30)) + writel(mask, &regs->p2_p3_dir_set); + break; + case 4: + /* GPI_xx; invalid. */ default: return -1; } -- 1.8.3.1

1 0

[U-Boot] PCI configuration Issue for QEMU ACPI Support
by Saket Sinha 09 Sep '15

09 Sep '15

Hi, This is regarding the PCI configuration Issue for QEMU ACPI Support. I am comparing arch/x86/cpu/qemu/acpi/pci-crs.asl and arch/x86/dts/qemu-x86_q35.dts and we find there are different ranges been specified for PCI configuration in both the files. As per my understanding for Qemu q35 (emulation of the ICH9 host chipset) where we have PCIe support which is made possible by PCI express enhanced accessmechanism (ECAM). This address is 0xe0000000 which is what I have put in arch/x86/dts/qemu-x86_q35.dts when I am memory mapping the PCI bus. I do not find this range in listed in arch/x86/dts/qemu-x86_q35.dts where 0x80000000 which is the start of the range in the device tree. Thus U-Boot sets PCI to map into memory starting at 0x80000000 but when Linux starts booting with ACPI support it gets different values and we get PCI configuration errors in the Linux boot bootup logs. Regards, Saket Sinha

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[U-Boot] Zynq build failure
by Jagan Teki 09 Sep '15

09 Sep '15

Hi Michal/Siva, Any fix for this failure? CC spl/drivers/mtd/spi/spi_spl_load.o drivers/mtd/spi/spi_spl_load.c: In function 'spi_load_image_os': drivers/mtd/spi/spi_spl_load.c:26:24: error: 'CONFIG_SYS_SPI_KERNEL_OFFS' undeclared (first use in this function) drivers/mtd/spi/spi_spl_load.c:26:24: note: each undeclared identifier is reported only once for each function it appears in drivers/mtd/spi/spi_spl_load.c:38:24: error: 'CONFIG_SYS_SPI_ARGS_OFFS' undeclared (first use in this function) drivers/mtd/spi/spi_spl_load.c:39:10: error: 'CONFIG_SYS_SPI_ARGS_SIZE' undeclared (first use in this function) make[3]: *** [spl/drivers/mtd/spi/spi_spl_load.o] Error 1 thanks! -- Jagan | openedev.

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