September 2015 - U-Boot

[U-Boot] [PATCH v3] taurus: board updates
by Heiko Schocher 11 Sep '15

11 Sep '15

taurus changes: - rename at91_spl_board_init to spl_board_init fixes problems with recovery button and nand erase sector 0 - adapt CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE - add CONFIG_AT91_HW_WDT_TIMEOUT 15 - CONFIG_SF_DEFAULT_MODE SPI_MODE_3 not mode 0 Signed-off-by: Heiko Schocher <hs(a)denx.de> --- Changes in v3: - use SZ_X defines for sizes Changes in v2: - add comments from Andreas Biessmann: - rebase to 0d339cf9a969f0c249713d3697e735184f1bd955 board/siemens/taurus/taurus.c | 6 +++--- include/configs/taurus.h | 21 +++++++++++---------- 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c index 781727e..edeb15b 100644 --- a/board/siemens/taurus/taurus.c +++ b/board/siemens/taurus/taurus.c @@ -99,7 +99,7 @@ static int at91_is_recovery(void) } #endif -void at91_spl_board_init(void) +void spl_board_init(void) { taurus_nand_hw_init(); at91_spi0_hw_init(TAURUS_SPI_MASK); @@ -124,13 +124,13 @@ void at91_spl_board_init(void) if (at91_is_recovery() == 1) { struct spi_flash *flash; - debug("Recovery button pressed\n"); + puts("Recovery button pressed\n"); nand_init(); spl_nand_erase_one(0, 0); flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, 0, CONFIG_SF_DEFAULT_SPEED, - SPI_MODE_3); + CONFIG_SF_DEFAULT_MODE); if (!flash) { puts("no flash\n"); } else { diff --git a/include/configs/taurus.h b/include/configs/taurus.h index fb7c575..c1fed9a 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -81,14 +81,14 @@ */ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) +#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) /* * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, * leaving the correct space for initial global data structure above * that address while providing maximum stack area below. */ -# define CONFIG_SYS_INIT_SP_ADDR \ +#define CONFIG_SYS_INIT_SP_ADDR \ (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) /* NAND flash */ @@ -112,6 +112,7 @@ #define CONFIG_AT91_WANTS_COMMON_PHY #define CONFIG_AT91SAM9_WATCHDOG +#define CONFIG_AT91_HW_WDT_TIMEOUT 15 #if !defined(CONFIG_SPL_BUILD) /* Enable the watchdog */ #define CONFIG_HW_WATCHDOG @@ -146,8 +147,8 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_SPEED 10000000 -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 #endif /* load address */ @@ -157,7 +158,7 @@ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x100000 #define CONFIG_ENV_OFFSET_REDUND 0x180000 -#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" #if defined(CONFIG_BOARD_TAURUS) @@ -241,7 +242,7 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN \ - ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) + ROUND(3 * CONFIG_ENV_SIZE + SZ_128K, 0x1000) /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK @@ -253,7 +254,7 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_BSS_MAX_SIZE (3 * 1024) +#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT @@ -275,9 +276,9 @@ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_SIZE (256*1024*1024) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) +#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K +#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS -- 2.1.0

2 1

[U-Boot] [PATCH v3] arm, at91: add axm extensions
by Heiko Schocher 11 Sep '15

11 Sep '15

add extensions for the axm board: - power on LED on power up - press both recovery buttons on power up to enter recovery mode - detect 64 MiB and 128 MiB ramsize - PHY rest at reboot because of ATMEL bug - use siemens update concept - add axm default environment - set CONFIG_SPL_MAX_SIZE to 15k Signed-off-by: Heiko Schocher <hs(a)denx.de> --- Changes in v3: - add comments from Andreas Biessmann: - remove compile error Changes in v2: - add comments from Andreas Biessmann: - set stack into second sram segment - fix some Coding Style issues - reworked "suspect code indent" warning - reworked update concept - rebase against 0d339cf9a969f0c249713d3697e735184f1bd955 board/siemens/taurus/taurus.c | 196 ++++++++++++++++++++++++++++++++++++++---- include/configs/taurus.h | 71 ++++++++++++++- 2 files changed, 249 insertions(+), 18 deletions(-) diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c index 013dac2..781727e 100644 --- a/board/siemens/taurus/taurus.c +++ b/board/siemens/taurus/taurus.c @@ -12,6 +12,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <command.h> #include <common.h> #include <asm/io.h> #include <asm/arch/at91sam9260_matrix.h> @@ -79,16 +80,48 @@ void matrix_init(void) &mat->scfg[3]); } +#if defined(CONFIG_BOARD_AXM) +static int at91_is_recovery(void) +{ + if ((at91_get_gpio_value(AT91_PIN_PA26) == 0) && + (at91_get_gpio_value(AT91_PIN_PA27) == 0)) + return 1; + + return 0; +} +#elif defined(CONFIG_BOARD_TAURUS) +static int at91_is_recovery(void) +{ + if (at91_get_gpio_value(AT91_PIN_PA31) == 0) + return 1; + + return 0; +} +#endif + void at91_spl_board_init(void) { taurus_nand_hw_init(); at91_spi0_hw_init(TAURUS_SPI_MASK); +#if defined(CONFIG_BOARD_AXM) + /* Configure LED PINs */ + at91_set_gpio_output(AT91_PIN_PA6, 0); + at91_set_gpio_output(AT91_PIN_PA8, 0); + at91_set_gpio_output(AT91_PIN_PA9, 0); + at91_set_gpio_output(AT91_PIN_PA10, 0); + at91_set_gpio_output(AT91_PIN_PA11, 0); + at91_set_gpio_output(AT91_PIN_PA12, 0); + /* Configure recovery button PINs */ + at91_set_gpio_input(AT91_PIN_PA26, 1); + at91_set_gpio_input(AT91_PIN_PA27, 1); +#elif defined(CONFIG_BOARD_TAURUS) at91_set_gpio_input(AT91_PIN_PA31, 1); +#endif - /* check if button is pressed */ - if (at91_get_gpio_value(AT91_PIN_PA31) == 0) { + /* check for recovery mode */ + if (at91_is_recovery() == 1) { struct spi_flash *flash; debug("Recovery button pressed\n"); @@ -108,35 +141,72 @@ void at91_spl_board_init(void) } } -void mem_init(void) +#define SDRAM_BASE_CONF (AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_3 \ + |AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 \ + | AT91_SDRAMC_TWR_VAL(3) | AT91_SDRAMC_TRC_VAL(9) \ + | AT91_SDRAMC_TRP_VAL(3) | AT91_SDRAMC_TRCD_VAL(3) \ + | AT91_SDRAMC_TRAS_VAL(6) | AT91_SDRAMC_TXSR_VAL(10)) + +void sdramc_configure(unsigned int mask) { struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX; struct sdramc_reg setting; at91_sdram_hw_init(); - setting.cr = (AT91_SDRAMC_NC_9 | - AT91_SDRAMC_NR_13 | - AT91_SDRAMC_CAS_3 | - AT91_SDRAMC_NB_4 | - AT91_SDRAMC_DBW_32 | - AT91_SDRAMC_TWR_VAL(3) | - AT91_SDRAMC_TRC_VAL(9) | - AT91_SDRAMC_TRP_VAL(3) | - AT91_SDRAMC_TRCD_VAL(3) | - AT91_SDRAMC_TRAS_VAL(6) | - AT91_SDRAMC_TXSR_VAL(10)); + setting.cr = SDRAM_BASE_CONF | mask; setting.mdr = AT91_SDRAMC_MD_SDRAM; setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000; - writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC | AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL, &ma->ebicsa); + sdramc_initialize(ATMEL_BASE_CS1, &setting); } + +void mem_init(void) +{ + unsigned int ram_size = 0; + + /* Configure SDRAM for 128MB */ + sdramc_configure(AT91_SDRAMC_NC_10); + + /* Do memtest for 128MB */ + ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + + /* + * If 32MB or 16MB should be supported check also for + * expected mirroring at A16 and A17 + * To find mirror addresses depends how the collumns are connected + * at RAM (internaly or externaly) + * If the collumns are not in inverted order the mirror size effect + * behaves like normal SRAM with A0,A1,A2,etc. connected incremantal + */ + + /* Mirrors at A15 on ATMEL G20 SDRAM Controller with 64MB*/ + if (ram_size == 0x800) { + printf("\n\r 64MB"); + sdramc_configure(AT91_SDRAMC_NC_9); + } else { + /* Size already initialized */ + printf("\n\r 128MB"); + } +} #endif #ifdef CONFIG_MACB +static void siemens_phy_reset(void) +{ + /* + * we need to reset PHY for 200us + * because of bug in ATMEL G20 CPU (undefined initial state of GPIO) + */ + if ((readl(AT91_ASM_RSTC_SR) & AT91_RSTC_RSTTYP) == + AT91_RSTC_RSTTYP_GENERAL) + at91_set_gpio_value(AT91_PIN_PA25, 0); /* reset eth switch */ +} + static void taurus_macb_hw_init(void) { /* Enable EMAC clock */ @@ -160,6 +230,8 @@ static void taurus_macb_hw_init(void) at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0); at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0); + siemens_phy_reset(); + at91_phy_reset(); at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */ @@ -244,3 +316,97 @@ int board_eth_init(bd_t *bis) #endif return rc; } + +#if !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_BOARD_AXM) +/* + * Booting the Fallback Image. + * + * The function is used to provide and + * boot the image with the fallback + * parameters, incase if the faulty image + * in upgraded over the base firmware. + * + */ +static int upgrade_failure_fallback(void) +{ + char *partitionset_active = NULL; + char *rootfs = NULL; + char *rootfs_fallback = NULL; + char *kern_off; + char *kern_off_fb; + char *kern_size; + char *kern_size_fb; + + partitionset_active = getenv("partitionset_active"); + if (partitionset_active) { + if (partitionset_active[0] == 'A') + setenv("partitionset_active", "B"); + else + setenv("partitionset_active", "A"); + } else { + printf("partitionset_active missing.\n"); + return -ENOENT; + } + + rootfs = getenv("rootfs"); + rootfs_fallback = getenv("rootfs_fallback"); + setenv("rootfs", rootfs_fallback); + setenv("rootfs_fallback", rootfs); + + kern_size = getenv("kernel_size"); + kern_size_fb = getenv("kernel_size_fallback"); + setenv("kernel_size", kern_size_fb); + setenv("kernel_size_fallback", kern_size); + + kern_off = getenv("kernel_Off"); + kern_off_fb = getenv("kernel_Off_fallback"); + setenv("kernel_Off", kern_off_fb); + setenv("kernel_Off_fallback", kern_off); + + setenv("bootargs", '\0'); + setenv("upgrade_available", '\0'); + setenv("boot_retries", '\0'); + saveenv(); + + return 0; +} + +static int do_upgrade_available(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + unsigned long upgrade_available = 0; + unsigned long boot_retry = 0; + char boot_buf[10]; + + upgrade_available = simple_strtoul(getenv("upgrade_available"), NULL, + 10); + if (upgrade_available) { + boot_retry = simple_strtoul(getenv("boot_retries"), NULL, 10); + boot_retry++; + sprintf(boot_buf, "%lx", boot_retry); + setenv("boot_retries", boot_buf); + saveenv(); + + /* + * Here the boot_retries count is checked, and if the + * count becomes greater than 2 switch back to the + * fallback, and reset the board. + */ + + if (boot_retry > 2) { + if (upgrade_failure_fallback() == 0) + do_reset(NULL, 0, 0, NULL); + return -1; + } + } + return 0; +} + +U_BOOT_CMD( + upgrade_available, 1, 1, do_upgrade_available, + "check Siemens update", + "no parameters" +); +#endif +#endif diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 2c9f5da..fb7c575 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -20,6 +20,7 @@ * In this case SoC is defined in boards.cfg. */ #include <asm/hardware.h> +#include <linux/sizes.h> #define CONFIG_SYS_GENERIC_BOARD @@ -158,12 +159,75 @@ #define CONFIG_ENV_OFFSET_REDUND 0x180000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" -#define CONFIG_BOOTARGS \ + +#if defined(CONFIG_BOARD_TAURUS) +#define CONFIG_BOOTARGS_TAURUS \ "console=ttyS0,115200 earlyprintk " \ "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ "256k(env),256k(env_redundant),256k(spare)," \ "512k(dtb),6M(kernel)ro,-(rootfs) " \ "root=/dev/mtdblock7 rw rootfstype=jffs2" +#endif + +#if defined(CONFIG_BOARD_AXM) +#define CONFIG_BOOTARGS_AXM \ + "\0" \ + "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ + "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \ + "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \ + "baudrate=115200\0" \ + "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \ + "boot_retries=0\0" \ + "bootcmd=run flash_self\0" \ + "bootdelay=3\0" \ + "ethact=macb0\0" \ + "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\ + "bootm ${kernel_ram};reset\0" \ + "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \ + "bootm ${kernel_ram};reset\0" \ + "flash_self_test=run nand_kernel;run setbootargs addtest; " \ + "upgrade_available;bootm ${kernel_ram};reset\0" \ + "hostname=systemone\0" \ + "kernel_Off=0x00200000\0" \ + "kernel_Off_fallback=0x03800000\0" \ + "kernel_ram=0x21500000\0" \ + "kernel_size=0x00400000\0" \ + "kernel_size_fallback=0x00400000\0" \ + "loads_echo=1\0" \ + "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \ + "${kernel_size}\0" \ + "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \ + "run nfsargs;run addip;upgrade_available;bootm " \ + "${kernel_ram};reset\0" \ + "netdev=eth0\0" \ + "nfsargs=run root_path;setenv bootargs ${bootargs} " \ + "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ + "at91sam9_wdt.wdt_timeout=16\0" \ + "partitionset_active=A\0" \ + "preboot=echo;echo Type 'run flash_self' to use kernel and root "\ + "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \ + "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\ + "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\ + "project_dir=systemone\0" \ + "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\ + "rootfs=/dev/mtdblock5\0" \ + "rootfs_fallback=/dev/mtdblock7\0" \ + "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\ + "root=${rootfs} rootfstype=jffs2 panic=7 " \ + "at91sam9_wdt.wdt_timeout=16\0" \ + "stderr=serial\0" \ + "stdin=serial\0" \ + "stdout=serial\0" \ + "upgrade_available=0\0" +#endif + +#if defined(CONFIG_BOARD_TAURUS) +#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS +#endif + +#if defined(CONFIG_BOARD_AXM) +#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM +#endif #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 @@ -182,8 +246,8 @@ /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x0 -#define CONFIG_SPL_MAX_SIZE (14 * 1024) -#define CONFIG_SPL_STACK (16 * 1024) +#define CONFIG_SPL_MAX_SIZE (31 * SZ_512) +#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN @@ -232,4 +296,5 @@ #define CONFIG_SYS_MCKR 0x1300 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) #define CONFIG_SYS_AT91_PLLB 0x10193F05 + #endif -- 2.1.0

2 1

[U-Boot] [PATCH v3 0/2] arm, at91: add DFU support for the corvus board
by Heiko Schocher 11 Sep '15

11 Sep '15

add DFU support for the corvus board. While at it, do some minor board updates for this board, posted in the first patch of this series. Changes in v3: - add cover letter and post this patch in a patchserie with the DFU support - add a cover letter and post this patch with the board updates patch in a patchserie Changes in v2: - rebase to 0d339cf9a969f0c249713d3697e735184f1bd955 - use SZ_xM defines as Lukasz Majewski suggested - rebase to 0d339cf9a969f0c249713d3697e735184f1bd955 - fix changes introduced through commit: 01acd6abbdd5: usb: USB download gadget and functions config options coherent naming Heiko Schocher (2): at91: corvus: board updates corvus, dfu: add dfu support board/siemens/corvus/board.c | 23 ++++++++++++++++++++++- include/configs/corvus.h | 44 +++++++++++++++++++++++++++++++++++--------- 2 files changed, 57 insertions(+), 10 deletions(-) -- 2.1.0

2 4

[U-Boot] [PATCH 1/5] net: mdio: Add mdio_free() and mdio_unregister() API
by Bin Meng 11 Sep '15

11 Sep '15

Currently there is no API to uninitialize mdio. Add two APIs for this. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- common/miiphyutil.c | 19 +++++++++++++++++++ include/miiphy.h | 2 ++ 2 files changed, 21 insertions(+) diff --git a/common/miiphyutil.c b/common/miiphyutil.c index c88c28a..e499b58 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -152,6 +152,11 @@ struct mii_dev *mdio_alloc(void) return bus; } +void mdio_free(struct mii_dev *bus) +{ + free(bus); +} + int mdio_register(struct mii_dev *bus) { if (!bus || !bus->name || !bus->read || !bus->write) @@ -173,6 +178,20 @@ int mdio_register(struct mii_dev *bus) return 0; } +int mdio_unregister(struct mii_dev *bus) +{ + if (!bus) + return 0; + + /* delete it from the list */ + list_del(&bus->link); + + if (current_mii == bus) + current_mii = NULL; + + return 0; +} + void mdio_list_devices(void) { struct list_head *entry; diff --git a/include/miiphy.h b/include/miiphy.h index 088797e..af12274 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -59,7 +59,9 @@ struct phy_device *mdio_phydev_for_ethname(const char *devname); void miiphy_listdev(void); struct mii_dev *mdio_alloc(void); +void mdio_free(struct mii_dev *bus); int mdio_register(struct mii_dev *bus); +int mdio_unregister(struct mii_dev *bus); void mdio_list_devices(void); #ifdef CONFIG_BITBANGMII -- 1.8.2.1

3 18

[U-Boot] Please pull u-boot-x86.git
by Simon Glass 11 Sep '15

11 Sep '15

Hi Tom, Here are a few more driver model PCI fixes, the tftp revert and some driver model conversions for x86, as well as a few other minor fixes. There are a few more patches in flight but I could not apply them due to problems. I thought it best to get this out in the interim since the hour is late. The following changes since commit efde6a579fe3c172d214fb3047b02c827779738a: Prepare v2015.10-rc3 (2015-09-07 08:56:35 -0400) are available in the git repository at: git://git.denx.de/u-boot-x86.git for you to fetch changes up to f0dc73c090317c7d0660443bc933d612a4c0c699: net: designware: Fix build warnings (2015-09-09 07:48:03 -0600) ---------------------------------------------------------------- Bin Meng (21): x86: ifdtool: Support checking region overlap before U-Boot x86: doc: Change to use CONFIG_VGA_BIOS_ADDR x86: bayleybay: Change default vga bios rom address net: Revert "tftp: adjust settings to be suitable for 100Mbit ethernet" dm: eth: Do not print misleading "Net Initialization Skipped" dm: test: Add a new test case for dm_test_eth_rotate dm: eth: Correctly detect alias in eth_get_dev_by_name() x86: crownbay: Convert to use CONFIG_DM_USB x86: crownbay: Convert to use CONFIG_DM_ETH for E1000 net: pch_gbe: Convert to driver model net: pch_gbe: Add Kconfig option x86: crownbay: Enable CONFIG_PCH_GBE x86: coreboot: Convert to use more dm drivers x86: bayleybay: Convert to use more dm drivers x86: quark: Optimize MRC execution time x86: quark: Avoid chicken and egg problem x86: Enable PCIe controller on quark/galileo x86: Convert to use driver model pci on quark/galileo x86: quark: Add USB PHY initialization support x86: galileo: Convert to use CONFIG_DM_USB net: designware: Fix build warnings Masahiro Yamada (1): Revert "patman: use -D option for git format-patch" Simon Glass (3): x86: panther: Add PCI and video configuration buildman: Improve the config comparison feature dm: pci: Allow a PCI bus to be found without an alias arch/sandbox/dts/test.dts | 7 +++ arch/x86/cpu/coreboot/coreboot.c | 6 --- arch/x86/cpu/quark/Makefile | 1 - arch/x86/cpu/quark/msg_port.c | 44 ++++++++-------- arch/x86/cpu/quark/pci.c | 70 ------------------------- arch/x86/cpu/quark/quark.c | 139 +++++++++++++++++++++++++++++++++++++++++------- arch/x86/dts/chromebox_panther.dts | 10 ++++ arch/x86/dts/galileo.dts | 8 ++- arch/x86/include/asm/arch-quark/quark.h | 85 ++++++++++++++++++++++++++++++ board/intel/bayleybay/bayleybay.c | 6 --- board/intel/crownbay/crownbay.c | 6 --- board/intel/galileo/galileo.c | 56 ++++++++++++++++++++ configs/bayleybay_defconfig | 5 +- configs/coreboot-x86_defconfig | 5 +- configs/crownbay_defconfig | 5 +- configs/galileo_defconfig | 3 ++ doc/README.x86 | 2 +- drivers/net/Kconfig | 13 +++++ drivers/net/designware.c | 8 +-- drivers/net/pch_gbe.c | 133 +++++++++++++++++++++++++--------------------- drivers/net/pch_gbe.h | 2 - drivers/pci/pci-uclass.c | 28 ++++++++-- include/configs/chromebox_panther.h | 2 + include/configs/crownbay.h | 4 -- include/configs/galileo.h | 12 ----- include/configs/sandbox.h | 3 +- include/netdev.h | 4 -- net/eth.c | 7 ++- net/tftp.c | 10 ++-- test/dm/eth.c | 5 ++ tools/buildman/builder.py | 186 +++++++++++++++++++++++++++++++++++++++++++++++++---------------- tools/ifdtool.c | 66 ++++++++++++++++------- tools/patman/gitutil.py | 2 +- 33 files changed, 643 insertions(+), 300 deletions(-) delete mode 100644 arch/x86/cpu/quark/pci.c Regards, Simon

2 1

[U-Boot] [PATCH v2 1/3] net: eth: Clear MAC address in eth_pre_remove()
by Bin Meng 11 Sep '15

11 Sep '15

When removing an Ethernet device, the MAC address saved in the dev's platdata should be cleared. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- Changes in v2: - New patch to clear MAC address in eth_pre_remove() net/eth.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/net/eth.c b/net/eth.c index 26520d3..35f9641 100644 --- a/net/eth.c +++ b/net/eth.c @@ -564,8 +564,13 @@ static int eth_post_probe(struct udevice *dev) static int eth_pre_remove(struct udevice *dev) { + struct eth_pdata *pdata = dev->platdata; + eth_get_ops(dev)->stop(dev); + /* clear the MAC address */ + memset(pdata->enetaddr, 0, 6); + return 0; } -- 1.8.2.1

2 7

[U-Boot] [PATCH v3 5/5] common: Enable fdt_support in SPL build
by Chin Liang See 11 Sep '15

11 Sep '15

Enable more device tree function support such as fdt_getprop_u32_default_node in SPL. Signed-off-by: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Dinh Nguyen <dinh.linux(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Stefan Roese <sr(a)denx.de> Cc: Vikas Manocha <vikas.manocha(a)st.com> Cc: Jagannadh Teki <jteki(a)openedev.com> Cc: Pavel Machek <pavel(a)denx.de> --- common/Makefile | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/common/Makefile b/common/Makefile index 556fb07..9e059fe 100644 --- a/common/Makefile +++ b/common/Makefile @@ -97,7 +97,7 @@ obj-$(CONFIG_CMD_EXT4) += cmd_ext4.o obj-$(CONFIG_CMD_EXT2) += cmd_ext2.o obj-$(CONFIG_CMD_FAT) += cmd_fat.o obj-$(CONFIG_CMD_FDC) += cmd_fdc.o -obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o +obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o obj-$(CONFIG_CMD_FITUPD) += cmd_fitupd.o obj-$(CONFIG_CMD_FLASH) += cmd_flash.o ifdef CONFIG_FPGA @@ -265,7 +265,7 @@ obj-y += malloc_simple.o endif obj-y += image.o obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o -obj-$(CONFIG_OF_LIBFDT) += image-fdt.o +obj-$(CONFIG_OF_LIBFDT) += image-fdt.o fdt_support.o obj-$(CONFIG_FIT) += image-fit.o obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o obj-$(CONFIG_IO_TRACE) += iotrace.o -- 1.7.7.4

3 3

[U-Boot] [PATCH v2] pcie_imx: Use 'ms' for milliseconds
by Fabio Estevam 11 Sep '15

11 Sep '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> milliseconds should be written as 'ms' instead of 'mS'. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - Fixed typo drivers/pci/pcie_imx.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index ca485ba..1568f20 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -495,7 +495,7 @@ __weak int imx6_pcie_toggle_reset(void) * * The PCIe #PERST reset line _MUST_ be connected, otherwise your * design does not conform to the specification. You must wait at - * least 20 mS after de-asserting the #PERST so the EP device can + * least 20 ms after de-asserting the #PERST so the EP device can * do self-initialisation. * * In case your #PERST pin is connected to a plain GPIO pin of the @@ -506,7 +506,7 @@ __weak int imx6_pcie_toggle_reset(void) * In case your #PERST toggling logic is more complex, for example * connected via CPLD or somesuch, you can override this function * in your board file and implement reset logic as needed. You must - * not forget to wait at least 20 mS after de-asserting #PERST in + * not forget to wait at least 20 ms after de-asserting #PERST in * this case either though. * * In case your #PERST line of the PCIe EP device is not connected @@ -538,7 +538,7 @@ static int imx6_pcie_deassert_core_reset(void) /* * Wait for the clock to settle a bit, when the clock are sourced - * from the CPU, we need about 30mS to settle. + * from the CPU, we need about 30 ms to settle. */ mdelay(50); -- 1.9.1

2 1

[U-Boot] [PATCH] pcie_imx: Use 'ms' for miliseconds
by Fabio Estevam 11 Sep '15

11 Sep '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> miliseconds should be written as 'ms' instead of 'mS'. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- drivers/pci/pcie_imx.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index ca485ba..1568f20 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -495,7 +495,7 @@ __weak int imx6_pcie_toggle_reset(void) * * The PCIe #PERST reset line _MUST_ be connected, otherwise your * design does not conform to the specification. You must wait at - * least 20 mS after de-asserting the #PERST so the EP device can + * least 20 ms after de-asserting the #PERST so the EP device can * do self-initialisation. * * In case your #PERST pin is connected to a plain GPIO pin of the @@ -506,7 +506,7 @@ __weak int imx6_pcie_toggle_reset(void) * In case your #PERST toggling logic is more complex, for example * connected via CPLD or somesuch, you can override this function * in your board file and implement reset logic as needed. You must - * not forget to wait at least 20 mS after de-asserting #PERST in + * not forget to wait at least 20 ms after de-asserting #PERST in * this case either though. * * In case your #PERST line of the PCIe EP device is not connected @@ -538,7 +538,7 @@ static int imx6_pcie_deassert_core_reset(void) /* * Wait for the clock to settle a bit, when the clock are sourced - * from the CPU, we need about 30mS to settle. + * from the CPU, we need about 30 ms to settle. */ mdelay(50); -- 1.9.1

1 0

[U-Boot] commit 620776d causes TFTP error: 'Unsupported option(s) requested' (8)
by Bin Meng 11 Sep '15

11 Sep '15

Hi, With latest u-boot/master, TFTP is seriously broken. => tftp 100000 bzImage Speed: 100, full duplex Using pch_gbe device TFTP from server 10.10.0.8; our IP address is 10.10.0.100; sending through gateway 10.10.0.1 Filename 'bzImage'. Load address: 0x100000 Loading: T TFTP error: 'Unsupported option(s) requested' (8) Starting again git bisect shows the following commit broke the TFTP commit 620776d734e4b126c407f636bda825a594a17723 Author: Pavel Machek <pavel(a)denx.de> Date: Tue Aug 18 14:34:26 2015 +0200 tftp: adjust settings to be suitable for 100Mbit ethernet Adjust timouts and retry counts to be suitable for loaded ethernet network. With 5 seconds timeout, 10 retries maximum, tftp is impossible even on local network with single full-speed TCP connection. 100msec timeout should be suitable for most networks tftp is used on, that is local ethernets. Timeout count really needs to be way higher, as lost packets are normal when TCP is running over the same network. Enforce 10msec minimum. Signed-off-by: Pavel Machek <pavel(a)denx.de> Acked-by: Joe Hershberger <joe.hershberger(a)ni.com> Can we get this fixed ASAP? Thanks, Regards, Bin

7 19