September 2015 - U-Boot

[U-Boot] [PATCH 2/4] spi: cadence_qspi: Fix fdt read of spi-max-frequency
by Chin Liang See 10 Sep '15

10 Sep '15

Fix the fdt read for spi-max-frequency as it's contained in the child node. Current state of code is always returning default value. Signed-off-by: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Dinh Nguyen <dinh.linux(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Stefan Roese <sr(a)denx.de> Cc: Vikas Manocha <vikas.manocha(a)st.com> Cc: Jagannadh Teki <jteki(a)openedev.com> Cc: Pavel Machek <pavel(a)denx.de> --- Changes for v2 - Add unsigned casting for plat->max_hz --- drivers/spi/cadence_qspi.c | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 23c88d5..8c0f7dd 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -296,10 +296,6 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) plat->regbase = (void *)data[0]; plat->ahbbase = (void *)data[2]; - /* Use 500KHz as a suitable default */ - plat->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", - 500000); - /* All other paramters are embedded in the child node */ subnode = fdt_first_subnode(blob, node); if (subnode < 0) { @@ -307,6 +303,10 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) return -ENODEV; } + /* Use 500KHz as a suitable default */ + plat->max_hz = (unsigned int)fdtdec_get_int(blob, subnode, + "spi-max-frequency", 500000); + /* Read other parameters from DT */ plat->page_size = fdtdec_get_int(blob, subnode, "page-size", 256); plat->block_size = fdtdec_get_int(blob, subnode, "block-size", 16); -- 1.7.7.4

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[U-Boot] [PATCH v3 4/5] arm: dts: socfpga: Increase the spi-max-frequency for QSPI flash
by Chin Liang See 10 Sep '15

10 Sep '15

With a working QSPI calibration, the SCLK can now run up to 100MHz Signed-off-by: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Dinh Nguyen <dinh.linux(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Stefan Roese <sr(a)denx.de> Cc: Vikas Manocha <vikas.manocha(a)st.com> Cc: Jagannadh Teki <jteki(a)openedev.com> Cc: Pavel Machek <pavel(a)denx.de> Reviewed-by: Marek Vasut <marex(a)denx.de> Acked-by: Marek Vasut <marex(a)denx.de> Reviewed-by: Jagan Teki <jteki(a)openedev.com> --- arch/arm/dts/socfpga_cyclone5_socdk.dts | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts index 9650eb0..04e5695 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts @@ -86,7 +86,7 @@ #size-cells = <1>; compatible = "n25q00"; reg = <0>; /* chip select */ - spi-max-frequency = <50000000>; + spi-max-frequency = <100000000>; m25p,fast-read; page-size = <256>; block-size = <16>; /* 2^16, 64KB */ -- 1.7.7.4

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[U-Boot] [PATCH 3/4] spi: cadence_qspi: Ensure check for max frequency in place
by Chin Liang See 10 Sep '15

10 Sep '15

Ensure the intended SCLK frequency not exceeding the maximum frequency. If that happen, SCLK will set to maximum frequency. Signed-off-by: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Dinh Nguyen <dinh.linux(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Stefan Roese <sr(a)denx.de> Cc: Vikas Manocha <vikas.manocha(a)st.com> Cc: Jagannadh Teki <jteki(a)openedev.com> Cc: Pavel Machek <pavel(a)denx.de> --- drivers/spi/cadence_qspi.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 8c0f7dd..f430b5d 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -127,6 +127,11 @@ static int cadence_spi_set_speed(struct udevice *bus, uint hz) struct cadence_spi_priv *priv = dev_get_priv(bus); int err; + if (hz > plat->max_hz) { + hz = plat->max_hz; + puts("SF: Default to maximum supported SCLK frequency\n"); + } + /* Disable QSPI */ cadence_qspi_apb_controller_disable(priv->regbase); -- 1.7.7.4

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[U-Boot] [PATCH 0/8] x86: quark: Convert to driver model
by Bin Meng 10 Sep '15

10 Sep '15

This series converts to use driver model for PCI/USB/ETH on Intel Galileo board. Note this series depend on Simon's patch [1] below, which fixes the issue that pci enumeration is not automatically triggered when using pci config read/write apis. Boot time performance degradation is observed with the conversion to use dm pci. Intel Quark SoC has a low end x86 processor with only 400MHz frequency and the most time consuming part is with MRC. Each MRC register programming requires indirect access via pci bus. With dm pci, accessing pci configuration space has some overhead. Unfortunately this single access overhead gets accumulated in the whole MRC process, and finally leads to twice boot time (25s) than before (12s). To speed up the boot, create an optimized version of pci config read/write routines without bothering to go through driver model. Now it only takes about 3 seconds to finish MRC, which is really fast (8 times faster than dm pci, or 4 times faster than before). [1]: http://patchwork.ozlabs.org/patch/509736/ Bin Meng (8): x86: quark: Make host bridge (b.d.f=0.0.0) visible dm: pci: Allow skipping device configuration x86: Convert to use driver model pci on quark/galileo x86: galileo: Convert to use CONFIG_DM_USB net: designware: Fix build warnings net: designware: Add support to PCI designware devices x86: Convert to use driver model eth on quark/galileo x86: quark: Optimize MRC execution time arch/x86/cpu/quark/msg_port.c | 59 +++++++++++++++++++++++++++---------------- arch/x86/cpu/quark/pci.c | 46 +-------------------------------- arch/x86/cpu/quark/quark.c | 27 +++----------------- arch/x86/dts/galileo.dts | 8 ++++-- configs/galileo_defconfig | 5 +++- drivers/net/designware.c | 47 +++++++++++++++++++++++++++++++--- drivers/pci/pci-uclass.c | 3 +++ include/configs/galileo.h | 12 --------- 8 files changed, 98 insertions(+), 109 deletions(-) -- 1.8.2.1

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[U-Boot] [PATCH v2 00/11] x86: quark: Convert to driver model
by Bin Meng 10 Sep '15

10 Sep '15

This series converts to use driver model for PCI/USB/ETH on Intel Galileo board, as well as optimizing the boot time. Boot time performance degradation is observed with the conversion to use dm pci. Intel Quark SoC has a low end x86 processor with only 400MHz frequency and the most time consuming part is with MRC. Each MRC register programming requires indirect access via pci bus. With dm pci, accessing pci configuration space has some overhead. Unfortunately this single access overhead gets accumulated in the whole MRC process, and finally leads to twice boot time (25s) than before (12s). To speed up the boot, create an optimized version of pci config read/write routines without bothering to go through driver model. Now it only takes about 3 seconds to finish MRC, which is really fast (8 times faster than dm pci, or 4 times faster than before). The v2 series add complete PCIe root port and USB host support, which are the last 2 features on the Galileo board to enable. Tested with a Mini-PCIe card (probe only) and a USB flash disk. Simon, I reordered the patches so that the MRC optimizatin patch comes first. If you want to investigate driver model PCI overhead, you need to try the v1 patch series. Changes in v2: - Drop v1 patch: "x86: quark: Make host bridge (b.d.f=0.0.0) visible", as pci_skip_dev() is not needed with the conversion to dm pci. - Drop v1 patch: "dm: pci: Allow skipping device configuration", as full PCIe root port support has been added and there is no need to add such feature at this point. We can still add such capability to dm pci in the future whenever needed. - Reorder to put patch "Optimize MRC execution time" as the first one in v2, as this patch addressed the slow boot time issue which exists before dm pci conversion, although it significantly improves more after dm pci conversion :-) - Move qrk_pci_write_config_dword() and qrk_pci_read_config_dword() to arch/x86/cpu/quark/quark.c - Rewrite this commit's message (ie: not mentioning dm pci conversion) - New patch to avoid chicken and egg problem - New patch to enable PCIe controller on quark/galileo - Remove arch/x86/cpu/quark/pci.c completely - New patch to add USB PHY initialization support - Update commit message to remove "USB not working" statement, as in v2, full USB support has been added. - New patch to add an inline API to test if a device is on a PCI bus - Change to use device_is_on_pci_bus() - New patch to add PCIe/USB static register programming after memory init Bin Meng (11): x86: quark: Optimize MRC execution time x86: quark: Avoid chicken and egg problem x86: Enable PCIe controller on quark/galileo x86: Convert to use driver model pci on quark/galileo x86: quark: Add USB PHY initialization support x86: galileo: Convert to use CONFIG_DM_USB net: designware: Fix build warnings dm: pci: Add an inline API to test if a device is on a PCI bus net: designware: Add support to PCI designware devices x86: Convert to use driver model eth on quark/galileo x86: quark: Add PCIe/USB static register programming after memory init arch/x86/cpu/quark/Makefile | 1 - arch/x86/cpu/quark/msg_port.c | 44 +++---- arch/x86/cpu/quark/pci.c | 70 ----------- arch/x86/cpu/quark/quark.c | 212 +++++++++++++++++++++++++++----- arch/x86/dts/galileo.dts | 8 +- arch/x86/include/asm/arch-quark/quark.h | 107 ++++++++++++++++ board/intel/galileo/galileo.c | 56 +++++++++ configs/galileo_defconfig | 5 +- drivers/net/designware.c | 47 ++++++- drivers/pci/pci-uclass.c | 4 +- include/configs/galileo.h | 13 +- include/pci.h | 15 +++ 12 files changed, 434 insertions(+), 148 deletions(-) delete mode 100644 arch/x86/cpu/quark/pci.c -- 1.8.2.1

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[U-Boot] DM: uclass for timer
by Thomas Chou 10 Sep '15

10 Sep '15

Hi Simon, Shall we have a timer class in driver model? I am trying to get the base address and clock rate of timer from device tree, and use them for timer_init() in common/board_f.c and lib/time.c . As almost every board needs a timer, I wonder if it makes sense to use driver model? Or shall I use fdtdec to do the binding? timer_init() sits after initf_dm() in common/board_f.c will this work? Best regards, Thomas Chou

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[U-Boot] [PATCH v2 0/2] This series adds an ability to use pl01x for early debug output.
by Sergey Temerkhanov 10 Sep '15

10 Sep '15

This is the version 2 of the patch I posted at http://lists.denx.de/pipermail/u-boot/2015-September/227210.html Changes in v2: - Broke down into 2 patches - Minor changes to accomodate Kconfig options - Broke down into 2 patches - Made CONFIG_DEBUG_UART_PL010 and CONFIG_DEBUG_UART_PL011 separate options - Typo fixes Sergey Temerkhanov (2): arm: serial: Add debug UART capability to the pl01x driver arm: serial: Add Kconfig entries to facilitate usage of the pl01x driver for early debug output drivers/serial/Kconfig | 22 ++++++++++++++++++++++ drivers/serial/serial_pl01x.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) -- 2.2.0

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[U-Boot] [PATCH] usb: gadget: ci_udc: implement usb_ep_ops dequeue callback
by Peng Fan 10 Sep '15

10 Sep '15

Implement endpoint dequeue callback function. Without this function, uboot will hang when executing fastboot comamnd. See following flow: "fastboot_tx_write_str->fastboot_tx_write->usb_ep_dequeue->ep->ops->dequeue" without implement ci_udc dequeue function, ep->ops->dequeue is NULL, then uboot will hang. Tested on mx6qsabresd board with fastboot enabled. Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> Cc: "Łukasz Majewski" <l.majewski(a)samsung.com> Cc: Marek Vasut <marex(a)denx.de> --- drivers/usb/gadget/ci_udc.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 3e8eb87..f9374b3 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -87,6 +87,7 @@ static int ci_ep_enable(struct usb_ep *ep, static int ci_ep_disable(struct usb_ep *ep); static int ci_ep_queue(struct usb_ep *ep, struct usb_request *req, gfp_t gfp_flags); +static int ci_ep_dequeue(struct usb_ep *ep, struct usb_request *req); static struct usb_request * ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags); static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req); @@ -99,6 +100,7 @@ static struct usb_ep_ops ci_ep_ops = { .enable = ci_ep_enable, .disable = ci_ep_disable, .queue = ci_ep_queue, + .dequeue = ci_ep_dequeue, .alloc_request = ci_ep_alloc_request, .free_request = ci_ep_free_request, }; @@ -525,6 +527,32 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) writel(bit, &udc->epprime); } +static int ci_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) +{ + struct ci_ep *ci_ep = container_of(_ep, struct ci_ep, ep); + struct ci_req *ci_req; + + list_for_each_entry(ci_req, &ci_ep->queue, queue) { + if (&ci_req->req == _req) + break; + } + + if (&ci_req->req != _req) + return -EINVAL; + + list_del_init(&ci_req->queue); + + if (ci_req->req.status == -EINPROGRESS) { + ci_req->req.status = -ECONNRESET; + if (ci_req->req.complete) + ci_req->req.complete(_ep, _req); + } + + debug("callback completed\n"); + + return 0; +} + static int ci_ep_queue(struct usb_ep *ep, struct usb_request *req, gfp_t gfp_flags) { -- 1.8.4

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[U-Boot] [PATCH V2] usb: gadget: ci_udc: implement usb_ep_ops dequeue callback
by Peng Fan 10 Sep '15

10 Sep '15

Implement endpoint dequeue callback function. Without this function, uboot will hang when executing fastboot comamnd. See following flow: "fastboot_tx_write_str->fastboot_tx_write->usb_ep_dequeue->ep->ops->dequeue" without implement ci_udc dequeue function, ep->ops->dequeue is NULL, then uboot will hang. Tested on mx6qsabresd board with fastboot enabled. Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> Cc: "Łukasz Majewski" <l.majewski(a)samsung.com> Cc: Marek Vasut <marex(a)denx.de> --- Changes v2: discard useless "debug("callback completed\n")" info. drivers/usb/gadget/ci_udc.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 3e8eb87..c0d23a4 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -87,6 +87,7 @@ static int ci_ep_enable(struct usb_ep *ep, static int ci_ep_disable(struct usb_ep *ep); static int ci_ep_queue(struct usb_ep *ep, struct usb_request *req, gfp_t gfp_flags); +static int ci_ep_dequeue(struct usb_ep *ep, struct usb_request *req); static struct usb_request * ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags); static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req); @@ -99,6 +100,7 @@ static struct usb_ep_ops ci_ep_ops = { .enable = ci_ep_enable, .disable = ci_ep_disable, .queue = ci_ep_queue, + .dequeue = ci_ep_dequeue, .alloc_request = ci_ep_alloc_request, .free_request = ci_ep_free_request, }; @@ -525,6 +527,30 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) writel(bit, &udc->epprime); } +static int ci_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) +{ + struct ci_ep *ci_ep = container_of(_ep, struct ci_ep, ep); + struct ci_req *ci_req; + + list_for_each_entry(ci_req, &ci_ep->queue, queue) { + if (&ci_req->req == _req) + break; + } + + if (&ci_req->req != _req) + return -EINVAL; + + list_del_init(&ci_req->queue); + + if (ci_req->req.status == -EINPROGRESS) { + ci_req->req.status = -ECONNRESET; + if (ci_req->req.complete) + ci_req->req.complete(_ep, _req); + } + + return 0; +} + static int ci_ep_queue(struct usb_ep *ep, struct usb_request *req, gfp_t gfp_flags) { -- 1.8.4

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[U-Boot] [PATCH v4 0/9] Add support for hi6220 SoC and HiKey 96boards CE board.
by Peter Griffin 09 Sep '15

09 Sep '15

Hi Albert / Tom, This series adds support for the first 96boards consumer edition HiKey board. More information can be found about this board at the following link https://www.96boards.org/products/hikey/. This initial port adds support for: - 1) Serial 2) eMMC and sd card 3) USB 4) GPIO It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable. Some instructions on exactly how to compile everything (l-loader, with Arm Trusted Firmware, which then loads u-boot) is documented in the README found in the board/hisilicon/hikey directory. A basic SoC datasheet can be found here: - https://github.com/96boards/documentation/blob/master/hikey/ Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf Board schematic can be found here: - https://github.com/96boards/documentation/blob/master/hikey/ 96Boards-Hikey-Rev-A1.pdf A rather pleasant side effect of rebasing to v2015.07-rc2 is that the two main bugs with the v1 series (that I new about at least) are resolved. DHCP now works correctly, and USB mass storage devices are also enumerated). The plan is once basic support is merged to u-boot, and upstream Linux kernel has DT which supports GPIO, UART and MMC, we can migrate this u-boot port over to using DT for configuration. Changes since v3: - Update to use config_distro_bootcmd.h (Sjoerd) - Remove CONFIG_BOOTDELAY (Sjoerd) Changes since v2: - errno.h should go above malloc.h (Simon) - drop #ifdef CONFIG_DM_GPIO and add TODO (Simon) - remove gd->flags = 0; (Simon) - Remove icache_enable() (Simon / Rob) - Added a pinmux driver for hi6220 (Simon) - Added a pmic driver for hi6553 (Simon) - Convert to structs for register I/O (Simon) - Remove () around simple constants (Simon) - Update default bootcmd (Rob) - user kernel_addr_r etc in default env (Rob) - Various typo's (Rob) - use board_usb_init() to configure phy/clocks (Rob) - Remove some more unnecessary CONFIG_FS* options (Rob) - Update default kernel load address (Rob) - Update default kernel cmdline (Rob) Changes since v1: - Rename vendor to hisilicon not 96boards (Rob) - Get rid of aemv8a vexpress leftover (Rob) - Remove __weak on misc_init_r (Rob) - Remove unnecessary LINUX_BOOT_PARAM_ADDR (Rob) - COUNTER_FREQUENCY in decimal to avoid comment (Rob) - Remove leftover V2M* from vexpress (Rob) - Migrate configs/hikey.h over to use config_distro_defaults.h (Rob) - Remove custom u-boot prompt (Rob) - Enable icache - Remove custom delay function, as mdelay/udelay work fine (Rob) - Update CONFIG_SYS_LOAD_ADDR to 0x80000 (Rob) - Use suggested macro for declaring gpio addresses (Marek) - Zap dead Macros (Marek) - Use calloc instead of malloc (Marek) - Reduce PHYS_RAM by 16Mb to accomodate OPTEE in latest ATF code (Peter) - Rebase on v2015.07-rc2 (Peter) - Add CONFIG_NET=y so that env callbacks work (Peter) - Add a README on how to build / flash u-boot (Simon) kind regards, Peter. Peter Griffin (9): usb: dwc2: Call board_usb_init() from usb_lowlevel_init() dm: gpio: hi6220: Add a hi6220 GPIO driver model driver. ARM: hi6220: Add register and bitfield definition header files. hisilicon: hi6220: Add a hi6220 pinmux driver. pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board. mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller. ARM64: hikey: hi6220: Add u-boot support for the 96boards CE HiKey board. ARM64: hikey: Add a README for this board. hikey: Add hikey-u-boot.mak arch/arm/Kconfig | 8 + arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/hisilicon/Makefile | 9 + arch/arm/cpu/armv8/hisilicon/pinmux.c | 184 +++++++++ arch/arm/include/asm/arch-hi6220/dwmmc.h | 8 + arch/arm/include/asm/arch-hi6220/gpio.h | 29 ++ arch/arm/include/asm/arch-hi6220/hi6220.h | 387 +++++++++++++++++++ .../include/asm/arch-hi6220/hi6220_regs_alwayson.h | 420 +++++++++++++++++++++ arch/arm/include/asm/arch-hi6220/periph.h | 30 ++ arch/arm/include/asm/arch-hi6220/pinmux.h | 83 ++++ board/hisilicon/hikey/Kconfig | 15 + board/hisilicon/hikey/Makefile | 8 + board/hisilicon/hikey/README | 160 ++++++++ board/hisilicon/hikey/hikey.c | 356 +++++++++++++++++ configs/hikey_defconfig | 5 + drivers/gpio/Makefile | 2 + drivers/gpio/hi6220_gpio.c | 95 +++++ drivers/mmc/Makefile | 1 + drivers/mmc/hi6220_dw_mmc.c | 56 +++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pmic_hi6553.c | 133 +++++++ drivers/usb/host/dwc2.c | 4 + hikey-u-boot.mak | 33 ++ include/configs/hikey.h | 159 ++++++++ include/power/hi6553_pmic.h | 79 ++++ 25 files changed, 2266 insertions(+) create mode 100644 arch/arm/cpu/armv8/hisilicon/Makefile create mode 100644 arch/arm/cpu/armv8/hisilicon/pinmux.c create mode 100644 arch/arm/include/asm/arch-hi6220/dwmmc.h create mode 100644 arch/arm/include/asm/arch-hi6220/gpio.h create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220.h create mode 100644 arch/arm/include/asm/arch-hi6220/hi6220_regs_alwayson.h create mode 100644 arch/arm/include/asm/arch-hi6220/periph.h create mode 100644 arch/arm/include/asm/arch-hi6220/pinmux.h create mode 100644 board/hisilicon/hikey/Kconfig create mode 100644 board/hisilicon/hikey/Makefile create mode 100644 board/hisilicon/hikey/README create mode 100644 board/hisilicon/hikey/hikey.c create mode 100644 configs/hikey_defconfig create mode 100644 drivers/gpio/hi6220_gpio.c create mode 100644 drivers/mmc/hi6220_dw_mmc.c create mode 100644 drivers/power/pmic/pmic_hi6553.c create mode 100644 hikey-u-boot.mak create mode 100644 include/configs/hikey.h create mode 100644 include/power/hi6553_pmic.h -- 1.9.1

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