December 2022 - U-Boot

[PATCH] patch: SPI NOR: versal_net_virt: Enabling gigadevice parts
by Victor Lim 12 Dec '22

12 Dec '22

Enabling gigadevice parts in the config file. Signed-off-by: Victor Lim <vlim(a)gigadevice.com> --- configs/xilinx_versal_net_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 6339b17d20..86e18807c3 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -119,5 +119,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Xilinx" CONFIG_USB_GADGET_VENDOR_NUM=0x03FD CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_USB_FUNCTION_THOR=y CONFIG_OF_LIBFDT_OVERLAY=y -- 2.25.1

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[PATCH] SPI NOR: zynq_virt: enabling Gigadevice part # in zynq virt config file
by Victor Lim 12 Dec '22

12 Dec '22

Enabling Gigadevice part # in this config file Signed-off-by: Victor Lim <vlim(a)gigadevice.com> --- configs/xilinx_zynq_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 611c5e993c..6506cc7ecc 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -131,3 +131,4 @@ CONFIG_SPL_GZIP=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y +CONFIG_SPI_FLASH_GIGADEVICE=y -- 2.25.1

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[PATCH] patch: SPI: NOR: zynqmp_virt: enabling Gigadevice part #
by Victor Lim 12 Dec '22

12 Dec '22

Enabling Gigadevice part # in this config file Signed-off-by: Victor Lim <vlim(a)gigadevice.com> --- configs/xilinx_zynqmp_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index e63b19b911..f1e58426aa 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -218,3 +218,4 @@ CONFIG_EFI_SET_TIME=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y +CONFIG_SPI_FLASH_GIGADEVICE=y -- 2.25.1

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[PATCH] patch v2: SPI NOR: zynqmp: zynq: gd55lx02g
by Victor Lim 12 Dec '22

12 Dec '22

adding gd55lx02g to the file Signed-off-by: Victor Lim <vlim(a)gigadevice.com> --- drivers/mtd/spi/spi-nor-ids.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 726781f15b..a729575979 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -194,6 +194,8 @@ const struct flash_info spi_nor_ids[] = { SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, {INFO("gd55lx01g", 0xc8681B, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lx02g", 0xc8681C, 0, 64 * 1024, 4096, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ /* ISSI */ -- 2.25.1

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[PATCH] sunxi: Fix serial console for A10s-OLinuXino-MICRO
by Mark Kettenis 11 Dec '22

11 Dec '22

On this board CONFIG_CONS_INDEX needs to be 1 unlike other sun5i boards. Since this is the default, remove to bogus setting. Fixes: 7095f8641863 ("sunxi: Convert CONS_INDEX to Kconfig") Signed-off-by: Mark Kettenis <kettenis(a)openbsd.org> --- configs/A10s-OLinuXino-M_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 2ac68039b0..37ebeb9c85 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -17,6 +17,5 @@ CONFIG_SYS_I2C_SPEED=400000 CONFIG_MII=y CONFIG_SUN4I_EMAC=y CONFIG_AXP152_POWER=y -CONFIG_CONS_INDEX=2 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y -- 2.38.1

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Pull request for u-boot-nand-20221211
by Dario Binacchi 11 Dec '22

11 Dec '22

Hi Tom, The following changes since commit 8f170408774b30aa4ee91b3cc90ba09b564d4651: Merge tag 'u-boot-stm32-20221207' of https://source.denx.de/u-boot/custodians/u-boot-stm (2022-12-08 11:25:08 -0500) are available in the Git repository at: https://source.denx.de/u-boot/u-boot.git u-boot-nand-20221211 for you to fetch changes up to fda2253d121f05921e419edffe615c607917792a: spl: spl_legacy: fix invalid offset in SPL_COPY_PAYLOAD_ONLY (2022-12-10 14:35:55 +0100) Gitlab CI showed no issues: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/14397 ---------------------------------------------------------------- Merge tag 'u-boot-nand-20221211' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash - cmd: nand: Extend nand info to print ecc information - rawnand: omap_gpmc: driver model support (the first patches of the series) - mtd: nand: make Samsung SLC NAND usable again - cmd: mtd: check if a block has to be skipped or erased - spl: spl_legacy: fix invalid offset in SPL_COPY_PAYLOAD_ONLY ---------------------------------------------------------------- Dai Okamura (1): spl: spl_legacy: fix invalid offset in SPL_COPY_PAYLOAD_ONLY Dario Binacchi (3): cmd: mtd: check if a block has to be skipped or erased mtd: nand: drop EXPORT_SYMBOL_GPL for nanddev_erase() mtd: nand: mxs_nand_spl: don't read useless pages Michael Trimarchi (2): cmd: nand: Extend nand info to print ecc information mtd: nand: make Samsung SLC NAND usable again Roger Quadros (6): mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h mtd: rawnand: omap_gpmc: Enable build for K2/K3 platforms mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms mtd: rawnand: omap_gpmc: Optimize NAND reads mtd: rawnand: nand_spl_loaders: Fix cast type build warning mtd: rawnand: omap_gpmc: Reduce .bss usage cmd/mtd.c | 28 ++++++++++++++++++++-------- cmd/nand.c | 14 ++++++++------ common/spl/spl_legacy.c | 4 ++-- drivers/mtd/nand/core.c | 3 +-- drivers/mtd/nand/raw/Kconfig | 2 +- drivers/mtd/nand/raw/mxs_nand_spl.c | 2 +- drivers/mtd/nand/raw/nand_base.c | 7 +++++-- drivers/mtd/nand/raw/nand_spl_loaders.c | 2 +- drivers/mtd/nand/raw/omap_gpmc.c | 68 ++++++++++++++++++++++++++++++++++++++++++-------------------------- include/linux/mtd/nand.h | 1 - 10 files changed, 81 insertions(+), 50 deletions(-) -- Dario Binacchi Embedded Linux Developer dario.binacchi(a)amarulasolutions.com __________________________________ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 info(a)amarulasolutions.com www.amarulasolutions.com

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[PATCH 1/2] configs: add env. variable to support compressed kernel in qspiboot
by Jit Loon Lim 11 Dec '22

11 Dec '22

From: Kah Jing Lee <kah.jing.lee(a)intel.com> Fix qspiboot issue which uncompressed kernel(5.16) overflows to rootfs Add 2 env. variables to support compressed kernel in legacy qspiboot: setenv kernel_comp_addr_r 0x9000000 setenv kernel_comp_size 0x01000000 Signed-off-by: Kah Jing Lee <kah.jing.lee(a)intel.com> Signed-off-by: Jit Loon Lim <jit.loon.lim(a)intel.com> --- include/configs/socfpga_soc64_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index f7f3bc1f13..7fe9dced88 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -133,6 +133,8 @@ #else #define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_comp_addr_r=0x9000000\0" \ + "kernel_comp_size=0x01000000\0" \ "qspibootimageaddr=0x020E0000\0" \ "qspifdtaddr=0x020D0000\0" \ "bootimagesize=0x01F00000\0" \ -- 2.26.2

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[PATCH] mtd: spi: Add ISSI QSPI to lightweight SPI flash stack for spl
by Jit Loon Lim 11 Dec '22

11 Dec '22

From: "Lokanathan, Raaj" <raaj.lokanathan(a)intel.com> Add support for reading data/images from this ISSI QSPI flash. Signed-off-by: Lokanathan, Raaj <raaj.lokanathan(a)intel.com> Signed-off-by: Jit Loon Lim <jit.loon.lim(a)intel.com> --- drivers/mtd/spi/spi-nor-tiny.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c index 68152ce3b4..6a5da38cb1 100644 --- a/drivers/mtd/spi/spi-nor-tiny.c +++ b/drivers/mtd/spi/spi-nor-tiny.c @@ -219,6 +219,7 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info, case SNOR_MFR_MICRON: /* Some Micron need WREN command; all will accept it */ need_wren = true; + case SNOR_MFR_ISSI: case SNOR_MFR_MACRONIX: case SNOR_MFR_WINBOND: if (need_wren) @@ -432,7 +433,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, return -ENOTSUPP; } -#ifdef CONFIG_SPI_FLASH_MACRONIX +#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_ISSI) /** * macronix_quad_enable() - set QE bit in Status Register. * @nor: pointer to a 'struct spi_nor' @@ -661,8 +662,9 @@ static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info, /* Enable Quad I/O if needed. */ if (spi_nor_get_protocol_width(nor->read_proto) == 4) { switch (JEDEC_MFR(info)) { -#ifdef CONFIG_SPI_FLASH_MACRONIX +#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_ISSI) case SNOR_MFR_MACRONIX: + case SNOR_MFR_ISSI: err = macronix_quad_enable(nor); break; #endif -- 2.26.2

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[PATCH] arm: socfpga: Expand the help text for the bridge command.
by Jit Loon Lim 11 Dec '22

11 Dec '22

From: "Lokanathan, Raaj" <raaj.lokanathan(a)intel.com> The existing bridge command is incomplete and it has spelling error. This newly added help text indicates the bit positions and the values of the mask. ie: bit 0 = h2f/s2f, bit 1 = lwhps2fpga, and bit 2 = f2h/f2s These bridges available only in Stratix 10: bit3: f2sdram0 bit4: f2sdram1 bit5: f2sdram2 Signed-off-by: Lokanathan, Raaj <raaj.lokanathan(a)intel.com> Signed-off-by: Jit Loon Lim <jit.loon.lim(a)intel.com> --- arch/arm/mach-socfpga/misc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 9c19157de7..0112cfd101 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -209,8 +209,9 @@ static int do_bridge(struct cmd_tbl *cmdtp, int flag, int argc, U_BOOT_CMD(bridge, 3, 1, do_bridge, "SoCFPGA HPS FPGA bridge control", - "enable [mask] - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n" - "bridge disable [mask] - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n" + "enable [mask] - Enable HPS-to-FPGA (Bit 0), LWHPS-to-FPGA (Bit 1), FPGA-to-HPS (Bit 2), F2SDRAM0 (Bit 3), F2SDRAM1 (Bit 4), F2SDRAM2 (Bit 5) bridges \n" + "bridge disable [mask] - Disable HPS-to-FPGA (Bit 0), LWHPS-to-FPGA (Bit 1), FPGA-to-HPS (Bit 2), F2SDRAM0 (Bit 3), F2SDRAM1 (Bit 4), F2SDRAM2 (Bit 5) bridges\n" + "Bit 3, Bit 4 and Bit 5 bridges only available in Stratix 10\n" "" ); -- 2.26.2

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[PATCH] patch v2: SPI NOR: zynqmp: zynq: gd55lx01g
by Victor Lim 11 Dec '22

11 Dec '22

adding gd55lx01g to the file Signed-off-by: Victor Lim <vlim(a)gigadevice.com> --- drivers/mtd/spi/spi-nor-ids.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 370d1f7698..726781f15b 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -192,6 +192,8 @@ const struct flash_info spi_nor_ids[] = { }, {INFO("gd25lx512", 0xc8681A, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, + {INFO("gd55lx01g", 0xc8681B, 0, 64 * 1024, 2048, SECT_4K | + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)}, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ /* ISSI */ -- 2.25.1

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