June 2018 - U-Boot

[U-Boot] [PATCH v6 0/7] sunxi: sync H3, H5, A64 DTs from mainline Linux
by Andre Przywara 19 Jun '18

19 Jun '18

This is an updated version of the series which brings the exact mainline Linux device tree files for various Allwinner boards into U-Boot. Apart from using the usually more correct reference DT files, this offers the big benefit of being able to use U-Boot's DT copy for directly passing it to the kernel. This avoids to actually load a .dtb file from somewhere, and allows seamless and automatic UEFI booting, so distribution installer images should just work (TM). This cover the ARMv8 SoCs (H5, A64), but also all boards with the H3, as this is somewhat married to the H5 and can only be updated together. The H3 and H5 DT files have diverged quite a bit, but as U-Boot's own usage of the DT is (yet) quite limited, there should be no regressions. The patches are split to first update the SoC .dtsi file, then the board .dts files in a second patch. They are grouped to handle the A64 first, then the H5 and H3. I put the respective kernel commit IDs in the commit messages. Patch 6 brings in the mainline DT for the SoPine baseboard, for which we didn't have a separate .dts in U-Boot so far. Patch 7 adds a separate .dts file for the Pine64-LTS board, which is virtually identical to the SoPine baseboard, but, due to the SoC being named differently, deserves a separate file. This is based on origin/master (ca70cbabdcd1). Maxime, I kept you Acked-by: from the previous posts, as I literally just updated to the latest Linux master, which went through your review anyway. Hope that's OK for you. Cheers, Andre. Changelog v5 .. v6: - bring back DT update patches - update to Linux v4.17-rc5 Changelog v4 .. v5: - drop Linux DT update patches for now - fix minor checkpatch complaints Changelog v3 .. v4: - remove MMC environment for all Allwinner boards (including 32 bit ones) - keep MMC environment offset to the old values - drop DT adjustments to use fixed MMC regulator Changelog v2 .. v3: 01: added, was on the list before 02: drop redundant H5 line 03-08: unchanged 09-20: added Changelog v1 .. v2: 01, 02, 03: unchanged 04, 05, 06, 07: added Andre Przywara (7): sunxi: DT: A64: update device tree file for Allwinner A64 SoC sunxi: DT: A64: update board .dts files from Linux sunxi: DT: update device tree files for Allwinner H3 and H5 SoCs sunxi: DT: H5: update board .dts files from Linux sunxi: DT: H3: update board .dts files from Linux sunxi: DT: A64: add proper SoPine baseboard device tree sunxi: DT: A64: add Pine64-LTS support arch/arm/dts/Makefile | 4 +- arch/arm/dts/axp803.dtsi | 150 +++++ arch/arm/dts/sun50i-a64-bananapi-m64.dts | 200 +++++- arch/arm/dts/sun50i-a64-nanopi-a64.dts | 111 +++- arch/arm/dts/sun50i-a64-olinuxino.dts | 153 ++++- arch/arm/dts/sun50i-a64-orangepi-win.dts | 135 +++- arch/arm/dts/sun50i-a64-pine64-lts.dts | 13 + arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 59 -- arch/arm/dts/sun50i-a64-pine64-plus.dts | 17 +- arch/arm/dts/sun50i-a64-pine64.dts | 186 +++++- arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 150 +++++ arch/arm/dts/sun50i-a64-sopine.dtsi | 142 ++++ arch/arm/dts/sun50i-a64.dtsi | 303 ++++++++- arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 122 +++- arch/arm/dts/sun50i-h5-nanopi-neo2.dts | 91 ++- arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 186 +++++- arch/arm/dts/sun50i-h5-orangepi-prime.dts | 189 +++++- arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 64 +- arch/arm/dts/sun50i-h5.dtsi | 36 +- arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 55 +- arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts | 109 ++- arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts | 78 +++ arch/arm/dts/sun8i-h3-nanopi-m1.dts | 42 ++ arch/arm/dts/sun8i-h3-nanopi-neo-air.dts | 28 +- arch/arm/dts/sun8i-h3-nanopi-neo.dts | 17 + arch/arm/dts/sun8i-h3-nanopi.dtsi | 13 +- arch/arm/dts/sun8i-h3-orangepi-2.dts | 92 ++- arch/arm/dts/sun8i-h3-orangepi-lite.dts | 57 +- arch/arm/dts/sun8i-h3-orangepi-one.dts | 94 ++- arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts | 11 +- arch/arm/dts/sun8i-h3-orangepi-pc.dts | 113 +++- arch/arm/dts/sun8i-h3-orangepi-plus.dts | 29 +- arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 15 +- arch/arm/dts/sun8i-h3.dtsi | 544 ++------------- arch/arm/dts/sunxi-h3-h5.dtsi | 842 ++++++++++++++++++++++++ arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi | 2 - configs/sopine_baseboard_defconfig | 3 +- include/dt-bindings/clock/sun8i-de2.h | 18 + include/dt-bindings/clock/sun8i-r-ccu.h | 59 ++ include/dt-bindings/reset/sun8i-de2.h | 14 + include/dt-bindings/reset/sun8i-r-ccu.h | 53 ++ 41 files changed, 3703 insertions(+), 896 deletions(-) create mode 100644 arch/arm/dts/axp803.dtsi create mode 100644 arch/arm/dts/sun50i-a64-pine64-lts.dts delete mode 100644 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi create mode 100644 arch/arm/dts/sun50i-a64-sopine-baseboard.dts create mode 100644 arch/arm/dts/sun50i-a64-sopine.dtsi create mode 100644 arch/arm/dts/sunxi-h3-h5.dtsi create mode 100644 include/dt-bindings/clock/sun8i-de2.h create mode 100644 include/dt-bindings/clock/sun8i-r-ccu.h create mode 100644 include/dt-bindings/reset/sun8i-de2.h create mode 100644 include/dt-bindings/reset/sun8i-r-ccu.h -- 2.14.1

4 12

[U-Boot] [PATCH v2] x86: Add 64-bit setjmp/longjmp implementation
by Ivan Gorinov 19 Jun '18

19 Jun '18

Add setjmp/longjmp functions for x86_64. The FPU control word and MXCSR control bits are preserved across calls. Signed-off-by: Ivan Gorinov <ivan.gorinov(a)intel.com> --- arch/x86/cpu/x86_64/setjmp.S | 66 +++++++++++++++++++++++++++++++++++++++++++ arch/x86/cpu/x86_64/setjmp.c | 19 ------------- arch/x86/include/asm/setjmp.h | 19 +++++++++++++ 3 files changed, 85 insertions(+), 19 deletions(-) create mode 100644 arch/x86/cpu/x86_64/setjmp.S delete mode 100644 arch/x86/cpu/x86_64/setjmp.c diff --git a/arch/x86/cpu/x86_64/setjmp.S b/arch/x86/cpu/x86_64/setjmp.S new file mode 100644 index 0000000..ef61a4a --- /dev/null +++ b/arch/x86/cpu/x86_64/setjmp.S @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2018 Intel Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + * + * See arch/x86/include/asm/setjmp.h for jmp_buf format + */ + +#include <linux/linkage.h> + +.text +.align 8 + +ENTRY(setjmp) + + pop %rcx + movq %rcx, (%rdi) /* Return address */ + movq %rsp, 8 (%rdi) + movq %rbp, 16 (%rdi) + movq %rbx, 24 (%rdi) + movq %r12, 32 (%rdi) + movq %r13, 40 (%rdi) + movq %r14, 48 (%rdi) + movq %r15, 56 (%rdi) + fnstcw 64 (%rdi) + stmxcsr 68 (%rdi) + xorq %rax, %rax /* Direct invocation returns 0 */ + jmpq *%rcx + +ENDPROC(setjmp) + +.align 8 + +ENTRY(longjmp) + + subq $8, %rsp + +/* Restore the control bits of MXCSR */ + + stmxcsr (%rsp) + movl $0x3f, %eax + andl %eax, (%rsp) + notl %eax + andl 68 (%rdi), %eax + orl %eax, (%rsp) + ldmxcsr (%rsp) + + fldcw 64 (%rdi) + + movq (%rdi), %rcx /* Return address */ + movq 8 (%rdi), %rsp + movq 16 (%rdi), %rbp + movq 24 (%rdi), %rbx + movq 32 (%rdi), %r12 + movq 40 (%rdi), %r13 + movq 48 (%rdi), %r14 + movq 56 (%rdi), %r15 + + movq %rsi, %rax /* Value to be returned by setjmp() */ + testq %rax, %rax /* cannot be 0 in this case */ + jnz 1f + incq %rax /* Return 1 instead */ +1: + jmpq *%rcx + +ENDPROC(longjmp) diff --git a/arch/x86/cpu/x86_64/setjmp.c b/arch/x86/cpu/x86_64/setjmp.c deleted file mode 100644 index 5d4a74a..0000000 --- a/arch/x86/cpu/x86_64/setjmp.c +++ /dev/null @@ -1,19 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2016 Google, Inc - */ - -#include <common.h> -#include <asm/setjmp.h> - -int setjmp(struct jmp_buf_data *jmp_buf) -{ - printf("WARNING: setjmp() is not supported\n"); - - return 0; -} - -void longjmp(struct jmp_buf_data *jmp_buf, int val) -{ - printf("WARNING: longjmp() is not supported\n"); -} diff --git a/arch/x86/include/asm/setjmp.h b/arch/x86/include/asm/setjmp.h index f25975f..eae33fb 100644 --- a/arch/x86/include/asm/setjmp.h +++ b/arch/x86/include/asm/setjmp.h @@ -8,6 +8,23 @@ #ifndef __setjmp_h #define __setjmp_h +#ifdef CONFIG_X86_64 + +struct jmp_buf_data { + unsigned long __rip; + unsigned long __rsp; + unsigned long __rbp; + unsigned long __rbx; + unsigned long __r12; + unsigned long __r13; + unsigned long __r14; + unsigned long __r15; + unsigned int __fcw; + unsigned int __mxcsr; +}; + +#else + struct jmp_buf_data { unsigned int __ebx; unsigned int __esp; @@ -17,6 +34,8 @@ struct jmp_buf_data { unsigned int __eip; }; +#endif + int setjmp(struct jmp_buf_data *jmp_buf); void longjmp(struct jmp_buf_data *jmp_buf, int val); -- 2.7.4

4 5

[U-Boot] [RFC PATCH] fpga: zynq: Add encrypted bitstream support with auto detect
by stefan＠herbrechtsmeier.net 19 Jun '18

19 Jun '18

From: Stefan Herbrechtsmeier <stefan.herbrechtsmeier(a)weidmueller.com> Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier(a)weidmueller.com> --- drivers/fpga/zynqpl.c | 73 ++++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 57 insertions(+), 16 deletions(-) diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index fd37d18..6622750 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -17,6 +17,7 @@ #define DEVCFG_CTRL_PCFG_PROG_B 0x40000000 #define DEVCFG_CTRL_PCFG_AES_EFUSE_MASK 0x00001000 +#define DEVCFG_CTRL_PCAP_RATE_EN_MASK 0x02000000 #define DEVCFG_ISR_FATAL_ERROR_MASK 0x00740040 #define DEVCFG_ISR_ERROR_FLAGS_MASK 0x00340840 #define DEVCFG_ISR_RX_FIFO_OV 0x00040000 @@ -38,18 +39,16 @@ #define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */ #endif +#define NOP_WORD 0x20000000 +#define CTRL0_WORD 0x3000a001 +#define MASK_WORD 0x3000c001 #define DUMMY_WORD 0xffffffff +#define CTRL0_DEC_MASK BIT(6) + /* Xilinx binary format header */ +#define MAX_DUMMY_WORD_COUNT 8 static const u32 bin_format[] = { - DUMMY_WORD, /* Dummy words */ - DUMMY_WORD, - DUMMY_WORD, - DUMMY_WORD, - DUMMY_WORD, - DUMMY_WORD, - DUMMY_WORD, - DUMMY_WORD, 0x000000bb, /* Sync word */ 0x11220044, /* Sync word */ DUMMY_WORD, @@ -85,7 +84,23 @@ static u32 load_word(const void *buf, u32 swap) return word; } -static u32 check_header(const void *buf) +static void *skip_dummy_words(const void *buf) +{ + u32 *test = (u32 *)buf; + u32 i; + + for (i = 0; i < MAX_DUMMY_WORD_COUNT; i++) { + if (load_word(&test[i], SWAP_NO) != DUMMY_WORD) { + debug("%s: Found no dummy word at position %d/%x\n", + __func__, i, (u32)&test[i]); + return &test[i]; + } + } + + return &test[i]; +} + +static u32 check_header(const void *buf, bool *encrypted) { u32 i, pattern; int swap = SWAP_NO; @@ -93,6 +108,8 @@ static u32 check_header(const void *buf) debug("%s: Let's check bitstream header\n", __func__); + test = (u32 *)skip_dummy_words(buf); + /* Checking that passing bin is not a bitstream */ for (i = 0; i < ARRAY_SIZE(bin_format); i++) { pattern = load_word(&test[i], swap); @@ -112,18 +129,34 @@ static u32 check_header(const void *buf) debug("%s: %d/%x: pattern %x/%x bin_format\n", __func__, i, (u32)&test[i], pattern, bin_format[i]); + if (pattern != bin_format[i]) { debug("%s: Bitstream is not recognized\n", __func__); return 0; } } - debug("%s: Found bitstream header at %x %s swapinng\n", __func__, - (u32)buf, swap == SWAP_NO ? "without" : "with"); + + test = &test[i]; + + /* Checking if passing bin is an encrypted bitstream */ + if ((load_word(&test[0], swap) == NOP_WORD) && + (load_word(&test[1], swap) == MASK_WORD) && + (load_word(&test[2], swap) & CTRL0_DEC_MASK) && + (load_word(&test[3], swap) == CTRL0_WORD) && + (load_word(&test[4], swap) & CTRL0_DEC_MASK) && + (load_word(&test[5], swap) == NOP_WORD)) + *encrypted = true; + else + *encrypted = false; + + debug("%s: Found %sencrypted bitstream header at %x %s swapping\n", + __func__, *encrypted ? "" : "un", (u32)buf, + swap == SWAP_NO ? "without" : "with"); return swap; } -static void *check_data(u8 *buf, size_t bsize, u32 *swap) +static void *check_data(u8 *buf, size_t bsize, u32 *swap, bool *encrypted) { u32 word, p = 0; /* possition */ @@ -136,7 +169,7 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap) if (word == DUMMY_WORD) { debug("%s: Found dummy word at position %x/%x\n", __func__, p, (u32)&buf[p]); - *swap = check_header(&buf[p]); + *swap = check_header(&buf[p], encrypted); if (*swap) { /* FIXME add full bitstream checking here */ return &buf[p]; @@ -191,7 +224,7 @@ static int zynq_dma_transfer(u32 srcbuf, u32 srclen, u32 dstbuf, u32 dstlen) return FPGA_SUCCESS; } -static int zynq_dma_xfer_init(bitstream_type bstype) +static int zynq_dma_xfer_init(bitstream_type bstype, bool encrypted) { u32 status, control, isr_status; unsigned long ts; @@ -291,6 +324,13 @@ static int zynq_dma_xfer_init(bitstream_type bstype) writel(DEVCFG_STATUS_DMA_DONE_CNT_MASK, &devcfg_base->status); } + control = readl(&devcfg_base->ctrl); + if (encrypted) + control |= DEVCFG_CTRL_PCAP_RATE_EN_MASK; + else + control &= ~DEVCFG_CTRL_PCAP_RATE_EN_MASK; + writel(control, &devcfg_base->ctrl); + return FPGA_SUCCESS; } @@ -336,10 +376,11 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf, size_t bsize, u32 blocksize, u32 *swap, bitstream_type *bstype) { + bool encrypted = false; u32 *buf_start; u32 diff; - buf_start = check_data((u8 *)buf, blocksize, swap); + buf_start = check_data((u8 *)buf, blocksize, swap, &encrypted); if (!buf_start) return FPGA_FAIL; @@ -358,7 +399,7 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf, return FPGA_FAIL; } - if (zynq_dma_xfer_init(*bstype)) + if (zynq_dma_xfer_init(*bstype, encrypted)) return FPGA_FAIL; return 0; -- 2.7.4

3 5

[U-Boot] [PATCH 1/1] x86: qemu: do not build car.o with start64.o
by Heinrich Schuchardt 19 Jun '18

19 Jun '18

car.o can only be used with start.o, not with start64.o. So on qemu 64bit it should only be built for 32bit SPL but not for u-boot. Without this patch but with an unrelated pending patch ("x86: Add 64-bit setjmp/longjmp implementation") the following error occurred for qemu-x86_64_defconfig: arch/x86/cpu/built-in.o: In function `car_init': arch/x86/cpu/qemu/car.S:25: undefined reference to `car_init_ret' Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- arch/x86/cpu/qemu/Makefile | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile index e5ea92545e3..b1daffd4a32 100644 --- a/arch/x86/cpu/qemu/Makefile +++ b/arch/x86/cpu/qemu/Makefile @@ -2,8 +2,11 @@ # # Copyright (C) 2015, Bin Meng <bmeng.cn(a)gmail.com> +ifndef CONFIG_$(SPL_)X86_64 +obj-y += car.o +endif ifndef CONFIG_EFI_STUB -obj-y += car.o dram.o +obj-y += dram.o endif obj-y += qemu.o obj-$(CONFIG_QFW) += cpu.o e820.o -- 2.17.1

2 3

[U-Boot] [PATCH] mmc: Parse HS400 DT properties
by Marek Vasut 19 Jun '18

19 Jun '18

Add HS400 properties parsing support to mmc_of_parse(). Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Jean-Jacques Hiblot <jjhiblot(a)ti.com> Cc: Kishon Vijay Abraham I <kishon(a)ti.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/mmc/mmc-uclass.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index f73f07254b..76225b7939 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -166,6 +166,10 @@ int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg) cfg->host_caps |= MMC_CAP(MMC_HS_200); if (dev_read_bool(dev, "mmc-hs200-1_2v")) cfg->host_caps |= MMC_CAP(MMC_HS_200); + if (dev_read_bool(dev, "mmc-hs400-1_8v")) + cfg->host_caps |= MMC_CAP(MMC_HS_400); + if (dev_read_bool(dev, "mmc-hs400-1_2v")) + cfg->host_caps |= MMC_CAP(MMC_HS_400); return 0; } -- 2.17.1

3 2

[U-Boot] [PATCH] common/memsize.c: Increase save array for supporting memory size > 4GB
by tien.fong.chee＠intel.com 19 Jun '18

19 Jun '18

From: Tien Fong Chee <tien.fong.chee(a)intel.com> In ARM 64-bits, memory size can be supported is more than 4GB, hence increasing save array is needed to cope with testing larger memory. Signed-off-by: Tien Fong Chee <tien.fong.chee(a)intel.com> --- common/memsize.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/memsize.c b/common/memsize.c index 5670e95..b091203 100644 --- a/common/memsize.c +++ b/common/memsize.c @@ -26,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR; long get_ram_size(long *base, long maxsize) { volatile long *addr; - long save[31]; + long save[BITS_PER_LONG]; long save_base; long cnt; long val; -- 1.7.7.4

4 3

[U-Boot] [PATCH] pinctrl: renesas: Fix register usage in sh_pfc_{read, write}
by Marek Vasut 19 Jun '18

19 Jun '18

The sh_pfc_{read,write}() must operate on the register address directly rather than on an offset, fix this to prevent illegal access. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/pinctrl/renesas/pfc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c index 6aa2e13f3e..90011537a8 100644 --- a/drivers/pinctrl/renesas/pfc.c +++ b/drivers/pinctrl/renesas/pfc.c @@ -121,7 +121,7 @@ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width, u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg) { - return sh_pfc_read_raw_reg(pfc->regs + reg, 32); + return sh_pfc_read_raw_reg((void __iomem *)(uintptr_t)reg, 32); } void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data) @@ -132,7 +132,7 @@ void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data) if (pfc->info->unlock_reg) sh_pfc_write_raw_reg(unlock_reg, 32, ~data); - sh_pfc_write_raw_reg(pfc->regs + reg, 32, data); + sh_pfc_write_raw_reg((void __iomem *)(uintptr_t)reg, 32, data); } static void sh_pfc_config_reg_helper(struct sh_pfc *pfc, -- 2.17.1

1 0

[U-Boot] [PULL] u-boot-sh/master
by Marek Vasut 19 Jun '18

19 Jun '18

The following changes since commit acaee30608ce203289a180d664b7f0abb2e64ee7: ARM: DTS: resync a3517.dtsi with Linux 4.17 (2018-06-13 07:49:14 -0400) are available in the Git repository at: git://git.denx.de/u-boot-sh.git master for you to fetch changes up to 891bf67611e93df3f3a6c451d945a7810435ed13: ARM: rmobile: Disable 4k SF sectors on V3M Eagle (2018-06-16 04:27:28 +0200) ---------------------------------------------------------------- Marek Vasut (21): dts: gpio: Sync header with Linux 4.17 clk: rmobile: Add R8A77990 RPC clock clk: rmobile: Add R8A77995 RPC clock pinctrl: renesas: Sync Gen2 PFC tables with Linux v4.17 pinctrl: renesas: Sync Gen3 PFC tables with Linux v4.17 ARM: rmobile: Sync Gen2 DTS with Linux v4.17 ARM: rmobile: Sync Gen3 DTS with Linux v4.17 ARM: rmobile: Zap CONFIG_SYS_CLK_FREQ where applicable ARM: rmobile: Point load address to more sane area on Gen2 ARM: rmobile: Point load address to more sane area on Gen3 ARM: rmobile: Fix environment placement on Draak ARM: rmobile: Enable RPCHF on Draak ARM: dts: rmobile: Add Renesas RPC HF/QSPI DT node to R8A77990 ARM: dts: rmobile: Add SCIF2 pinmux to E3 Ebisu ARM: dts: rmobile: Add initial SDHI nodes to R8A77990 E3 ARM: dts: rmobile: Enable SDHI on E3 Ebisu ARM: dts: rmobile: Add AVB pinmux on V3M Eagle ARM: dts: rmobile: Add AVB PHY reset on V3M Eagle ARM: rmobile: Fix CPGW address on V3M Eagle ARM: rmobile: Enable cache command on V3M Eagle ARM: rmobile: Disable 4k SF sectors on V3M Eagle arch/arm/dts/r8a7790-lager.dts | 310 +++++++++----- arch/arm/dts/r8a7790.dtsi | 2877 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------------------------------------------------------- arch/arm/dts/r8a7791-koelsch.dts | 259 ++++++----- arch/arm/dts/r8a7791-porter.dts | 151 ++++--- arch/arm/dts/r8a7791.dtsi | 3008 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------------- arch/arm/dts/r8a7792.dtsi | 587 +++++++++++++------------ arch/arm/dts/r8a7793-gose.dts | 262 +++++++----- arch/arm/dts/r8a7793.dtsi | 2409 +++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------------------------------- arch/arm/dts/r8a7794-alt.dts | 56 ++- arch/arm/dts/r8a7794-silk.dts | 189 +++++--- arch/arm/dts/r8a7794.dtsi | 2416 ++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------- arch/arm/dts/r8a7795.dtsi | 602 +++++++++++++++++++++----- arch/arm/dts/r8a7796.dtsi | 556 ++++++++++++++++++------ arch/arm/dts/r8a77965.dtsi | 127 +++++- arch/arm/dts/r8a77970-eagle.dts | 77 ++-- arch/arm/dts/r8a77970.dtsi | 328 ++++++++++++-- arch/arm/dts/r8a77990-ebisu.dts | 30 ++ arch/arm/dts/r8a77990.dtsi | 32 ++ arch/arm/dts/r8a77995-draak.dts | 124 ++++++ arch/arm/dts/r8a77995.dtsi | 423 +++++++++++++++++- arch/arm/dts/salvator-common.dtsi | 85 +++- arch/arm/dts/ulcb.dtsi | 22 +- board/renesas/eagle/eagle.c | 7 +- configs/r8a77970_eagle_defconfig | 2 + configs/r8a77995_draak_defconfig | 1 + drivers/clk/renesas/r8a77990-cpg-mssr.c | 5 + drivers/clk/renesas/r8a77995-cpg-mssr.c | 5 + drivers/pinctrl/renesas/pfc-r8a7790.c | 8 +- drivers/pinctrl/renesas/pfc-r8a7791.c | 84 +++- drivers/pinctrl/renesas/pfc-r8a7794.c | 473 ++++++++++++++++++++ drivers/pinctrl/renesas/pfc-r8a7795.c | 1954 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------- drivers/pinctrl/renesas/pfc-r8a7796.c | 1048 ++++++++++++++++++++++++++++++++------------- drivers/pinctrl/renesas/pfc-r8a77970.c | 873 ++++++++++++++++--------------------- drivers/pinctrl/renesas/pfc-r8a77990.c | 3446 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++- drivers/pinctrl/renesas/pfc-r8a77995.c | 695 +++++++++++++++++++++++++++++- drivers/pinctrl/renesas/pfc.c | 29 +- drivers/pinctrl/renesas/sh_pfc.h | 66 ++- include/configs/draak.h | 6 +- include/configs/ebisu.h | 4 - include/configs/rcar-gen2-common.h | 3 +- include/configs/rcar-gen3-common.h | 3 +- include/configs/salvator-x.h | 4 - include/configs/ulcb.h | 4 - include/dt-bindings/gpio/gpio.h | 21 + 44 files changed, 16184 insertions(+), 7487 deletions(-)

2 2

[U-Boot] Please pull u-boot-x86
by Bin Meng 19 Jun '18

19 Jun '18

Hi Tom, The following changes since commit a715415bb5948c84cc44c601b193188990f7238b: Merge branch 'master' of git://git.denx.de/u-boot-usb (2018-06-16 00:07:37 -0400) are available in the git repository at: git://git.denx.de/u-boot-x86.git for you to fetch changes up to 0102023966558075e52758bd22ffd8f96b093a7e: x86: efi: app: Display correct CPU info during boot (2018-06-17 21:16:04 +0800) ---------------------------------------------------------------- Bin Meng (12): x86: cherryhill: Fix DTC warning x86: doc: Fix reference to EFI doc in U-Boot x86: efi: Refactor the directory of EFI app and payload support x86: efi: payload: Add arch_cpu_init() x86: Add generic EFI payload support x86: Drop QEMU-specific EFI payload support x86: baytrail: Drop EFI-specific test logics efi: stub: Pass EFI GOP information to U-Boot payload dm: video: Add an EFI framebuffer driver x86: efi: payload: Add EFI framebuffer driver support x86: Rename efi-x86 target to efi-x86_app x86: efi: app: Display correct CPU info during boot Ivan Gorinov (1): x86: use EFI calling convention for efi_main on x86_64 arch/x86/Kconfig | 3 +- arch/x86/cpu/Makefile | 2 +- arch/x86/cpu/baytrail/Kconfig | 6 ++-- arch/x86/cpu/baytrail/valleyview.c | 3 -- arch/x86/{lib => cpu}/efi/Kconfig | 0 arch/x86/cpu/efi/Makefile | 9 +++++- arch/x86/cpu/efi/{efi.c => app.c} | 2 +- arch/x86/{lib => cpu}/efi/car.S | 0 arch/x86/{lib/efi/efi.c => cpu/efi/payload.c} | 11 +++++-- arch/x86/cpu/intel_common/Makefile | 2 +- arch/x86/cpu/qemu/Makefile | 2 -- arch/x86/cpu/qemu/qemu.c | 4 --- arch/x86/dts/Makefile | 3 +- arch/x86/dts/cherryhill.dts | 2 -- arch/x86/dts/{efi.dts => efi-x86_app.dts} | 4 +-- arch/x86/dts/efi-x86_payload.dts | 40 +++++++++++++++++++++++++ arch/x86/lib/Makefile | 1 - arch/x86/lib/crt0_x86_64_efi.S | 24 ++++++++------- arch/x86/lib/efi/Makefile | 7 ----- board/advantech/som-db5800-som-6867/Kconfig | 5 ++-- board/congatec/conga-qeval20-qa3-e3845/Kconfig | 5 ++-- board/dfi/dfi-bt700/Kconfig | 5 ++-- board/efi/Kconfig | 15 ++++++++-- board/efi/{efi-x86 => efi-x86_app}/Kconfig | 6 ++-- board/efi/{efi-x86 => efi-x86_app}/MAINTAINERS | 0 board/efi/{efi-x86 => efi-x86_app}/Makefile | 2 +- board/efi/{efi-x86/efi.c => efi-x86_app/app.c} | 0 board/efi/efi-x86_payload/Kconfig | 39 ++++++++++++++++++++++++ board/efi/efi-x86_payload/MAINTAINERS | 7 +++++ board/efi/efi-x86_payload/Makefile | 5 ++++ board/efi/efi-x86_payload/start.S | 8 +++++ board/emulation/qemu-x86/Kconfig | 6 ++-- board/emulation/qemu-x86/MAINTAINERS | 2 -- board/intel/minnowmax/Kconfig | 5 ++-- configs/{efi-x86_defconfig => efi-x86_app_defconfig} | 4 +-- configs/{qemu-x86_efi_payload32_defconfig => efi-x86_payload32_defconfig} | 24 ++++----------- configs/{qemu-x86_efi_payload64_defconfig => efi-x86_payload64_defconfig} | 24 ++++----------- doc/README.u-boot_on_efi | 33 +++++++++----------- doc/README.x86 | 14 ++++----- drivers/video/Kconfig | 9 ++++++ drivers/video/Makefile | 1 + drivers/video/efi.c | 146 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ include/configs/{efi-x86.h => efi-x86_app.h} | 0 include/configs/efi-x86_payload.h | 32 ++++++++++++++++++++ include/efi.h | 35 ++++++++++++++++++++++ lib/efi/efi_app.c | 3 +- lib/efi/efi_stub.c | 18 ++++++++++- 47 files changed, 443 insertions(+), 135 deletions(-) rename arch/x86/{lib => cpu}/efi/Kconfig (100%) rename arch/x86/cpu/efi/{efi.c => app.c} (92%) rename arch/x86/{lib => cpu}/efi/car.S (100%) rename arch/x86/{lib/efi/efi.c => cpu/efi/payload.c} (97%) rename arch/x86/dts/{efi.dts => efi-x86_app.dts} (82%) create mode 100644 arch/x86/dts/efi-x86_payload.dts delete mode 100644 arch/x86/lib/efi/Makefile rename board/efi/{efi-x86 => efi-x86_app}/Kconfig (64%) rename board/efi/{efi-x86 => efi-x86_app}/MAINTAINERS (100%) rename board/efi/{efi-x86 => efi-x86_app}/Makefile (82%) rename board/efi/{efi-x86/efi.c => efi-x86_app/app.c} (100%) create mode 100644 board/efi/efi-x86_payload/Kconfig create mode 100644 board/efi/efi-x86_payload/MAINTAINERS create mode 100644 board/efi/efi-x86_payload/Makefile create mode 100644 board/efi/efi-x86_payload/start.S rename configs/{efi-x86_defconfig => efi-x86_app_defconfig} (92%) rename configs/{qemu-x86_efi_payload32_defconfig => efi-x86_payload32_defconfig} (61%) rename configs/{qemu-x86_efi_payload64_defconfig => efi-x86_payload64_defconfig} (62%) create mode 100644 drivers/video/efi.c rename include/configs/{efi-x86.h => efi-x86_app.h} (100%) create mode 100644 include/configs/efi-x86_payload.h Regards, Bin

2 2

Re: [U-Boot] Fw: make config Error
by Duncan Hare 18 Jun '18

18 Jun '18

From: Karsten Merker <merker(a)debian.org> To: Duncan Hare <dh(a)synoia.com> Cc: U-Boot Mailing List <u-boot(a)lists.denx.de> Sent: Monday, June 18, 2018 11:43 AM Subject: Re: [U-Boot] Fw: make config Error > > In this repository. It might exist elsewhere. > > I generally use raspbian to compile u-boot for the raspberry > pi, and Debian as a file server. This looks very much like either something in the repository setup on your Raspberry Pi is broken or the package mirror you use has problems. According to http://archive.raspbian.org/raspbian/dists/stable/main/binary-armhf/Package… Raspbian/stable definitely has both flex as well as bison in the main repository: Please refresh your local package information with "sudo apt-get update" and retry installing flex and bison. If that doesn't work, please provide your repository configuration, i.e. the contents of /etc/apt/sources.list and /etc/apt/sources.list.d/*, perhaps we can spot the source of your problem there. Good catch. Raspbian and Debian now fail in identical ways.Thanks Regards, Karsten Werbung sowie der Markt- oder Meinungsforschung. ____________________________________________________________________________ Which is: root@debian:/home/duncan/archive/u-boot# make clean root@debian:/home/duncan/archive/u-boot# make menuconfig....... duncan@debian:~/archive/u-boot$ make menuconfig HOSTCC scripts/basic/fixdep scripts/basic/fixdep.c:481:1: fatal error: opening dependency file scripts/basic/.fixdep.d: Permission denied } ^ compilation terminated. scripts/Makefile.host:97: recipe for target 'scripts/basic/fixdep' failed make[1]: *** [scripts/basic/fixdep] Error 1 Makefile:410: recipe for target 'scripts_basic' failed make: *** [scripts_basic] Error 2 duncan@debian:~/archive/u-boot$ ^C duncan@debian:~/archive/u-boot$ There is no .fixdep.d file in pi@raspberrypi:~/server/archive/u-boot/scripts/basic $ ls -al total 44 drwxr-xr-x 2 root root 4096 Jun 15 13:17 . drwxr-xr-x 6 root root 4096 Jun 15 08:39 .. -rwxr-xr-x 1 root root 13992 Jun 15 13:14 fixdep -rw-r--r-- 1 root root 12264 Jun 15 08:39 fixdep.c -rw-r--r-- 1 root root 7 Jun 15 08:39 .gitignore -rw-r--r-- 1 root root 706 Jun 15 08:39 Makefile What content and what permissions does u-boot/scripts/basic/fixdep.d require? Duncan Haredh(a)synoia.com

1 0