June 2018 - U-Boot

[U-Boot] [PATCH 1/2] net: mvneta: dcache flush TX descriptors at init
by Baruch Siach 18 Jun '18

18 Jun '18

From: Rabeeh Khoury <rabeeh(a)solid-run.com> This fixes sporadic timeout on initial packet Tx (usually ARP), with an error message like: timeout: packet not sent Signed-off-by: Rabeeh Khoury <rabeeh(a)solid-run.com> Signed-off-by: Baruch Siach <baruch(a)tkos.co.il> --- drivers/net/mvneta.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index 45e5eda95522..316a72b16517 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -1702,6 +1702,7 @@ static int mvneta_probe(struct udevice *dev) /* Align buffer area for descs and rx_buffers to 1MiB */ bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE); + flush_dcache_range((ulong)bd_space, (ulong)bd_space+BD_SPACE); mmu_set_region_dcache_behaviour((phys_addr_t)bd_space, BD_SPACE, DCACHE_OFF); buffer_loc.tx_descs = (struct mvneta_tx_desc *)bd_space; -- 2.17.1

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[U-Boot] [PATCH] net: ravb: Do not shut down clock in start callback
by Marek Vasut 18 Jun '18

18 Jun '18

Do not stop the clock in the start callback in case of failure, keep them running to also keep the PHY running. The failure could be ie. PHY failing to negotiate link and if the clock get shut down, another attempt at bringing the link up would fail. The clock right now are started in probe function and stopped in remove function, which is the correct behavior. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Joe Hershberger <joe.hershberger(a)ni.com> --- drivers/net/ravb.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index adcbc931e0..749562db96 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -438,7 +438,7 @@ static int ravb_start(struct udevice *dev) ret = ravb_reset(dev); if (ret) - goto err; + return ret; ravb_base_desc_init(eth); ravb_tx_desc_init(eth); @@ -446,16 +446,12 @@ static int ravb_start(struct udevice *dev) ret = ravb_config(dev); if (ret) - goto err; + return ret; /* Setting the control will start the AVB-DMAC process. */ writel(CCC_OPC_OPERATION, eth->iobase + RAVB_REG_CCC); return 0; - -err: - clk_disable(&eth->clk); - return ret; } static void ravb_stop(struct udevice *dev) -- 2.17.1

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[U-Boot] [PATCH] net: ravb: Filter out supported PHY features
by Marek Vasut 18 Jun '18

18 Jun '18

The RAVB only supports 100Full and 1000Full operation, it does not support 10Full or any Half-duplex modes. The PHY could still advertise those features though, so filter out the PHY features accordingly. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Joe Hershberger <joe.hershberger(a)ni.com> --- drivers/net/ravb.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index d66fcef4e7..adcbc931e0 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -318,12 +318,13 @@ static int ravb_phy_config(struct udevice *dev) eth->phydev = phydev; - /* 10BASE is not supported for Ethernet AVB MAC */ - phydev->supported &= ~(SUPPORTED_10baseT_Full - | SUPPORTED_10baseT_Half); + phydev->supported &= SUPPORTED_100baseT_Full | + SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | + SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_Pause | + SUPPORTED_Asym_Pause; + if (pdata->max_speed != 1000) { - phydev->supported &= ~(SUPPORTED_1000baseT_Half - | SUPPORTED_1000baseT_Full); + phydev->supported &= ~SUPPORTED_1000baseT_Full; reg = phy_read(phydev, -1, MII_CTRL1000); reg &= ~(BIT(9) | BIT(8)); phy_write(phydev, -1, MII_CTRL1000, reg); -- 2.17.1

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[U-Boot] [PATCH 1/3] net: ravb: Support reset GPIO both in mac and phy node
by Marek Vasut 18 Jun '18

18 Jun '18

The recent DTs have the PHY reset GPIO in the PHY node rather than the ethernet MAC node, support extracting the PHY reset GPIO info from both the PHY node and ethernet MAC node. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Joe Hershberger <joe.hershberger(a)ni.com> --- drivers/net/ravb.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 999894f0f6..d66fcef4e7 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -469,6 +469,7 @@ static int ravb_probe(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); struct ravb_priv *eth = dev_get_priv(dev); + struct ofnode_phandle_args phandle_args; struct mii_dev *mdiodev; void __iomem *iobase; int ret; @@ -480,8 +481,16 @@ static int ravb_probe(struct udevice *dev) if (ret < 0) goto err_mdio_alloc; - gpio_request_by_name(dev, "reset-gpios", 0, &eth->reset_gpio, - GPIOD_IS_OUT); + ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, &phandle_args); + if (!ret) { + gpio_request_by_name_nodev(phandle_args.node, "reset-gpios", 0, + &eth->reset_gpio, GPIOD_IS_OUT); + } + + if (!dm_gpio_is_valid(&eth->reset_gpio)) { + gpio_request_by_name(dev, "reset-gpios", 0, &eth->reset_gpio, + GPIOD_IS_OUT); + } mdiodev = mdio_alloc(); if (!mdiodev) { -- 2.17.1

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[U-Boot] Default script entry using FIT format scripts
by Alex Kiernan 18 Jun '18

18 Jun '18

I'm trying to get a build going without the legacy image format, but I need boot scripts (and I'm using distro boot). I'm coming unstuck when trying to boot one as there's no way to pass in the FIT unit name to source with distro boot. Would adding a default property inside /images (like we have inside /configurations for bootable images) be a reasonable approach? Trying to add the full configuration machinery feels over the top (though I'm wondering if down the road we want signed scripts if that might preclude it). -- Alex Kiernan

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[U-Boot] [PATCH 0/4] rockchip: Reduce prerequisites from the host
by Vicente Bergas 18 Jun '18

18 Jun '18

From: Vicente Bergas <vicencb(a)gmail.com> This patch series remove the dependency on python and dtc from the host for the Sapphire board. It does not conform to the U-Boot coding style. It has been posted here for informational purposes only. If there is interest in merging it, feel free to modify it at will, it is in the public domain. Vicente Bergas (4): [U-Boot] add make_fit_atf in tools [U-Boot] rockchip: rk3399: use make_fit_atf instead of make_fit_atf.py [U-Boot] rockchip: rk3399: disable CONFIG_SPL_OF_PLATDATA [U-Boot] rockchip: rk3399: set CONFIG_MKIMAGE_DTC_PATH configs/evb-rk3399_defconfig | 4 +- tools/Makefile | 2 + tools/make_fit_atf.c | 360 +++++++++++++++++++++++++++++++++++ 3 files changed, 364 insertions(+), 2 deletions(-) create mode 100644 tools/make_fit_atf.c -- 2.17.1

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[U-Boot] [PATCH] usb: sunxi: ohci: make ohci_t the first member in private data
by Vasily Khoruzhick 18 Jun '18

18 Jun '18

ohci-hcd casts priv_data pointer to (ohci_t *), thus it must be the first member in private data struct. Fixes 831cc98b1 ("usb: sunxi: Simplify ccm reg base code") Signed-off-by: Vasily Khoruzhick <anarsoul(a)gmail.com> --- drivers/usb/host/ohci-sunxi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c index e13f6ec9a4..db6f438275 100644 --- a/drivers/usb/host/ohci-sunxi.c +++ b/drivers/usb/host/ohci-sunxi.c @@ -33,9 +33,9 @@ struct ohci_sunxi_cfg { }; struct ohci_sunxi_priv { + ohci_t ohci; struct sunxi_ccm_reg *ccm; u32 *reset0_cfg; - ohci_t ohci; int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ int usb_gate_mask; /* Mask of usb_clk_cfg clk gate bits for this hcd */ struct phy phy; -- 2.17.1

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[U-Boot] [UBOOT PATCH v2 0/3] spi:xilinx_spi: Modify xilinx spi driver
by Vipul Kumar 18 Jun '18

18 Jun '18

This series of patches do the following: - This patch added support to get reg base address from DTS file - Added rxfifo() and txfifo() functions to add the modularity - Added support to read JEDEC-id twice at the boot time Changes in v2: - Split single patch into the series of patches Michal Simek (1): spi: xilinx: Read reg base address from DTS file Vipul Kumar (2): spi: xilinx_spi: Modify transfer logic xilinx_spi_xfer() function spi: xilinx_spi: Added support to read JEDEC-id twice at the boot time drivers/spi/xilinx_spi.c | 165 +++++++++++++++++++++++++++++++++++------------ 1 file changed, 122 insertions(+), 43 deletions(-) -- 2.7.4 This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

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[U-Boot] [PATCH] board: engicam: spl: match icore-mipi fit-config
by Jagan Teki 18 Jun '18

18 Jun '18

Match imx6q-icore-mipi and imx6dl-icore-mipi dtb in board_fit_config_name_match. Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- board/engicam/common/spl.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c index 470d96aaed..1a1fe6c66a 100644 --- a/board/engicam/common/spl.c +++ b/board/engicam/common/spl.c @@ -43,10 +43,14 @@ int board_fit_config_name_match(const char *name) return 0; else if (is_mx6dq() && !strcmp(name, "imx6q-icore-rqs")) return 0; + else if (is_mx6dq() && !strcmp(name, "imx6q-icore-mipi")) + return 0; else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore")) return 0; else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-rqs")) return 0; + else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-mipi")) + return 0; else return -1; } -- 2.14.3

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[U-Boot] [PATCH] ARM: mxs: let boards override entire dram parameter table
by Mans Rullgard 18 Jun '18

18 Jun '18

If many values differ from the defaults, overriding the full table is simpler and more space efficient than tweaking it through mxs_adjust_memory_params(). Signed-off-by: Mans Rullgard <mans(a)mansr.com> --- arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index a744e5d4990a..a19cfc50449f 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -16,7 +16,7 @@ #include "mxs_init.h" -static uint32_t dram_vals[] = { +__weak uint32_t mxs_dram_vals[] = { /* * i.MX28 DDR2 at 200MHz */ @@ -101,11 +101,11 @@ static void initialize_dram_values(void) int i; debug("SPL: Setting mx28 board specific SDRAM parameters\n"); - mxs_adjust_memory_params(dram_vals); + mxs_adjust_memory_params(mxs_dram_vals); debug("SPL: Applying SDRAM parameters\n"); - for (i = 0; i < ARRAY_SIZE(dram_vals); i++) - writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); + for (i = 0; i < ARRAY_SIZE(mxs_dram_vals); i++) + writel(mxs_dram_vals[i], MXS_DRAM_BASE + (4 * i)); } #else static void initialize_dram_values(void) @@ -113,7 +113,7 @@ static void initialize_dram_values(void) int i; debug("SPL: Setting mx23 board specific SDRAM parameters\n"); - mxs_adjust_memory_params(dram_vals); + mxs_adjust_memory_params(mxs_dram_vals); /* * HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as @@ -125,10 +125,10 @@ static void initialize_dram_values(void) * So skip the initialization of these HW_DRAM_CTL registers. */ debug("SPL: Applying SDRAM parameters\n"); - for (i = 0; i < ARRAY_SIZE(dram_vals); i++) { + for (i = 0; i < ARRAY_SIZE(mxs_dram_vals); i++) { if (i == 8 || i == 27 || i == 28 || i == 35) continue; - writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); + writel(mxs_dram_vals[i], MXS_DRAM_BASE + (4 * i)); } /* -- 2.17.0

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