August 2014 - U-Boot

[U-Boot] [PATCH] tools/env: change stripping strategy to allow no-stripping
by Thomas Petazzoni 25 Sep '14

25 Sep '14

When building the U-Boot tools for non-ELF platforms (such as Blackfin FLAT), since commit 79fc0c5f498c3982aa4740c273ab1a9255063d9c ("tools/env: cross-compile fw_printenv without setting HOSTCC"), the build fails because it tries to strip a FLAT binary, which does not make sense. This commit solves this by changing the stripping logic in tools/env/Makefile to be similar to the one in tools/Makefile. This logic continues to apply strip to the final binary, but does not abort the build if it fails, and does the stripping in place on the final binary. This allows the logic to work fine if stripping doesn't work, as it leaves the final binary untouched. Signed-off-by: Thomas Petazzoni <thomas.petazzoni(a)free-electrons.com> Cc: Masahiro Yamada <yamada.m(a)jp.panasonic.com> Cc: Sonic Zhang <sonic.zhang(a)analog.com> --- An improved solution would be to be able to override STRIP completely by setting it to /bin/true, but the main Makefile enforces STRIP = $(CROSS_COMPILE)strip. Signed-off-by: Thomas Petazzoni <thomas.petazzoni(a)free-electrons.com> --- tools/env/Makefile | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/tools/env/Makefile b/tools/env/Makefile index 4927489..40164f7 100644 --- a/tools/env/Makefile +++ b/tools/env/Makefile @@ -21,14 +21,16 @@ HOST_EXTRACFLAGS += -DMTD_OLD endif always := fw_printenv -hostprogs-y := fw_printenv_unstripped +hostprogs-y := fw_printenv -fw_printenv_unstripped-objs := fw_env.o fw_env_main.o \ +fw_printenv-objs := fw_env.o fw_env_main.o \ crc32.o ctype.o linux_string.o \ env_attr.o env_flags.o aes.o -quiet_cmd_strip = STRIP $@ - cmd_strip = $(STRIP) -o $@ $< +quiet_cmd_crosstools_strip = STRIP $^ + cmd_crosstools_strip = $(STRIP) $^; touch $@ -$(obj)/fw_printenv: $(obj)/fw_printenv_unstripped FORCE - $(call if_changed,strip) +$(obj)/.strip: $(obj)/fw_printenv + $(call cmd,crosstools_strip) + +always += .strip -- 2.0.0

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[U-Boot] [PATCH v6 0/4] Implement "fastboot flash" for eMMC
by Steve Rae 25 Sep '14

25 Sep '14

This series implements the "fastboot flash" command for eMMC devices. It supports both raw and sparse images. NOTES: - the support for the "fastboot flash" command is enabled with CONFIG_FASTBOOT_FLASH - the support for eMMC is enabled with CONFIG_FASTBOOT_FLASH_MMC_DEV - (future) the support for NAND would be enabled with CONFIG_FASTBOOT_FLASH_NAND(???) This has been tested on ARMv7. ---- This series depends on: http://patchwork.ozlabs.org/patch/382443/ (to 382446) Changes in v6: - printf() to error() - fix spelling - remove excess braces Changes in v5: - use the common/aboot.c for the "sparse format" handling Changes in v4: - rearranged this patchset so that "sparse_format.h" can be dropped (if we cannot resolve the copyright/licensing issues) - update mmc_get_dev(...) to get_dev("mmc",....) - update printf() to puts() where applicable - update debug string as per feedback - rearranged "sparse format" support in this patchset, in order to isolate... Changes in v3: - remove most references to 'mmc', which leaves only one mmc specific function: mmc_get_dev() Changes in v2: - split large function into three - improved handling of response messages - additional partition size checking when writing sparse image - update README.android-fastboot file - new in v2 Steve Rae (4): usb/gadget: fastboot: add eMMC support for flash command usb/gadget: fastboot: add support for flash command usb/gadget: fastboot: minor cleanup usb/gadget: fastboot: implement sparse format README | 10 +++++ common/Makefile | 6 +++ common/cmd_fastboot.c | 7 ++-- common/fb_mmc.c | 92 +++++++++++++++++++++++++++++++++++++++++ doc/README.android-fastboot | 5 ++- drivers/usb/gadget/f_fastboot.c | 44 ++++++++++++++++++-- include/fb_mmc.h | 8 ++++ 7 files changed, 163 insertions(+), 9 deletions(-) create mode 100644 common/fb_mmc.c create mode 100644 include/fb_mmc.h -- 1.8.5

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[U-Boot] [PATCH 1/2] mini2440: remove board support
by Albert ARIBAUD 24 Sep '14

24 Sep '14

Signed-off-by: Albert ARIBAUD <albert.u.boot(a)aribaud.net> --- board/friendlyarm/mini2440/Makefile | 8 -- board/friendlyarm/mini2440/mini2440.c | 118 ---------------------------- board/friendlyarm/mini2440/mini2440.h | 144 ---------------------------------- boards.cfg | 1 - doc/README.mini2440 | 28 ------- doc/README.scrapyard | 5 +- 6 files changed, 3 insertions(+), 301 deletions(-) delete mode 100644 board/friendlyarm/mini2440/Makefile delete mode 100644 board/friendlyarm/mini2440/mini2440.c delete mode 100644 board/friendlyarm/mini2440/mini2440.h delete mode 100644 doc/README.mini2440 diff --git a/board/friendlyarm/mini2440/Makefile b/board/friendlyarm/mini2440/Makefile deleted file mode 100644 index f367107..0000000 --- a/board/friendlyarm/mini2440/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2012 -# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := mini2440.o diff --git a/board/friendlyarm/mini2440/mini2440.c b/board/friendlyarm/mini2440/mini2440.c deleted file mode 100644 index 59ed054..0000000 --- a/board/friendlyarm/mini2440/mini2440.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger(a)sysgo.de> - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, <d.mueller(a)elsoft.ch> - * - * (C) Copyright 2009 - * Michel Pollet <buserror(a)gmail.com> - * - * (C) Copyright 2012 - * Gabriel Huau <contact(a)huau-gabriel.fr> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/arch/s3c2440.h> -#include <asm/arch/iomux.h> -#include <asm/arch/gpio.h> -#include <asm/io.h> -#include <asm/gpio.h> -#include <netdev.h> -#include "mini2440.h" - -DECLARE_GLOBAL_DATA_PTR; - -static inline void pll_delay(unsigned long loops) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b" : "=r" (loops) : "0" (loops)); -} - -int board_early_init_f(void) -{ - struct s3c24x0_clock_power * const clk_power = - s3c24x0_get_base_clock_power(); - - /* to reduce PLL lock time, adjust the LOCKTIME register */ - clk_power->locktime = 0xFFFFFF; /* Max PLL Lock time count */ - clk_power->clkdivn = CLKDIVN_VAL; - - /* configure UPLL */ - clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV); - /* some delay between MPLL and UPLL */ - pll_delay(100); - - /* configure MPLL */ - clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV); - - /* some delay between MPLL and UPLL */ - pll_delay(10000); - - return 0; -} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); - - /* IOMUX Port H : UART Configuration */ - gpio->gphcon = IOMUXH_nCTS0 | IOMUXH_nRTS0 | IOMUXH_TXD0 | IOMUXH_RXD0 | - IOMUXH_TXD1 | IOMUXH_RXD1 | IOMUXH_TXD2 | IOMUXH_RXD2; - - gpio_direction_output(GPH8, 0); - gpio_direction_output(GPH9, 0); - gpio_direction_output(GPH10, 0); - - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_BOOT_PARAM_ADDR; - - return 0; -} - -int dram_init(void) -{ - struct s3c24x0_memctl *memctl = s3c24x0_get_base_memctl(); - - /* - * Configuring bus width and timing - * Initialize clocks for each bank 0..5 - * Bank 3 and 4 are used for DM9000 - */ - writel(BANK_CONF, &memctl->bwscon); - writel(B0_CONF, &memctl->bankcon[0]); - writel(B1_CONF, &memctl->bankcon[1]); - writel(B2_CONF, &memctl->bankcon[2]); - writel(B3_CONF, &memctl->bankcon[3]); - writel(B4_CONF, &memctl->bankcon[4]); - writel(B5_CONF, &memctl->bankcon[5]); - - /* Bank 6 and 7 are used for DRAM */ - writel(SDRAM_64MB, &memctl->bankcon[6]); - writel(SDRAM_64MB, &memctl->bankcon[7]); - - writel(MEM_TIMING, &memctl->refresh); - writel(BANKSIZE_CONF, &memctl->banksize); - writel(B6_MRSR, &memctl->mrsrb6); - writel(B7_MRSR, &memctl->mrsrb7); - - gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE, - PHYS_SDRAM_SIZE); - return 0; -} - -int board_eth_init(bd_t *bis) -{ -#ifdef CONFIG_DRIVER_DM9000 - return dm9000_initialize(bis); -#else - return 0; -#endif -} diff --git a/board/friendlyarm/mini2440/mini2440.h b/board/friendlyarm/mini2440/mini2440.h deleted file mode 100644 index db386ea..0000000 --- a/board/friendlyarm/mini2440/mini2440.h +++ /dev/null @@ -1,144 +0,0 @@ -#ifndef __MINI2440_BOARD_CONF_H__ -#define __MINI2440_BOARD_CONF_H__ - -/* PLL Parameters */ -#define CLKDIVN_VAL 7 -#define M_MDIV 0x7f -#define M_PDIV 0x2 -#define M_SDIV 0x1 - -#define U_M_MDIV 0x38 -#define U_M_PDIV 0x2 -#define U_M_SDIV 0x2 - -/* BWSCON */ -#define DW8 0x0 -#define DW16 0x1 -#define DW32 0x2 -#define WAIT (0x1<<2) -#define UBLB (0x1<<3) - -#define B1_BWSCON (DW32) -#define B2_BWSCON (DW16) -#define B3_BWSCON (DW16 + WAIT + UBLB) -#define B4_BWSCON (DW16 + WAIT + UBLB) -#define B5_BWSCON (DW16) -#define B6_BWSCON (DW32) -#define B7_BWSCON (DW32) - -/* - * Bank Configuration - */ -#define B0_Tacs 0x0 /* 0clk */ -#define B0_Tcos 0x0 /* 0clk */ -#define B0_Tacc 0x7 /* 14clk */ -#define B0_Tcoh 0x0 /* 0clk */ -#define B0_Tah 0x0 /* 0clk */ -#define B0_Tacp 0x0 /* 0clk */ -#define B0_PMC 0x0 /* normal */ - -#define B1_Tacs 0x0 -#define B1_Tcos 0x0 -#define B1_Tacc 0x7 -#define B1_Tcoh 0x0 -#define B1_Tah 0x0 -#define B1_Tacp 0x0 -#define B1_PMC 0x0 - -#define B2_Tacs 0x0 -#define B2_Tcos 0x0 -#define B2_Tacc 0x7 -#define B2_Tcoh 0x0 -#define B2_Tah 0x0 -#define B2_Tacp 0x0 -#define B2_PMC 0x0 - -#define B3_Tacs 0x0 -#define B3_Tcos 0x3 /* 4clk */ -#define B3_Tacc 0x7 -#define B3_Tcoh 0x1 /* 1clk */ -#define B3_Tah 0x3 /* 4clk */ -#define B3_Tacp 0x0 -#define B3_PMC 0x0 - -#define B4_Tacs 0x0 -#define B4_Tcos 0x3 -#define B4_Tacc 0x7 -#define B4_Tcoh 0x1 -#define B4_Tah 0x3 -#define B4_Tacp 0x0 -#define B4_PMC 0x0 - -#define B5_Tacs 0x0 -#define B5_Tcos 0x0 -#define B5_Tacc 0x7 -#define B5_Tcoh 0x0 -#define B5_Tah 0x0 -#define B5_Tacp 0x0 -#define B5_PMC 0x0 - -/* - * SDRAM Configuration - */ -#define SDRAM_MT 0x3 /* SDRAM */ -#define SDRAM_Trcd 0x0 /* 2clk */ -#define SDRAM_SCAN_9 0x1 /* 9bit */ -#define SDRAM_SCAN_10 0x2 /* 10bit */ - -#define SDRAM_64MB ((SDRAM_MT<<15) + (SDRAM_Trcd<<2) + (SDRAM_SCAN_9)) - -/* - * Refresh Parameter - */ -#define REFEN 0x1 /* Refresh enable */ -#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ -#define Trp 0x1 /* 3clk */ -#define Trc 0x3 /* 7clk */ -#define Tchr 0x0 /* unused */ -#define REFCNT 1012 /* period=10.37us, HCLK=100Mhz, (2048 + 1-10.37*100) */ - -/* - * MRSR Parameter - */ -#define BL 0x0 -#define BT 0x0 -#define CL 0x3 /* 3 clocks */ -#define TM 0x0 -#define WBL 0x0 - -/* - * BankSize Parameter - */ -#define BK76MAP 0x2 /* 128MB/128MB */ -#define SCLK_EN 0x1 /* SCLK active */ -#define SCKE_EN 0x1 /* SDRAM power down mode enable */ -#define BURST_EN 0x1 /* Burst enable */ - -/* - * Register values - */ -#define BANK_CONF ((0 + (B1_BWSCON<<4) + (B2_BWSCON<<8) + (B3_BWSCON<<12) + \ - (B4_BWSCON<<16) + (B5_BWSCON<<20) + (B6_BWSCON<<24) + \ - (B7_BWSCON<<28))) - -#define B0_CONF ((B0_Tacs<<13) + (B0_Tcos<<11) + (B0_Tacc<<8) + \ - (B0_Tcoh<<6) + (B0_Tah<<4) + (B0_Tacp<<2) + (B0_PMC)) -#define B1_CONF ((B1_Tacs<<13) + (B1_Tcos<<11) + (B1_Tacc<<8) + \ - (B1_Tcoh<<6) + (B1_Tah<<4) + (B1_Tacp<<2) + (B1_PMC)) -#define B2_CONF ((B2_Tacs<<13) + (B2_Tcos<<11) + (B2_Tacc<<8) + \ - (B2_Tcoh<<6) + (B2_Tah<<4) + (B2_Tacp<<2) + (B2_PMC)) -#define B3_CONF ((B3_Tacs<<13) + (B3_Tcos<<11) + (B3_Tacc<<8) + \ - (B3_Tcoh<<6) + (B3_Tah<<4) + (B3_Tacp<<2) + (B3_PMC)) -#define B4_CONF ((B4_Tacs<<13) + (B4_Tcos<<11) + (B4_Tacc<<8) + \ - (B4_Tcoh<<6) + (B4_Tah<<4) + (B4_Tacp<<2) + (B4_PMC)) -#define B5_CONF ((B5_Tacs<<13) + (B5_Tcos<<11) + (B5_Tacc<<8) + \ - (B5_Tcoh<<6) + (B5_Tah<<4) + (B5_Tacp<<2) + (B5_PMC)) - -#define MEM_TIMING (REFEN<<23) + (TREFMD<<22) + (Trp<<20) + \ - (Trc<<18) + (Tchr<<16) + REFCNT - -#define BANKSIZE_CONF (BK76MAP) + (SCLK_EN<<4) + (SCKE_EN<<5) + (BURST_EN<<7) -#define B6_MRSR (CL<<4) -#define B7_MRSR (CL<<4) - -#endif diff --git a/boards.cfg b/boards.cfg index d177f82..af73934 100644 --- a/boards.cfg +++ b/boards.cfg @@ -69,7 +69,6 @@ Active arm arm920t imx - - Active arm arm920t imx - - scb9328 - Torsten Koschorrek <koschorrek(a)synertronixx.de> Active arm arm920t ks8695 - - cm4008 - Greg Ungerer <greg.ungerer(a)opengear.com> Active arm arm920t ks8695 - - cm41xx - - -Active arm arm920t s3c24x0 friendlyarm mini2440 mini2440 - Gabriel Huau <contact(a)huau-gabriel.fr> Active arm arm920t s3c24x0 mpl vcma9 VCMA9 - David Müller <d.mueller(a)elsoft.ch> Active arm arm920t s3c24x0 samsung - smdk2410 - David Müller <d.mueller(a)elsoft.ch> Active arm arm926ejs - armltd integrator integratorap_cm926ejs integratorap:CM926EJ_S Linus Walleij <linus.walleij(a)linaro.org> diff --git a/doc/README.mini2440 b/doc/README.mini2440 deleted file mode 100644 index 311ca52..0000000 --- a/doc/README.mini2440 +++ /dev/null @@ -1,28 +0,0 @@ -U-Boot for FriendlyARM Mini2440 (s3c2440) - -This file contains information for the port of U-Boot to FriendlyARM -mini2440 - -All information about the board can be found on : -http://www.friendlyarm.net/products/mini2440 - -To build u-boot : ./MAKEALL mini2440 - -Overview : --------- -FriendlyARM Mini 2440 SBC (Single-Board Computer) with 400 MHz Samsung S3C2440 -ARM9 processor. The board measures 100 x 100 mm, ideal for learning about ARM9 -systems. It's a low cost board. - -Boot Methods : ------------- -Mini2440 can boot from NOR or NAND. - -Build : ------ -./MAKEALL mini2440 - -or - -make mini2440_config -make diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 604de0c..be3e97e 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,8 +11,9 @@ easily if here is something they might want to dig for... Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= -omap730p2 arm arm926ejs - 2013-11-11 -pn62 powerpc mpc824x - 2013-11-11 Wolfgang Grandegger <wg(a)grandegger.com> +mini2440 arm arm920t - 2014-01-13 Gabriel Huau <contact(a)huau-gabriel.fr> +omap730p2 arm arm926ejs 79c5c08d 2013-11-11 +pn62 powerpc mpc824x 649acfe1 2013-11-11 Wolfgang Grandegger <wg(a)grandegger.com> pdnb3 arm ixp 304db0b 2013-09-24 Stefan Roese <sr(a)denx.de> scpu arm ixp 304db0b 2013-09-24 Stefan Roese <sr(a)denx.de> omap1510inn arm arm925t 0610a16 2013-09-23 Kshitij Gupta <kshitij(a)ti.com> -- 1.8.3.2

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[U-Boot] enabling ecc on P2041 and QoreIQ familly not valid for memory >= 4GB
by Benoit Sansoni 22 Sep '14

22 Sep '14

Hi , I found out an issue when enabling ECC for P2041 platform with an amount of memory of 8GB. The routine "void dma_meminit(uint val, uint size)" is not adapted to manage memory size greater or equal to 4GB due to the 'uint' type. With this typing the dma_meminit sees 0 as size when memory is for example at 8GB. So the ECC part of the memory is not initialized and when going in memory the code crash. To correct it you need to use phys_size_t type instead of uint. It is the same thing for all routines that are called by "dma_meminit". I attached a patch that able to correct it easily. This patch should be integrated in the main branch I think so. Regards, Benoit diff -u vx3240/u-boot-2012.10/arch/powerpc/include/asm/fsl_ddr_sdram.h:1.1.1.1 vx3240/u-boot-2012.10/arch/powerpc/include/asm/fsl_ddr_sdram.h:1.2 --- vx3240/u-boot-2012.10/arch/powerpc/include/asm/fsl_ddr_sdram.h:1.1.1.1 Tue Jan 8 10:23:37 2013 +++ vx3240/u-boot-2012.10/arch/powerpc/include/asm/fsl_ddr_sdram.h Fri Jul 18 10:31:22 2014 @@ -308,7 +308,7 @@ #endif #if defined(CONFIG_DDR_ECC) -extern void ddr_enable_ecc(unsigned int dram_size); +extern void ddr_enable_ecc(phys_size_t dram_size); #endif diff -u vx3240/u-boot-2012.10/arch/powerpc/include/asm/fsl_dma.h:1.1.1.1 vx3240/u-boot-2012.10/arch/powerpc/include/asm/fsl_dma.h:1.2 --- vx3240/u-boot-2012.10/arch/powerpc/include/asm/fsl_dma.h:1.1.1.1 Tue Jan 8 10:23:37 2013 +++ vx3240/u-boot-2012.10/arch/powerpc/include/asm/fsl_dma.h Fri Jul 18 10:31:22 2014 @@ -134,7 +134,7 @@ void dma_init(void); int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t n); #if (defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)) -void dma_meminit(uint val, uint size); +void dma_meminit(uint val, phys_size_t size); #endif #endif diff -u vx3240/u-boot-2012.10/drivers/dma/fsl_dma.c:1.1.1.1 vx3240/u-boot-2012.10/drivers/dma/fsl_dma.c:1.2 --- vx3240/u-boot-2012.10/drivers/dma/fsl_dma.c:1.1.1.1 Tue Jan 8 10:23:55 2013 +++ vx3240/u-boot-2012.10/drivers/dma/fsl_dma.c Fri Jul 18 14:28:31 2014 @@ -113,14 +113,13 @@ while (count) { xfer_size = MIN(FSL_DMA_MAX_SIZE, count); - out_dma32(&dma->dar, (u32) (dest & 0xFFFFFFFF)); out_dma32(&dma->sar, (u32) (src & 0xFFFFFFFF)); #if !defined(CONFIG_MPC83xx) out_dma32(&dma->satr, - in_dma32(&dma->satr) | (u32)((u64)src >> 32)); + in_dma32(&dma->satr) | (u32)(src >> 32)); out_dma32(&dma->datr, - in_dma32(&dma->datr) | (u32)((u64)dest >> 32)); + in_dma32(&dma->datr) | (u32)(dest >> 32)); #endif out_dma32(&dma->bcr, xfer_size); dma_sync(); @@ -152,33 +151,36 @@ #if ((!defined CONFIG_MPC83xx && defined(CONFIG_DDR_ECC) && \ !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)) || \ (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA))) -void dma_meminit(uint val, uint size) +void dma_meminit(uint val, phys_size_t size) { - uint *p = 0; - uint i = 0; - - for (*p = 0; p < (uint *)(8 * 1024); p++) { - if (((uint)p & 0x1f) == 0) - ppcDcbz((ulong)p); - - *p = (uint)CONFIG_MEM_INIT_VALUE; - - if (((uint)p & 0x1c) == 0x1c) - ppcDcbf((ulong)p); - } - - dmacpy(0x002000, 0, 0x002000); /* 8K */ - dmacpy(0x004000, 0, 0x004000); /* 16K */ - dmacpy(0x008000, 0, 0x008000); /* 32K */ - dmacpy(0x010000, 0, 0x010000); /* 64K */ - dmacpy(0x020000, 0, 0x020000); /* 128K */ - dmacpy(0x040000, 0, 0x040000); /* 256K */ - dmacpy(0x080000, 0, 0x080000); /* 512K */ - dmacpy(0x100000, 0, 0x100000); /* 1M */ - dmacpy(0x200000, 0, 0x200000); /* 2M */ - dmacpy(0x400000, 0, 0x400000); /* 4M */ - - for (i = 1; i < size / 0x800000; i++) - dmacpy((0x800000 * i), 0, 0x800000); + uint *p = 0; + u64 i = 0; + phys_addr_t addr; + + for (*p = 0; p < (uint *)(8 * 1024); p++) { + if (((uint)p & 0x1f) == 0) + ppcDcbz((ulong)p); + + *p = (uint)CONFIG_MEM_INIT_VALUE; + + if (((uint)p & 0x1c) == 0x1c) + ppcDcbf((ulong)p); + } + + dmacpy(0x002000, 0, 0x002000); /* 8K */ + dmacpy(0x004000, 0, 0x004000); /* 16K */ + dmacpy(0x008000, 0, 0x008000); /* 32K */ + dmacpy(0x010000, 0, 0x010000); /* 64K */ + dmacpy(0x020000, 0, 0x020000); /* 128K */ + dmacpy(0x040000, 0, 0x040000); /* 256K */ + dmacpy(0x080000, 0, 0x080000); /* 512K */ + dmacpy(0x100000, 0, 0x100000); /* 1M */ + dmacpy(0x200000, 0, 0x200000); /* 2M */ + dmacpy(0x400000, 0, 0x400000); /* 4M */ + + for (i = 1; i < size / 0x800000; i++) { + addr = (phys_addr_t) (i * 0x800000); + dmacpy(addr, (phys_addr_t)0, 0x800000); + } } #endif

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[U-Boot] [PATCH v2 1/3] image: fix bootm failure for FIT image
by Bryan Wu 22 Sep '14

22 Sep '14

Commit b3dd64f5d537 "bootm: use genimg_get_kernel_addr()" introduced a bug for booting FIT image. It's because calling fit_parse_config() twice will give us wrong value in img_addr. Add a new version for CONFIG_FIT of genimg_get_kernel_addr() and return fit_uname_config and fit_uname_kernel for CONFIG_FIT. Reported-by: York Sun <yorksun(a)freescale.com> Signed-off-by: Bryan Wu <pengw(a)nvidia.com> --- common/bootm.c | 9 +++++---- common/cmd_pxe.c | 9 +++++++++ common/image.c | 19 ++++++++++--------- include/image.h | 6 ++++++ 4 files changed, 30 insertions(+), 13 deletions(-) diff --git a/common/bootm.c b/common/bootm.c index 76d811c..85b71ba 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -731,7 +731,12 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc, int os_noffset; #endif +#if defined(CONFIG_FIT) + img_addr = genimg_get_kernel_addr(argv[0], &fit_uname_config, + &fit_uname_kernel); +#else img_addr = genimg_get_kernel_addr(argv[0]); +#endif bootstage_mark(BOOTSTAGE_ID_CHECK_MAGIC); @@ -788,10 +793,6 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc, #endif #if defined(CONFIG_FIT) case IMAGE_FORMAT_FIT: - if (!fit_parse_conf(argv[0], load_addr, &img_addr, - &fit_uname_config)) - fit_parse_subimage(argv[0], load_addr, &img_addr, - &fit_uname_kernel); os_noffset = fit_image_load(images, img_addr, &fit_uname_kernel, &fit_uname_config, IH_ARCH_DEFAULT, IH_TYPE_KERNEL, diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c index c816339..9a2c370 100644 --- a/common/cmd_pxe.c +++ b/common/cmd_pxe.c @@ -612,6 +612,10 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) int len = 0; ulong kernel_addr; void *buf; +#if defined(CONFIG_FIT) + const char *fit_uname_config = NULL; + const char *fit_uname_kernel = NULL; +#endif label_print(label); @@ -774,7 +778,12 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label) if (bootm_argv[3]) bootm_argc = 4; +#if defined(CONFIG_FIT) + kernel_addr = genimg_get_kernel_addr(bootm_argv[1], &fit_uname_config, + &fit_uname_kernel); +#else kernel_addr = genimg_get_kernel_addr(bootm_argv[1]); +#endif buf = map_sysmem(kernel_addr, 0); /* Try bootm for legacy and FIT format image */ if (genimg_get_format(buf) != IMAGE_FORMAT_INVALID) diff --git a/common/image.c b/common/image.c index a2999c0..ea980cb 100644 --- a/common/image.c +++ b/common/image.c @@ -652,13 +652,14 @@ int genimg_get_comp_id(const char *name) * returns: * kernel start address */ -ulong genimg_get_kernel_addr(char * const img_addr) -{ #if defined(CONFIG_FIT) - const char *fit_uname_config = NULL; - const char *fit_uname_kernel = NULL; +ulong genimg_get_kernel_addr(char * const img_addr, + const char **fit_uname_config, + const char **fit_uname_kernel) +#else +ulong genimg_get_kernel_addr(char * const img_addr) #endif - +{ ulong kernel_addr; /* find out kernel image address */ @@ -668,13 +669,13 @@ ulong genimg_get_kernel_addr(char * const img_addr) load_addr); #if defined(CONFIG_FIT) } else if (fit_parse_conf(img_addr, load_addr, &kernel_addr, - &fit_uname_config)) { + fit_uname_config)) { debug("* kernel: config '%s' from image at 0x%08lx\n", - fit_uname_config, kernel_addr); + *fit_uname_config, kernel_addr); } else if (fit_parse_subimage(img_addr, load_addr, &kernel_addr, - &fit_uname_kernel)) { + fit_uname_kernel)) { debug("* kernel: subimage '%s' from image at 0x%08lx\n", - fit_uname_kernel, kernel_addr); + *fit_uname_kernel, kernel_addr); #endif } else { kernel_addr = simple_strtoul(img_addr, NULL, 16); diff --git a/include/image.h b/include/image.h index ca2fe86..a47c146 100644 --- a/include/image.h +++ b/include/image.h @@ -424,7 +424,13 @@ enum fit_load_op { #define IMAGE_FORMAT_FIT 0x02 /* new, libfdt based format */ #define IMAGE_FORMAT_ANDROID 0x03 /* Android boot image */ +#if defined(CONFIG_FIT) +ulong genimg_get_kernel_addr(char * const img_addr, + const char **fit_uname_config, + const char **fit_uname_kernel); +#else ulong genimg_get_kernel_addr(char * const img_addr); +#endif int genimg_get_format(const void *img_addr); int genimg_has_config(bootm_headers_t *images); ulong genimg_get_image(ulong img_addr); -- 1.9.1

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[U-Boot] Add CONFIG_API to config_distribution
by Jeroen Hofstee 20 Sep '14

20 Sep '14

Since the goal of the common include is to boot many distros, also include the api to boot distro's relying on the api, like GRUB / ubldr / vxWorks. Jeroen Hofstee (2): api: fix build without CMD_NET support config_distro_defaults.h: add CONFIG_API api/api_net.c | 30 ++++++++++++++++++++++++++++++ include/config_distro_defaults.h | 4 ++++ 2 files changed, 34 insertions(+) -- 1.9.1

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[U-Boot] [PATCH 0/4] ARM: atmel: use pcr to control clock
by Bo Shen 19 Sep '14

19 Sep '14

When the SoC has pcr (peripheral control register), then switch to use it to enable or disable clock. Bo Shen (4): ARM: atmel: use pcr to enable or disable peripheral clock ARM: atmel: add pcr related definition USB: ohci-at91: use pcr to enable or disable clock USB: ehci-atmel: use pcr to enable or disable clock arch/arm/cpu/armv7/at91/clock.c | 24 ++++++++++++++++++++---- arch/arm/include/asm/arch-at91/at91_pmc.h | 6 +++++- arch/arm/include/asm/arch-at91/clk.h | 1 + arch/arm/include/asm/arch-at91/sama5d3.h | 1 + drivers/usb/host/ehci-atmel.c | 8 ++++++++ drivers/usb/host/ohci-at91.c | 8 ++++---- 6 files changed, 39 insertions(+), 9 deletions(-) -- 1.8.5.2

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[U-Boot] [PATCH] ARM: atmel: sama5d3: add timings register
by Bo Shen 19 Sep '14

19 Sep '14

Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- arch/arm/include/asm/arch-at91/sama5d3_smc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-at91/sama5d3_smc.h b/arch/arm/include/asm/arch-at91/sama5d3_smc.h index 6caa9b6..a859b6d 100644 --- a/arch/arm/include/asm/arch-at91/sama5d3_smc.h +++ b/arch/arm/include/asm/arch-at91/sama5d3_smc.h @@ -14,7 +14,8 @@ #define AT91_ASM_SMC_SETUP0 (ATMEL_BASE_SMC + 0x600) #define AT91_ASM_SMC_PULSE0 (ATMEL_BASE_SMC + 0x604) #define AT91_ASM_SMC_CYCLE0 (ATMEL_BASE_SMC + 0x608) -#define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x60C) +#define AT91_ASM_SMC_TIMINGS0 (ATMEL_BASE_SMC + 0x60c) +#define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x610) #else struct at91_cs { u32 setup; /* 0x600 SMC Setup Register */ -- 1.8.5.2

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[U-Boot] [PATCH v2 0/2] ARM: atmel: sama5d3xek: enable NOR flash support
by Bo Shen 19 Sep '14

19 Sep '14

Add NOR flash support on sama5d3xek board. Then, we can use NOR flash related command to access it. Changes in v2: - Add CONFIG_SYS_FLASH_PROTECTION - Correct the max sector number Bo Shen (2): ARM: atmel: sama5d3xek: add nor flash init function ARM: atmel: sama5d3xek: enable NOR flash support board/atmel/sama5d3xek/sama5d3xek.c | 58 +++++++++++++++++++++++++++++++++++++ include/configs/sama5d3xek.h | 13 ++++++++- 2 files changed, 70 insertions(+), 1 deletion(-) -- 1.8.5.2

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[U-Boot] [PATCH] mtd: atmel-nand: use pmecc_readl(b)/pmecc_writel to access the pmecc register
by Josh Wu 19 Sep '14

19 Sep '14

We defined the macro pmecc_readl(b)/pmecc_writel for pmecc register access. But in the driver we also use the readl(b)/writel. To keep consistent, this patch make all use pmecc_readl(b)/pmecc_writel. Signed-off-by: Josh Wu <josh.wu(a)atmel.com> --- drivers/mtd/nand/atmel_nand.c | 21 +++++++++++---------- drivers/mtd/nand/atmel_nand_ecc.h | 3 +++ 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index e73834d..ccc4dc0 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -164,7 +164,7 @@ static void pmecc_gen_syndrome(struct mtd_info *mtd, int sector) /* Fill odd syndromes */ for (i = 0; i < host->pmecc_corr_cap; i++) { - value = readl(&host->pmecc->rem_port[sector].rem[i / 2]); + value = pmecc_readl(host->pmecc, rem_port[sector].rem[i / 2]); if (i & 1) value >>= 16; value &= 0xffff; @@ -392,10 +392,11 @@ static int pmecc_err_location(struct mtd_info *mtd) int16_t *smu = host->pmecc_smu; int timeout = PMECC_MAX_TIMEOUT_US; - writel(PMERRLOC_DISABLE, &host->pmerrloc->eldis); + pmecc_writel(host->pmerrloc, eldis, PMERRLOC_DISABLE); for (i = 0; i <= host->pmecc_lmu[cap + 1] >> 1; i++) { - writel(smu[(cap + 1) * num + i], &host->pmerrloc->sigma[i]); + pmecc_writel(host->pmerrloc, sigma[i], + smu[(cap + 1) * num + i]); err_nbr++; } @@ -403,12 +404,12 @@ static int pmecc_err_location(struct mtd_info *mtd) if (sector_size == 1024) val |= PMERRLOC_ELCFG_SECTOR_1024; - writel(val, &host->pmerrloc->elcfg); - writel(sector_size * 8 + host->pmecc_degree * cap, - &host->pmerrloc->elen); + pmecc_writel(host->pmerrloc, elcfg, val); + pmecc_writel(host->pmerrloc, elen, + sector_size * 8 + host->pmecc_degree * cap); while (--timeout) { - if (readl(&host->pmerrloc->elisr) & PMERRLOC_CALC_DONE) + if (pmecc_readl(host->pmerrloc, elisr) & PMERRLOC_CALC_DONE) break; WATCHDOG_RESET(); udelay(1); @@ -419,7 +420,7 @@ static int pmecc_err_location(struct mtd_info *mtd) return -1; } - roots_nbr = (readl(&host->pmerrloc->elisr) & PMERRLOC_ERR_NUM_MASK) + roots_nbr = (pmecc_readl(host->pmerrloc, elisr) & PMERRLOC_ERR_NUM_MASK) >> 8; /* Number of roots == degree of smu hence <= cap */ if (roots_nbr == host->pmecc_lmu[cap + 1] >> 1) @@ -443,7 +444,7 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, sector_size = host->pmecc_sector_size; while (err_nbr) { - tmp = readl(&host->pmerrloc->el[i]) - 1; + tmp = pmecc_readl(host->pmerrloc, el[i]) - 1; byte_pos = tmp / 8; bit_pos = tmp % 8; @@ -597,7 +598,7 @@ static int atmel_nand_pmecc_write_page(struct mtd_info *mtd, pos = i * host->pmecc_bytes_per_sector + j; chip->oob_poi[eccpos[pos]] = - readb(&host->pmecc->ecc_port[i].ecc[j]); + pmecc_readb(host->pmecc, ecc_port[i].ecc[j]); } } chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h index 55d7711..92d4ec5 100644 --- a/drivers/mtd/nand/atmel_nand_ecc.h +++ b/drivers/mtd/nand/atmel_nand_ecc.h @@ -34,6 +34,9 @@ #define pmecc_readl(addr, reg) \ readl(&addr->reg) +#define pmecc_readb(addr, reg) \ + readb(&addr->reg) + #define pmecc_writel(addr, reg, value) \ writel((value), &addr->reg) -- 1.7.9.5

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