August 2014 - U-Boot

[U-Boot] [PATCH 1/3] driver/mc: Add Layerscape Management Complex hardware interface
by Lijun Pan 01 Aug '14

01 Aug '14

Management Complex (MC) Portal is an interface between MC firmware and U-boot/Linux. U-boot/Linux could interact with MC firmware through sending/receiving MC commands to/from MC firmware. This patch enables the hardware interface between MC firmware and U-boot/Linux. Current patch supports MC portal flib version 0.4. Signed-off-by: Lijun Pan <Lijun.Pan(a)freescale.com> --- include/layerscape/mc_hardware/fsl_mc_cmd_common.h | 54 ++++++++++++++++++ .../layerscape/mc_hardware/fsl_mc_dpmng_commands.h | 60 ++++++++++++++++++++ include/layerscape/mc_hardware/fsl_mc_io.h | 65 ++++++++++++++++++++++ 3 files changed, 179 insertions(+) create mode 100644 include/layerscape/mc_hardware/fsl_mc_cmd_common.h create mode 100644 include/layerscape/mc_hardware/fsl_mc_dpmng_commands.h create mode 100644 include/layerscape/mc_hardware/fsl_mc_io.h diff --git a/include/layerscape/mc_hardware/fsl_mc_cmd_common.h b/include/layerscape/mc_hardware/fsl_mc_cmd_common.h new file mode 100644 index 0000000..bf2a3d0 --- /dev/null +++ b/include/layerscape/mc_hardware/fsl_mc_cmd_common.h @@ -0,0 +1,54 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSL_MC_CMD_COMMON_H +#define __FSL_MC_CMD_COMMON_H + +#define MC_CMD_NUM_OF_PARAMS 7 + +struct mc_command { + uint64_t header; + uint64_t params[MC_CMD_NUM_OF_PARAMS]; +}; + +enum mc_cmd_status { + MC_CMD_STATUS_OK = 0x0, /* passed */ + MC_CMD_STATUS_READY = 0x1, /* Ready to be processed */ + MC_CMD_STATUS_AUTH_ERR = 0x3, /* Authentication error */ + MC_CMD_STATUS_NO_PRIVILEGE = 0x4, + MC_CMD_STATUS_DMA_ERR = 0x5, + MC_CMD_STATUS_CONFIG_ERR = 0x6, + MC_CMD_STATUS_TIMEOUT = 0x7, + MC_CMD_STATUS_NO_RESOURCE = 0x8, + MC_CMD_STATUS_NO_MEMORY = 0x9, + MC_CMD_STATUS_BUSY = 0xA, + MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, + MC_CMD_STATUS_INVALID_STATE = 0xC +}; + +/* + * MC command priorities + */ +enum mc_cmd_priorities { + CMDIF_PRI_LOW = 0, /* Low Priority command indication */ + CMDIF_PRI_HIGH = 1 /* High Priority command indication */ +}; + +static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id, + uint8_t cmd_size, + uint8_t priority, uint16_t auth_id) +{ + uint64_t header; + + header = (cmd_id & 0xfffULL) << 52; + header |= (auth_id & 0x3ffULL) << 38; + header |= (cmd_size & 0x3fULL) << 31; + header |= (priority & 0x1ULL) << 15; + header |= (MC_CMD_STATUS_READY & 0xff) << 16; + + return header; +} +#endif /* __FSL_MC_CMD_COMMON_H */ diff --git a/include/layerscape/mc_hardware/fsl_mc_dpmng_commands.h b/include/layerscape/mc_hardware/fsl_mc_dpmng_commands.h new file mode 100644 index 0000000..fa3c078 --- /dev/null +++ b/include/layerscape/mc_hardware/fsl_mc_dpmng_commands.h @@ -0,0 +1,60 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * fsl_mc_dpmng_commands.h + * Management Complex (MC) Data Path Management commands + */ +#ifndef _FSL_MC_DPMNG_COMMANDS_H +#define _FSL_MC_DPMNG_COMMANDS_H + +#include <layerscape/mc_hardware/fsl_mc_cmd_common.h> +#include <linux/compat.h> + +/* + * Define Management Complex firmware version information + */ +#define MC_VER_MAJOR 2 +#define MC_VER_MINOR 0 + +/* + * Management Complex firmware version information + */ +struct mc_version { + uint32_t major; + /* Major version number: incremented on API compatibility changes */ + uint32_t minor; + /* Minor version number: incremented on API additions (backward + * compatible); reset when major version is incremented. */ + uint32_t revision; + /* Internal revision number: incremented on implementation changes + * and/or bug fixes that have no impact on API */ +}; + +/* + * Retrieves the Management Complex firmware version information + */ +#define DPMNG_CMDID_GET_VERSION 0x831 +#define DPMNG_CMDSZ_GET_VERSION (8 * 2) + +static inline void build_cmd_mc_get_version(struct mc_command *cmd) +{ + cmd->header = mc_encode_cmd_header(DPMNG_CMDID_GET_VERSION, + DPMNG_CMDSZ_GET_VERSION, + CMDIF_PRI_LOW, 0); + + memset(cmd->params, 0, sizeof(cmd->params)); +} + +static inline void parse_resp_mc_get_version(struct mc_command *cmd, + struct mc_version *mc_ver_info) +{ + mc_ver_info->revision = lower_32_bits(cmd->params[0]); + mc_ver_info->major = upper_32_bits(cmd->params[0]); + mc_ver_info->minor = cmd->params[1] & 0xff; +} + +#endif /* _FSL_MC_DPMNG_COMMANDS_H */ diff --git a/include/layerscape/mc_hardware/fsl_mc_io.h b/include/layerscape/mc_hardware/fsl_mc_io.h new file mode 100644 index 0000000..f121238 --- /dev/null +++ b/include/layerscape/mc_hardware/fsl_mc_io.h @@ -0,0 +1,65 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSL_MC_IO_H +#define __FSL_MC_IO_H + +#include <layerscape/mc_hardware/fsl_mc_cmd_common.h> + +/** + * mc_write_command - writes a command to a Management Complex (MC) portal + * + * @portal_regs: pointer to an MC portal's MMIO registers + * @cmd: pointer to a filled command + */ +static inline void __must_check mc_write_command(struct mc_command __iomem * + portal_regs, + struct mc_command *cmd) +{ + int i; + + /* copy command parameters into the portal MMIO registers */ + for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++) + writeq(cmd->params[i], &portal_regs->params[i]); + + /* submit the command by writing the header */ + writeq(cmd->header, &portal_regs->header); +} + +/** + * mc_read_response - reads the response for the last MC command from a + * Management Complex (MC) portal + * + * @portal_regs: pointer to an MC portal's MMIO registers + * @response: pointer to command response buffer + * + * Returns MC_CMD_STATUS_OK on Success; Error code otherwise. + */ +static inline enum mc_cmd_status __must_check mc_read_response(struct mc_command + __iomem * + portal_regs, + struct mc_command + *response) +{ + int i; + enum mc_cmd_status status; + + /* Copy command response header from MC portal MMIO space: */ + response->header = readq(&portal_regs->header); + status = (response->header >> 16) & 0xff; + + if (status != MC_CMD_STATUS_OK) + goto out; + + /* Copy command response data from MC portal MMIO space: */ + for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++) + response->params[i] = readq(&portal_regs->params[i]); + +out: + return status; +} + +#endif /* __FSL_MC_IO_H */ -- 1.9.3

2 3

[U-Boot] [PATCH] cosmetic: mconf.c: remove texts referring to modules
by Maxin B. John 01 Aug '14

01 Aug '14

As we don't have the concept of 'loadable modules' in u-boot, remove texts referring to modules. Signed-off-by: Maxin B. John <maxin.john(a)enea.com> --- scripts/kconfig/mconf.c | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/scripts/kconfig/mconf.c b/scripts/kconfig/mconf.c index 14cea74..1c952b5 100644 --- a/scripts/kconfig/mconf.c +++ b/scripts/kconfig/mconf.c @@ -26,21 +26,21 @@ static const char mconf_readme[] = N_( "Overview\n" "--------\n" "This interface lets you select features and parameters for the build.\n" -"Features can either be built-in, modularized, or ignored. Parameters\n" +"Features can either be built-in or ignored. Parameters\n" "must be entered in as decimal or hexadecimal numbers or text.\n" "\n" "Menu items beginning with following braces represent features that\n" " [ ] can be built in or removed\n" -" < > can be built in, modularized or removed\n" -" { } can be built in or modularized (selected by other feature)\n" +" < > can be built in or removed\n" +" { } can be built in (selected by other feature)\n" " - - are selected by other feature,\n" -"while *, M or whitespace inside braces means to build in, build as\n" -"a module or to exclude the feature respectively.\n" +"while * or whitespace inside braces means to build in\n" +"or to exclude the feature respectively.\n" "\n" "To change any of these features, highlight it with the cursor\n" -"keys and press <Y> to build it in, <M> to make it a module or\n" +"keys and press <Y> to build it in or\n" "<N> to remove it. You may also press the <Space Bar> to cycle\n" -"through the available options (i.e. Y->N->M->Y).\n" +"through the available options (i.e. Y->N->Y).\n" "\n" "Some additional keyboard hints:\n" "\n" @@ -176,9 +176,9 @@ menu_instructions[] = N_( "Arrow keys navigate the menu. " "<Enter> selects submenus ---> (or empty submenus ----). " "Highlighted letters are hotkeys. " - "Pressing <Y> includes, <N> excludes, <M> modularizes features. " + "Pressing <Y> includes, <N> excludes features. " "Press <Esc><Esc> to exit, <?> for Help, </> for Search. " - "Legend: [*] built-in [ ] excluded <M> module < > module capable"), + "Legend: [*] built-in [ ] excluded"), radiolist_instructions[] = N_( "Use the arrow keys to navigate this window or " "press the hotkey of the item you wish to select " @@ -194,9 +194,6 @@ inputbox_instructions_hex[] = N_( inputbox_instructions_string[] = N_( "Please enter a string value. " "Use the <TAB> key to move from the input field to the buttons below it."), -setmod_text[] = N_( - "This feature depends on another which has been configured as a module.\n" - "As a result, this feature will be built as a module."), load_config_text[] = N_( "Enter the name of the configuration file you wish to load. " "Accept the name shown to restore the configuration you " @@ -722,8 +719,6 @@ static void conf(struct menu *menu, struct menu *active_menu) if (item_is_tag('t')) { if (sym_set_tristate_value(sym, yes)) break; - if (sym_set_tristate_value(sym, mod)) - show_textbox(NULL, setmod_text, 6, 74); } break; case 6: -- 1.9.1

2 2

[U-Boot] [PATCH v3 1/2] blackfin: convert blackfin board_f and board_r to use generic board init functions
by Sonic Zhang 01 Aug '14

01 Aug '14

From: Sonic Zhang <sonic.zhang(a)analog.com> - move blackfin specific cpu init code from blackfin board.c to cpu.c - remove blackfin specific board init code and invoke generic board_f fron cpu init entry - rename section name bss_vma to bss_start in order to match the generic board init code - add a fake relocate_code function to set up the new stack only Signed-off-by: Sonic Zhang <sonic.zhang(a)analog.com> --- arch/blackfin/config.mk | 3 + arch/blackfin/cpu/cpu.c | 333 +++++++++++++++++++++++++--- arch/blackfin/cpu/start.S | 14 +- arch/blackfin/cpu/u-boot.lds | 4 +- arch/blackfin/include/asm/u-boot.h | 3 + arch/blackfin/lib/Makefile | 7 +- arch/blackfin/lib/board.c | 443 ------------------------------------- arch/blackfin/lib/sections.c | 11 + include/configs/bfin_adi_common.h | 4 + 9 files changed, 334 insertions(+), 488 deletions(-) delete mode 100644 arch/blackfin/lib/board.c create mode 100644 arch/blackfin/lib/sections.c diff --git a/arch/blackfin/config.mk b/arch/blackfin/config.mk index fcaa44f..96730dd 100644 --- a/arch/blackfin/config.mk +++ b/arch/blackfin/config.mk @@ -20,6 +20,9 @@ CONFIG_BFIN_CPU := $(strip $(CONFIG_BFIN_CPU:"%"=%)) endif CONFIG_BFIN_BOOT_MODE := $(strip $(CONFIG_BFIN_BOOT_MODE:"%"=%)) +# Support generic board on Blackfin +__HAVE_ARCH_GENERIC_BOARD := y + PLATFORM_RELFLAGS += -ffixed-P3 -fomit-frame-pointer -mno-fdpic PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN diff --git a/arch/blackfin/cpu/cpu.c b/arch/blackfin/cpu/cpu.c index 2409c30..6913879 100644 --- a/arch/blackfin/cpu/cpu.c +++ b/arch/blackfin/cpu/cpu.c @@ -11,17 +11,21 @@ #include <common.h> #include <command.h> +#include <serial.h> +#include <version.h> + #include <asm/blackfin.h> #include <asm/cplb.h> +#include <asm/clock.h> #include <asm/mach-common/bits/core.h> #include <asm/mach-common/bits/ebiu.h> #include <asm/mach-common/bits/trace.h> -#include <asm/serial.h> #include "cpu.h" #include "initcode.h" ulong bfin_poweron_retx; +DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_CORE1_RUN) && defined(COREB_L1_CODE_START) void bfin_core1_start(void) @@ -48,6 +52,252 @@ void bfin_core1_start(void) } #endif +__attribute__((always_inline)) +static inline void serial_early_puts(const char *s) +{ +#ifdef CONFIG_DEBUG_EARLY_SERIAL + serial_puts("Early: "); + serial_puts(s); +#endif +} + +static int global_board_data_init(void) +{ +#ifndef CONFIG_SYS_GBL_DATA_ADDR +# define CONFIG_SYS_GBL_DATA_ADDR 0 +#endif +#ifndef CONFIG_SYS_BD_INFO_ADDR +# define CONFIG_SYS_BD_INFO_ADDR 0 +#endif + + bd_t *bd; + + if (CONFIG_SYS_GBL_DATA_ADDR) { + gd = (gd_t *)(CONFIG_SYS_GBL_DATA_ADDR); + memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE); + } else { + static gd_t _bfin_gd; + gd = &_bfin_gd; + } + if (CONFIG_SYS_BD_INFO_ADDR) { + bd = (bd_t *)(CONFIG_SYS_BD_INFO_ADDR); + memset(bd, 0, GENERATED_BD_INFO_SIZE); + } else { + static bd_t _bfin_bd; + bd = &_bfin_bd; + } + + gd->bd = bd; + + bd->bi_r_version = version_string; + bd->bi_cpu = __stringify(CONFIG_BFIN_CPU); + bd->bi_board_name = CONFIG_SYS_BOARD; + bd->bi_vco = get_vco(); + bd->bi_cclk = get_cclk(); + bd->bi_sclk = get_sclk(); + bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + + gd->ram_size = CONFIG_SYS_MAX_RAM_SIZE; + + return 0; +} + +static void display_global_data(void) +{ + bd_t *bd; + +#ifndef CONFIG_DEBUG_EARLY_SERIAL + return; +#endif + + bd = gd->bd; + printf(" gd: %p\n", gd); + printf(" |-flags: %lx\n", gd->flags); + printf(" |-board_type: %lx\n", gd->arch.board_type); + printf(" |-baudrate: %u\n", gd->baudrate); + printf(" |-have_console: %lx\n", gd->have_console); + printf(" |-ram_size: %lx\n", gd->ram_size); + printf(" |-env_addr: %lx\n", gd->env_addr); + printf(" |-env_valid: %lx\n", gd->env_valid); + printf(" |-jt(%p): %p\n", gd->jt, *(gd->jt)); + printf(" \\-bd: %p\n", gd->bd); + printf(" |-bi_boot_params: %lx\n", bd->bi_boot_params); + printf(" |-bi_memstart: %lx\n", bd->bi_memstart); + printf(" |-bi_memsize: %lx\n", bd->bi_memsize); + printf(" |-bi_flashstart: %lx\n", bd->bi_flashstart); + printf(" |-bi_flashsize: %lx\n", bd->bi_flashsize); + printf(" \\-bi_flashoffset: %lx\n", bd->bi_flashoffset); +} + +#define CPLB_PAGE_SIZE (4 * 1024 * 1024) +#define CPLB_PAGE_MASK (~(CPLB_PAGE_SIZE - 1)) +#if defined(__ADSPBF60x__) +#define CPLB_EX_PAGE_SIZE (16 * 1024 * 1024) +#define CPLB_EX_PAGE_MASK (~(CPLB_EX_PAGE_SIZE - 1)) +#else +#define CPLB_EX_PAGE_SIZE CPLB_PAGE_SIZE +#define CPLB_EX_PAGE_MASK CPLB_PAGE_MASK +#endif +void init_cplbtables(void) +{ + uint32_t *ICPLB_ADDR, *ICPLB_DATA; + uint32_t *DCPLB_ADDR, *DCPLB_DATA; + uint32_t extern_memory; + size_t i; + + void icplb_add(uint32_t addr, uint32_t data) + { + bfin_write32(ICPLB_ADDR + i, addr); + bfin_write32(ICPLB_DATA + i, data); + } + void dcplb_add(uint32_t addr, uint32_t data) + { + bfin_write32(DCPLB_ADDR + i, addr); + bfin_write32(DCPLB_DATA + i, data); + } + + /* populate a few common entries ... we'll let + * the memory map and cplb exception handler do + * the rest of the work. + */ + i = 0; + ICPLB_ADDR = (uint32_t *)ICPLB_ADDR0; + ICPLB_DATA = (uint32_t *)ICPLB_DATA0; + DCPLB_ADDR = (uint32_t *)DCPLB_ADDR0; + DCPLB_DATA = (uint32_t *)DCPLB_DATA0; + + icplb_add(0xFFA00000, L1_IMEMORY); + dcplb_add(0xFF800000, L1_DMEMORY); + ++i; +#if defined(__ADSPBF60x__) + icplb_add(0x0, 0x0); + dcplb_add(CONFIG_SYS_FLASH_BASE, PAGE_SIZE_16MB | CPLB_DIRTY | + CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID); + ++i; +#endif + + if (CONFIG_MEM_SIZE) { + uint32_t mbase = CONFIG_SYS_MONITOR_BASE; + uint32_t mend = mbase + CONFIG_SYS_MONITOR_LEN - 1; + mbase &= CPLB_PAGE_MASK; + mend &= CPLB_PAGE_MASK; + + icplb_add(mbase, SDRAM_IKERNEL); + dcplb_add(mbase, SDRAM_DKERNEL); + ++i; + + /* + * If the monitor crosses a 4 meg boundary, we'll need + * to lock two entries for it. We assume it doesn't + * cross two 4 meg boundaries ... + */ + if (mbase != mend) { + icplb_add(mend, SDRAM_IKERNEL); + dcplb_add(mend, SDRAM_DKERNEL); + ++i; + } + } + +#ifndef __ADSPBF60x__ + icplb_add(0x20000000, SDRAM_INON_CHBL); + dcplb_add(0x20000000, SDRAM_EBIU); + ++i; +#endif + + /* Add entries for the rest of external RAM up to the bootrom */ + extern_memory = 0; + +#ifdef CONFIG_DEBUG_NULL_PTR + icplb_add(extern_memory, + (SDRAM_IKERNEL & ~PAGE_SIZE_MASK) | PAGE_SIZE_1KB); + dcplb_add(extern_memory, + (SDRAM_DKERNEL & ~PAGE_SIZE_MASK) | PAGE_SIZE_1KB); + ++i; + icplb_add(extern_memory, SDRAM_IKERNEL); + dcplb_add(extern_memory, SDRAM_DKERNEL); + extern_memory += CPLB_PAGE_SIZE; + ++i; +#endif + + while (i < 16 && extern_memory < + (CONFIG_SYS_MONITOR_BASE & CPLB_EX_PAGE_MASK)) { + icplb_add(extern_memory, SDRAM_IGENERIC); + dcplb_add(extern_memory, SDRAM_DGENERIC); + extern_memory += CPLB_EX_PAGE_SIZE; + ++i; + } + while (i < 16) { + icplb_add(0, 0); + dcplb_add(0, 0); + ++i; + } +} + +int print_cpuinfo(void) +{ + char buf[32]; + + printf("CPU: ADSP %s (Detected Rev: 0.%d) (%s boot)\n", + gd->bd->bi_cpu, + bfin_revid(), + get_bfin_boot_mode(CONFIG_BFIN_BOOT_MODE)); + + printf("Clock: VCO: %s MHz, ", strmhz(buf, get_vco())); + printf("Core: %s MHz, ", strmhz(buf, get_cclk())); +#if defined(__ADSPBF60x__) + printf("System0: %s MHz, ", strmhz(buf, get_sclk0())); + printf("System1: %s MHz, ", strmhz(buf, get_sclk1())); + printf("Dclk: %s MHz\n", strmhz(buf, get_dclk())); +#else + printf("System: %s MHz\n", strmhz(buf, get_sclk())); +#endif + + return 0; +} + +int exception_init(void) +{ + bfin_write_EVT3(trap); + return 0; +} + +int irq_init(void) +{ +#ifdef SIC_IMASK0 + bfin_write_SIC_IMASK0(0); + bfin_write_SIC_IMASK1(0); +# ifdef SIC_IMASK2 + bfin_write_SIC_IMASK2(0); +# endif +#elif defined(SICA_IMASK0) + bfin_write_SICA_IMASK0(0); + bfin_write_SICA_IMASK1(0); +#elif defined(SIC_IMASK) + bfin_write_SIC_IMASK(0); +#endif + /* Set up a dummy NMI handler if needed. */ + if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS || ANOMALY_05000219) + bfin_write_EVT2(evt_nmi); /* NMI */ + bfin_write_EVT5(evt_default); /* hardware error */ + bfin_write_EVT6(evt_default); /* core timer */ + bfin_write_EVT7(evt_default); + bfin_write_EVT8(evt_default); + bfin_write_EVT9(evt_default); + bfin_write_EVT10(evt_default); + bfin_write_EVT11(evt_default); + bfin_write_EVT12(evt_default); + bfin_write_EVT13(evt_default); + bfin_write_EVT14(evt_default); + bfin_write_EVT15(evt_default); + bfin_write_ILAT(0); + CSYNC(); + /* enable hardware error irq */ + irq_flags = 0x3f; + local_irq_enable(); + return 0; +} + __attribute__ ((__noreturn__)) void cpu_init_f(ulong bootflag, ulong loaded_from_ldr) { @@ -102,51 +352,62 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr) bfin_core1_start(); #endif - serial_early_puts("Board init flash\n"); - board_init_f(bootflag); + serial_early_puts("Init global data\n"); + global_board_data_init(); + + board_init_f(0); /* should not be reached */ while (1); } -int exception_init(void) +int arch_cpu_init(void) { - bfin_write_EVT3(trap); + serial_early_puts("Init CPLB tables\n"); + init_cplbtables(); + + serial_early_puts("Exceptions setup\n"); + exception_init(); + +#ifndef CONFIG_ICACHE_OFF + serial_early_puts("Turn on ICACHE\n"); + icache_enable(); +#endif +#ifndef CONFIG_DCACHE_OFF + serial_early_puts("Turn on DCACHE\n"); + dcache_enable(); +#endif + +#ifdef DEBUG + if (GENERATED_GBL_DATA_SIZE < sizeof(*gd)) + hang(); +#endif + + /* Initialize */ + serial_early_puts("IRQ init\n"); + irq_init(); + return 0; } -int irq_init(void) +int arch_misc_init(void) { -#ifdef SIC_IMASK0 - bfin_write_SIC_IMASK0(0); - bfin_write_SIC_IMASK1(0); -# ifdef SIC_IMASK2 - bfin_write_SIC_IMASK2(0); -# endif -#elif defined(SICA_IMASK0) - bfin_write_SICA_IMASK0(0); - bfin_write_SICA_IMASK1(0); -#elif defined(SIC_IMASK) - bfin_write_SIC_IMASK(0); +#if defined(CONFIG_SYS_I2C) + i2c_reloc_fixup(); #endif - /* Set up a dummy NMI handler if needed. */ - if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS || ANOMALY_05000219) - bfin_write_EVT2(evt_nmi); /* NMI */ - bfin_write_EVT5(evt_default); /* hardware error */ - bfin_write_EVT6(evt_default); /* core timer */ - bfin_write_EVT7(evt_default); - bfin_write_EVT8(evt_default); - bfin_write_EVT9(evt_default); - bfin_write_EVT10(evt_default); - bfin_write_EVT11(evt_default); - bfin_write_EVT12(evt_default); - bfin_write_EVT13(evt_default); - bfin_write_EVT14(evt_default); - bfin_write_EVT15(evt_default); - bfin_write_ILAT(0); - CSYNC(); - /* enable hardware error irq */ - irq_flags = 0x3f; - local_irq_enable(); + + display_global_data(); + + if (CONFIG_MEM_SIZE && bfin_os_log_check()) { + puts("\nLog buffer from operating system:\n"); + bfin_os_log_dump(); + puts("\n"); + } + + return 0; +} + +int interrupt_init(void) +{ return 0; } diff --git a/arch/blackfin/cpu/start.S b/arch/blackfin/cpu/start.S index 29a7c23..f31abfa 100644 --- a/arch/blackfin/cpu/start.S +++ b/arch/blackfin/cpu/start.S @@ -196,8 +196,8 @@ ENTRY(_start) * takes care of clearing things for us. */ serial_early_puts("Zero BSS"); - r0.l = __bss_vma; - r0.h = __bss_vma; + r0.l = __bss_start; + r0.h = __bss_start; r1 = 0 (x); r2.l = __bss_len; r2.h = __bss_len; @@ -251,3 +251,13 @@ LENTRY(_get_pc) #endif rts; ENDPROC(_get_pc) + +ENTRY(_relocate_code) + /* Fake relocate code. Setup the new stack only */ + sp = r0; + fp = sp; + r0 = p3; + r1.h = 0x2000; + r1.l = 0x10; + jump.l _board_init_r +ENDPROC(_relocate_code) diff --git a/arch/blackfin/cpu/u-boot.lds b/arch/blackfin/cpu/u-boot.lds index 7f0411f..ae1b813 100644 --- a/arch/blackfin/cpu/u-boot.lds +++ b/arch/blackfin/cpu/u-boot.lds @@ -135,6 +135,8 @@ SECTIONS *(COMMON) . = ALIGN(4); } >ram_data - __bss_vma = ADDR(.bss); + __bss_end = .; + __bss_start = ADDR(.bss); __bss_len = SIZEOF(.bss); + __init_end = .; } diff --git a/arch/blackfin/include/asm/u-boot.h b/arch/blackfin/include/asm/u-boot.h index acaeee9..7b5cf6a 100644 --- a/arch/blackfin/include/asm/u-boot.h +++ b/arch/blackfin/include/asm/u-boot.h @@ -25,9 +25,12 @@ typedef struct bd_info { unsigned long bi_vco; unsigned long bi_cclk; unsigned long bi_sclk; + unsigned char bi_enetaddr[6]; } bd_t; /* For image.h:image_check_target_arch() */ #define IH_ARCH_DEFAULT IH_ARCH_BLACKFIN +int arch_misc_init(void); + #endif /* _U_BOOT_H_ */ diff --git a/arch/blackfin/lib/Makefile b/arch/blackfin/lib/Makefile index 4ba7bf6..b534a98 100644 --- a/arch/blackfin/lib/Makefile +++ b/arch/blackfin/lib/Makefile @@ -9,11 +9,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Unnecessary. -# Use CONFIG_SYS_BOARD instead of BFIN_BOARD_NAME -# and delete this. -ccflags-y += -DBFIN_BOARD_NAME='"$(BOARD)"' - obj-y += ins.o obj-y += memcmp.o obj-y += memcpy.o @@ -21,7 +16,6 @@ obj-y += memmove.o obj-y += memset.o obj-y += outs.o obj-$(CONFIG_CMD_KGDB) += __kgdb.o -obj-y += board.o obj-y += boot.o obj-y += cache.o obj-y += clocks.o @@ -30,3 +24,4 @@ obj-$(CONFIG_CMD_KGDB) += kgdb.o obj-y += muldi3.o obj-$(CONFIG_HAS_POST) += post.o obj-y += string.o +obj-y += sections.o diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c deleted file mode 100644 index 8784255..0000000 --- a/arch/blackfin/lib/board.c +++ /dev/null @@ -1,443 +0,0 @@ -/* - * U-boot - board.c First C file to be called contains init routines - * - * Copyright (c) 2005-2008 Analog Devices Inc. - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <command.h> -#include <stdio_dev.h> -#include <serial.h> -#include <environment.h> -#include <malloc.h> -#include <mmc.h> -#include <net.h> -#include <status_led.h> -#include <version.h> -#include <watchdog.h> - -#include <asm/cplb.h> -#include <asm/mach-common/bits/mpu.h> -#include <asm/clock.h> -#include <kgdb.h> - -#ifdef CONFIG_CMD_NAND -#include <nand.h> /* cannot even include nand.h if it isnt configured */ -#endif - -#ifdef CONFIG_BITBANGMII -#include <miiphy.h> -#endif - -#if defined(CONFIG_POST) -#include <post.h> -int post_flag; -#endif - -#if defined(CONFIG_SYS_I2C) -#include <i2c.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -__attribute__((always_inline)) -static inline void serial_early_puts(const char *s) -{ -#ifdef CONFIG_DEBUG_EARLY_SERIAL - serial_puts("Early: "); - serial_puts(s); -#endif -} - -static int display_banner(void) -{ - display_options(); - printf("CPU: ADSP %s " - "(Detected Rev: 0.%d) " - "(%s boot)\n", - gd->bd->bi_cpu, - bfin_revid(), - get_bfin_boot_mode(CONFIG_BFIN_BOOT_MODE)); - return 0; -} - -static int init_baudrate(void) -{ - gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); - return 0; -} - -static void display_global_data(void) -{ - bd_t *bd; - -#ifndef CONFIG_DEBUG_EARLY_SERIAL - return; -#endif - - bd = gd->bd; - printf(" gd: %p\n", gd); - printf(" |-flags: %lx\n", gd->flags); - printf(" |-board_type: %lx\n", gd->arch.board_type); - printf(" |-baudrate: %u\n", gd->baudrate); - printf(" |-have_console: %lx\n", gd->have_console); - printf(" |-ram_size: %lx\n", gd->ram_size); - printf(" |-env_addr: %lx\n", gd->env_addr); - printf(" |-env_valid: %lx\n", gd->env_valid); - printf(" |-jt(%p): %p\n", gd->jt, *(gd->jt)); - printf(" \\-bd: %p\n", gd->bd); - printf(" |-bi_boot_params: %lx\n", bd->bi_boot_params); - printf(" |-bi_memstart: %lx\n", bd->bi_memstart); - printf(" |-bi_memsize: %lx\n", bd->bi_memsize); - printf(" |-bi_flashstart: %lx\n", bd->bi_flashstart); - printf(" |-bi_flashsize: %lx\n", bd->bi_flashsize); - printf(" \\-bi_flashoffset: %lx\n", bd->bi_flashoffset); -} - -#define CPLB_PAGE_SIZE (4 * 1024 * 1024) -#define CPLB_PAGE_MASK (~(CPLB_PAGE_SIZE - 1)) -#if defined(__ADSPBF60x__) -#define CPLB_EX_PAGE_SIZE (16 * 1024 * 1024) -#define CPLB_EX_PAGE_MASK (~(CPLB_EX_PAGE_SIZE - 1)) -#else -#define CPLB_EX_PAGE_SIZE CPLB_PAGE_SIZE -#define CPLB_EX_PAGE_MASK CPLB_PAGE_MASK -#endif -void init_cplbtables(void) -{ - volatile uint32_t *ICPLB_ADDR, *ICPLB_DATA; - volatile uint32_t *DCPLB_ADDR, *DCPLB_DATA; - uint32_t extern_memory; - size_t i; - - void icplb_add(uint32_t addr, uint32_t data) - { - *(ICPLB_ADDR + i) = addr; - *(ICPLB_DATA + i) = data; - } - void dcplb_add(uint32_t addr, uint32_t data) - { - *(DCPLB_ADDR + i) = addr; - *(DCPLB_DATA + i) = data; - } - - /* populate a few common entries ... we'll let - * the memory map and cplb exception handler do - * the rest of the work. - */ - i = 0; - ICPLB_ADDR = (uint32_t *)ICPLB_ADDR0; - ICPLB_DATA = (uint32_t *)ICPLB_DATA0; - DCPLB_ADDR = (uint32_t *)DCPLB_ADDR0; - DCPLB_DATA = (uint32_t *)DCPLB_DATA0; - - icplb_add(0xFFA00000, L1_IMEMORY); - dcplb_add(0xFF800000, L1_DMEMORY); - ++i; -#if defined(__ADSPBF60x__) - icplb_add(0x0, 0x0); - dcplb_add(CONFIG_SYS_FLASH_BASE, PAGE_SIZE_16MB | CPLB_DIRTY | - CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID); - ++i; -#endif - - if (CONFIG_MEM_SIZE) { - uint32_t mbase = CONFIG_SYS_MONITOR_BASE; - uint32_t mend = mbase + CONFIG_SYS_MONITOR_LEN; - mbase &= CPLB_PAGE_MASK; - mend &= CPLB_PAGE_MASK; - - icplb_add(mbase, SDRAM_IKERNEL); - dcplb_add(mbase, SDRAM_DKERNEL); - ++i; - - /* - * If the monitor crosses a 4 meg boundary, we'll need - * to lock two entries for it. We assume it doesn't - * cross two 4 meg boundaries ... - */ - if (mbase != mend) { - icplb_add(mend, SDRAM_IKERNEL); - dcplb_add(mend, SDRAM_DKERNEL); - ++i; - } - } - -#ifndef __ADSPBF60x__ - icplb_add(0x20000000, SDRAM_INON_CHBL); - dcplb_add(0x20000000, SDRAM_EBIU); - ++i; -#endif - - /* Add entries for the rest of external RAM up to the bootrom */ - extern_memory = 0; - -#ifdef CONFIG_DEBUG_NULL_PTR - icplb_add(extern_memory, (SDRAM_IKERNEL & ~PAGE_SIZE_MASK) | PAGE_SIZE_1KB); - dcplb_add(extern_memory, (SDRAM_DKERNEL & ~PAGE_SIZE_MASK) | PAGE_SIZE_1KB); - ++i; - icplb_add(extern_memory, SDRAM_IKERNEL); - dcplb_add(extern_memory, SDRAM_DKERNEL); - extern_memory += CPLB_PAGE_SIZE; - ++i; -#endif - - while (i < 16 && extern_memory < - (CONFIG_SYS_MONITOR_BASE & CPLB_EX_PAGE_MASK)) { - icplb_add(extern_memory, SDRAM_IGENERIC); - dcplb_add(extern_memory, SDRAM_DGENERIC); - extern_memory += CPLB_EX_PAGE_SIZE; - ++i; - } - while (i < 16) { - icplb_add(0, 0); - dcplb_add(0, 0); - ++i; - } -} - -static int global_board_data_init(void) -{ -#ifndef CONFIG_SYS_GBL_DATA_ADDR -# define CONFIG_SYS_GBL_DATA_ADDR 0 -#endif -#ifndef CONFIG_SYS_BD_INFO_ADDR -# define CONFIG_SYS_BD_INFO_ADDR 0 -#endif - - bd_t *bd; - - if (CONFIG_SYS_GBL_DATA_ADDR) { - gd = (gd_t *) (CONFIG_SYS_GBL_DATA_ADDR); - memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE); - } else { - static gd_t _bfin_gd; - gd = &_bfin_gd; - } - - if (CONFIG_SYS_BD_INFO_ADDR) { - bd = (bd_t *) (CONFIG_SYS_BD_INFO_ADDR); - memset(bd, 0, GENERATED_BD_INFO_SIZE); - } else { - static bd_t _bfin_bd; - bd = &_bfin_bd; - } - gd->bd = bd; - - bd->bi_r_version = version_string; - bd->bi_cpu = __stringify(CONFIG_BFIN_CPU); - bd->bi_board_name = BFIN_BOARD_NAME; - bd->bi_vco = get_vco(); - bd->bi_cclk = get_cclk(); - bd->bi_sclk = get_sclk(); - bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - - return 0; -} - -/* - * All attempts to come up with a "common" initialization sequence - * that works for all boards and architectures failed: some of the - * requirements are just _too_ different. To get rid of the resulting - * mess of board dependend #ifdef'ed code we now make the whole - * initialization sequence configurable to the user. - * - * The requirements for any new initalization function is simple: it - * receives a pointer to the "global data" structure as it's only - * argument, and returns an integer return code, where 0 means - * "continue" and != 0 means "fatal error, hang the system". - */ - -extern int watchdog_init(void); -extern int exception_init(void); -extern int irq_init(void); -extern int timer_init(void); - -void board_init_f(ulong bootflag) -{ - char buf[32]; - -#ifdef CONFIG_BOARD_EARLY_INIT_F - serial_early_puts("Board early init flash\n"); - board_early_init_f(); -#endif - - serial_early_puts("Init CPLB tables\n"); - init_cplbtables(); - - serial_early_puts("Exceptions setup\n"); - exception_init(); - -#ifndef CONFIG_ICACHE_OFF - serial_early_puts("Turn on ICACHE\n"); - icache_enable(); -#endif -#ifndef CONFIG_DCACHE_OFF - serial_early_puts("Turn on DCACHE\n"); - dcache_enable(); -#endif - -#ifdef CONFIG_HW_WATCHDOG - serial_early_puts("Setting up external watchdog\n"); - hw_watchdog_init(); -#endif - -#ifdef DEBUG - if (GENERATED_GBL_DATA_SIZE < sizeof(*gd)) - hang(); -#endif - serial_early_puts("Init global data\n"); - - global_board_data_init(); - - /* Initialize */ - serial_early_puts("IRQ init\n"); - irq_init(); - serial_early_puts("Environment init\n"); - env_init(); - serial_early_puts("Baudrate init\n"); - init_baudrate(); - serial_early_puts("Serial init\n"); - serial_init(); - serial_initialize(); - serial_early_puts("Console init flash\n"); - console_init_f(); - serial_early_puts("End of early debugging\n"); - display_banner(); - - checkboard(); - timer_init(); - - printf("Clock: VCO: %s MHz, ", strmhz(buf, get_vco())); - printf("Core: %s MHz, ", strmhz(buf, get_cclk())); -#if defined(__ADSPBF60x__) - printf("System0: %s MHz, ", strmhz(buf, get_sclk0())); - printf("System1: %s MHz, ", strmhz(buf, get_sclk1())); - printf("Dclk: %s MHz\n", strmhz(buf, get_dclk())); -#else - printf("System: %s MHz\n", strmhz(buf, get_sclk())); -#endif - - if (CONFIG_MEM_SIZE) { - printf("RAM: "); - print_size(gd->bd->bi_memsize, "\n"); - } - -#if defined(CONFIG_POST) - post_init_f(); - post_bootmode_init(); - post_run(NULL, POST_ROM | post_bootmode_get(0)); -#endif - - board_init_r((gd_t *) gd, 0x20000010); -} - -static void board_net_init_r(bd_t *bd) -{ -#ifdef CONFIG_BITBANGMII - bb_miiphy_init(); -#endif -#ifdef CONFIG_CMD_NET - printf("Net: "); - eth_initialize(bd); -#endif -} - -void board_init_r(gd_t * id, ulong dest_addr) -{ - bd_t *bd; - gd = id; - gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ - bd = gd->bd; - -#if defined(CONFIG_POST) - post_output_backlog(); -#endif - - /* initialize malloc() area */ - mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); - -#if !defined(CONFIG_SYS_NO_FLASH) - /* Initialize the flash and protect u-boot by default */ - extern flash_info_t flash_info[]; - puts("Flash: "); - ulong size = flash_init(); - print_size(size, "\n"); - flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN - 1, - &flash_info[0]); - bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; - bd->bi_flashsize = size; - bd->bi_flashoffset = 0; -#else - bd->bi_flashstart = 0; - bd->bi_flashsize = 0; - bd->bi_flashoffset = 0; -#endif - -#ifdef CONFIG_CMD_NAND - puts("NAND: "); - nand_init(); /* go init the NAND */ -#endif - -#ifdef CONFIG_GENERIC_MMC - puts("MMC: "); - mmc_initialize(bd); -#endif - -#if defined(CONFIG_SYS_I2C) - i2c_reloc_fixup(); -#endif - /* relocate environment function pointers etc. */ - env_relocate(); - - /* Initialize stdio devices */ - stdio_init(); - jumptable_init(); - - /* Initialize the console (after the relocation and devices init) */ - console_init_r(); - -#ifdef CONFIG_CMD_KGDB - puts("KGDB: "); - kgdb_init(); -#endif - -#ifdef CONFIG_STATUS_LED - status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING); - status_led_set(STATUS_LED_CRASH, STATUS_LED_OFF); -#endif - - /* Initialize from environment */ - load_addr = getenv_ulong("loadaddr", 16, load_addr); - -#if defined(CONFIG_MISC_INIT_R) - /* miscellaneous platform dependent initialisations */ - misc_init_r(); -#endif - - board_net_init_r(bd); - - display_global_data(); - -#if defined(CONFIG_POST) - if (post_flag) - post_run(NULL, POST_RAM | post_bootmode_get(0)); -#endif - - if (CONFIG_MEM_SIZE && bfin_os_log_check()) { - puts("\nLog buffer from operating system:\n"); - bfin_os_log_dump(); - puts("\n"); - } - - /* main_loop() can return to retry autoboot, if so just run it again. */ - for (;;) - main_loop(); -} diff --git a/arch/blackfin/lib/sections.c b/arch/blackfin/lib/sections.c new file mode 100644 index 0000000..b50f30a --- /dev/null +++ b/arch/blackfin/lib/sections.c @@ -0,0 +1,11 @@ +/* + * U-boot - section.c + * + * Copyright (c) 2014 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +char __bss_start[0] __attribute__((section(".__bss_start"))); +char __bss_end[0] __attribute__((section(".__bss_end"))); +char __init_end[0] __attribute__((section(".__init_end"))); diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index ea9acf6..19160ce 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -327,4 +327,8 @@ #ifndef CONFIG_ADI_GPIO2 # define CONFIG_ADI_GPIO1 #endif +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_ARCH_MISC_INIT + #endif -- 1.8.2.3

1 1

[U-Boot] Falcon boot mode
by Andy Pont 01 Aug '14

01 Aug '14

Hello, Does Falcon boot mode only support raw NAND devices as described in the README.falcon file will it also work with SPI NOR devices and eMMC NAND, SDC card as well? Thanks, Andy.

1 0

[U-Boot] [U-boot] Question about the (new) U-Boot Timer API
by TigerLiu＠via-alliance.com 01 Aug '14

01 Aug '14

Hi, Wolfgang: The wiki (http://www.denx.de/wiki/U-Boot/TaskTimerAPI) introduced new U-Boot Timer API, such as: time_ms_delta_raw() time_ms_delta_max() ...... Not find in 2014.07 code package. Were they not adopted by u-boot maintainer? Best wishes,

1 0

[U-Boot] [PATCH] drivers: net: remove dead drivers
by Masahiro Yamada 01 Aug '14

01 Aug '14

The following configs are not defined at all: - CONFIG_FTMAC110 - CONFIG_INCA_IP_SWITCH - CONFIG_PBL2800_ETHER - CONFIG_PHY_ICPLUS Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- drivers/net/Makefile | 3 - drivers/net/ftmac110.c | 480 ---------------------------------------------- drivers/net/ftmac110.h | 176 ----------------- drivers/net/phy/Makefile | 1 - drivers/net/phy/icplus.c | 80 -------- drivers/net/phy/phy.c | 3 - drivers/net/plb2800_eth.c | 373 ----------------------------------- include/netdev.h | 2 - 8 files changed, 1118 deletions(-) delete mode 100644 drivers/net/ftmac110.c delete mode 100644 drivers/net/ftmac110.h delete mode 100644 drivers/net/phy/icplus.c delete mode 100644 drivers/net/plb2800_eth.c diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 7cc6b6f..42f21a6 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -27,10 +27,8 @@ obj-$(CONFIG_ETHOC) += ethoc.o obj-$(CONFIG_FEC_MXC) += fec_mxc.o obj-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o obj-$(CONFIG_FTGMAC100) += ftgmac100.o -obj-$(CONFIG_FTMAC110) += ftmac110.o obj-$(CONFIG_FTMAC100) += ftmac100.o obj-$(CONFIG_GRETH) += greth.o -obj-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o obj-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o @@ -46,7 +44,6 @@ obj-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o obj-$(CONFIG_NETCONSOLE) += netconsole.o obj-$(CONFIG_NS8382X) += ns8382x.o obj-$(CONFIG_PCNET) += pcnet.o -obj-$(CONFIG_PLB2800_ETHER) += plb2800_eth.o obj-$(CONFIG_RTL8139) += rtl8139.o obj-$(CONFIG_RTL8169) += rtl8169.o obj-$(CONFIG_SH_ETHER) += sh_eth.o diff --git a/drivers/net/ftmac110.c b/drivers/net/ftmac110.c deleted file mode 100644 index 98c4f09..0000000 --- a/drivers/net/ftmac110.c +++ /dev/null @@ -1,480 +0,0 @@ -/* - * Faraday 10/100Mbps Ethernet Controller - * - * (C) Copyright 2013 Faraday Technology - * Dante Su <dantesu(a)faraday-tech.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <command.h> -#include <malloc.h> -#include <net.h> -#include <asm/errno.h> -#include <asm/io.h> -#include <asm/dma-mapping.h> - -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) -#include <miiphy.h> -#endif - -#include "ftmac110.h" - -#define CFG_RXDES_NUM 8 -#define CFG_TXDES_NUM 2 -#define CFG_XBUF_SIZE 1536 - -#define CFG_MDIORD_TIMEOUT (CONFIG_SYS_HZ >> 1) /* 500 ms */ -#define CFG_MDIOWR_TIMEOUT (CONFIG_SYS_HZ >> 1) /* 500 ms */ -#define CFG_LINKUP_TIMEOUT (CONFIG_SYS_HZ << 2) /* 4 sec */ - -/* - * FTMAC110 DMA design issue - * - * Its DMA engine has a weird restriction that its Rx DMA engine - * accepts only 16-bits aligned address, 32-bits aligned is not - * acceptable. However this restriction does not apply to Tx DMA. - * - * Conclusion: - * (1) Tx DMA Buffer Address: - * 1 bytes aligned: Invalid - * 2 bytes aligned: O.K - * 4 bytes aligned: O.K (-> u-boot ZeroCopy is possible) - * (2) Rx DMA Buffer Address: - * 1 bytes aligned: Invalid - * 2 bytes aligned: O.K - * 4 bytes aligned: Invalid - */ - -struct ftmac110_chip { - void __iomem *regs; - uint32_t imr; - uint32_t maccr; - uint32_t lnkup; - uint32_t phy_addr; - - struct ftmac110_desc *rxd; - ulong rxd_dma; - uint32_t rxd_idx; - - struct ftmac110_desc *txd; - ulong txd_dma; - uint32_t txd_idx; -}; - -static int ftmac110_reset(struct eth_device *dev); - -static uint16_t mdio_read(struct eth_device *dev, - uint8_t phyaddr, uint8_t phyreg) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - uint32_t tmp, ts; - uint16_t ret = 0xffff; - - tmp = PHYCR_READ - | (phyaddr << PHYCR_ADDR_SHIFT) - | (phyreg << PHYCR_REG_SHIFT); - - writel(tmp, &regs->phycr); - - for (ts = get_timer(0); get_timer(ts) < CFG_MDIORD_TIMEOUT; ) { - tmp = readl(&regs->phycr); - if (tmp & PHYCR_READ) - continue; - break; - } - - if (tmp & PHYCR_READ) - printf("ftmac110: mdio read timeout\n"); - else - ret = (uint16_t)(tmp & 0xffff); - - return ret; -} - -static void mdio_write(struct eth_device *dev, - uint8_t phyaddr, uint8_t phyreg, uint16_t phydata) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - uint32_t tmp, ts; - - tmp = PHYCR_WRITE - | (phyaddr << PHYCR_ADDR_SHIFT) - | (phyreg << PHYCR_REG_SHIFT); - - writel(phydata, &regs->phydr); - writel(tmp, &regs->phycr); - - for (ts = get_timer(0); get_timer(ts) < CFG_MDIOWR_TIMEOUT; ) { - if (readl(&regs->phycr) & PHYCR_WRITE) - continue; - break; - } - - if (readl(&regs->phycr) & PHYCR_WRITE) - printf("ftmac110: mdio write timeout\n"); -} - -static uint32_t ftmac110_phyqry(struct eth_device *dev) -{ - ulong ts; - uint32_t maccr; - uint16_t pa, tmp, bmsr, bmcr; - struct ftmac110_chip *chip = dev->priv; - - /* Default = 100Mbps Full */ - maccr = MACCR_100M | MACCR_FD; - - /* 1. find the phy device */ - for (pa = 0; pa < 32; ++pa) { - tmp = mdio_read(dev, pa, MII_PHYSID1); - if (tmp == 0xFFFF || tmp == 0x0000) - continue; - chip->phy_addr = pa; - break; - } - if (pa >= 32) { - puts("ftmac110: phy device not found!\n"); - goto exit; - } - - /* 2. wait until link-up & auto-negotiation complete */ - chip->lnkup = 0; - bmcr = mdio_read(dev, chip->phy_addr, MII_BMCR); - ts = get_timer(0); - do { - bmsr = mdio_read(dev, chip->phy_addr, MII_BMSR); - chip->lnkup = (bmsr & BMSR_LSTATUS) ? 1 : 0; - if (!chip->lnkup) - continue; - if (!(bmcr & BMCR_ANENABLE) || (bmsr & BMSR_ANEGCOMPLETE)) - break; - } while (get_timer(ts) < CFG_LINKUP_TIMEOUT); - if (!chip->lnkup) { - puts("ftmac110: link down\n"); - goto exit; - } - if (!(bmcr & BMCR_ANENABLE)) - puts("ftmac110: auto negotiation disabled\n"); - else if (!(bmsr & BMSR_ANEGCOMPLETE)) - puts("ftmac110: auto negotiation timeout\n"); - - /* 3. derive MACCR */ - if ((bmcr & BMCR_ANENABLE) && (bmsr & BMSR_ANEGCOMPLETE)) { - tmp = mdio_read(dev, chip->phy_addr, MII_ADVERTISE); - tmp &= mdio_read(dev, chip->phy_addr, MII_LPA); - if (tmp & LPA_100FULL) /* 100Mbps full-duplex */ - maccr = MACCR_100M | MACCR_FD; - else if (tmp & LPA_100HALF) /* 100Mbps half-duplex */ - maccr = MACCR_100M; - else if (tmp & LPA_10FULL) /* 10Mbps full-duplex */ - maccr = MACCR_FD; - else if (tmp & LPA_10HALF) /* 10Mbps half-duplex */ - maccr = 0; - } else { - if (bmcr & BMCR_SPEED100) - maccr = MACCR_100M; - else - maccr = 0; - if (bmcr & BMCR_FULLDPLX) - maccr |= MACCR_FD; - } - -exit: - printf("ftmac110: %d Mbps, %s\n", - (maccr & MACCR_100M) ? 100 : 10, - (maccr & MACCR_FD) ? "Full" : "half"); - return maccr; -} - -static int ftmac110_reset(struct eth_device *dev) -{ - uint8_t *a; - uint32_t i, maccr; - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - - /* 1. MAC reset */ - writel(MACCR_RESET, &regs->maccr); - for (i = get_timer(0); get_timer(i) < 1000; ) { - if (readl(&regs->maccr) & MACCR_RESET) - continue; - break; - } - if (readl(&regs->maccr) & MACCR_RESET) { - printf("ftmac110: reset failed\n"); - return -ENXIO; - } - - /* 1-1. Init tx ring */ - for (i = 0; i < CFG_TXDES_NUM; ++i) { - /* owned by SW */ - chip->txd[i].ctrl &= cpu_to_le64(FTMAC110_TXD_CLRMASK); - } - chip->txd_idx = 0; - - /* 1-2. Init rx ring */ - for (i = 0; i < CFG_RXDES_NUM; ++i) { - /* owned by HW */ - chip->rxd[i].ctrl &= cpu_to_le64(FTMAC110_RXD_CLRMASK); - chip->rxd[i].ctrl |= cpu_to_le64(FTMAC110_RXD_OWNER); - } - chip->rxd_idx = 0; - - /* 2. PHY status query */ - maccr = ftmac110_phyqry(dev); - - /* 3. Fix up the MACCR value */ - chip->maccr = maccr | MACCR_CRCAPD | MACCR_RXALL | MACCR_RXRUNT - | MACCR_RXEN | MACCR_TXEN | MACCR_RXDMAEN | MACCR_TXDMAEN; - - /* 4. MAC address setup */ - a = dev->enetaddr; - writel(a[1] | (a[0] << 8), &regs->mac[0]); - writel(a[5] | (a[4] << 8) | (a[3] << 16) - | (a[2] << 24), &regs->mac[1]); - - /* 5. MAC registers setup */ - writel(chip->rxd_dma, &regs->rxba); - writel(chip->txd_dma, &regs->txba); - /* interrupt at each tx/rx */ - writel(ITC_DEFAULT, &regs->itc); - /* no tx pool, rx poll = 1 normal cycle */ - writel(APTC_DEFAULT, &regs->aptc); - /* rx threshold = [6/8 fifo, 2/8 fifo] */ - writel(DBLAC_DEFAULT, &regs->dblac); - /* disable & clear all interrupt status */ - chip->imr = 0; - writel(ISR_ALL, &regs->isr); - writel(chip->imr, &regs->imr); - /* enable mac */ - writel(chip->maccr, &regs->maccr); - - return 0; -} - -static int ftmac110_probe(struct eth_device *dev, bd_t *bis) -{ - debug("ftmac110: probe\n"); - - if (ftmac110_reset(dev)) - return -1; - - return 0; -} - -static void ftmac110_halt(struct eth_device *dev) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - - writel(0, &regs->imr); - writel(0, &regs->maccr); - - debug("ftmac110: halt\n"); -} - -static int ftmac110_send(struct eth_device *dev, void *pkt, int len) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_regs *regs = chip->regs; - struct ftmac110_desc *txd; - uint64_t ctrl; - - if (!chip->lnkup) - return 0; - - if (len <= 0 || len > CFG_XBUF_SIZE) { - printf("ftmac110: bad tx pkt len(%d)\n", len); - return 0; - } - - len = max(60, len); - - txd = &chip->txd[chip->txd_idx]; - ctrl = le64_to_cpu(txd->ctrl); - if (ctrl & FTMAC110_TXD_OWNER) { - /* kick-off Tx DMA */ - writel(0xffffffff, &regs->txpd); - printf("ftmac110: out of txd\n"); - return 0; - } - - memcpy(txd->vbuf, (void *)pkt, len); - dma_map_single(txd->vbuf, len, DMA_TO_DEVICE); - - /* clear control bits */ - ctrl &= FTMAC110_TXD_CLRMASK; - /* set len, fts and lts */ - ctrl |= FTMAC110_TXD_LEN(len) | FTMAC110_TXD_FTS | FTMAC110_TXD_LTS; - /* set owner bit */ - ctrl |= FTMAC110_TXD_OWNER; - /* write back to descriptor */ - txd->ctrl = cpu_to_le64(ctrl); - - /* kick-off Tx DMA */ - writel(0xffffffff, &regs->txpd); - - chip->txd_idx = (chip->txd_idx + 1) % CFG_TXDES_NUM; - - return len; -} - -static int ftmac110_recv(struct eth_device *dev) -{ - struct ftmac110_chip *chip = dev->priv; - struct ftmac110_desc *rxd; - uint32_t len, rlen = 0; - uint64_t ctrl; - uint8_t *buf; - - if (!chip->lnkup) - return 0; - - do { - rxd = &chip->rxd[chip->rxd_idx]; - ctrl = le64_to_cpu(rxd->ctrl); - if (ctrl & FTMAC110_RXD_OWNER) - break; - - len = (uint32_t)FTMAC110_RXD_LEN(ctrl); - buf = rxd->vbuf; - - if (ctrl & FTMAC110_RXD_ERRMASK) { - printf("ftmac110: rx error\n"); - } else { - dma_map_single(buf, len, DMA_FROM_DEVICE); - NetReceive(buf, len); - rlen += len; - } - - /* owned by hardware */ - ctrl &= FTMAC110_RXD_CLRMASK; - ctrl |= FTMAC110_RXD_OWNER; - rxd->ctrl |= cpu_to_le64(ctrl); - - chip->rxd_idx = (chip->rxd_idx + 1) % CFG_RXDES_NUM; - } while (0); - - return rlen; -} - -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - -static int ftmac110_mdio_read( - const char *devname, uint8_t addr, uint8_t reg, uint16_t *value) -{ - int ret = 0; - struct eth_device *dev; - - dev = eth_get_dev_by_name(devname); - if (dev == NULL) { - printf("%s: no such device\n", devname); - ret = -1; - } else { - *value = mdio_read(dev, addr, reg); - } - - return ret; -} - -static int ftmac110_mdio_write( - const char *devname, uint8_t addr, uint8_t reg, uint16_t value) -{ - int ret = 0; - struct eth_device *dev; - - dev = eth_get_dev_by_name(devname); - if (dev == NULL) { - printf("%s: no such device\n", devname); - ret = -1; - } else { - mdio_write(dev, addr, reg, value); - } - - return ret; -} - -#endif /* #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) */ - -int ftmac110_initialize(bd_t *bis) -{ - int i, card_nr = 0; - struct eth_device *dev; - struct ftmac110_chip *chip; - - dev = malloc(sizeof(*dev) + sizeof(*chip)); - if (dev == NULL) { - panic("ftmac110: out of memory 1\n"); - return -1; - } - chip = (struct ftmac110_chip *)(dev + 1); - memset(dev, 0, sizeof(*dev) + sizeof(*chip)); - - sprintf(dev->name, "FTMAC110#%d", card_nr); - - dev->iobase = CONFIG_FTMAC110_BASE; - chip->regs = (void __iomem *)dev->iobase; - dev->priv = chip; - dev->init = ftmac110_probe; - dev->halt = ftmac110_halt; - dev->send = ftmac110_send; - dev->recv = ftmac110_recv; - - if (!eth_getenv_enetaddr_by_index("eth", card_nr, dev->enetaddr)) - eth_random_addr(dev->enetaddr); - - /* allocate tx descriptors (it must be 16 bytes aligned) */ - chip->txd = dma_alloc_coherent( - sizeof(struct ftmac110_desc) * CFG_TXDES_NUM, &chip->txd_dma); - if (!chip->txd) - panic("ftmac110: out of memory 3\n"); - memset(chip->txd, 0, - sizeof(struct ftmac110_desc) * CFG_TXDES_NUM); - for (i = 0; i < CFG_TXDES_NUM; ++i) { - void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE); - - if (!va) - panic("ftmac110: out of memory 4\n"); - chip->txd[i].vbuf = va; - chip->txd[i].pbuf = cpu_to_le32(virt_to_phys(va)); - chip->txd[i].ctrl = 0; /* owned by SW */ - } - chip->txd[i - 1].ctrl |= cpu_to_le64(FTMAC110_TXD_END); - chip->txd_idx = 0; - - /* allocate rx descriptors (it must be 16 bytes aligned) */ - chip->rxd = dma_alloc_coherent( - sizeof(struct ftmac110_desc) * CFG_RXDES_NUM, &chip->rxd_dma); - if (!chip->rxd) - panic("ftmac110: out of memory 4\n"); - memset((void *)chip->rxd, 0, - sizeof(struct ftmac110_desc) * CFG_RXDES_NUM); - for (i = 0; i < CFG_RXDES_NUM; ++i) { - void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE + 2); - - if (!va) - panic("ftmac110: out of memory 5\n"); - /* it needs to be exactly 2 bytes aligned */ - va = ((uint8_t *)va + 2); - chip->rxd[i].vbuf = va; - chip->rxd[i].pbuf = cpu_to_le32(virt_to_phys(va)); - chip->rxd[i].ctrl = cpu_to_le64(FTMAC110_RXD_OWNER - | FTMAC110_RXD_BUFSZ(CFG_XBUF_SIZE)); - } - chip->rxd[i - 1].ctrl |= cpu_to_le64(FTMAC110_RXD_END); - chip->rxd_idx = 0; - - eth_register(dev); - -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - miiphy_register(dev->name, ftmac110_mdio_read, ftmac110_mdio_write); -#endif - - card_nr++; - - return card_nr; -} diff --git a/drivers/net/ftmac110.h b/drivers/net/ftmac110.h deleted file mode 100644 index 2772ae7..0000000 --- a/drivers/net/ftmac110.h +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Faraday 10/100Mbps Ethernet Controller - * - * (C) Copyright 2013 Faraday Technology - * Dante Su <dantesu(a)faraday-tech.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _FTMAC110_H -#define _FTMAC110_H - -struct ftmac110_regs { - uint32_t isr; /* 0x00: Interrups Status Register */ - uint32_t imr; /* 0x04: Interrupt Mask Register */ - uint32_t mac[2]; /* 0x08: MAC Address */ - uint32_t mht[2]; /* 0x10: Multicast Hash Table Register */ - uint32_t txpd; /* 0x18: Tx Poll Demand Register */ - uint32_t rxpd; /* 0x1c: Rx Poll Demand Register */ - uint32_t txba; /* 0x20: Tx Ring Base Address Register */ - uint32_t rxba; /* 0x24: Rx Ring Base Address Register */ - uint32_t itc; /* 0x28: Interrupt Timer Control Register */ - uint32_t aptc; /* 0x2C: Automatic Polling Timer Control Register */ - uint32_t dblac; /* 0x30: DMA Burst Length&Arbitration Control */ - uint32_t revr; /* 0x34: Revision Register */ - uint32_t fear; /* 0x38: Feature Register */ - uint32_t rsvd[19]; - uint32_t maccr; /* 0x88: MAC Control Register */ - uint32_t macsr; /* 0x8C: MAC Status Register */ - uint32_t phycr; /* 0x90: PHY Control Register */ - uint32_t phydr; /* 0x94: PHY Data Register */ - uint32_t fcr; /* 0x98: Flow Control Register */ - uint32_t bpr; /* 0x9C: Back Pressure Register */ -}; - -/* - * Interrupt status/mask register(ISR/IMR) bits - */ -#define ISR_ALL 0x3ff -#define ISR_PHYSTCHG (1 << 9) /* phy status change */ -#define ISR_AHBERR (1 << 8) /* bus error */ -#define ISR_RXLOST (1 << 7) /* rx lost */ -#define ISR_RXFIFO (1 << 6) /* rx to fifo */ -#define ISR_TXLOST (1 << 5) /* tx lost */ -#define ISR_TXOK (1 << 4) /* tx to ethernet */ -#define ISR_NOTXBUF (1 << 3) /* out of tx buffer */ -#define ISR_TXFIFO (1 << 2) /* tx to fifo */ -#define ISR_NORXBUF (1 << 1) /* out of rx buffer */ -#define ISR_RXOK (1 << 0) /* rx to buffer */ - -/* - * MACCR control bits - */ -#define MACCR_100M (1 << 18) /* 100Mbps mode */ -#define MACCR_RXBCST (1 << 17) /* rx broadcast packet */ -#define MACCR_RXMCST (1 << 16) /* rx multicast packet */ -#define MACCR_FD (1 << 15) /* full duplex */ -#define MACCR_CRCAPD (1 << 14) /* tx crc append */ -#define MACCR_RXALL (1 << 12) /* rx all packets */ -#define MACCR_RXFTL (1 << 11) /* rx packet even it's > 1518 byte */ -#define MACCR_RXRUNT (1 << 10) /* rx packet even it's < 64 byte */ -#define MACCR_RXMCSTHT (1 << 9) /* rx multicast hash table */ -#define MACCR_RXEN (1 << 8) /* rx enable */ -#define MACCR_RXINHDTX (1 << 6) /* rx in half duplex tx */ -#define MACCR_TXEN (1 << 5) /* tx enable */ -#define MACCR_CRCDIS (1 << 4) /* tx packet even it's crc error */ -#define MACCR_LOOPBACK (1 << 3) /* loop-back */ -#define MACCR_RESET (1 << 2) /* reset */ -#define MACCR_RXDMAEN (1 << 1) /* rx dma enable */ -#define MACCR_TXDMAEN (1 << 0) /* tx dma enable */ - -/* - * PHYCR control bits - */ -#define PHYCR_READ (1 << 26) -#define PHYCR_WRITE (1 << 27) -#define PHYCR_REG_SHIFT 21 -#define PHYCR_ADDR_SHIFT 16 - -/* - * ITC control bits - */ - -/* Tx Cycle Length */ -#define ITC_TX_CYCLONG (1 << 15) /* 100Mbps=81.92us; 10Mbps=819.2us */ -#define ITC_TX_CYCNORM (0 << 15) /* 100Mbps=5.12us; 10Mbps=51.2us */ -/* Tx Threshold: Aggregate n interrupts as 1 interrupt */ -#define ITC_TX_THR(n) (((n) & 0x7) << 12) -/* Tx Interrupt Timeout = n * Tx Cycle */ -#define ITC_TX_ITMO(n) (((n) & 0xf) << 8) -/* Rx Cycle Length */ -#define ITC_RX_CYCLONG (1 << 7) /* 100Mbps=81.92us; 10Mbps=819.2us */ -#define ITC_RX_CYCNORM (0 << 7) /* 100Mbps=5.12us; 10Mbps=51.2us */ -/* Rx Threshold: Aggregate n interrupts as 1 interrupt */ -#define ITC_RX_THR(n) (((n) & 0x7) << 4) -/* Rx Interrupt Timeout = n * Rx Cycle */ -#define ITC_RX_ITMO(n) (((n) & 0xf) << 0) - -#define ITC_DEFAULT \ - (ITC_TX_THR(1) | ITC_TX_ITMO(0) | ITC_RX_THR(1) | ITC_RX_ITMO(0)) - -/* - * APTC contrl bits - */ - -/* Tx Cycle Length */ -#define APTC_TX_CYCLONG (1 << 12) /* 100Mbps=81.92us; 10Mbps=819.2us */ -#define APTC_TX_CYCNORM (0 << 12) /* 100Mbps=5.12us; 10Mbps=51.2us */ -/* Tx Poll Timeout = n * Tx Cycle, 0=No auto polling */ -#define APTC_TX_PTMO(n) (((n) & 0xf) << 8) -/* Rx Cycle Length */ -#define APTC_RX_CYCLONG (1 << 4) /* 100Mbps=81.92us; 10Mbps=819.2us */ -#define APTC_RX_CYCNORM (0 << 4) /* 100Mbps=5.12us; 10Mbps=51.2us */ -/* Rx Poll Timeout = n * Rx Cycle, 0=No auto polling */ -#define APTC_RX_PTMO(n) (((n) & 0xf) << 0) - -#define APTC_DEFAULT (APTC_TX_PTMO(0) | APTC_RX_PTMO(1)) - -/* - * DBLAC contrl bits - */ -#define DBLAC_BURST_MAX_ANY (0 << 14) /* un-limited */ -#define DBLAC_BURST_MAX_32X4 (2 << 14) /* max = 32 x 4 bytes */ -#define DBLAC_BURST_MAX_64X4 (3 << 14) /* max = 64 x 4 bytes */ -#define DBLAC_RXTHR_EN (1 << 9) /* enable rx threshold arbitration */ -#define DBLAC_RXTHR_HIGH(n) (((n) & 0x7) << 6) /* upper bound = n/8 fifo */ -#define DBLAC_RXTHR_LOW(n) (((n) & 0x7) << 3) /* lower bound = n/8 fifo */ -#define DBLAC_BURST_CAP16 (1 << 2) /* support burst 16 */ -#define DBLAC_BURST_CAP8 (1 << 1) /* support burst 8 */ -#define DBLAC_BURST_CAP4 (1 << 0) /* support burst 4 */ - -#define DBLAC_DEFAULT \ - (DBLAC_RXTHR_EN | DBLAC_RXTHR_HIGH(6) | DBLAC_RXTHR_LOW(2)) - -/* - * descriptor structure - */ -struct ftmac110_desc { - uint64_t ctrl; - uint32_t pbuf; - void *vbuf; -}; - -#define FTMAC110_RXD_END ((uint64_t)1 << 63) -#define FTMAC110_RXD_BUFSZ(x) (((uint64_t)(x) & 0x7ff) << 32) - -#define FTMAC110_RXD_OWNER ((uint64_t)1 << 31) /* owner: 1=HW, 0=SW */ -#define FTMAC110_RXD_FRS ((uint64_t)1 << 29) /* first pkt desc */ -#define FTMAC110_RXD_LRS ((uint64_t)1 << 28) /* last pkt desc */ -#define FTMAC110_RXD_ODDNB ((uint64_t)1 << 22) /* odd nibble */ -#define FTMAC110_RXD_RUNT ((uint64_t)1 << 21) /* runt pkt */ -#define FTMAC110_RXD_FTL ((uint64_t)1 << 20) /* frame too long */ -#define FTMAC110_RXD_CRC ((uint64_t)1 << 19) /* pkt crc error */ -#define FTMAC110_RXD_ERR ((uint64_t)1 << 18) /* bus error */ -#define FTMAC110_RXD_ERRMASK ((uint64_t)0x1f << 18) -#define FTMAC110_RXD_BCST ((uint64_t)1 << 17) /* Bcst pkt */ -#define FTMAC110_RXD_MCST ((uint64_t)1 << 16) /* Mcst pkt */ -#define FTMAC110_RXD_LEN(x) ((uint64_t)((x) & 0x7ff)) - -#define FTMAC110_RXD_CLRMASK \ - (FTMAC110_RXD_END | FTMAC110_RXD_BUFSZ(0x7ff)) - -#define FTMAC110_TXD_END ((uint64_t)1 << 63) /* end of ring */ -#define FTMAC110_TXD_TXIC ((uint64_t)1 << 62) /* tx done interrupt */ -#define FTMAC110_TXD_TX2FIC ((uint64_t)1 << 61) /* tx fifo interrupt */ -#define FTMAC110_TXD_FTS ((uint64_t)1 << 60) /* first pkt desc */ -#define FTMAC110_TXD_LTS ((uint64_t)1 << 59) /* last pkt desc */ -#define FTMAC110_TXD_LEN(x) ((uint64_t)((x) & 0x7ff) << 32) - -#define FTMAC110_TXD_OWNER ((uint64_t)1 << 31) /* owner: 1=HW, 0=SW */ -#define FTMAC110_TXD_COL ((uint64_t)3) /* collision */ - -#define FTMAC110_TXD_CLRMASK \ - (FTMAC110_TXD_END) - -#endif /* FTMAC110_H */ diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index dbf7bf7..9556536 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -15,7 +15,6 @@ obj-$(CONFIG_PHY_ATHEROS) += atheros.o obj-$(CONFIG_PHY_BROADCOM) += broadcom.o obj-$(CONFIG_PHY_DAVICOM) += davicom.o obj-$(CONFIG_PHY_ET1011C) += et1011c.o -obj-$(CONFIG_PHY_ICPLUS) += icplus.o obj-$(CONFIG_PHY_LXT) += lxt.o obj-$(CONFIG_PHY_MARVELL) += marvell.o obj-$(CONFIG_PHY_MICREL) += micrel.o diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c deleted file mode 100644 index 5971955..0000000 --- a/drivers/net/phy/icplus.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * ICPlus PHY drivers - * - * SPDX-License-Identifier: GPL-2.0+ - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - */ -#include <phy.h> - -/* IP101A/G - IP1001 */ -#define IP10XX_SPEC_CTRL_STATUS 16 /* Spec. Control Register */ -#define IP1001_SPEC_CTRL_STATUS_2 20 /* IP1001 Spec. Control Reg 2 */ -#define IP1001_PHASE_SEL_MASK 3 /* IP1001 RX/TXPHASE_SEL */ -#define IP1001_APS_ON 11 /* IP1001 APS Mode bit */ -#define IP101A_G_APS_ON 2 /* IP101A/G APS Mode bit */ -#define IP101A_G_IRQ_CONF_STATUS 0x11 /* Conf Info IRQ & Status Reg */ -#define IP101A_G_IRQ_PIN_USED (1<<15) /* INTR pin used */ -#define IP101A_G_IRQ_DEFAULT IP101A_G_IRQ_PIN_USED - -static int ip1001_config(struct phy_device *phydev) -{ - int c; - - /* Enable Auto Power Saving mode */ - c = phy_read(phydev, MDIO_DEVAD_NONE, IP1001_SPEC_CTRL_STATUS_2); - if (c < 0) - return c; - c |= IP1001_APS_ON; - c = phy_write(phydev, MDIO_DEVAD_NONE, IP1001_SPEC_CTRL_STATUS_2, c); - if (c < 0) - return c; - - /* INTR pin used: speed/link/duplex will cause an interrupt */ - c = phy_write(phydev, MDIO_DEVAD_NONE, IP101A_G_IRQ_CONF_STATUS, - IP101A_G_IRQ_DEFAULT); - if (c < 0) - return c; - - if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { - /* - * Additional delay (2ns) used to adjust RX clock phase - * at RGMII interface - */ - c = phy_read(phydev, MDIO_DEVAD_NONE, IP10XX_SPEC_CTRL_STATUS); - if (c < 0) - return c; - - c |= IP1001_PHASE_SEL_MASK; - c = phy_write(phydev, MDIO_DEVAD_NONE, IP10XX_SPEC_CTRL_STATUS, - c); - if (c < 0) - return c; - } - - return 0; -} - -static int ip1001_startup(struct phy_device *phydev) -{ - genphy_update_link(phydev); - genphy_parse_link(phydev); - - return 0; -} -static struct phy_driver IP1001_driver = { - .name = "ICPlus IP1001", - .uid = 0x02430d90, - .mask = 0x0ffffff0, - .features = PHY_GBIT_FEATURES, - .config = &ip1001_config, - .startup = &ip1001_startup, - .shutdown = &genphy_shutdown, -}; - -int phy_icplus_init(void) -{ - phy_register(&IP1001_driver); - - return 0; -} diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index aac85c4..1d6c14f 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -454,9 +454,6 @@ int phy_init(void) #ifdef CONFIG_PHY_ET1011C phy_et1011c_init(); #endif -#ifdef CONFIG_PHY_ICPLUS - phy_icplus_init(); -#endif #ifdef CONFIG_PHY_LXT phy_lxt_init(); #endif diff --git a/drivers/net/plb2800_eth.c b/drivers/net/plb2800_eth.c deleted file mode 100644 index f869514..0000000 --- a/drivers/net/plb2800_eth.c +++ /dev/null @@ -1,373 +0,0 @@ -/* - * PLB2800 internal switch ethernet driver. - * - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <malloc.h> -#include <net.h> -#include <netdev.h> -#include <asm/addrspace.h> - - -#define NUM_RX_DESC PKTBUFSRX -#define TOUT_LOOP 1000000 - -#define LONG_REF(addr) (*((volatile unsigned long*)addr)) - -#define CMAC_CRX_CTRL LONG_REF(0xb800c870) -#define CMAC_CTX_CTRL LONG_REF(0xb800c874) -#define SYS_MAC_ADDR_0 LONG_REF(0xb800c878) -#define SYS_MAC_ADDR_1 LONG_REF(0xb800c87c) -#define MIPS_H_MASK LONG_REF(0xB800C810) - -#define MA_LEARN LONG_REF(0xb8008004) -#define DA_LOOKUP LONG_REF(0xb8008008) - -#define CMAC_CRX_CTRL_PD 0x00000001 -#define CMAC_CRX_CTRL_CG 0x00000002 -#define CMAC_CRX_CTRL_PL_SHIFT 2 -#define CMAC_CRIT 0x0 -#define CMAC_NON_CRIT 0x1 -#define MBOX_STAT_ID_SHF 28 -#define MBOX_STAT_CP 0x80000000 -#define MBOX_STAT_MB 0x00000001 -#define EN_MA_LEARN 0x02000000 -#define EN_DA_LKUP 0x01000000 -#define MA_DEST_SHF 11 -#define DA_DEST_SHF 11 -#define DA_STATE_SHF 19 -#define TSTAMP_MS 0x00000000 -#define SW_H_MBOX4_MASK 0x08000000 -#define SW_H_MBOX3_MASK 0x04000000 -#define SW_H_MBOX2_MASK 0x02000000 -#define SW_H_MBOX1_MASK 0x01000000 - -typedef volatile struct { - unsigned int stat; - unsigned int cmd; - unsigned int cnt; - unsigned int adr; -} mailbox_t; - -#define MBOX_REG(mb) ((mailbox_t*)(0xb800c830+(mb<<4))) - -typedef volatile struct { - unsigned int word0; - unsigned int word1; - unsigned int word2; -} mbhdr_t; - -#define MBOX_MEM(mb) ((void*)(0xb800a000+((3-mb)<<11))) - - -static int plb2800_eth_init(struct eth_device *dev, bd_t * bis); -static int plb2800_eth_send(struct eth_device *dev, void *packet, int length); -static int plb2800_eth_recv(struct eth_device *dev); -static void plb2800_eth_halt(struct eth_device *dev); - -static void plb2800_set_mac_addr(struct eth_device *dev, unsigned char * addr); -static unsigned char * plb2800_get_mac_addr(void); - -static int rx_new; -static int mac_addr_set = 0; - - -int plb2800_eth_initialize(bd_t * bis) -{ - struct eth_device *dev; - ulong temp; - -#ifdef DEBUG - printf("Entered plb2800_eth_initialize()\n"); -#endif - - if (!(dev = (struct eth_device *) malloc (sizeof *dev))) - { - printf("Failed to allocate memory\n"); - return -1; - } - memset(dev, 0, sizeof(*dev)); - - sprintf(dev->name, "PLB2800 Switch"); - dev->init = plb2800_eth_init; - dev->halt = plb2800_eth_halt; - dev->send = plb2800_eth_send; - dev->recv = plb2800_eth_recv; - - eth_register(dev); - - /* bug fix */ - *(ulong *)0xb800e800 = 0x838; - - /* Set MBOX ownership */ - temp = CMAC_CRIT << MBOX_STAT_ID_SHF; - MBOX_REG(0)->stat = temp; - MBOX_REG(1)->stat = temp; - - temp = CMAC_NON_CRIT << MBOX_STAT_ID_SHF; - MBOX_REG(2)->stat = temp; - MBOX_REG(3)->stat = temp; - - plb2800_set_mac_addr(dev, plb2800_get_mac_addr()); - - /* Disable all Mbox interrupt */ - temp = MIPS_H_MASK; - temp &= ~ (SW_H_MBOX1_MASK | SW_H_MBOX2_MASK | SW_H_MBOX3_MASK | SW_H_MBOX4_MASK) ; - MIPS_H_MASK = temp; - -#ifdef DEBUG - printf("Leaving plb2800_eth_initialize()\n"); -#endif - - return 0; -} - -static int plb2800_eth_init(struct eth_device *dev, bd_t * bis) -{ -#ifdef DEBUG - printf("Entering plb2800_eth_init()\n"); -#endif - - plb2800_set_mac_addr(dev, dev->enetaddr); - - rx_new = 0; - -#ifdef DEBUG - printf("Leaving plb2800_eth_init()\n"); -#endif - - return 0; -} - - -static int plb2800_eth_send(struct eth_device *dev, void *packet, int length) -{ - int i; - int res = -1; - u32 temp; - mailbox_t * mb = MBOX_REG(0); - char * mem = MBOX_MEM(0); - -#ifdef DEBUG - printf("Entered plb2800_eth_send()\n"); -#endif - - if (length <= 0) - { - printf ("%s: bad packet size: %d\n", dev->name, length); - goto Done; - } - - if (length < 64) - { - length = 64; - } - - temp = CMAC_CRX_CTRL_CG | ((length + 4) << CMAC_CRX_CTRL_PL_SHIFT); - -#ifdef DEBUG - printf("0 mb->stat = 0x%x\n", mb->stat); -#endif - - for(i = 0; mb->stat & (MBOX_STAT_CP | MBOX_STAT_MB); i++) - { - if (i >= TOUT_LOOP) - { - printf("%s: tx buffer not ready\n", dev->name); - printf("1 mb->stat = 0x%x\n", mb->stat); - goto Done; - } - } - - /* For some strange reason, memcpy doesn't work, here! - */ - do - { - int words = (length >> 2) + 1; - unsigned int* dst = (unsigned int*)(mem); - unsigned int* src = (unsigned int*)(packet); - for (i = 0; i < words; i++) - { - *dst = *src; - dst++; - src++; - }; - } while(0); - - CMAC_CRX_CTRL = temp; - mb->cmd = MBOX_STAT_CP; - -#ifdef DEBUG - printf("2 mb->stat = 0x%x\n", mb->stat); -#endif - - res = length; -Done: - -#ifdef DEBUG - printf("Leaving plb2800_eth_send()\n"); -#endif - - return res; -} - - -static int plb2800_eth_recv(struct eth_device *dev) -{ - int length = 0; - mailbox_t * mbox = MBOX_REG(3); - unsigned char * hdr = MBOX_MEM(3); - unsigned int stat; - -#ifdef DEBUG - printf("Entered plb2800_eth_recv()\n"); -#endif - - for (;;) - { - stat = mbox->stat; - - if (!(stat & MBOX_STAT_CP)) - { - break; - } - - length = ((*(hdr + 6) & 0x3f) << 8) + *(hdr + 7); - memcpy((void *)NetRxPackets[rx_new], hdr + 12, length); - - stat &= ~MBOX_STAT_CP; - mbox->stat = stat; -#ifdef DEBUG - { - int i; - for (i=0;i<length - 4;i++) - { - if (i % 16 == 0) printf("\n%04x: ", i); - printf("%02X ", NetRxPackets[rx_new][i]); - } - printf("\n"); - } -#endif - - if (length) - { -#ifdef DEBUG - printf("Received %d bytes\n", length); -#endif - NetReceive((void*)(NetRxPackets[rx_new]), - length - 4); - } - else - { -#if 1 - printf("Zero length!!!\n"); -#endif - } - - rx_new = (rx_new + 1) % NUM_RX_DESC; - } - -#ifdef DEBUG - printf("Leaving plb2800_eth_recv()\n"); -#endif - - return length; -} - - -static void plb2800_eth_halt(struct eth_device *dev) -{ -#ifdef DEBUG - printf("Entered plb2800_eth_halt()\n"); -#endif - -#ifdef DEBUG - printf("Leaving plb2800_eth_halt()\n"); -#endif -} - -static void plb2800_set_mac_addr(struct eth_device *dev, unsigned char * addr) -{ - char packet[60]; - ulong temp; - int ix; - - if (mac_addr_set || - NULL == addr || memcmp(addr, "\0\0\0\0\0\0", 6) == 0) - { - return; - } - - /* send one packet through CPU port - * in order to learn system MAC address - */ - - /* Set DA_LOOKUP register */ - temp = EN_MA_LEARN | (0 << DA_STATE_SHF) | (63 << DA_DEST_SHF); - DA_LOOKUP = temp; - - /* Set MA_LEARN register */ - temp = 50 << MA_DEST_SHF; /* static entry */ - MA_LEARN = temp; - - /* set destination address */ - for (ix=0;ix<6;ix++) - packet[ix] = 0xff; - - /* set source address = system MAC address */ - for (ix=0;ix<6;ix++) - packet[6+ix] = addr[ix]; - - /* set type field */ - packet[12]=0xaa; - packet[13]=0x55; - - /* set data field */ - for(ix=14;ix<60;ix++) - packet[ix] = 0x00; - -#ifdef DEBUG - for (ix=0;ix<6;ix++) - printf("mac_addr[%d]=%02X\n", ix, (unsigned char)packet[6+ix]); -#endif - - /* set one packet */ - plb2800_eth_send(dev, packet, sizeof(packet)); - - /* delay for a while */ - for(ix=0;ix<65535;ix++) - temp = ~temp; - - /* Set CMAC_CTX_CTRL register */ - temp = TSTAMP_MS; /* no autocast */ - CMAC_CTX_CTRL = temp; - - /* Set DA_LOOKUP register */ - temp = EN_DA_LKUP; - DA_LOOKUP = temp; - - mac_addr_set = 1; -} - -static unsigned char * plb2800_get_mac_addr(void) -{ - static unsigned char addr[6]; - char *tmp, *end; - int i; - - tmp = getenv ("ethaddr"); - if (NULL == tmp) return NULL; - - for (i=0; i<6; i++) { - addr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; - if (tmp) - tmp = (*end) ? end+1 : end; - } - - return addr; -} diff --git a/include/netdev.h b/include/netdev.h index e45dd7a..3e46171 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -51,7 +51,6 @@ int fecmxc_initialize(bd_t *bis); int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); int ftgmac100_initialize(bd_t *bits); int ftmac100_initialize(bd_t *bits); -int ftmac110_initialize(bd_t *bits); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); int ks8695_eth_initialize(void); @@ -69,7 +68,6 @@ int ne2k_register(void); int npe_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); int pcnet_initialize(bd_t *bis); -int plb2800_eth_initialize(bd_t *bis); int ppc_4xx_eth_initialize (bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); -- 1.9.1

2 2

[U-Boot] MDIO_DEVAD_NONE
by Danny Gale 01 Aug '14

01 Aug '14

Hi all, We are working on porting u-boot to a new board based around the Freescale T4240. We also have a 10G BASE-T PHY on board. We're running into some difficulty bringing up the XFI XGMII interface between the T4240 and the PHY and verifying that it's set up correctly. One of the things I've noticed is that the genphy functions use MDIO_DEVAD_NONE, which is defined as -1 (0xFFFF as an int). When truncated to 5 bits for an MDIO device address, that's 0x1F. That's not generally a valid MDIO device address, is it? Reads from this device address, like the one below from genphy_update_link in drivers/net/phy/phy.c:216, return 0xFFFF since the bus is pulled up and there's no driving source in the PHY: mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); So, in this case, genphy_update_link will falsely report that the link is up if there's no device at the 0x1F MDIO device address. Is this the intended behavior? Thanks, Danny

1 0