August 2014 - U-Boot

[U-Boot] [patch 0/2] SPL: Lightweight UBI and UBI fastmap support
by Thomas Gleixner 30 Sep '14

30 Sep '14

Utilizing NAND FLASH requires proper wear leveling and bitflip management. Linux choice for this is UBI. The upstream UBI implementation is far too big for a SPL, but it is desired to load arbitrary payload including u-boot itself from a UBI managed NAND FLASH. That restricts the non-UBI managed part of the NAND flash to the first few eraseblocks which are reserved for the SoC boot ROM to load the SPL. The following patches provide a lightweight and fast UBI attach and load code, which supports fastmap and full scan mode. The text foot print on the board which I used for development is: 6854 0 0 6854 1abd drivers/mtd/ubispl/built-in.o Attaching a NAND chip with 4096 physical eraseblocks (4 blocks are reserved for the SPL) takes: In full scan mode: 1172ms In fastmap mode: 95ms With that and a moderate sized kernel image, I'm able to hand off to the kernel within less than 500ms. The scan and logical to physical block mapping code is developed from scratch, while the fastmap functions are lifted from the linux kernel source and adjusted to fit the SPL needs. The implementation is paranoid and carefully preserves the UBI robustness. For now I keep a private copy of ubi-media.h which should be shared with the drivers/mtd/ubi/ one once Heiko has synced it to the 3.14 source. There is room for more boot time optimizations: - Implement sub page reads for nand_spl_simple - Hand the UBI data from SPL to kernel to avoid rescan of the fastmap/flash Thanks, tglx

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[U-Boot] [PATCH 1/7] sun4i: add USB EHCI settings
by Hans de Goede 29 Sep '14

29 Sep '14

Specific USB EHCI settings to be set for sun4i if CONFIG_USB_EHCI is enabled. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- include/configs/sun4i.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h index 037f995..5611ecc 100644 --- a/include/configs/sun4i.h +++ b/include/configs/sun4i.h @@ -16,6 +16,18 @@ #define CONFIG_SYS_PROMPT "sun4i# " +#ifdef CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_SUNXI + +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#ifndef CONFIG_SUNXI_USB_VBUS0_GPIO +#define CONFIG_SUNXI_USB_VBUS0_GPIO SUNXI_GPH(6) +#endif +#ifndef CONFIG_SUNXI_USB_VBUS1_GPIO +#define CONFIG_SUNXI_USB_VBUS1_GPIO SUNXI_GPH(3) +#endif +#endif + /* * Include common sunxi configuration where most the settings are */ -- 2.0.1

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[U-Boot] [PATCH 1/5] usb: ehci: mxs: Add board-specific callbacks
by Marek Vasut 29 Sep '14

29 Sep '14

Add board-specific callbacks for enabling/disabling port power into the MXS EHCI controller driver. This is in-line with the names of callbacks on other systems. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Stefano Babic <sbabic(a)denx.de> --- drivers/usb/host/ehci-mxs.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c index 4d652b3..6b8d969 100644 --- a/drivers/usb/host/ehci-mxs.c +++ b/drivers/usb/host/ehci-mxs.c @@ -77,6 +77,16 @@ static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable) return 0; } +int __weak board_ehci_hcd_init(int port) +{ + return 0; +} + +int __weak board_ehci_hcd_exit(int port) +{ + return 0; +} + int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { @@ -90,6 +100,10 @@ int ehci_hcd_init(int index, enum usb_init_type init, return -EINVAL; } + ret = board_ehci_hcd_init(index); + if (ret) + return ret; + port = &mxs_port[index]; /* Reset the PHY block */ @@ -154,5 +168,7 @@ int ehci_hcd_stop(int index) /* Disable USB clock */ ret = ehci_mxs_toggle_clock(port, 0); + board_ehci_hcd_exit(index); + return ret; } -- 1.9.2

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[U-Boot] [PATCH v2 1/2] sandbox: Update minor documentation changes
by Jagannadha Sutradharudu Teki 26 Sep '14

26 Sep '14

From: Jagannadha Sutradharudu Teki <jaganna(a)gmail.com> - Use _defconfig instead of _config, but still _config is working. - Corrected README.sandbox path in ./README Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)gmail.com> --- Changes for v2: - Fixed board path in 'board/sandbox/README.sandbox' README | 2 +- board/sandbox/README.sandbox | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/README b/README index 1e63f04..e88184b 100644 --- a/README +++ b/README @@ -272,7 +272,7 @@ board. This allows feature development which is not board- or architecture- specific to be undertaken on a native platform. The sandbox is also used to run some of U-Boot's tests. -See board/sandbox/sandbox/README.sandbox for more details. +See board/sandbox/README.sandbox for more details. Configuration Options: diff --git a/board/sandbox/README.sandbox b/board/sandbox/README.sandbox index 529c447..5f879f5 100644 --- a/board/sandbox/README.sandbox +++ b/board/sandbox/README.sandbox @@ -19,7 +19,7 @@ create unit tests which we can run to test this upper level code. CONFIG_SANDBOX is defined when building a native board. The chosen vendor and board names are also 'sandbox', so there is a single -board in board/sandbox/sandbox. +board in board/sandbox. CONFIG_SANDBOX_BIG_ENDIAN should be defined when running on big-endian machines. @@ -32,7 +32,7 @@ Basic Operation To run sandbox U-Boot use something like: - make sandbox_config all + make sandbox_defconfig all ./u-boot Note: @@ -41,7 +41,7 @@ Note: build sandbox without SDL (i.e. no display/keyboard support) by removing the CONFIG_SANDBOX_SDL line in include/configs/sandbox.h or using: - make sandbox_config all NO_SDL=1 + make sandbox_defconfig all NO_SDL=1 ./u-boot -- 2.0.0.rc1.4.gd8779e1

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[U-Boot] [PATCH] board/ls2085a: Add support of NOR and NAND flash for simulator
by Prabhakar Kushwaha 25 Sep '14

25 Sep '14

Add support of NOR and NAND flash for simulator target. Here IFC - CS0: NOR flash IFC - CS1: NAND flash Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- This patch depeds upon below patch "arm: ls102xa: Add Freescale LS102xA SoC support" http://patchwork.ozlabs.org/patch/366604/ include/configs/ls2085a_common.h | 62 ++++++++++++++++++++++++++++++++++++++ include/configs/ls2085a_simu.h | 9 ++++++ 2 files changed, 71 insertions(+) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 2bd5a47..6355e4a 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -17,7 +17,9 @@ /* Link Definitions */ #define CONFIG_SYS_TEXT_BASE 0x30000000 +#ifdef CONFIG_EMU #define CONFIG_SYS_NO_FLASH +#endif #define CONFIG_SUPPORT_RAW_INITRD @@ -118,6 +120,66 @@ #define CONFIG_SYS_NOR_FTIM3 0x04000000 #define CONFIG_SYS_IFC_CCR 0x01000000 +#ifndef CONFIG_SYS_NO_FLASH +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_FLASH_QUIET_TEST +#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ + +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#endif + +#define CONFIG_NAND_FSL_IFC +#define CONFIG_SYS_NAND_MAX_ECCPOS 256 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_BASE 0x520000000 +#define CONFIG_SYS_NAND_BASE_PHYS 0x20000000 + +#define CONFIG_SYS_NAND_CSPR_EXT (0x0) +#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ + | CSPR_MSEL_NAND /* MSEL = NAND */ \ + | CSPR_V) +#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) + +#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ + | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ + | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ + | CSOR_NAND_RAL_3 /* RAL = 2Byes */ \ + | CSOR_NAND_PGS_2K /* Page Size = 2K */ \ + | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \ + | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ + +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* ONFI NAND Flash mode0 Timing Params */ +#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ + FTIM0_NAND_TWP(0x18) | \ + FTIM0_NAND_TWCHT(0x07) | \ + FTIM0_NAND_TWH(0x0a)) +#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ + FTIM1_NAND_TWBE(0x39) | \ + FTIM1_NAND_TRR(0x0e) | \ + FTIM1_NAND_TRP(0x18)) +#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ + FTIM2_NAND_TREH(0x0a) | \ + FTIM2_NAND_TWHRE(0x1e)) +#define CONFIG_SYS_NAND_FTIM3 0x0 + +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND + +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) + #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY #define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR diff --git a/include/configs/ls2085a_simu.h b/include/configs/ls2085a_simu.h index 46d47b0..0f40b78 100644 --- a/include/configs/ls2085a_simu.h +++ b/include/configs/ls2085a_simu.h @@ -13,4 +13,13 @@ #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x2210000) +#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 + #endif /* __LS2_SIMU_H */ -- 1.7.9.5

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[U-Boot] [PATCH] board/ls2085a: Update env_addr after NOR flash relocation
by Prabhakar Kushwaha 25 Sep '14

25 Sep '14

LS2085a has 2 regions in system memory map. Region1 is default map from where system boots. Once u-boot is moved to DDR, IFC is re-mapped to Region2. So, update gd->env_addr to reflect correct address. Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- board/freescale/ls2085a/ls2085a.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c index a18db1d..d19f692 100644 --- a/board/freescale/ls2085a/ls2085a.c +++ b/board/freescale/ls2085a/ls2085a.c @@ -13,12 +13,18 @@ #include <fdt_support.h> #include <libfdt.h> #include <fsl_mc.h> +#include <environment.h> DECLARE_GLOBAL_DATA_PTR; int board_init(void) { init_final_memctl_regs(); + +#ifdef CONFIG_ENV_IS_NOWHERE + gd->env_addr = (ulong)&default_environment[0]; +#endif + return 0; } -- 1.7.9.5

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[U-Boot] [PATCH] powerpc/8xxx: Fix in USB device-tree fixup
by Ramneek Mehresh 25 Sep '14

25 Sep '14

Fix following issues in USB device-tree fixup: - returns when either dr_mode or phy_type not defined. This was terminating fix-up when only either property was defined in hwconfig string - updates dr_mode_type or dr_phy_type with junk value when their index is -1. Now these are updated only when their respective index is pointing to relevant types in modes[] and phys[] array - dr_mode_type and dr_phy_type were not NULL for each controller Signed-off-by: Ramneek Mehresh <ramneek.mehresh(a)freescale.com> --- arch/powerpc/cpu/mpc8xxx/fdt.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 9273745..4cec5e1 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -1,5 +1,5 @@ /* - * Copyright 2009-2012 Freescale Semiconductor, Inc. + * Copyright 2009-2014 Freescale Semiconductor, Inc. * * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains @@ -123,14 +123,14 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) { const char *modes[] = { "host", "peripheral", "otg" }; const char *phys[] = { "ulpi", "utmi" }; - const char *dr_mode_type = NULL; - const char *dr_phy_type = NULL; int usb_mode_off = -1; int usb_phy_off = -1; char str[5]; int i, j; for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) { + const char *dr_mode_type = NULL; + const char *dr_phy_type = NULL; int mode_idx = -1, phy_idx = -1; snprintf(str, 5, "%s%d", "usb", i); if (hwconfig(str)) { @@ -150,18 +150,16 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) } } - if (mode_idx < 0 || phy_idx < 0) { - puts("ERROR: wrong usb mode/phy defined!!\n"); - return; - } - - dr_mode_type = modes[mode_idx]; - dr_phy_type = phys[phy_idx]; - if (mode_idx < 0 && phy_idx < 0) { printf("WARNING: invalid phy or mode\n"); return; } + + if (mode_idx > -1) + dr_mode_type = modes[mode_idx]; + + if (phy_idx > -1) + dr_phy_type = phys[phy_idx]; } usb_mode_off = fdt_fixup_usb_mode_phy_type(blob, -- 1.8.3.1

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[U-Boot] [PATCH v4] powerpc/t104xrdb: Add T1042RDB board support
by Vijay Rai 25 Sep '14

25 Sep '14

T1042RDB is a Freescale reference board that hosts the T1042 SoC (and variants). The board is similar to T1040RDB, T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). T1042RDB is configured with serdes protocol 0x86 which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 DTSEC1, DTSEC2 are not connected on board. This Patch - add T1042RDB support - updates README file for T1042RDB details and update commands for switching to alternate banks from vBank0 to vBank4 and vice versa This patch also does minor clean ups for fdt defines for T1042RDB and T1042RDB_PI board Signed-off-by: Vijay Rai <vijay.rai(a)freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain(a)freescale.com> --- changes for v4: There are some changes regarding Kconfig, Added configs/T1042RDB_defconfig file to support T1042RDB,added T1042RDB as config option into board/freescale/t104xrdb/MAINTAINERS board/freescale/t104xrdb/MAINTAINERS | 1 + board/freescale/t104xrdb/README | 17 +++++++++++++++-- board/freescale/t104xrdb/eth.c | 10 ++++++++++ configs/T1042RDB_defconfig | 4 ++++ include/configs/T104xRDB.h | 15 ++++++++------- 5 files changed, 38 insertions(+), 9 deletions(-) create mode 100644 configs/T1042RDB_defconfig diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS index 364b0a9..62aae2f 100644 --- a/board/freescale/t104xrdb/MAINTAINERS +++ b/board/freescale/t104xrdb/MAINTAINERS @@ -6,6 +6,7 @@ F: include/configs/T104xRDB.h F: configs/T1040RDB_defconfig F: configs/T1040RDB_NAND_defconfig F: configs/T1040RDB_SPIFLASH_defconfig +F: configs/T1042RDB_defconfig F: configs/T1042RDB_PI_defconfig F: configs/T1042RDB_PI_NAND_defconfig F: configs/T1042RDB_PI_SPIFLASH_defconfig diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index cdbe1fa..a0f5fa9 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -4,10 +4,23 @@ The T1040RDB is a Freescale reference board that hosts the T1040 SoC (and variants). Variants inclued T1042 presonality of T1040, in which case T1040RDB can also be called T1042RDB. +The T1042RDB is a Freescale reference board that hosts the T1042 SoC +(and variants). The board is similar to T1040RDB, T1040 is a reduced +personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). + The T1042RDB_PI is a Freescale reference board that hosts the T1042 SoC. (a personality of T1040 SoC). The board is similar to T1040RDB but is designed specially with low power features targeted for Printing Image Market. +Basic difference's among T1040RDB, T1042RDB_PI, T1042RDB +------------------------------------------------------------------------- +Board Si Protocol Targeted Market +------------------------------------------------------------------------- +T1040RDB T1040 0x66 Networking +T1040RDB T1042 0x86 Networking +T1042RDB_PI T1042 0x06 Printing & Imaging + + T1040 SoC Overview ------------------ The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA @@ -194,10 +207,10 @@ The below commands apply to the board Commands for switching to alternate bank. 1. To change from vbank0 to vbank4 - => qixis_reset altbank (it will boot using vbank4) + => cpld reset altbank (it will boot using vbank4) 2.To change from vbank4 to vbank0 - => qixis reset (it will boot using vbank0) + => cpld reset (it will boot using vbank0) NAND boot with 2 Stage boot loader ---------------------------------- diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index 63e5f90..c8b6c67 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -43,6 +43,16 @@ int board_eth_init(bd_t *bis) CONFIG_SYS_SGMII1_PHY_ADDR); break; #endif +#ifdef CONFIG_T1042RDB + case PHY_INTERFACE_MODE_SGMII: + /* T1042RDB doesn't supports SGMII on DTSEC1 & DTSEC2 */ + if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i)) + fm_info_set_phy_address(i, 0); + /* T1042RDB only supports SGMII on DTSEC3 */ + fm_info_set_phy_address(FM1_DTSEC3, + CONFIG_SYS_SGMII1_PHY_ADDR); + break; +#endif case PHY_INTERFACE_MODE_RGMII: if (FM1_DTSEC4 == i) phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig new file mode 100644 index 0000000..85eceb9 --- /dev/null +++ b/configs/T1042RDB_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_T104XRDB=y diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index c4bf0d6..8e80348 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -456,7 +456,7 @@ /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) #define I2C_MUX_CH_DEFAULT 0x8 #endif @@ -608,7 +608,7 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) #define CONFIG_QE #define CONFIG_U_QE #endif @@ -637,7 +637,7 @@ #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) #if defined(CONFIG_SPIFLASH) #define CONFIG_SYS_QE_FW_ADDR 0x130000 #elif defined(CONFIG_SDCARD) @@ -661,7 +661,7 @@ #endif #ifdef CONFIG_FMAN_ENET -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) #define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 #endif #define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 @@ -763,13 +763,14 @@ #define CONFIG_BAUDRATE 115200 #define __USB_PHY_TYPE utmi +#define RAMDISKFILE "t104xrdb/ramdisk.uboot" #ifdef CONFIG_T1040RDB #define FDTFILE "t1040rdb/t1040rdb.dtb" -#define RAMDISKFILE "t1040rdb/ramdisk.uboot" #elif CONFIG_T1042RDB_PI -#define FDTFILE "t1040rdb_pi/t1040rdb_pi.dtb" -#define RAMDISKFILE "t1040rdb_pi/ramdisk.uboot" +#define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" +#elif CONFIG_T1042RDB +#define FDTFILE "t1042rdb/t1042rdb.dtb" #endif #define CONFIG_EXTRA_ENV_SETTINGS \ -- 1.7.9.5

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[U-Boot] [PATCH v2] powerpc/t104xrdb: Add Support of rcw for T1042RDB in u-boot
by Vijay Rai 25 Sep '14

25 Sep '14

This patch adds support of rcw for T1042RDB, it makes following changes : - Adds t1042_rcw.cfg file for serdes protocol 0x86 for T1042RDB - Renames t1042_pi_rcw.cfg file from t1042_rcw.cfg and also updates comments for valid serdes protocol which is 0x06 - Also updates CONFIG_SYS_FSL_PBL_RCW for T1042RDB Signed-off-by: Vijay Rai <vijay.rai(a)freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain(a)freescale.com> --- board/freescale/t104xrdb/t1042_pi_rcw.cfg | 7 +++++++ board/freescale/t104xrdb/t1042_rcw.cfg | 8 ++++---- include/configs/T104xRDB.h | 3 +++ 3 files changed, 14 insertions(+), 4 deletions(-) create mode 100644 board/freescale/t104xrdb/t1042_pi_rcw.cfg diff --git a/board/freescale/t104xrdb/t1042_pi_rcw.cfg b/board/freescale/t104xrdb/t1042_pi_rcw.cfg new file mode 100644 index 0000000..57de89a --- /dev/null +++ b/board/freescale/t104xrdb/t1042_pi_rcw.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +# serdes protocol 0x06 +0c18000e 0e000000 00000000 00000000 +06000002 00400002 e8106000 01000000 +00000000 00000000 00000000 00030810 +00000000 01fe0a06 00000000 00000000 diff --git a/board/freescale/t104xrdb/t1042_rcw.cfg b/board/freescale/t104xrdb/t1042_rcw.cfg index a3ea8ad..db4d52f 100644 --- a/board/freescale/t104xrdb/t1042_rcw.cfg +++ b/board/freescale/t104xrdb/t1042_rcw.cfg @@ -1,7 +1,7 @@ #PBL preamble and RCW header aa55aa55 010e0100 -# serdes protocol 0x66 +# serdes protocol 0x86 0c18000e 0e000000 00000000 00000000 -06000002 00400002 e8106000 01000000 -00000000 00000000 00000000 00030810 -00000000 01fe0a06 00000000 00000000 +86000002 80000002 ec027000 01000000 +00000000 00000000 00000000 00032810 +00000000 0342500f 00000000 00000000 diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 1e6c79a..eeac104 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -19,6 +19,9 @@ #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1040_rcw.cfg #endif #ifdef CONFIG_T1042RDB_PI +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_pi_rcw.cfg +#endif +#ifdef CONFIG_T1042RDB #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg #endif -- 1.7.9.5

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[U-Boot] [PATCH] whitespace cleanups
by Pavel Machek 25 Sep '14

25 Sep '14

Whitespace cleanups. Signed-off-by: Pavel Machek <pavel(a)denx.de> diff --git a/disk/part.c b/disk/part.c index baceb19..ecc5e7e 100644 --- a/disk/part.c +++ b/disk/part.c @@ -333,7 +333,7 @@ static void print_part_header (const char *type, block_dev_desc_t * dev_desc) #endif /* any CONFIG_..._PARTITION */ -void print_part (block_dev_desc_t * dev_desc) +void print_part(block_dev_desc_t * dev_desc) { switch (dev_desc->part_type) { @@ -381,8 +381,8 @@ void print_part (block_dev_desc_t * dev_desc) #endif /* HAVE_BLOCK_DEVICE */ -int get_partition_info(block_dev_desc_t *dev_desc, int part - , disk_partition_t *info) +int get_partition_info(block_dev_desc_t *dev_desc, int part, + disk_partition_t *info) { #ifdef HAVE_BLOCK_DEVICE @@ -511,7 +511,7 @@ int get_device_and_partition(const char *ifname, const char *dev_part_str, disk_partition_t tmpinfo; /* - * Special-case a psuedo block device "hostfs", to allow access to the + * Special-case a pseudo block device "hostfs", to allow access to the * host's own filesystem. */ if (0 == strcmp(ifname, "hostfs")) { diff --git a/include/altera.h b/include/altera.h index 0327a1b..ae5f7ee 100644 --- a/include/altera.h +++ b/include/altera.h @@ -26,7 +26,7 @@ typedef enum { /* typedef Altera_Family */ min_altera_type, /* insert all new types after this */ Altera_ACEX1K, /* ACEX1K Family */ Altera_CYC2, /* CYCLONII Family */ - Altera_StratixII, /* StratixII Familiy */ + Altera_StratixII, /* StratixII Family */ /* Add new models here */ max_altera_type /* insert all new types before this */ } Altera_Family; /* end, typedef Altera_Family */ -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

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