This patch adds support to iMX27ADS development board. This board has
128MB RAM, 32MB NOR Flash and 128MB NAND Flash. Currently only
booting from NOR is supported.
Signed-off-by: Alan Carvalho de Assis <acassis(a)gmail.com>
---
MAINTAINERS | 3 +
MAKEALL | 1 +
Makefile | 3 +
board/freescale/mx27ads/Makefile | 51 ++++++++
board/freescale/mx27ads/config.mk | 1 +
board/freescale/mx27ads/lowlevel_init.S | 128 +++++++++++++++++++
board/freescale/mx27ads/mx27ads.c | 93 ++++++++++++++
board/freescale/mx27ads/u-boot.lds | 56 +++++++++
include/configs/mx27ads.h | 202 +++++++++++++++++++++++++++++++
9 files changed, 538 insertions(+), 0 deletions(-)
create mode 100644 board/freescale/mx27ads/Makefile
create mode 100644 board/freescale/mx27ads/config.mk
create mode 100644 board/freescale/mx27ads/lowlevel_init.S
create mode 100644 board/freescale/mx27ads/mx27ads.c
create mode 100644 board/freescale/mx27ads/u-boot.lds
create mode 100644 include/configs/mx27ads.h
diff --git a/MAINTAINERS b/MAINTAINERS
index e9db278..5b25188 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -550,6 +550,9 @@ Thomas Elste <info(a)elste.org>
modnet50 ARM720T (NET+50)
+Alan Carvalho de Assis <acassis(a)gmail.com>
+ mx27ads i.MX27
+
Fabio Estevam <Fabio.Estevam(a)freescale.com>
mx31pdk i.MX31
diff --git a/MAKEALL b/MAKEALL
index f0ed8ea..8411eef 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -520,6 +520,7 @@ LIST_ARM9=" \
cp926ejs \
cp946es \
cp966 \
+ mx27ads \
imx27lite \
lpd7a400 \
mv88f6281gtw_ge \
diff --git a/Makefile b/Makefile
index 0449a5b..6fa4b28 100644
--- a/Makefile
+++ b/Makefile
@@ -2961,6 +2961,9 @@ davinci_dm365evm_config : unconfig
imx27lite_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
+mx27ads_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs mx27ads freescale mx27
+
lpd7a400_config \
lpd7a404_config: unconfig
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
diff --git a/board/freescale/mx27ads/Makefile b/board/freescale/mx27ads/Makefile
new file mode 100644
index 0000000..d142a9e
--- /dev/null
+++ b/board/freescale/mx27ads/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := mx27ads.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
+
diff --git a/board/freescale/mx27ads/config.mk
b/board/freescale/mx27ads/config.mk
new file mode 100644
index 0000000..a2e7768
--- /dev/null
+++ b/board/freescale/mx27ads/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0xA7F00000
diff --git a/board/freescale/mx27ads/lowlevel_init.S
b/board/freescale/mx27ads/lowlevel_init.S
new file mode 100644
index 0000000..a4e1191
--- /dev/null
+++ b/board/freescale/mx27ads/lowlevel_init.S
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2008, Guennadi Liakhovetski <lg(a)denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * For clock initialization, see chapter 3 of the "MCIMX27 Multimedia
+ * Applications Processor Reference Manual, Rev. 0.2".
+ *
+ */
+
+#include <config.h>
+#include <asm/macro.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/asm-offsets.h>
+
+.macro sdram_init
+ /*
+ * DDR on CSD0
+ */
+ write32 0xD8001010 0x00000008
+ write32 0x10027828 0x55555555
+ write32 0x10027830 0x55555555
+ write32 0x10027834 0x55555555
+ write32 0x10027838 0x00005005
+ write32 0x1002783C 0x15555555
+ write32 0xD8001010 0x00000004
+ write32 0xD8001004 0x006ac73a
+ write32 0xD8001000 0x92100000
+ write32 0xA0000F00 0x00000000
+ write32 0xD8001000 0xA2100000
+ write32 0xA0000F00 0x00000000
+ write32 0xA0000F00 0x00000000
+ write32 0xA0000F00 0x00000000
+ write32 0xA0000F00 0x00000000
+ write32 0xD8001000 0xA2200000
+ write32 0xA0000F00 0x00000000
+ write32 0xA0000F00 0x00000000
+ write32 0xA0000F00 0x00000000
+ write32 0xA0000F00 0x00000000
+ write32 0xD8001000 0xb2100000
+ ldr r0, =0xA0000033
+ mov r1, #0xda
+ strb r1, [r0]
+ ldr r0, =0xA1000000
+ mov r1, #0xff
+ strb r1, [r0]
+ write32 0xD8001000 0x82226080
+.endm
+
+.globl lowlevel_init
+lowlevel_init:
+
+ mov r10, lr
+
+ /* ahb lite ip interface */
+ write32 AIPI1_PSR0 0x20040304
+ write32 AIPI1_PSR1 0xDFFBFCFB
+ write32 AIPI2_PSR0 0x00000000
+ write32 AIPI2_PSR1 0xFFFFFFFF
+
+ /* disable mpll/spll */
+ ldr r0, =CSCR
+ ldr r1, [r0]
+ bic r1, r1, #0x03
+ str r1, [r0]
+
+ /*
+ * pll clock initialization - see section 3.4.3 of the i.MX27 manual
+ *
+ * FIXME: Using the 399*2 MHz values from table 3-8 doens't work
+ * with 1.2 V core voltage! Find out if this is
+ * documented somewhere.
+ */
+ write32 MPCTL0 0x1EF15D5 /* MPLL = 199.5*2 MHz */
+ write32 SPCTL0 0x043A1C09 /* SPLL = FIXME (needs review) */
+
+ /*
+ * ARM clock = (399 MHz / 2) / (ARM divider = 1) = 200 MHz
+ * AHB clock = (399 MHz / 3) / (AHB divider = 2) = 66.5 MHz
+ * System clock (HCLK) = 133 MHz
+ */
+ write32 CSCR, (0x33F08107 | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART)
+
+ /* add some delay here */
+ mov r1, #0x1000
+1: subs r1, r1, #0x1
+ bne 1b
+
+ /* clock gating enable */
+ write32 0x10027818 0x00050f08
+
+ /* peripheral clock divider */
+ write32 PCDR0 0x120470C3 /* FIXME */
+ write32 PCDR1 0x03030303 /* PERDIV1=08 @133 MHz */
+ /* PERDIV1=04 @266 MHz *
+ * /
+
+ /* Configure PCCR0 and PCCR1*/
+ write32 PCCR0 0xFFFFFFFF
+ write32 PCCR1 0xFFFFFFFC
+
+ /* skip sdram initialization if we run from ram */
+ cmp pc, #0xa0000000
+ bls 1f
+ cmp pc, #0xc0000000
+ bhi 1f
+
+ mov pc,r10
+1:
+ sdram_init
+
+ mov pc,r10
+
diff --git a/board/freescale/mx27ads/mx27ads.c
b/board/freescale/mx27ads/mx27ads.c
new file mode 100644
index 0000000..4def923
--- /dev/null
+++ b/board/freescale/mx27ads/mx27ads.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ * Copyright (C) 2008,2009 Eric Jarrige <jorasse(a)users.sourceforge.net>
+ * Copyright (C) 2009 Ilya Yanok <yanok(a)emcraft.com>
+ * Copyright (C) 2009 Alan Carvalho de Assis <alan(a)maxtrack.com.br>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/macro.h>
+#include <asm/arch/imx-regs.h>
+
+# define __REG(x) (*((volatile u32 *)(x)))
+
+#define IMX_CS4_BASE 0xD4000000
+#define CS4U __REG(IMX_WEIM_BASE + 0x40) /* Chip Select 4 Upper Register */
+#define CS4L __REG(IMX_WEIM_BASE + 0x44) /* Chip Select 4 Lower Register */
+#define CS4A __REG(IMX_WEIM_BASE + 0x48) /* Chip Select 4 Addition Register */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+
+ gd->bd->bi_arch_number = MACH_TYPE_MX27ADS;
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+#ifdef CONFIG_MXC_UART
+ mx27_uart_init_pins();
+#endif
+#ifdef CONFIG_FEC_MXC
+ mx27_fec_init_pins();
+ imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
+ writel(readl(®s->port[PORTC].dr) | (1 << 31),
+ ®s->port[PORTC].dr);
+
+ /* Configure CPLD on CS4 */
+ CS4U = 0x0000DCF6;
+ CS4L = 0x444A4541;
+ CS4A = 0x44443302;
+
+ /* Select FEC data through data path */
+ writew(0x0020, IMX_CS4_BASE + 0x10);
+
+ /* Enable CPLD FEC data path */
+ writew(0x0010, IMX_CS4_BASE + 0x14);
+#endif
+#ifdef CONFIG_MXC_MMC
+ mx27_sd2_init_pins();
+#endif
+
+ return 0;
+}
+
+int dram_init(void)
+{
+
+#if CONFIG_NR_DRAM_BANKS > 0
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1,
+ PHYS_SDRAM_1_SIZE);
+#endif
+#if CONFIG_NR_DRAM_BANKS > 1
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2,
+ PHYS_SDRAM_2_SIZE);
+#endif
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ printf("Freescale i.MX27ADS\n");
+ return 0;
+}
diff --git a/board/freescale/mx27ads/u-boot.lds
b/board/freescale/mx27ads/u-boot.lds
new file mode 100644
index 0000000..f66f20e
--- /dev/null
+++ b/board/freescale/mx27ads/u-boot.lds
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
+
diff --git a/include/configs/mx27ads.h b/include/configs/mx27ads.h
new file mode 100644
index 0000000..3360d76
--- /dev/null
+++ b/include/configs/mx27ads.h
@@ -0,0 +1,202 @@
+/*
+ * Copyright (C) 2009 Ilya Yanok <yanok(a)emcraft.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS /* arm926ejs CPU core */
+#define CONFIG_MX27
+#define CONFIG_IMX27ADS
+#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG 1
+
+/*=============*/
+/* Memory Info */
+/*=============*/
+/* malloc() len */
+#define CONFIG_SYS_MALLOC_LEN (0x10000 + 256*1024)
+/* reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+/* memtest start address */
+#define CONFIG_SYS_MEMTEST_START 0xA0000000
+#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE (256*1024) /* regular stack */
+#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
+
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CONFIG_MXC_UART
+#define CONFIG_SYS_MX27_UART1
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_SYS_FLASH_CFI
+
+/* Use hardware sector protection */
+#define CONFIG_SYS_FLASH_PROTECTION 1
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
+#define CONFIG_SYS_FLASH_SECT_SZ 0x2000 /* 8KB sect size Intel Flash */
+/* end of flash */
+#define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - 0x20000)
+/* CS2 Base address */
+#define PHYS_FLASH_1 0xc0000000
+/* Flash Base for U-Boot */
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
+/* Flash size 32MB */
+#define PHYS_FLASH_SIZE 0x2000000
+#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
+ CONFIG_SYS_FLASH_SECT_SZ)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
+#define CONFIG_ENV_SECT_SIZE 0x10000 /* Env sector Size */
+#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
+/* Address and size of Redundant Environment Sector */
+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
+
+/*
+ * Ethernet
+ */
+#define CONFIG_FEC_MXC
+#define CONFIG_FEC_MXC_PHYADDR 0x1f
+#define CONFIG_MII
+#define CONFIG_NET_MULTI
+
+/*#define CONFIG_DRIVER_CS8900 1
+#define CS8900_BASE 0xD4020300
+#define CS8900_BUS16 1*/
+#define CONFIG_ETHADDR 02:80:ad:20:31:e8
+
+/*
+ * NAND
+ */
+#define CONFIG_NAND_MXC
+#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE 0xd8000000
+#define CONFIG_JFFS2_NAND
+#define CONFIG_MXC_NAND_HWECC
+
+/*
+ * SD/MMC
+ */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
+#define CONFIG_DOS_PARTITION
+
+/*
+ * MTD partitions
+ */
+#define CONFIG_MTD_DEVICE
+#define CONFIG_CMD_MTDPARTS
+#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
+#define MTDPARTS_DEFAULT \
+ "mtdparts=physmap-flash.0:256k(U-Boot),3968k(kernel),28416k(user),64k(env1),64k(env2)"
+
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+/* Print buffer sz */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+
+#define CONFIG_BOOTDELAY 5
+
+#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+#define xstr(s) str(s)
+#define str(s) #s
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs}" \
+ " console=ttymxc0,${baudrate}\0" \
+ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "addmisc=setenv bootargs ${bootargs}\0" \
+ "u-boot=imx27/u-boot.bin\0" \
+ "kernel_addr_r=a0800000\0" \
+ "hostname=imx27\0" \
+ "bootfile=imx27/uImage\0" \
+ "rootpath=/opt/eldk-4.2-arm/arm\0" \
+ "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
+ "run nfsargs addip addtty addmtd addmisc;" \
+ "bootm\0" \
+ "bootcmd=run net_nfs\0" \
+ "load=tftp ${loadaddr} ${u-boot}\0" \
+ "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
+ " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
+ " +${filesize};cp.b ${fileaddr} " \
+ xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
+ "upd=run load update\0" \
+
+#endif /* __CONFIG_H */
--
1.6.0.4
