September 2009 - U-Boot

[U-Boot] [PATCH] immap_85xx: add porpllsr's plat ratio definition
by Mingkai Hu 22 Sep '09

22 Sep '09

Signed-off-by: Mingkai Hu <Mingkai.hu(a)freescale.com> --- include/asm-ppc/immap_85xx.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index e7d412d..39fdb8e 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1542,6 +1542,8 @@ typedef struct ccsr_gur { #endif #define MPC85xx_PORPLLSR_QE_RATIO 0x3e000000 #define MPC85xx_PORPLLSR_QE_RATIO_SHIFT 25 +#define MPC85xx_PORPLLSR_PLAT_RATIO 0x0000003e +#define MPC85xx_PORPLLSR_PLAT_RATIO_SHIFT 1 uint porbmsr; /* 0xe0004 - POR boot mode status register */ #define MPC85xx_PORBMSR_HA 0x00070000 #define MPC85xx_PORBMSR_HA_SHIFT 16 -- 1.6.4

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[U-Boot] [PATCH] ppc/85xx: add ld script file for boot from NAND
by Mingkai Hu 22 Sep '09

22 Sep '09

The first stage 4K image uses a seperate ld script file to generate 4K image. This patch moves it to the cpu/mpc85xx/* to make it avaliable for 85xx platform. Signed-off-by: Mingkai Hu <Mingkai.hu(a)freescale.com> --- ChangeLog: - move from board specific directory to cpu/mpc85xx/*, make it avalible for 85xx platform. cpu/mpc85xx/u-boot-nand_spl.lds | 67 +++++++++++++++++++++++++++++++++++++++ 1 files changed, 67 insertions(+), 0 deletions(-) create mode 100644 cpu/mpc85xx/u-boot-nand_spl.lds diff --git a/cpu/mpc85xx/u-boot-nand_spl.lds b/cpu/mpc85xx/u-boot-nand_spl.lds new file mode 100644 index 0000000..fef3e42 --- /dev/null +++ b/cpu/mpc85xx/u-boot-nand_spl.lds @@ -0,0 +1,67 @@ +/* + * (C) Copyright 2006 + * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de + * + * Copyright 2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SECTIONS +{ + . = 0xfff00000; + .text : { + *(.text) + } + _etext = .; + + .reloc : { + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + . = ALIGN(8); + .data : { + *(.rodata*) + *(.data*) + *(.sdata*) + } + _edata = .; + + . = ALIGN(8); + __init_begin = .; + __init_end = .; + + .resetvec ADDR(.text) + 0xffc : { + *(.resetvec) + } = 0xffff + + __bss_start = .; + .bss : { + *(.sbss) + *(.bss) + } + _end = .; +} +ASSERT(__init_end <= 0xfff00ffc, "NAND bootstrap too big"); -- 1.6.4

2 1

[U-Boot] [PATCH] mpc8610hpcd: Use common 86xx fdt fixup code
by Peter Tyser 22 Sep '09

22 Sep '09

Using the common 86xx fdt fixups removes some board-specific code and should make the mpc8610hpcd easier to maintain in the long run. Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- board/freescale/mpc8610hpcd/mpc8610hpcd.c | 14 +------------- 2 files changed, 1 insertions(+), 14 deletions(-) diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 98111eb..358148f 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -387,19 +387,7 @@ void pci_init_board(void) void ft_board_setup(void *blob, bd_t *bd) { - do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, - "timebase-frequency", bd->bi_busfreq / 4, 1); - do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, - "bus-frequency", bd->bi_busfreq, 1); - do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, - "clock-frequency", bd->bi_intfreq, 1); - do_fixup_by_prop_u32(blob, "device_type", "soc", 4, - "bus-frequency", bd->bi_busfreq, 1); - - do_fixup_by_compat_u32(blob, "ns16550", - "clock-frequency", bd->bi_busfreq, 1); - - fdt_fixup_memory(blob, bd->bi_memstart, bd->bi_memsize); + ft_cpu_setup(blob, bd); #ifdef CONFIG_PCI1 ft_fsl_pci_setup(blob, "pci0", &pci1_hose); -- 1.6.2.1

2 1

[U-Boot] [PATCH] sbc85x0: tidy up Makefile to use new configuration script.
by Paul Gortmaker 22 Sep '09

22 Sep '09

Commit 804d83a5 allows us to move all the configuration variation tweaks out of the top level Makefile and down into the boards config header. This takes advantage of that for the sbc8540/sbc8560 boards. There were a couple of cheezy comments pointing at incorrect files, or files that don't exist, so I've cleaned those up too. Signed-off-by: Paul Gortmaker <paul.gortmaker(a)windriver.com> --- For 85xx tree; since it contains sbc8548 commits which this diff has context of one of those commit changes to Makefile Makefile | 18 ++---------------- include/configs/SBC8540.h | 19 +++++++++++-------- include/configs/sbc8560.h | 17 ++++++++++++----- 3 files changed, 25 insertions(+), 29 deletions(-) diff --git a/Makefile b/Makefile index 55ee25d..9c5b2a5 100644 --- a/Makefile +++ b/Makefile @@ -2535,14 +2535,7 @@ PM856_config: unconfig sbc8540_config \ sbc8540_33_config \ sbc8540_66_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _66_,$@)" ] ; then \ - echo "#define CONFIG_PCI_66" >>$(obj)include/config.h ; \ - $(XECHO) "... 66 MHz PCI" ; \ - else \ - $(XECHO) "... 33 MHz PCI" ; \ - fi - @$(MKCONFIG) -a SBC8540 ppc mpc85xx sbc8560 + @$(MKCONFIG) -t $(@:_config=) SBC8540 ppc mpc85xx sbc8560 sbc8548_config \ sbc8548_PCI_33_config \ @@ -2554,14 +2547,7 @@ sbc8548_PCI_66_PCIE_config: unconfig sbc8560_config \ sbc8560_33_config \ sbc8560_66_config: unconfig - @mkdir -p $(obj)include - @if [ "$(findstring _66_,$@)" ] ; then \ - echo "#define CONFIG_PCI_66" >>$(obj)include/config.h ; \ - $(XECHO) "... 66 MHz PCI" ; \ - else \ - $(XECHO) "... 33 MHz PCI" ; \ - fi - @$(MKCONFIG) -a sbc8560 ppc mpc85xx sbc8560 + @$(MKCONFIG) -t $(@:_config=) sbc8560 ppc mpc85xx sbc8560 socrates_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc85xx socrates diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 7239f84..198dece 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -24,22 +24,25 @@ * MA 02111-1307 USA */ -/* mpc8560ads board configuration file */ -/* please refer to doc/README.mpc85xx for more info */ -/* make sure you change the MAC address and other network params first, - * search for CONFIG_ETHADDR,CONFIG_SERVERIP,etc in this file +/* + * sbc8540 board configuration file. */ #ifndef __CONFIG_H #define __CONFIG_H -#if XXX -#define DEBUG /* General debug */ -#define ET_DEBUG +/* + * Top level Makefile configuration choices + */ +#ifdef CONFIG_MK_66 +#define CONFIG_PCI_66 #endif + #define TSEC_DEBUG -/* High Level Configuration Options */ +/* + * High Level Configuration Options + */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 4fa501d..7c1d7a6 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -24,16 +24,23 @@ * MA 02111-1307 USA */ -/* sbc8560 board configuration file */ -/* please refer to doc/README.sbc8560 for more info */ -/* make sure you change the MAC address and other network params first, - * search for CONFIG_ETHADDR,CONFIG_SERVERIP,etc in this file +/* + * sbc8560 board configuration file. */ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ +/* + * Top level Makefile configuration choices + */ +#ifdef CONFIG_MK_66 +#define CONFIG_PCI_66 +#endif + +/* + * High Level Configuration Options + */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */ -- 1.6.4.1

2 1

[U-Boot] [PATCH 0/3] New MIIPHYBB implementation with multi-bus support
by Luigi 'Comio' Mantellini 22 Sep '09

22 Sep '09

From: Luigi 'Comio' Mantellini <luigi.mantellini(a)idf-hit.com> This patch rewrites the miiphybb ( Bit-banged MII bus driver ) in order to support an arbitrary number of buses. This feature is useful when your board uses different mii buses for different phys and all (or a part) of these buses are implemented via bit-banging mode. The driver requires that the following macros should be defined into the board configuration file: CONFIG_BITBANGMII - Enable the miiphybb driver CONFIG_BITBANGMII_MULTI - Enable the multi bus support If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs to define the following macros: MII_INIT - Generic cod to enable the MII bus (like gpios setup) MDIO_DECLARE - Declaration needed to access to the MDIO pin MDIO_ACTIVE - Activate the MDIO pin as out pin MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin MDIO_READ - Read the MDIO pin MDIO(v) - Write v on the MDIO pin MDC_DECLARE - Declaration needed to access to the MDC pin MDC(v) - Write v on the MDC pin The previous macros makes the driver at most compatible with the previous version (that didn't support the multi-bus). If the CONFIG_BITBANGMII_MULTI is defined, the board code needs to fill the bbmiibusses[] array with a record for each required bus. The record (struct bbmiibus) has the following fields/callbacks (see miiphy.h for details): char name[] - The symbolic name that must be equal to the MII bus registered name int (*init)() - Initialization function called at startup time (just before the Ethernet initialization) int (*mdio_active)() - Activate the MDIO pin as output int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin int (*set_mdio)() - Write the MDIO pin int (*get_mdio)() - Read the MDIO pin int (*set_mdc)() - Write the MDC pin int (*delay)() - Delay function void *priv - Private data used by board specific code The board code will look like: struct bbmiibus bbmiibusses[] = { { .name = "miibus#1", .init = b1_init, .mdio_active = b1_mdio_active, ... }, { .name = "miibus#2", .init = b2_init, .mdio_active = b2_mdio_active, ... }, ... }; Luigi 'Comio' Mantellini (3): Bit-banged MII driver with multi-bus support. Add bb_miiphy_init call before any ethernet bring-up code. Update all board to support new bbmiiphy driver (with multibus support) drivers/net/phy/miiphybb.c | 321 +++++++++++++++++++++++++++++------------- include/configs/ISPAN.h | 3 + include/configs/MPC8260ADS.h | 2 + include/configs/MPC8266ADS.h | 3 + include/configs/MPC8560ADS.h | 3 + include/configs/Rattler.h | 3 + include/configs/SBC8540.h | 3 + include/configs/TQM8272.h | 2 + include/configs/VoVPN-GW.h | 3 + include/configs/ZPC1900.h | 3 + include/configs/ep8248.h | 3 + include/configs/ep82xxm.h | 3 + include/configs/gw8260.h | 3 + include/configs/hymod.h | 9 ++ include/configs/muas3001.h | 3 + include/configs/ppmc8260.h | 3 + include/configs/sacsng.h | 3 + include/configs/sbc8260.h | 3 + include/configs/sbc8560.h | 3 + include/miiphy.h | 22 +++ lib_arm/board.c | 3 + lib_avr32/board.c | 3 + lib_blackfin/board.c | 3 + lib_i386/board.c | 3 + lib_m68k/board.c | 3 + lib_mips/board.c | 3 + lib_ppc/board.c | 4 +- lib_sh/board.c | 3 + lib_sparc/board.c | 3 + 29 files changed, 332 insertions(+), 97 deletions(-)

1 3

[U-Boot] [PATCH] fsl_i2c: Do not generate STOP after read.
by Joakim Tjernlund 22 Sep '09

22 Sep '09

__i2c_read always ends with a STOP condition thereby releasing the bus. It is cleaner to do the STOP magic in i2c_read(), like i2c_write() does. This may also help future multimaster systems which wants to hold on to the bus until all transactions are finished. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund(a)transmode.se> --- This is on top of my earlier fsl_i2c series. I am about to send a similar patch to the kernel. drivers/i2c/fsl_i2c.c | 11 ++++++----- 1 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 0c5f6be..413bcba 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -333,9 +333,10 @@ __i2c_read(u8 *data, int length) writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_TXAK, &i2c_dev[i2c_bus_num]->cr); - /* Generate stop on last byte */ + /* Do not generate stop on last byte */ if (i == length - 1) - writeb(I2C_CR_MEN | I2C_CR_TXAK, &i2c_dev[i2c_bus_num]->cr); + writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX, + &i2c_dev[i2c_bus_num]->cr); data[i] = readb(&i2c_dev[i2c_bus_num]->dr); } @@ -358,11 +359,11 @@ i2c_read(u8 dev, uint addr, int alen, u8 *data, int length) && i2c_write_addr(dev, I2C_READ_BIT, 1) != 0) i = __i2c_read(data, length); - if (length && i2c_wait4bus()) /* Wait until STOP */ - debug("i2c_read: wait4bus timed out\n"); - writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr); + if (i2c_wait4bus()) /* Wait until STOP */ + debug("i2c_read: wait4bus timed out\n"); + if (i == length) return 0; -- 1.6.4.3

1 0

[U-Boot] Warning Bad CRC
by Rahanesh 22 Sep '09

22 Sep '09

Hi All, I am getting a warning message when i run fw_printenv on board. Warning : Bad CRC!! Using Default Environment. And it showed Few environment variables. The values of those environment variables are not that is set on my board. What might me the issue? Thanks Rahanesh

3 8

[U-Boot] [PATCH] 85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQ
by Vivek Mahajan 22 Sep '09

22 Sep '09

This patch does the following:- * Fixes l2 cache controller's compatible string for QorIQ * Revamps its copyright Signed-off-by: Vivek Mahajan <vivek.mahajan(a)freescale.com> --- cpu/mpc85xx/fdt.c | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index 723f473..61e0fb0 100644 --- a/cpu/mpc85xx/fdt.c +++ b/cpu/mpc85xx/fdt.c @@ -1,5 +1,5 @@ /* - * Copyright 2007 Freescale Semiconductor, Inc. + * Copyright 2007-2009 Freescale Semiconductor, Inc. * * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. @@ -27,6 +27,7 @@ #include <libfdt.h> #include <fdt_support.h> #include <asm/processor.h> +#include <linux/ctype.h> #ifdef CONFIG_FSL_ESDHC #include <fsl_esdhc.h> #endif @@ -148,8 +149,14 @@ static inline void ft_fixup_l2cache(void *blob) } if (cpu) { - len = sprintf(compat_buf, "fsl,mpc%s-l2-cache-controller", - cpu->name); + if (isdigit(cpu->name[0])) + len = sprintf(compat_buf, + "fsl,mpc%s-l2-cache-controller", cpu->name); + else + len = sprintf(compat_buf, + "fsl,%c%s-l2-cache-controller", + tolower(cpu->name[0]), cpu->name + 1); + sprintf(&compat_buf[len + 1], "cache"); } fdt_setprop(blob, off, "cache-unified", NULL, 0); -- 1.5.6.5

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[U-Boot] [PATCH v3 RESEND] at91: Update MEESC board support
by Daniel Gorsulowski 22 Sep '09

22 Sep '09

This patch implements several updates: -disable CONFIG_ENV_OVERWRITE -add new hardware style variants and set the arch numbers appropriate (autodet.) -pass the serial# and hardware revision to the kernel -removed unused macros from include/configs/meesc.h Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski(a)esd.eu> --- v2: - don't write the ethernet address to the EMAC module anymore v3: - removed function meesc_set_arch_number and moved code to checkboard() - reworked function get_board_serial() - removed unused macros from include/configs/meesc.h board/esd/meesc/meesc.c | 62 +++++++++++++++++++++++++++++++++++++++++++---- include/configs/meesc.h | 25 ++++++------------- 2 files changed, 65 insertions(+), 22 deletions(-) diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index 636d0ed..045fbe2 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -156,8 +156,35 @@ int board_eth_init(bd_t *bis) int checkboard(void) { char str[32]; - - puts("Board: esd CAN-EtherCAT Gateway"); + u_char hw_type; /* hardware type */ + + /* read the "Type" register of the ET1100 controller */ + hw_type = readb(CONFIG_ET1100_BASE); + + switch (hw_type) { + case 0x11: + case 0x3F: + /* ET1100 present, + arch number of MEESC-Board */ + gd->bd->bi_arch_number = MACH_TYPE_MEESC; + puts("Board: CAN-EtherCAT Gateway"); + break; + case 0xFF: + /* no ET1100 present, + arch number of EtherCAN/2-Board */ + gd->bd->bi_arch_number = MACH_TYPE_ETHERCAN2; + puts("Board: EtherCAN/2 Gateway"); + /* switch on LED1D */ + at91_set_gpio_output(AT91_PIN_PB12, 1); + break; + default: + /* assume, no ET1100 present, + arch number of EtherCAN/2-Board */ + gd->bd->bi_arch_number = MACH_TYPE_ETHERCAN2; + printf("FATAL! Read invalid hw_type: %02X\n", hw_type); + puts("Board: EtherCAN/2 Gateway"); + break; + } if (getenv_r("serial#", str, sizeof(str)) > 0) { puts(", serial# "); puts(str); @@ -167,6 +194,32 @@ int checkboard(void) return 0; } +#ifdef CONFIG_SERIAL_TAG +void get_board_serial(struct tag_serialnr *serialnr) +{ + char *str; + + char *serial = getenv("serial#"); + if (serial) { + str = strchr(serial, '_'); + if (str && (strlen(str) >= 4)) { + serialnr->high = (*(str + 1) << 8) | *(str + 2); + serialnr->low = simple_strtoul(str + 3, NULL, 16); + } + } else { + serialnr->high = 0; + serialnr->low = 0; + } +} +#endif + +#ifdef CONFIG_REVISION_TAG +u32 get_board_rev(void) +{ + return hw_rev | 0x100; +} +#endif + int board_init(void) { /* Peripheral Clock Enable Register */ @@ -174,8 +227,8 @@ int board_init(void) 1 << AT91SAM9263_ID_PIOB | 1 << AT91SAM9263_ID_PIOCDE); - /* arch number of MEESC-Board */ - gd->bd->bi_arch_number = MACH_TYPE_MEESC; + /* initialize ET1100 Controller */ + meesc_ethercat_hw_init(); /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; @@ -184,7 +237,6 @@ int board_init(void) #ifdef CONFIG_CMD_NAND meesc_nand_hw_init(); #endif - meesc_ethercat_hw_init(); #ifdef CONFIG_HAS_DATAFLASH at91_spi0_hw_init(1 << 0); #endif diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 8253172..b996854 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -36,13 +36,14 @@ #define CONFIG_MEESC 1 /* Board is esd MEESC */ #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ -#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */ #define CONFIG_DISPLAY_BOARDINFO 1 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ #define CONFIG_PREBOOT /* enable preboot variable */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1 +#define CONFIG_SERIAL_TAG 1 +#define CONFIG_REVISION_TAG 1 #undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ #define CONFIG_SKIP_LOWLEVEL_INIT @@ -138,12 +139,13 @@ #define CONFIG_SYS_USE_DATAFLASH 1 #undef CONFIG_SYS_USE_NANDFLASH -#ifdef CONFIG_SYS_USE_DATAFLASH - /* CAN */ #define CONFIG_AT91_CAN 1 -/* bootstrap + u-boot + env + linux in dataflash on CS0 */ +/* hw-controller addresses */ +#define CONFIG_ET1100_BASE 0x70000000 + +/* bootstrap + u-boot + env in dataflash on CS0 */ #define CONFIG_ENV_IS_IN_DATAFLASH 1 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 0x8400) @@ -151,18 +153,6 @@ #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x4200 -#define CONFIG_BOOTCOMMAND "cp.b C0042000 22000000 210000; bootm" - -#else /* CONFIG_SYS_USE_NANDFLASH */ - -/* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_OFFSET 0x60000 -#define CONFIG_ENV_OFFSET_REDUND 0x80000 -#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ -#define CONFIG_BOOTCOMMAND "nand read 22000000 A0000 200000; bootm" - -#endif #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } @@ -178,7 +168,8 @@ /* * Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN 0x2D000 +#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ + 128*1024, 0x1000) #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ -- 1.5.3

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[U-Boot] [PATCH] [OneNAND IPL] OneNAND board init support
by Kyungmin Park 22 Sep '09

22 Sep '09

Some CPU has internal OneNAND controller and use it for access OneNAND To support these CPU, we provide the onenand_board_init Also we can override the onenand_read_page. Some minor fixed: - Remove unnecessary header file - Fix wrong access at read interrupt - The recent OneNAND has 4KiB pagesize Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- diff --git a/onenand_ipl/onenand_boot.c b/onenand_ipl/onenand_boot.c index 63995ce..22baebb 100644 --- a/onenand_ipl/onenand_boot.c +++ b/onenand_ipl/onenand_boot.c @@ -24,7 +24,6 @@ */ #include <common.h> -#include <version.h> #include "onenand_ipl.h" diff --git a/onenand_ipl/onenand_ipl.h b/onenand_ipl/onenand_ipl.h index 412572a..2257063 100644 --- a/onenand_ipl/onenand_ipl.h +++ b/onenand_ipl/onenand_ipl.h @@ -29,7 +29,14 @@ #define THIS_ONENAND(a) (CONFIG_SYS_ONENAND_BASE + (a)) #define READ_INTERRUPT() \ - onenand_readw(THIS_ONENAND(ONENAND_REG_INTERRUPT)) + onenand_readw(ONENAND_REG_INTERRUPT) +enum { + ONENAND_USE_DEFAULT, + ONENAND_USE_GENERIC, +}; + +extern int (*onenand_read_page)(ulong block, ulong page, + u_char *buf, int pagesize); extern int onenand_read_block(unsigned char *buf); #endif diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c index d1a842d..7fc0c62 100644 --- a/onenand_ipl/onenand_read.c +++ b/onenand_ipl/onenand_read.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2005-2008 Samsung Electronis + * (C) Copyright 2005-2009 Samsung Electronics * Kyungmin Park <kyungmin.park(a)samsung.com> * * See file CREDITS for list of people who contributed to this @@ -37,8 +37,11 @@ extern void *memcpy32(void *dest, void *src, int size); #endif +int (*onenand_read_page)(ulong block, ulong page, + u_char *buf, int pagesize); + /* read a page with ECC */ -static inline int onenand_read_page(ulong block, ulong page, +static int generic_onenand_read_page(ulong block, ulong page, u_char * buf, int pagesize) { unsigned long *base; @@ -89,9 +92,29 @@ static inline int onenand_read_page(ulong block, ulong page, return 0; } -#define ONENAND_START_PAGE 1 +#ifndef CONFIG_ONENAND_START_PAGE +#define CONFIG_ONENAND_START_PAGE 1 +#endif #define ONENAND_PAGES_PER_BLOCK 64 +#ifndef CONFIG_ONENAND_BOARD_INIT +static int onenand_generic_init(int *page_is_4KiB, int *page) +{ + int dev_id, density; + + if (onenand_readw(ONENAND_REG_TECHNOLOGY)) + *page_is_4KiB = 1; + dev_id = onenand_readw(ONENAND_REG_DEVICE_ID); + density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; + density &= ONENAND_DEVICE_DENSITY_MASK; + if (density >= ONENAND_DEVICE_DENSITY_4Gb && + !(dev_id & ONENAND_DEVICE_IS_DDP)) + *page_is_4KiB = 1; + + return ONENAND_USE_DEFAULT; +} +#endif + /** * onenand_read_block - Read CONFIG_SYS_MONITOR_LEN from begining * of OneNAND, skipping bad blocks @@ -99,24 +122,31 @@ static inline int onenand_read_page(ulong block, ulong page, */ int onenand_read_block(unsigned char *buf) { - int block; - int page = ONENAND_START_PAGE, offset = 0; - int pagesize = 0, erase_shift = 0; - int erasesize = 0, nblocks = 0; + int block, nblocks; + int page = CONFIG_ONENAND_START_PAGE, offset = 0; + int pagesize, erasesize, erase_shift; + int page_is_4KiB = 0, ret; + + pagesize = 2048; /* OneNAND has 2KiB pagesize */ + erase_shift = 17; + onenand_read_page = generic_onenand_read_page; + +#ifdef CONFIG_ONENAND_BOARD_INIT + onenand_board_init(&page_is_4KiB, &page); +#else + onenand_generic_init(&page_is_4KiB, &page); +#endif - if (onenand_readw(ONENAND_REG_TECHNOLOGY)) { - pagesize = 4096; /* MLC OneNAND has 4KiB pagesize */ + if (page_is_4KiB) { + pagesize = 4096; /* OneNAND has 4KiB pagesize */ erase_shift = 18; - } else { - pagesize = 2048; - erase_shift = 17; } - erasesize = ONENAND_PAGES_PER_BLOCK * pagesize; + erasesize = (1 << erase_shift); nblocks = (CONFIG_SYS_MONITOR_LEN + erasesize - 1) >> erase_shift; /* NOTE: you must read page from page 1 of block 0 */ - /* read the block page by page*/ + /* read the block page by page */ for (block = 0; block < nblocks; block++) { for (; page < ONENAND_PAGES_PER_BLOCK; page++) { if (onenand_read_page(block, page, buf + offset,

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