November 2019 - U-Boot

[U-Boot] Reboot is broken on RockPro64 with mainline u-boot and ATF
by Vasily Khoruzhick 27 Nov '19

27 Nov '19

Hey guys, Looks like reboot is broken on RockPro64 (RK3399-based) with mainline u-boot and ATF (ATF already has a fix [1]). When I type 'reboot' in linux I get back to u-boot, but subsequent linux boot hangs in most cases. Sometimes I get this warning: [ 62.400363] rcu: INFO: rcu_sched detected stalls on CPUs/tasks: [ 62.418095] rcu: 4-...!: (3 ticks this GP) idle=332/1/0x4000000000000000 softirq=23/24 fqs=13 [ 62.444137] Task dump for CPU 4: [ 62.453791] kworker/4:1 R running task 0 42 2 0x0000002a [ 62.474907] Workqueue: pm genpd_power_off_work_fn [ 62.489013] rcu: rcu_sched kthread starved for 5976 jiffies! g-1147 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x0 ->cpu=1 [ 62.519205] rcu: RCU grace-period kthread stack dump: [ 62.534316] rcu_sched R running task 0 10 2 0x00000028 I already checked that regulators are configured correctly, also I tried to disable big CPU cluster in linux and re-initializing CPU voltages in u-boot but unfortunately nothing helps. There were other reports on #linux-rockchip at freenode that reboot is broken. Any ideas how to debug it or what could be wrong? Regards, Vasily [1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/2512

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[U-Boot] [PATCH v1 1/4] dfu: Drop unused prototype of dfu_trigger_reset()
by Andy Shevchenko 27 Nov '19

27 Nov '19

After the commit 1cc03c5c53c0 ("dfu: Provide means to find difference between dfu-util -e and -R") the dangling ptototype appeared. Remove it here. Fixes: 1cc03c5c53c0 ("dfu: Provide means to find difference between dfu-util -e and -R") Cc: Lukasz Majewski <l.majewski(a)samsung.com> Cc: Stephen Warren <swarren(a)nvidia.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- include/dfu.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/dfu.h b/include/dfu.h index 564966333f..2e3e91c8d2 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -171,7 +171,6 @@ const char *dfu_get_dev_type(enum dfu_device_type t); const char *dfu_get_layout(enum dfu_layout l); struct dfu_entity *dfu_get_entity(int alt); char *dfu_extract_token(char** e, int *n); -void dfu_trigger_reset(void); int dfu_get_alt(char *name); int dfu_init_env_entities(char *interface, char *devstr); unsigned char *dfu_get_buf(struct dfu_entity *dfu); -- 2.24.0

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[U-Boot] [PATCH] ls1028a: Configure stream IDs for integrated PCI and fix up Linux DT
by Alex Marginean 27 Nov '19

27 Nov '19

Hardware comes out of reset with implicit values, but these are outside the accepted range for Layerscape gen 3 chassis spec used on LS1028A. Allocate different IDs and fix up Linux DT to use them. Signed-off-by: Alex Marginean <alexandru.marginean(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 9 ++ .../asm/arch-fsl-layerscape/stream_id_lsch3.h | 8 ++ board/freescale/ls1028a/ls1028a.c | 106 ++++++++++++++++++ 3 files changed, 123 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index e993209593..1e7e46e88a 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -421,6 +421,12 @@ static void fdt_disable_multimedia(void *blob, unsigned int svr) } #endif +#ifdef CONFIG_PCIE_ECAM_GENERIC +__weak void fdt_fixup_ecam(void *blob) +{ +} +#endif + void ft_cpu_setup(void *blob, bd_t *bd) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); @@ -485,4 +491,7 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_ARCH_LS1028A fdt_disable_multimedia(blob, svr); #endif +#ifdef CONFIG_PCIE_ECAM_GENERIC + fdt_fixup_ecam(blob); +#endif } diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h index 94ea99a349..01d362d183 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h @@ -42,6 +42,10 @@ * -the MC is responsible for allocating and setting up 'isolation context * IDs (ICIDs) based on the allocated stream IDs for all DPAA2 devices. * + * - ECAM (integrated PCI) + * - U-Boot applies the value here to HW and does DT fix-up for both + * 'iommu-map' and 'msi-map' + * * On Chasis-3 SoCs stream IDs are programmed in AMQ registers (32-bits) for * each of the different bus masters. The relationship between * the AMQ registers and stream IDs is defined in the table below: @@ -98,6 +102,10 @@ #define FSL_DPAA2_STREAM_ID_START 23 #define FSL_DPAA2_STREAM_ID_END 63 +/* PCI IEPs, this overlaps DPAA2 but these two are exclusive at least for now */ +#define FSL_ECAM_STREAM_ID_START 32 +#define FSL_ECAM_STREAM_ID_END 63 + #define FSL_SEC_STREAM_ID 64 #define FSL_SEC_JR1_STREAM_ID 65 #define FSL_SEC_JR2_STREAM_ID 66 diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index a9606b8865..1f5dc0d0b2 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -28,6 +28,52 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_PCIE_ECAM_GENERIC + +#define ECAM_IERB_BASE 0x1f0800000ULL +#define ECAM_IERB_OFFSET_NA -1 +#define ECAM_IERB_FUNC_CNT ARRAY_SIZE(ierb_offset) +/* cache related transaction attributes for PCIe functions */ +#define ECAM_IERB_MSICAR (ECAM_IERB_BASE + 0xa400) +#define ECAM_IERB_MSICAR_VALUE 0x30 + +/* offset of IERB config register per PCI function */ +static int ierb_offset[] = { + 0x0800, + 0x1800, + 0x2800, + 0x3800, + 0x4800, + 0x5800, + 0x6800, + ECAM_IERB_OFFSET_NA, + 0x0804, + 0x0808, + 0x1804, + 0x1808, +}; + +/* + * Use a custom function for LS1028A, for now this is the only SoC with IERB + * and we're currently considering reorganizing IERB for future SoCs. + */ +static void set_ecam_icids(void) +{ + int i; + + out_le32(ECAM_IERB_MSICAR, ECAM_IERB_MSICAR_VALUE); + + for (i = 0; i < ECAM_IERB_FUNC_CNT; i++) { + if (ierb_offset[i] == ECAM_IERB_OFFSET_NA) + continue; + + out_le32(ECAM_IERB_BASE + ierb_offset[i], + FSL_ECAM_STREAM_ID_START + i); + } +} + +#endif /* CONFIG_PCIE_ECAM_GENERIC */ + int config_board_mux(void) { #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS) @@ -88,6 +134,16 @@ int board_init(void) #endif #endif + + /* + * ICIDs for other hardware blocks are set really early on, before MMU + * is set up. For integrated PCI we need access to IERB which is not + * part of CCSR, so we have to wait for MMU mappings to be applied + */ +#ifdef CONFIG_PCIE_ECAM_GENERIC + set_ecam_icids(); +#endif + return 0; } @@ -244,3 +300,53 @@ int checkboard(void) return 0; } #endif + +#ifdef CONFIG_PCIE_ECAM_GENERIC + +static int fdt_setprop_inplace_idx_u32(void *fdt, int nodeoffset, + const char *name, uint32_t idx, u32 val) +{ + val = cpu_to_be32(val); + return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name, + strlen(name), + idx * sizeof(val), &val, + sizeof(val)); +} + +static int fdt_getprop_len(void *fdt, int nodeoffset, const char *name) +{ + int len; + + if (fdt_getprop_namelen(fdt, nodeoffset, name, strlen(name), &len)) + return len; + + return 0; +} + +void fdt_fixup_ecam(void *blob) +{ + int off; + + off = fdt_node_offset_by_compatible(blob, 0, "pci-host-ecam-generic"); + if (off < 0) { + debug("ECAM node not found\n"); + return; + } + + if (fdt_getprop_len(blob, off, "msi-map") != 16 || + fdt_getprop_len(blob, off, "iommu-map") != 16) { + log_err("invalid msi/iommu-map propertly size in ECAM node\n"); + return; + } + + fdt_setprop_inplace_idx_u32(blob, off, "msi-map", 2, + FSL_ECAM_STREAM_ID_START); + fdt_setprop_inplace_idx_u32(blob, off, "msi-map", 3, + ECAM_IERB_FUNC_CNT); + + fdt_setprop_inplace_idx_u32(blob, off, "iommu-map", 2, + FSL_ECAM_STREAM_ID_START); + fdt_setprop_inplace_idx_u32(blob, off, "iommu-map", 3, + ECAM_IERB_FUNC_CNT); +} +#endif /* CONFIG_PCIE_ECAM_GENERIC */ -- 2.17.1

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[U-Boot] SPDX header might be wrong in 4 files from Android Open Source Project
by zdenek.bouska＠siemens.com 27 Nov '19

27 Nov '19

Hello, SPDX-License-Identifier: BSD-3-Clause might be wrong in the following 4 files from Android Open Source Project (AOSP): include/android_bootloader_message.h include/sparse_format.h include/dt_table.h include/android_image.h As you can see in the comments the content is from AOSP. But these files have Apache License, Version 2.0 in AOSP: https://android.googlesource.com/platform/bootable/recovery/+/master/bootlo… https://android.googlesource.com/platform/system/core/+/28fa5bc347390480fe1… https://android.googlesource.com/platform/system/libufdt/+/2626d8b9e4d8e8c6… https://android.googlesource.com/platform/system/tools/mkbootimg/+/e55998a0… I am afraid, that there could be a license compatibility problem with creating one binary from both source files with GPL2-only license and source files with Apache 2 license. Am I wrong? Is it possible to re-license from Apache 2 to BSD 3 license if there are only simple structs and defines in those files? With best regards, Zdenek Bouska Siemens, s.r.o. Internet of Things Development Services IOT DS EU CZ AE Siemensova 1 155 00 Prague 13, Czech Republic zdenek.bouska(a)siemens.com<mailto:zdenek.bouska@siemens.com> [cid:image003.png@01D5A3B2.56B02BF0] Siemens, s.r.o. - CEO: Ing. Eduard Palíšek, Ph.D., MBA, CFO: Dipl.-Kfm. Michael Axmann - registered in the Commercial Register of the Municipal Court in Prague, Sec. C, File 625 Registered office: Siemensova 1, 155 00 Prague 13, Czech Republic IČ: 00268577, DIČ: CZ00268577, ID of data box: h6vchd6, Bank connection: UniCredit Bank Czech Republic and Slovakia, a.s., Želetavská 1525/1, 140 92 Prague 4, Czech Republic; Acc. Nr. CZK: 1013384001/2700, Acc. Nr. EUR: 1013384394/2700 Important Note: This message is only of informative nature. The content of this message shall not be binding for sender and sender does neither intend to conclude contract, accept offer or confirm the conclusion of the contract by this message nor this message represents pre-contractual liability of the sender, unless the sender states in the message excplicitly otherwise. The content of this message (including appendices) shall be confidential. Should you are not intended receiver of this message, any access, copying, distribution or use of the content of this message is strictly prohibited and in such case, please immediately notify the sender and subsequently delete the entire message (including apppendices) from your system.

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[U-Boot] [PATCH v3 00/15] dfu: update dfu stack and add MTD backend
by Patrick Delaunay 27 Nov '19

27 Nov '19

This serie based on v2019.10 propose updates on the DFU stack: - add capability to have several DFU backend running in parallel - add MTD backend for update of NAND, NOR or SPI-NAND - add VIRTUAL backend for board/command specific behavior - add some weak callback This v2 patchset: + solves compilation for dependancy with CONFIG_CMD_MTDPARTS + solves bad block management for NAND in the erase loops (copied from MTD command), the previous was functional only on SPI-NAND. But I detect issue for NAND; when bad block is detected fail_addr is not updated. See the complete analysis on the issue (reproduced in MTD command) in http://patchwork.ozlabs.org/patch/1165056/ "cmd: mtd: solve bad block support in erase command" The better solution is a MTD backport from Linux, but udpate the loop is functional for SPI-NAND and NAND. To test the new features and as example, I update the stm32mp1 board to use the new features; I test them with the command "dfu 0" (for test I have dependency with patch http://patchwork.ozlabs.org/patch/1162076/) The expected target of the dfu part for this serie is v2020.01. I will merge the stm32mp1 part when they will be accepted by dfu maintainers. This serie prepares the DFU backend for the coming 'stm32prog' command and for STM32CubeProgrammer on stm32mp1 platform. This STMicroelectronics tool is based on DFU protocol and allows to update all the boot devices and the OTPs on the ST boards (so several DFU target in parallel, including spi nand). Build result for dfu_v3 branch can be found in https://travis-ci.org/patrickdelaunay/u-boot/builds/596684593 only one error for sheevaplug, but not reproduced on my side arm: + sheevaplug +u-boot.kwb exceeds file size limit: + limit: 524288 bytes + actual: 524320 bytes + excess: 32 bytes $> tools/buildman/buildman sheevaplug boards.cfg is up to date. Nothing to do. Building current source for 1 boards (1 thread, 12 jobs per thread) arm: w+ sheevaplug +===================== WARNING ====================== +This board does not use CONFIG_DM_MMC. Please update +the board to use CONFIG_DM_MMC before the v2019.04 release. +Failure to update by the deadline may result in board removal. +See doc/driver-model/MIGRATION.txt for more info. +==================================================== +This board does not use CONFIG_DM_USB. Please update +the board to use CONFIG_DM_USB before the v2019.07 release. +This board does use CONFIG_MVSATA_IDE which is not +ported to driver-model (DM) yet. Please update the storage +controller driver to use CONFIG_AHCI before the v2019.07 +release. +This board does not use CONFIG_DM_ETH (Driver Model +for Ethernet drivers). Please update the board to use +CONFIG_DM_ETH before the v2020.07 release. Failure to +update by the deadline may result in board removal. +See doc/driver-model/migration.rst for more info. 0 1 0 /1 sheevaplug Regards Patrick Changes in v3: - Add CONFIG_DFU_SF_PART and solve compilation issue, dependancy with CONFIG_MTDPARTS - update bad block support in erase loop - Update loop management for erase - rebase on v2019.10 - remove previous patch 16/16 pushed by error in v2 http://patchwork.ozlabs.org/patch/1162076/ Changes in v2: - Add dfu documentation - Update dfu documentation for callbacks - Add dfu documentation for several device - Update commit message - Update commit message - Update dfu documentation for MTD - Update dfu documentation for MTD - Update dfu documentation for virtual backend - Update dfu documentation for callbacks - Update callbacks comment after Lukasz review - Update after Lukasz Majewski comments Patrick Delaunay (15): dfu: cosmetic: cleanup sf to avoid checkpatch error doc: dfu: Add dfu documentation dfu: sf: add partition support for nor backend dfu: prepare the support of multiple interface dfu: allow to manage DFU on several devices dfu: allow read with no data without error for EOF indication dfu: add backend for MTD device dfu: add partition support for MTD backend dfu: add DFU virtual backend dfu: add callback for flush and initiated operation stm32mp1: activate DFU support and command MTD stm32mp1: activate SET_DFU_ALT_INFO stm32mp1: configs: activate CONFIG_MTD_SPI_NAND stm32mp1: board: add spi nand support stm32mp1: add support for virtual partition read board/st/stm32mp1/README | 111 ++++++++++ board/st/stm32mp1/stm32mp1.c | 164 ++++++++++++++- cmd/dfu.c | 21 +- configs/stm32mp15_basic_defconfig | 6 + configs/stm32mp15_optee_defconfig | 6 + configs/stm32mp15_trusted_defconfig | 6 + doc/README.dfu | 270 ++++++++++++++++++++++++ drivers/dfu/Kconfig | 21 ++ drivers/dfu/Makefile | 2 + drivers/dfu/dfu.c | 145 +++++++++++-- drivers/dfu/dfu_mtd.c | 311 ++++++++++++++++++++++++++++ drivers/dfu/dfu_sf.c | 56 ++++- drivers/dfu/dfu_virt.c | 49 +++++ include/configs/stm32mp1.h | 42 +++- include/dfu.h | 71 +++++++ 15 files changed, 1251 insertions(+), 30 deletions(-) create mode 100644 doc/README.dfu create mode 100644 drivers/dfu/dfu_mtd.c create mode 100644 drivers/dfu/dfu_virt.c -- 2.17.1

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[U-Boot] [PATCH 0/3] ARM: dts: stm32: udpate device tree for v2020.01
by Patrick Delaunay 27 Nov '19

27 Nov '19

Alignment of the device tree for all STM32 boards (MCU/MPU) with the latest Linux kernel and solve STM32MP157c-EV1 issue for eMMC on SDMMC2. All the boards (except avenger96i: not available) correctly boot after the patches. Patrick Delaunay (3): ARM: dts: stm32: DT alignment with kernel v5.3 ARM: dts: stm32: DT alignment with kernel v5.4-rc4 ARM: dts: stm32: update eMMC configuration for stm32mp157c-ev1 arch/arm/dts/st-pincfg.h | 1 + arch/arm/dts/stm32429i-eval.dts | 29 ++-- arch/arm/dts/stm32746g-eval.dts | 105 +++++++++----- arch/arm/dts/stm32f4-pinctrl.dtsi | 38 +----- arch/arm/dts/stm32f429-disco.dts | 40 +----- arch/arm/dts/stm32f429-pinctrl.dtsi | 38 +----- arch/arm/dts/stm32f429.dtsi | 127 +++++++++++------ arch/arm/dts/stm32f469-disco.dts | 39 +----- arch/arm/dts/stm32f469-pinctrl.dtsi | 39 +----- arch/arm/dts/stm32f469.dtsi | 2 +- arch/arm/dts/stm32f746-disco.dts | 39 +----- arch/arm/dts/stm32f746.dtsi | 54 +++----- arch/arm/dts/stm32f769-disco.dts | 43 +----- arch/arm/dts/stm32h7-u-boot.dtsi | 41 +----- arch/arm/dts/stm32h743-pinctrl.dtsi | 83 +++++++++++ arch/arm/dts/stm32h743.dtsi | 69 +++++----- arch/arm/dts/stm32h743i-disco-u-boot.dtsi | 8 -- arch/arm/dts/stm32h743i-disco.dts | 76 ++++++----- arch/arm/dts/stm32h743i-eval-u-boot.dtsi | 9 -- arch/arm/dts/stm32h743i-eval.dts | 42 +++++- arch/arm/dts/stm32mp157-pinctrl.dtsi | 59 +++++++- .../arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 5 +- arch/arm/dts/stm32mp157a-dk1.dts | 129 ++++++++++++++++++ arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 5 +- arch/arm/dts/stm32mp157c-ed1.dts | 51 ++++++- arch/arm/dts/stm32mp157c-ev1.dts | 3 +- arch/arm/dts/stm32mp157c.dtsi | 26 ++++ include/dt-bindings/clock/stm32fx-clock.h | 9 +- include/dt-bindings/mfd/st,stpmic1.h | 4 + include/dt-bindings/mfd/stm32f7-rcc.h | 1 + include/dt-bindings/mfd/stm32h7-rcc.h | 2 +- 31 files changed, 682 insertions(+), 534 deletions(-) -- 2.17.1

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[U-Boot] [PATCH] configs: stih410-b2260: Enable DM_ETH flag
by Patrice Chotard 27 Nov '19

27 Nov '19

This patch allows to fix the following compilation warning: ===================== WARNING ====================== This board does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please update the board to use CONFIG_DM_ETH before the v2020.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. ==================================================== Signed-off-by: Patrice Chotard <patrice.chotard(a)st.com> --- configs/stih410-b2260_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index aeebeeca04..63eac131f9 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -31,6 +31,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_MISC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_STI=y +CONFIG_DM_ETH=y CONFIG_PHY=y CONFIG_STI_USB_PHY=y CONFIG_PINCTRL=y -- 2.17.1

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[U-Boot] [PATCH v3 0/6] Raspberry Pi4: add support for DFU over USB
by Marek Szyprowski 27 Nov '19

27 Nov '19

Hi All! This patchset enables support for DFU over USB protocol on Raspberry Pi4 board. The board has DWC2 UDC controller connected to the USB-C power connector. Enabling DFU on it, make the u-boot development much more convenient, as one no longer needs to swap SD-card between RPi4 board and host machine to update the u-boot binary. Patches are based on current 'master' u-boot branch. They were tested on the 2019-07-10-raspbian-buster-lite.img sd-card image with the following lines added to config.txt: dtoverlay=dwc2,dr_mode=peripheral dtparam=i2c_arm=on dtparam=spi=on enable_uart=1 uart_2ndstage=1 kernel=u-boot.bin To enable DFU, one has to enter follwing command: # dfu 0 mmc 0 During the development of this feature I've encountered a serious bugs in FAT write code. Over-writing discontiguous files always caused serious filesystem corruption. This was especially anoying, because the system environment is kept on FAT volume in uboot.env file, so 'saveenv' basically corrupted the boot partiting on the second call. Another bunch of the issues in the FAT write code has been revealed while removing predefined file size limit in DFU MMC code and then running sandbox tests. I hope that my fixes for FAT code will be helpful for non-RPi users too. Best regards Marek Szyprowski Samsung R&D Institute Poland Changelog: v3: - fixed one more FAT issue revealed by sandbox tests v3: (patch 6/6 posted separately): https://patchwork.ozlabs.org/patch/1195645/ - fixed non-RPi4 builds (missing #else ENV_DFU_SETTINGS def) - removed config.txt entity (not needed in uboot-based boot) - switched arm64 kernel filename to 'Image' v2: https://patchwork.ozlabs.org/cover/1166589/ - added changes to rpi_4_defconfig too (arm64 version) - extended DFU entity list by confix.txt, cmdline.txt and Image.gz - fixed missing '\0' at the end of dfu_alt_info env - added reviewed-by tags - added patches for DFU MMC to remove file size limit - added patch for fat write to fix issues on non-zero file offset (revealed by previous patch) v1: https://patchwork.ozlabs.org/cover/1162770/ - initial version Patch summary: Marek Szyprowski (6): fat: write: fix broken write to fragmented files fat: write: fix broken write at non-zero file offset dfu: mmc: rearrange the code dfu: mmc: remove file size limit for io operations usb: dwc2_udc_otg: add bcm2835 SoC (Raspberry Pi4) support config: enable DFU over USB on Raspberry Pi4 boards configs/rpi_4_32b_defconfig | 11 +++ configs/rpi_4_defconfig | 11 +++ drivers/dfu/dfu_mmc.c | 93 +++++++++++++--------- drivers/usb/gadget/dwc2_udc_otg.c | 2 + drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 12 +-- fs/fat/fat_write.c | 19 +++-- include/configs/rpi.h | 20 +++++ 7 files changed, 116 insertions(+), 52 deletions(-) -- 2.17.1

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[U-Boot] [PATCH 1/3] mtd: rawnand: denali-spl: Add missing hardware init
by Marek Vasut 27 Nov '19

27 Nov '19

While the Denali NAND is initialized by the BootROM in SPL, there are still a couple of settings which are missing. These can trigger subtle corruption of the data read out of the NAND. Fill these settings in just like they are filled in by the full Denali NAND driver in denali_hw_init(). Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/mtd/nand/raw/denali_spl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/nand/raw/denali_spl.c b/drivers/mtd/nand/raw/denali_spl.c index dbaba3cab2..b8b29812aa 100644 --- a/drivers/mtd/nand/raw/denali_spl.c +++ b/drivers/mtd/nand/raw/denali_spl.c @@ -173,6 +173,13 @@ void nand_init(void) page_size = readl(denali_flash_reg + DEVICE_MAIN_AREA_SIZE); oob_size = readl(denali_flash_reg + DEVICE_SPARE_AREA_SIZE); pages_per_block = readl(denali_flash_reg + PAGES_PER_BLOCK); + + /* Do as denali_hw_init() does. */ + writel(CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES, + denali_flash_reg + SPARE_AREA_SKIP_BYTES); + writel(0x0F, denali_flash_reg + RB_PIN_ENABLED); + writel(CHIP_EN_DONT_CARE__FLAG, denali_flash_reg + CHIP_ENABLE_DONT_CARE); + writel(0xffff, denali_flash_reg + SPARE_AREA_MARKER); } int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) -- 2.24.0.432.g9d3f5f5b63

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[U-Boot] [PATCH v3 00/22] rockchip: ram: add common code for sdram driver
by Kever Yang 27 Nov '19

27 Nov '19

The sdram drivers for Rockchip SoCs was all separate, some of the SoCs has similar hardware controller and phy, so we have a change to share the flow and some of the functions between different SoCs. This patch set implement a first version common code based on PX30, other SoCs has similar hardware can migrate to this common code, eg. rk3328 and rk3399 can use this common code. This patch set also fix some bug for rk3399 by sync code from latest rockchip vendor code. V3 split the patch in more detail, and also fix support for px30. Changes in v3: - add dm based driver for non-TPL and update commit message - split code other than migration to separate patches. - update commit message Changes in v2: - Split the patches into multi smaller patches for easy to maintain, review and test; - Keep the DRAM_ROCKCHIP_DEBUG macro and enable it by default; - Update the rockchip_sdram_size to support sys_reg3; Kever Yang (14): ram: rockchip: rename sdram.h to sdram_rk3288.h ram: rockchip: rename sdram_common.c/h to sdram.c rockchip: sdram: move cap structure and debug function to sdram_common.h rockchip: sdram: extend to use sys_reg3 for capacity info rockchip: sdram: update the sys_reg to sys_reg2 ram: rockchip: add common code for sdram driver ram: rockchip: move sdram_debug function into sdram_common ram: rockchip: Default enable DRAM debug info ram: rockchip: add controller code for PX30 ram: rockchip: add phy driver code for PX30 ram: rockchip: add common msch reg definition ram: rockchip: update lpddr4 timing for rk3399 ram: rk3399: Sync the io setting from Rockchip vendor code ram: rk3399: update calculate_stride YouMin Chen (8): ram: px30: add sdram driver ram: rk3328: use common sdram driver ram: rk3399: migrate to use common code ram: rk3399: Clean up code ram: rk3399: fix error about get_ddrc0_con reg addr ram: rk3399: update the function of sdram_init ram: rk3399: add support detect capacity ram: rk3399: Fix dram setting to make dram more stable arch/arm/dts/rk3328-sdram-ddr3-666.dtsi | 4 + arch/arm/dts/rk3328-sdram-lpddr3-1600.dtsi | 4 + arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi | 4 + arch/arm/dts/rk3399-sdram-ddr3-1333.dtsi | 4 + arch/arm/dts/rk3399-sdram-ddr3-1600.dtsi | 4 + arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi | 4 + .../arm/dts/rk3399-sdram-lpddr3-2GB-1600.dtsi | 4 + .../arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi | 4 + .../rk3399-sdram-lpddr3-samsung-4GB-1866.dtsi | 4 + arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi | 4 + arch/arm/include/asm/arch-rockchip/sdram.h | 168 ++- .../include/asm/arch-rockchip/sdram_common.h | 116 +- .../include/asm/arch-rockchip/sdram_msch.h | 85 ++ .../asm/arch-rockchip/sdram_pctl_px30.h | 139 ++ .../asm/arch-rockchip/sdram_phy_px30.h | 62 + .../arch-rockchip/sdram_phy_ron_rtt_px30.h | 59 + .../include/asm/arch-rockchip/sdram_px30.h | 134 ++ .../include/asm/arch-rockchip/sdram_rk3288.h | 102 ++ .../include/asm/arch-rockchip/sdram_rk3328.h | 420 ++---- .../include/asm/arch-rockchip/sdram_rk3399.h | 98 +- arch/arm/mach-rockchip/Kconfig | 2 + arch/arm/mach-rockchip/Makefile | 2 +- arch/arm/mach-rockchip/rk3036/rk3036.c | 2 +- arch/arm/mach-rockchip/rk3288/rk3288.c | 2 +- .../mach-rockchip/{sdram_common.c => sdram.c} | 85 +- arch/arm/mach-rockchip/spl.c | 1 - configs/evb-rk3328_defconfig | 2 +- configs/rock64-rk3328_defconfig | 2 +- drivers/ram/Kconfig | 2 +- drivers/ram/rockchip/Kconfig | 17 +- drivers/ram/rockchip/Makefile | 7 +- drivers/ram/rockchip/dmc-rk3368.c | 2 +- .../rockchip/sdram-px30-ddr3-detect-333.inc | 72 + .../rockchip/sdram-px30-ddr4-detect-333.inc | 75 + drivers/ram/rockchip/sdram-px30-ddr_skew.inc | 121 ++ .../rockchip/sdram-px30-lpddr2-detect-333.inc | 73 + .../rockchip/sdram-px30-lpddr3-detect-333.inc | 74 + .../ram/rockchip/sdram-rk3399-lpddr4-400.inc | 28 +- .../ram/rockchip/sdram-rk3399-lpddr4-800.inc | 28 +- drivers/ram/rockchip/sdram_common.c | 429 ++++++ drivers/ram/rockchip/sdram_debug.c | 147 -- drivers/ram/rockchip/sdram_pctl_px30.c | 205 +++ drivers/ram/rockchip/sdram_phy_px30.c | 205 +++ drivers/ram/rockchip/sdram_px30.c | 751 +++++++++++ drivers/ram/rockchip/sdram_rk3128.c | 2 +- drivers/ram/rockchip/sdram_rk3188.c | 2 +- drivers/ram/rockchip/sdram_rk322x.c | 2 +- drivers/ram/rockchip/sdram_rk3288.c | 2 +- drivers/ram/rockchip/sdram_rk3328.c | 765 +++-------- drivers/ram/rockchip/sdram_rk3399.c | 1201 +++++++++++------ 50 files changed, 4035 insertions(+), 1696 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_msch.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_phy_ron_rtt_px30.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_px30.h create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3288.h rename arch/arm/mach-rockchip/{sdram_common.c => sdram.c} (60%) create mode 100644 drivers/ram/rockchip/sdram-px30-ddr3-detect-333.inc create mode 100644 drivers/ram/rockchip/sdram-px30-ddr4-detect-333.inc create mode 100644 drivers/ram/rockchip/sdram-px30-ddr_skew.inc create mode 100644 drivers/ram/rockchip/sdram-px30-lpddr2-detect-333.inc create mode 100644 drivers/ram/rockchip/sdram-px30-lpddr3-detect-333.inc create mode 100644 drivers/ram/rockchip/sdram_common.c delete mode 100644 drivers/ram/rockchip/sdram_debug.c create mode 100644 drivers/ram/rockchip/sdram_pctl_px30.c create mode 100644 drivers/ram/rockchip/sdram_phy_px30.c create mode 100644 drivers/ram/rockchip/sdram_px30.c -- 2.17.1

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