April 2017 - U-Boot

[U-Boot] [PATCH v1] mmc: sdhci: SDHCI controllers also need power
by Andy Shevchenko 23 Apr '17

23 Apr '17

On some systems SDHCI controllers may be powered off and it's required to bring them on before accessing. SDHCI generic driver currently lacks any mean of doing it. Call the same board_power_mmc_init() at sdhci_init() stage. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- drivers/mmc/sdhci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 93cefd89cd..54a7e379ff 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -469,6 +469,8 @@ static int sdhci_init(struct mmc *mmc) { struct sdhci_host *host = mmc->priv; + board_mmc_power_init(); + sdhci_reset(host, SDHCI_RESET_ALL); if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) { -- 2.11.0

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[U-Boot] [bug report]dtoc output order for spl dts nodes
by Kever Yang 23 Apr '17

23 Apr '17

Hi Simon, When I try to update rk3399.dtsi(https://patchwork.ozlabs.org/patch/749901/), I get error report like this: spl/dts/dt-platdata.c:10:17: error: ‘dtv_clock_controller_at_ff760000’ undeclared here (not in a function) .clocks = {{&dtv_clock_controller_at_ff760000, 78}, {&dtv_clock_controller_at_ff760000, 240}}, I believe this is caused by the order change of the sdhci node and dtv_clock_controller_at_ff760000 node, but I don't know why. Could you help to look at this issue and check if we can fix it with update at tools/dtoc/dtoc.py? Thanks, - Kever

2 1

[U-Boot] [PATCH 1/2] armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC support
by Priyanka Jain 22 Apr '17

22 Apr '17

The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A-72 CPUs and is built on layerscape architecture. It is 40-pin derivative of LS2084A (non-AIOP personality of LS2088A). So feature-wise it is same as LS2084A. LS2081A has one more similar personality which has four CPUs: LS2041A Signed-off-by: Priyanka Jain <priyanka.jain(a)nxp.com> Signed-off-by: Santan Kumar <santan.kumar(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 3 ++- arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc | 11 +++++++++++ arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 ++ arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 ++ drivers/pci/pcie_layerscape.c | 6 ++++-- drivers/pci/pcie_layerscape.h | 2 ++ drivers/pci/pcie_layerscape_fixup.c | 6 ++++-- 7 files changed, 27 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index c24f3f1..6e46257 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -102,7 +102,8 @@ static void fix_pcie_mmu_map(void) /* Fix PCIE base and size for LS2088A */ if ((ver == SVR_LS2088A) || (ver == SVR_LS2084A) || - (ver == SVR_LS2048A) || (ver == SVR_LS2044A)) { + (ver == SVR_LS2048A) || (ver == SVR_LS2044A) || + (ver == SVR_LS2081A) || (ver == SVR_LS2041A)) { for (i = 0; i < ARRAY_SIZE(final_map); i++) { switch (final_map[i].phys) { case CONFIG_SYS_PCIE1_PHYS_ADDR: diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc index c7496c0..3ae16ae 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc @@ -5,6 +5,7 @@ SoC overview 3. LS1012A 4. LS1046A 5. LS2088A + 6. LS2081A LS1043A --------- @@ -227,3 +228,13 @@ LS2088A SoC has 3 more similar SoC personalities 3)LS2044A, few difference w.r.t. LS2084A: a) Four 64-bit ARM v8 Cortex-A72 CPUs + +LS2081A +-------- +LS2081A is 40-pin derivative of LS2084A. +So feature-wise it is same as LS2084A. +Refer to LS2084A(LS2088A) section above for details. + +It has one more similar SoC personality +1)LS2041A, few difference w.r.t. LS2081A: + a) Four 64-bit ARM v8 Cortex-A72 CPUs diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index 95c3e2f..9086aba 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -15,6 +15,8 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(LS2084A, LS2084A, 8), CPU_TYPE_ENTRY(LS2048A, LS2048A, 4), CPU_TYPE_ENTRY(LS2044A, LS2044A, 4), + CPU_TYPE_ENTRY(LS2081A, LS2081A, 8), + CPU_TYPE_ENTRY(LS2041A, LS2041A, 4), CPU_TYPE_ENTRY(LS1043A, LS1043A, 4), CPU_TYPE_ENTRY(LS1023A, LS1023A, 2), CPU_TYPE_ENTRY(LS1046A, LS1046A, 4), diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 426fe8e..5f3b19f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -54,6 +54,8 @@ struct cpu_type { #define SVR_LS2084A 0x870910 #define SVR_LS2048A 0x870920 #define SVR_LS2044A 0x870930 +#define SVR_LS2081A 0x870919 +#define SVR_LS2041A 0x870915 #define SVR_DEV_LS2080A 0x8701 diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 1c5a33a..dcd9632 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -170,7 +170,8 @@ static void ls_pcie_setup_atu(struct ls_pcie *pcie) /* Fix the pcie memory map for LS2088A series SoCs */ svr = (svr >> SVR_VAR_PER_SHIFT) & 0xFFFFFE; if (svr == SVR_LS2088A || svr == SVR_LS2084A || - svr == SVR_LS2048A || svr == SVR_LS2044A) { + svr == SVR_LS2048A || svr == SVR_LS2044A || + svr == SVR_LS2081A || svr == SVR_LS2041A) { if (io) io->phys_start = (io->phys_start & (PCIE_PHYS_SIZE - 1)) + @@ -531,7 +532,8 @@ static int ls_pcie_probe(struct udevice *dev) svr = get_svr(); svr = (svr >> SVR_VAR_PER_SHIFT) & 0xFFFFFE; if (svr == SVR_LS2088A || svr == SVR_LS2084A || - svr == SVR_LS2048A || svr == SVR_LS2044A) { + svr == SVR_LS2048A || svr == SVR_LS2044A || + svr == SVR_LS2081A || svr == SVR_LS2041A) { pcie->cfg_res.start = LS2088A_PCIE1_PHYS_ADDR + LS2088A_PCIE_PHYS_SIZE * pcie->idx; pcie->ctrl = pcie->lut + 0x40000; diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h index e3324a5..100a6c9 100644 --- a/drivers/pci/pcie_layerscape.h +++ b/drivers/pci/pcie_layerscape.h @@ -117,6 +117,8 @@ #define SVR_LS2084A 0x870910 #define SVR_LS2048A 0x870920 #define SVR_LS2044A 0x870930 +#define SVR_LS2081A 0x870919 +#define SVR_LS2041A 0x870915 /* LS1021a PCIE space */ #define LS1021_PCIE_SPACE_OFFSET 0x4000000000ULL diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c index d504bbd..88a3ba2 100644 --- a/drivers/pci/pcie_layerscape_fixup.c +++ b/drivers/pci/pcie_layerscape_fixup.c @@ -82,7 +82,8 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie, #ifdef CONFIG_FSL_PCIE_COMPAT /* Compatible with older version of dts node */ svr = (get_svr() >> SVR_VAR_PER_SHIFT) & 0xFFFFFE; if (svr == SVR_LS2088A || svr == SVR_LS2084A || - svr == SVR_LS2048A || svr == SVR_LS2044A) + svr == SVR_LS2048A || svr == SVR_LS2044A || + svr == SVR_LS2081A || svr == SVR_LS2041A) compat = "fsl,ls2088a-pcie"; else compat = CONFIG_FSL_PCIE_COMPAT; @@ -217,7 +218,8 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie) #ifdef CONFIG_FSL_PCIE_COMPAT /* Compatible with older version of dts node */ svr = (get_svr() >> SVR_VAR_PER_SHIFT) & 0xFFFFFE; if (svr == SVR_LS2088A || svr == SVR_LS2084A || - svr == SVR_LS2048A || svr == SVR_LS2044A) + svr == SVR_LS2048A || svr == SVR_LS2044A || + svr == SVR_LS2081A || svr == SVR_LS2041A) compat = "fsl,ls2088a-pcie"; else compat = CONFIG_FSL_PCIE_COMPAT; -- 1.7.4.1

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[U-Boot] [PATCH v3 0/2] rockchip: tinker: set ethaddr in late init
by Jonas Karlman 22 Apr '17

22 Apr '17

Set ethernet mac address in late init for Tinker Board, prevents getting a random mac address each boot. Read mac address from eeprom, first 6 bytes from m24c08@50. Same as /etc/init.d/rockchip.sh on Tinker OS. Changes in v3: - Add i2c_eeprom_{read,write} functions - Use uclass_first_device_err() to find eeprom - Use i2c_eeprom_read() to read eeprom Changes in v2: - Change to use i2c_eeprom device driver Jonas Karlman (2): i2c_eeprom: add read and write functions rockchip: tinker: set ethaddr in late init arch/arm/dts/rk3288-tinker.dts | 7 ++++++ board/rockchip/tinker_rk3288/tinker-rk3288.c | 28 ++++++++++++++++++++++++ configs/tinker-rk3288_defconfig | 3 +++ drivers/misc/i2c_eeprom.c | 32 ++++++++++++++++++++++------ include/i2c_eeprom.h | 24 +++++++++++++++++++++ 5 files changed, 88 insertions(+), 6 deletions(-) -- 2.11.0

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[U-Boot] [PATCH 0/7] board: sama5d2_xplained: improves
by Wenyou Yang 22 Apr '17

22 Apr '17

Update to make SPL work, enable the early debug UART work in SPL, convert MACB to support driver model, and some miscs removals. Wenyou Yang (7): ARM: dts: sama5d2: add clock property for uart1 node ARM: dts: sama5d2_xplained: update for SPL configs: sama5d2_xplained: enable CONFIG_DM_ETH board: sama5d2_xplained: clean up macb init code board: sama5d2_xplained: remove uart1 init board: sama5d2_xplained: remove unnecessary header files configs: sama5d2_xplained: update for SPL arch/arm/dts/at91-sama5d2_xplained.dts | 12 ++++++ arch/arm/dts/sama5d2.dtsi | 22 +++++++++++ board/atmel/sama5d2_xplained/sama5d2_xplained.c | 49 +------------------------ configs/sama5d2_xplained_mmc_defconfig | 10 ++++- configs/sama5d2_xplained_spiflash_defconfig | 9 ++++- include/configs/sama5d2_xplained.h | 19 ++-------- 6 files changed, 56 insertions(+), 65 deletions(-) -- 2.11.0

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[U-Boot] [PATCH] board: sama5d4ek: fix DD2 configuration
by Wenyou Yang 22 Apr '17

22 Apr '17

Fix the DDR2 configuration to make SPL work. Signed-off-by: Wenyou Yang <wenyou.yang(a)atmel.com> --- arch/arm/mach-at91/include/mach/atmel_mpddrc.h | 7 ++++++- board/atmel/sama5d4ek/sama5d4ek.c | 16 +++++++++++++++- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h index f6bcecda38..803501f5cf 100644 --- a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h +++ b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h @@ -186,9 +186,14 @@ int ddr3_init(const unsigned int base, #define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_73 0x6 #define ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_110 0x7 -#define ATMEL_MPDDRC_IO_CALIBR_TZQIO 0x7f +#define ATMEL_MPDDRC_IO_CALIBR_TZQIO (0x7f << 8) #define ATMEL_MPDDRC_IO_CALIBR_TZQIO_(x) (((x) & 0x7f) << 8) +#define ATMEL_MPDDRC_IO_CALIBR_CALCODEP (0xf << 16) +#define ATMEL_MPDDRC_IO_CALIBR_CALCODEP_(x) (((x) & 0xf) << 16) +#define ATMEL_MPDDRC_IO_CALIBR_CALCODEN (0xf << 20) +#define ATMEL_MPDDRC_IO_CALIBR_CALCODEN_(x) (((x) & 0xf) << 20) + #define ATMEL_MPDDRC_IO_CALIBR_EN_CALIB (0x1 << 4) /* Bit field in Read Data Path Register */ diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c index d1b5ff5797..8eec0e88a5 100644 --- a/board/atmel/sama5d4ek/sama5d4ek.c +++ b/board/atmel/sama5d4ek/sama5d4ek.c @@ -349,7 +349,6 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) ATMEL_MPDDRC_CR_NR_ROW_14 | ATMEL_MPDDRC_CR_CAS_DDR_CAS3 | ATMEL_MPDDRC_CR_NB_8BANKS | - ATMEL_MPDDRC_CR_NDQS_DISABLED | ATMEL_MPDDRC_CR_DECOD_INTERLEAVED | ATMEL_MPDDRC_CR_UNAL_SUPPORTED); @@ -379,6 +378,8 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { struct atmel_mpddrc_config ddr2; + const struct atmel_mpddr *mpddr = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC; + u32 tmp; ddr2_conf(&ddr2); @@ -386,6 +387,19 @@ void mem_init(void) at91_periph_clk_enable(ATMEL_ID_MPDDRC); at91_system_clk_enable(AT91_PMC_DDR); + tmp = ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_ONE_CYCLE; + writel(tmp, &mpddr->rd_data_path); + + tmp = readl(&mpddr->io_calibr); + tmp = (tmp & ~(ATMEL_MPDDRC_IO_CALIBR_RDIV | + ATMEL_MPDDRC_IO_CALIBR_TZQIO | + ATMEL_MPDDRC_IO_CALIBR_CALCODEP | + ATMEL_MPDDRC_IO_CALIBR_CALCODEN)) | + ATMEL_MPDDRC_IO_CALIBR_DDR2_RZQ_52 | + ATMEL_MPDDRC_IO_CALIBR_TZQIO_(8) | + ATMEL_MPDDRC_IO_CALIBR_EN_CALIB; + writel(tmp, &mpddr->io_calibr); + /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); } -- 2.11.0

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[U-Boot] [PATCH v2] configs: sama5d3xek: add default config for CMP board
by Wenyou Yang 22 Apr '17

22 Apr '17

The sama5d36ek CMP board is the variant of sama5d3xek board. It is equipped with the low-power DDR2 SDRAM, PMIC ACT8865, and some power rails. The board is mainly used to measure the power consumption. As all those changes are done in at91bootstrap, in U-Boot, only use another device tree file, no code needed to change. As there is additional power consumption when enbling the USB Host and USB device, for the power consumption measurement intention, disable the USB host and device. Signed-off-by: Wenyou Yang <wenyou.yang(a)atmel.com> --- The patch is based on [PATCH v4 0/6] board: sama5d3: convert boards to support DM/DT https://lists.denx.de/pipermail/u-boot/2017-March/284732.html Changes in v2: - Remove the SPL config options. - Convert MACB to support driver model. - Use CONFIG_DEBUG_UART_CLOCK as the input clock for the early debug UART. configs/sama5d36ek_cmp_mmc_defconfig | 51 ++++++++++++++++++++++++++++++ configs/sama5d36ek_cmp_nandflash_defconfig | 51 ++++++++++++++++++++++++++++++ configs/sama5d36ek_cmp_spiflash_defconfig | 51 ++++++++++++++++++++++++++++++ 3 files changed, 153 insertions(+) create mode 100644 configs/sama5d36ek_cmp_mmc_defconfig create mode 100644 configs/sama5d36ek_cmp_nandflash_defconfig create mode 100644 configs/sama5d36ek_cmp_spiflash_defconfig diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig new file mode 100644 index 0000000000..32a21f9294 --- /dev/null +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -0,0 +1,51 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC" +CONFIG_BOOTDELAY=3 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_H32MX=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y +CONFIG_DM_MMC=y +CONFIG_GENERIC_ATMEL_MCI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y +CONFIG_LCD=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig new file mode 100644 index 0000000000..34c4de17b9 --- /dev/null +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -0,0 +1,51 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" +CONFIG_BOOTDELAY=3 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_H32MX=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y +CONFIG_DM_MMC=y +CONFIG_GENERIC_ATMEL_MCI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y +CONFIG_LCD=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig new file mode 100644 index 0000000000..42c31111a1 --- /dev/null +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -0,0 +1,51 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH" +CONFIG_BOOTDELAY=3 +# CONFIG_CONSOLE_MUX is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_H32MX=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y +CONFIG_DM_MMC=y +CONFIG_GENERIC_ATMEL_MCI=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_SPI=y +CONFIG_LCD=y -- 2.11.0

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[U-Boot] [PATCH v3 0/2] net: macb: Add remove callback and align the compatibles
by Wenyou Yang 22 Apr '17

22 Apr '17

Add the remove callback to avoid the failure of mdio_register(), and add the compatibles to align with the kernel. Changes in v3: - Incorporate [PATCH] net: macb: align the compatibles with kernel. - Rebase on the latest commit (db40c1aa1c10) of master branch of u-boot-net. - Add Acked-by tag. Changes in v2: - Rebase on v2017.03. Wenyou Yang (2): net: macb: Add remove callback net: macb: Align the compatibles with kernel drivers/net/macb.c | 49 +++++++++++++++++++++++++++++++++---------------- 1 file changed, 33 insertions(+), 16 deletions(-) -- 2.11.0

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[U-Boot] [PATCH v4 0/3] clk: at91: Enhance the peripheral clock and align compatibles
by Wenyou Yang 22 Apr '17

22 Apr '17

The purpose of the patch set is to enhance the peripheral clock to support both at9sam9x5's and at91rm9200's peripheral clock, and align the clk-master's and at91-pmc's compatibles with kernel. Changes in v4: - Incorporate [PATCH v2] clk: at91: pmc: align the at91 pmc's compatibles. - Rebase on the master branch (22e10be45) of u-boot-dm git tree. - Add Reviewed-by tag. Changes in v3: - Rebase on v2017.03. Changes in v2: - Use an enum with a descriptive name to denote the clock type. - Add the Reviewed-by tags. Wenyou Yang (3): clk: at91: Enhance the peripheral clock clk: at91: Align clk-master compatibles with kernel clk: at91: Align the at91 pmc's compatibles drivers/clk/at91/clk-master.c | 1 + drivers/clk/at91/clk-peripheral.c | 29 ++++++++++++++++++++++++++--- drivers/clk/at91/pmc.c | 6 ++++++ 3 files changed, 33 insertions(+), 3 deletions(-) -- 2.11.0

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[U-Boot] [PATCH v3 0/2] serial: atmel_usart: Fix uart init and add clk support
by Wenyou Yang 22 Apr '17

22 Apr '17

The patches is rework the uart init to fix the early debug not work in SPL, and add the clock support. Changes in v3: - Rebase on the master branch (22e10be45) of u-boot-dm git tree. Changes in v2: - Fix the DBGU clock handling. - Add Reviewed-by tag. Wenyou Yang (2): serial: atmel_usart: Fix early debug not work in SPL serial: atmel_usart: Add clk support drivers/serial/atmel_usart.c | 84 ++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 78 insertions(+), 6 deletions(-) -- 2.11.0

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