April 2017 - U-Boot

[U-Boot] Armada 385: PEX detection pulse width
by Stefan Eichenberger 25 Apr '17

25 Apr '17

Dear Adam, On the mainline u-boot we found a commit which helps to fix a problem regarding PCIe and the Armada 370: http://git.denx.de/?p=u-boot.git;a=commit;h=6bbe0924a799d33c1a8c9de38b60a5e… We currently facing a similar problem with the Armada 385 and PCIe. The problem also appears with two different Atheros chipsets one (AR9280) gets never detected and the other one gets detected most of the time but not always (QCA9882). With Intel modules on the other hand, we can't reproduce the issue. It's the same behaviour as described in the commit above, the link training fails and therefore the link is signalized as down. If a link is successfully established (QCA9882) we don't see any errors during communication. Do you know if we have the same possibility on the Armada 385 to tune the PCI Express pulse width as you proposed it for the Armada 370? Unfortunately the PCIe Phy seems to be quite different to the one from the Armada 370. Best regards Stefan

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[U-Boot] [PATCH] armv8: ls2080ardb: Update default sysclk to 100MHz
by Priyanka Jain 25 Apr '17

25 Apr '17

As per board documentation, default sysclk is 100MHz So, update the default value in ls0280ardb board file to return 100MHz Signed-off-by: Priyanka Jain <priyanka.jain(a)nxp.com> --- board/freescale/ls2080ardb/ls2080ardb.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 1de5058..1bd555b 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -117,7 +117,7 @@ unsigned long get_board_sys_clk(void) return 166666666; } #endif - return 66666666; + return 100000000; } int select_i2c_ch_pca9547(u8 ch) -- 1.7.4.1

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[U-Boot] U-Boot of-platdata issue
by Kever Yang 25 Apr '17

25 Apr '17

Hi Simon, I met two issue when using of-platdata 1. compitable name with '.' I get compile error as below: In file included from include/dt-structs.h:16:0, from spl/dts/dt-platdata.c:3: include/generated/dt-structs.h:26:35: error: expected identifier or ‘(’ before numeric constant struct dtd_rockchip_rk3399_sdhci_5.1 { ^ spl/dts/dt-platdata.c:41:42: error: expected identifier or ‘(’ before numeric constant static struct dtd_rockchip_rk3399_sdhci_5.1 dtv_sdhci_at_fe330000 = { ^ spl/dts/dt-platdata.c:55:15: error: ‘dtv_sdhci_at_fe330000’ undeclared here (not in a function) .platdata = &dtv_sdhci_at_fe330000, ^ make[2]: *** [spl/dts/dt-platdata.o] Error 1 make[1]: *** [spl/u-boot-spl] Error 2 make: *** [__build_one_by_one] Error 2 The dts node starts like this: sdhci: sdhci@fe330000 { u-boot,dm-pre-reloc; compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1"; ... 2. multi compatible name When a dts node have more than one compatible name, which is prefer to use? for example, we have two dwmmc compatible name in rk3399, the tool is using the first one, while the source code using the last one. "drivers/mmc/rockchip_dw_mmc.c" 23 struct rockchip_mmc_plat { 24 #if CONFIG_IS_ENABLED(OF_PLATDATA) 25 struct dtd_rockchip_rk3288_dw_mshc dtplat; 26 #endif 27 struct mmc_config cfg; 28 struct mmc mmc; 29 }; ... dts node sdmmc: dwmmc@fe320000 { compatible = "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc"; ... Thanks, - Kever

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[U-Boot] [PATCH v6 00/16] Add Intel Arria 10 SoC support
by Ley Foon Tan 25 Apr '17

25 Apr '17

This is the 6th version of patchset to adds support for Intel Arria 10 SoC. This is initial patchset enables the basic support for Arria 10 and other features will come after this. There is only one minor change in patch #5. This series is rebased on top of http://git.denx.de/?p=u-boot/u-boot-socfpga.git. v5 -> v6 changes: ----------------- - macros sorted by address Patchset history ---------------- [v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg240052.html [v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg241249.html [v3]: https://www.mail-archive.com/u-boot@lists.denx.de/msg243107.html [v4]: https://www.mail-archive.com/u-boot@lists.denx.de/msg243815.html [v5]: https://www.mail-archive.com/u-boot@lists.denx.de/msg244930.html Ley Foon Tan (16): arm: socfpga: Restructure clock manager driver arm: socfpga: Restructure reset manager driver arm: socfpga: Restructure system manager arm: socfpga: Restructure misc driver arm: socfpga: Add A10 macros arm: socfpga: Add reset driver support for Arria 10 arm: socfpga: Add clock driver for Arria 10 arm: socfpga: Add system manager for Arria 10 arm: socfpga: Add sdram header file for Arria 10 arm: socfpga: Add pinmux for Arria 10 arm: socfpga: Add misc support for Arria 10 arm: dts: Add dts and dtsi for Arria 10 arm: socfpga: Add SPL support for Arria 10 arm: socfpga: Add config and defconfig for Arria 10 arm: socfpga: Add board files for the Arria10 arm: socfpga: Enable build for Arria 10 arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_arria10.dtsi | 869 ++++++++++++++++ arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 38 + .../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi | 481 +++++++++ arch/arm/mach-socfpga/Kconfig | 10 + arch/arm/mach-socfpga/Makefile | 41 +- arch/arm/mach-socfpga/clock_manager.c | 525 +--------- arch/arm/mach-socfpga/clock_manager_arria10.c | 1096 ++++++++++++++++++++ .../{clock_manager.c => clock_manager_gen5.c} | 137 +-- arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +- arch/arm/mach-socfpga/include/mach/clock_manager.h | 317 +----- .../include/mach/clock_manager_arria10.h | 224 ++++ .../mach/{clock_manager.h => clock_manager_gen5.h} | 151 +-- arch/arm/mach-socfpga/include/mach/misc.h | 31 + arch/arm/mach-socfpga/include/mach/pinmux.h | 17 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 50 +- .../include/mach/reset_manager_arria10.h | 146 +++ .../mach-socfpga/include/mach/reset_manager_gen5.h | 49 + arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 380 +++++++ .../arm/mach-socfpga/include/mach/system_manager.h | 202 ++-- .../include/mach/system_manager_arria10.h | 81 ++ .../{system_manager.h => system_manager_gen5.h} | 39 +- arch/arm/mach-socfpga/misc.c | 363 +------ arch/arm/mach-socfpga/misc_arria10.c | 259 +++++ arch/arm/mach-socfpga/{misc.c => misc_gen5.c} | 157 +-- arch/arm/mach-socfpga/pinmux_arria10.c | 96 ++ arch/arm/mach-socfpga/reset_manager.c | 93 +- arch/arm/mach-socfpga/reset_manager_arria10.c | 383 +++++++ .../{reset_manager.c => reset_manager_gen5.c} | 51 +- arch/arm/mach-socfpga/spl.c | 75 +- .../{system_manager.c => system_manager_gen5.c} | 6 +- board/altera/arria10-socdk/Kconfig | 18 + board/altera/arria10-socdk/Makefile | 7 + board/altera/arria10-socdk/socfpga.c | 7 + configs/socfpga_arria10_defconfig | 29 + include/configs/socfpga_arria10_socdk.h | 66 ++ include/configs/socfpga_common.h | 21 +- include/dt-bindings/reset/altr,rst-mgr-a10.h | 110 ++ 38 files changed, 4837 insertions(+), 1797 deletions(-) create mode 100644 arch/arm/dts/socfpga_arria10.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi create mode 100644 arch/arm/mach-socfpga/clock_manager_arria10.c copy arch/arm/mach-socfpga/{clock_manager.c => clock_manager_gen5.c} (85%) create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h copy arch/arm/mach-socfpga/include/mach/{clock_manager.h => clock_manager_gen5.h} (79%) create mode 100644 arch/arm/mach-socfpga/include/mach/misc.h create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_arria10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_arria10.h copy arch/arm/mach-socfpga/include/mach/{system_manager.h => system_manager_gen5.h} (73%) create mode 100644 arch/arm/mach-socfpga/misc_arria10.c copy arch/arm/mach-socfpga/{misc.c => misc_gen5.c} (71%) create mode 100644 arch/arm/mach-socfpga/pinmux_arria10.c create mode 100644 arch/arm/mach-socfpga/reset_manager_arria10.c copy arch/arm/mach-socfpga/{reset_manager.c => reset_manager_gen5.c} (75%) rename arch/arm/mach-socfpga/{system_manager.c => system_manager_gen5.c} (94%) create mode 100644 board/altera/arria10-socdk/Kconfig create mode 100644 board/altera/arria10-socdk/Makefile create mode 100644 board/altera/arria10-socdk/socfpga.c create mode 100644 configs/socfpga_arria10_defconfig create mode 100644 include/configs/socfpga_arria10_socdk.h create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10.h -- 1.8.2.3

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[U-Boot] [PATCH v3 00/19] SPL: extend FIT loading support
by Andre Przywara 24 Apr '17

24 Apr '17

Some minor fixes version of the SPL FIT loading series and the respective patches to enable this feature on 64-bit Allwinner SoCs. There is a new patch (6/19) fixing the SPL_FIT dependencies, above all selecting SPL_OF_LIBFDT when SPL_FIT is enabled. This reduces the number of Kconfig symbols a board has to select for the SPL fit loading from four down to two, which leads to changes in the final patches enabling this feature. Compared to the previous version the SPL FIT loading is now selected in the Kconfig for both 64-bit sunxi SoCs, so there is less burden on each individual defconfig. Also following Olliver's suggestion a symbol in mksunxiboot has been renamed. --- The first five patches introduce the core of the extened SPL FIT loading support, see below for a description. Patch 6 fixes a Kconfig dependency to simplify the usage of this option. Patches 7-10 make some room in the sunxi 64-bit SPL to allow compiling in the FIT loading bits. Patch 11 and 12 let the SPL choose the proper DT from the FIT image. The next two patches add the infrastructure and an actual generator script, so the FIT image is automatically created at build time. Patches 14 and 15 enable the SPL FIT support for Allwinner 64-bit SoCs in general and for the Pine64 and OrangePi PC 2 in particular. The following two patches store a DT file name in the SPL header, so U-Boot can easily pick the proper DT when scanning the FIT image. The idea is that this DT name should stay with the board, ideally on eMMC or SPI flash. So both U-Boot and a firmware update tool could identify a board, updating with compatible firmware while keeping the DT name in place. Ideally a board vendor would once seed this name onto on-board storage like SPI flash. I kept those two patches in, as the work on replacing mksunxiboot with an mkimage extension is not ready yet. Feel free to drop those from the series if this is a problem. The final patch updates the Pine64 README file to document the current way of building U-Boot, which now includes the ARM Trusted Firmware build in its image. I would be delighted if that series can make it into the next release, as this finally enables the fully open source firmware for the 64-bit Allwinner SoCs (including the ATF binary). This series is based on sunxi/master, rebased upon origin/master. Cheers, Andre. ------- Currently the FIT format is not used to its full potential in the SPL: It only loads the first image from the /images node and appends the proper FDT. Some boards and platforms would benefit from loading more images before starting U-Boot proper, notably Allwinner A64 and ARMv8 Rockchip boards, which use an ARM Trusted Firmware (ATF) image to be executed before U-Boot. This series tries to solve this in a board agnostic and generic way: We extend the SPL FIT loading scheme to allow loading multiple images. So apart from loading the image which is referenced by the "firmware" property in the respective configuration node and placing the DTB right behind it, we iterate over all strings in the "loadable" property. Each image referenced there will be loaded to its specified load address. The entry point U-Boot eventually branches to will be taken from the first image to explicitly provide the "entry" property, or, if none of them does so, from the load address of the "firmware" image. This keeps the scheme compatible with the FIT images our Makefile creates automatically at the moment. Apart from the already mentioned ATF scenario this opens up more usage scenarios, of which the commit message of patch 04/11 lists some. The remaining patches prepare ane finally enable this scheme for the 64-bit Allwinner boards. Andre Przywara (18): SPL: FIT: refactor FDT loading SPL: FIT: rework U-Boot image loading SPL: FIT: improve error handling SPL: FIT: factor out spl_load_fit_image() SPL: FIT: allow loading multiple images Kconfig: fix SPL_FIT dependency tools: mksunxiboot: allow larger SPL binaries armv8: SPL: only compile GIC code if needed armv8: fsl: move ccn504 code into FSL Makefile sunxi: A64: move SPL stack to end of SRAM A2 sunxi: SPL: store RAM size in gd sunxi: SPL: add FIT config selector for Pine64 boards Makefile: add rules to generate SPL FIT images sunxi: 64-bit SoCs: introduce FIT generator script sunxi: defconfig: add supported DT list for Pine64 and OrangePi PC 2 sunxi: enable automatic FIT build for 64-bit SoCs sunxi: use SPL header DT name for FIT board matching sunxi: update Pine64 README Siarhei Siamashka (1): sunxi: Store the device tree name in the SPL header Kconfig | 22 ++- Makefile | 20 +++ arch/arm/include/asm/arch-sunxi/spl.h | 19 ++- arch/arm/lib/Makefile | 4 +- board/sunxi/Kconfig | 4 + board/sunxi/README.pine64 | 177 +++++++++++++------- board/sunxi/board.c | 36 +++- board/sunxi/mksunxi_fit_atf.sh | 73 +++++++++ common/spl/spl_fit.c | 298 ++++++++++++++++++++++------------ configs/am335x_evm_defconfig | 1 - configs/evb-rk3399_defconfig | 1 - configs/orangepi_pc2_defconfig | 1 + configs/pine64_plus_defconfig | 1 + doc/uImage.FIT/howto.txt | 21 +++ include/configs/sunxi-common.h | 17 +- scripts/Makefile.spl | 3 +- tools/mksunxiboot.c | 53 +++++- 17 files changed, 562 insertions(+), 189 deletions(-) create mode 100755 board/sunxi/mksunxi_fit_atf.sh -- 2.8.2

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[U-Boot] questions about get_ram_size usage in U-Boot = DDR modification during code execution
by Patrick DELAUNAY 24 Apr '17

24 Apr '17

Hi, Today, I found a issue with get_ram_size() usage in U-Boot, when U-Boot is executed in the tested memory. I have a platform with ARM Cortex and I implemented the dram_init() as it is preconized in ./doc/README.arm-relocation:26 dram_init(): bd pointer is now at this point not accessible, so only detect the real dramsize, and store it in gd->ram_size. Bst detected with get_ram_size(). So my code is #define DDR_BASE 0xC0000000 #define DDR_SIZE 0x40000000 int dram_init(void) { gd->ram_size= get_ram_size(DDR_BASE, DDR_SIZE); } ? I detect 64MB memory on my device Until now I have no issue with this code but after the last week (because myU-Boot size increased a little) the get_ram_size cause execution error. After investigation I found the root issue : before relocation the code of the function dram_init() is location in DDR near of address ower of 2 (get_ram_size address = 0xc001ffd6), this code is modified in DDR by the test before to be executed (and before to be loaded in cache instruction) and that cause crash. I don't see any warning for usage of get_ram_size() on DDR in U-Boot documentation when it is executed in DDR. Today I have no simple way to force location of get_ram_size to avoid alignment with power of 2 address so for my board I just workaround the issue by hard coding the DDR size. Question 1: Anyone already have the same issue with this function ? I could to propose a modified version for get_ram_size to avoid this issue.... By preserving some memory at the beginning of the DDR during the test Question 2: it is a good idea to solve this issue like that ? I can propose directly this patch ? My idea is : ./include/common.h: /* common/memsize.c */ long get_ram_size_with_min (long *, long, long); long get_ram_size (long *, long); ./common/memsize.c: /* * Check memory range for valid RAM. A simple memory test determines * the actually available RAM size between addresses `base' and * `base + maxsize'. */ long get_ram_size(long *base, long maxsize) { get_ram_size_with_min(lbase, maxsize, 0x0); } /* * Check memory range for valid RAM. A simple memory test determines * the actually available RAM size between addresses `base + minsize' and * `base + maxsize' * *base is modified but memory beween base and base + minsize is * preserved (usefull to test the size of DDR when it is used) * minsize need to be a power of 2 */ long get_ram_size_with_min(long *base, long maxsize, long minsize) { ..... for (cnt = (maxsize / sizeof(long)) >> 1; cnt > minsize; cnt >>= 1) { ..... } So the init function become: int dram_init(void) { gd->ram_size= get_ram_size_with_min(DDR_BASE, DDR_SIZE, SZ_1MB); } ? I preserved the first 1MB of DDR, used to execute U-Boot in DDR before relocation. Regards Patrick

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[U-Boot] [PATCH v5 00/14] Add support for Broadcom MIPS SoCs
by Álvaro Fernández Rojas 24 Apr '17

24 Apr '17

This adds support for some of the xDSL Broadcom MIPS SoCs: - BCM6358 - BCM6328 - BCM63268 However, support for other SoCs could be added in the future: - Other BCM63xx - BCM33xx - BCM71xx v5: Improve BMIPS CPU driver v4: Introduce changes suggested by Simon Glass: - Refactor cmd/cpu. - Remove device_probe patch for sysreset. v3: Introduce changes suggested by Simon Glass. v2: Introduce changes suggested by Daniel Schwierzeck. Álvaro Fernández Rojas (14): cmd: cpu: fix NULL cpu feature prints sysreset: add syscon-reboot driver MIPS: allow using generic sysreset drivers serial: add serial driver for BCM6345 cmd: cpu: refactor to ensure devices are probed and improve code style cpu: add CPU driver for Broadcom MIPS SoCs ram: add RAM driver for Broadcom MIPS SoCs MIPS: add initial infrastructure for Broadcom MIPS SoCs MIPS: add support for Broadcom MIPS BCM6358 SoC family MIPS: add BMIPS Huawei HG556a board MIPS: add support for Broadcom MIPS BCM6328 SoC family MIPS: add BMIPS Comtrend AR-5387un board MIPS: add support for Broadcom MIPS BCM63268 SoC family MIPS: add BMIPS Comtrend VR-3032u board arch/mips/Kconfig | 10 + arch/mips/Makefile | 1 + arch/mips/cpu/cpu.c | 2 + arch/mips/cpu/start.S | 5 + arch/mips/dts/Makefile | 3 + arch/mips/dts/brcm,bcm63268.dtsi | 88 +++++++++ arch/mips/dts/brcm,bcm6328.dtsi | 88 +++++++++ arch/mips/dts/brcm,bcm6358.dtsi | 98 ++++++++++ arch/mips/dts/comtrend,ar-5387un.dts | 27 +++ arch/mips/dts/comtrend,vr-3032u.dts | 27 +++ arch/mips/dts/huawei,hg556a.dts | 31 ++++ arch/mips/mach-bmips/Kconfig | 86 +++++++++ arch/mips/mach-bmips/Makefile | 5 + arch/mips/mach-bmips/dram.c | 37 ++++ arch/mips/mach-bmips/include/ioremap.h | 45 +++++ board/comtrend/ar5387un/Kconfig | 12 ++ board/comtrend/ar5387un/MAINTAINERS | 6 + board/comtrend/ar5387un/Makefile | 5 + board/comtrend/ar5387un/ar-5387un.c | 7 + board/comtrend/vr3032u/Kconfig | 12 ++ board/comtrend/vr3032u/MAINTAINERS | 6 + board/comtrend/vr3032u/Makefile | 5 + board/comtrend/vr3032u/vr-3032u.c | 7 + board/huawei/hg556a/Kconfig | 12 ++ board/huawei/hg556a/MAINTAINERS | 6 + board/huawei/hg556a/Makefile | 5 + board/huawei/hg556a/hg556a.c | 7 + cmd/cpu.c | 31 ++-- configs/comtrend_ar5387un_ram_defconfig | 42 +++++ configs/comtrend_vr3032u_ram_defconfig | 42 +++++ configs/huawei_hg556a_ram_defconfig | 45 +++++ drivers/cpu/Makefile | 2 + drivers/cpu/bmips_cpu.c | 310 +++++++++++++++++++++++++++++++ drivers/ram/Makefile | 2 + drivers/ram/bmips_ram.c | 126 +++++++++++++ drivers/serial/Kconfig | 14 ++ drivers/serial/Makefile | 1 + drivers/serial/serial_bcm6345.c | 311 ++++++++++++++++++++++++++++++++ drivers/sysreset/Kconfig | 8 + drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_syscon.c | 76 ++++++++ include/configs/bmips_bcm63268.h | 25 +++ include/configs/bmips_bcm6328.h | 25 +++ include/configs/bmips_bcm6358.h | 30 +++ include/configs/bmips_common.h | 27 +++ include/configs/comtrend_ar5387un.h | 15 ++ include/configs/comtrend_vr3032u.h | 15 ++ include/configs/huawei_hg556a.h | 18 ++ 48 files changed, 1792 insertions(+), 17 deletions(-) create mode 100644 arch/mips/dts/brcm,bcm63268.dtsi create mode 100644 arch/mips/dts/brcm,bcm6328.dtsi create mode 100644 arch/mips/dts/brcm,bcm6358.dtsi create mode 100644 arch/mips/dts/comtrend,ar-5387un.dts create mode 100644 arch/mips/dts/comtrend,vr-3032u.dts create mode 100644 arch/mips/dts/huawei,hg556a.dts create mode 100644 arch/mips/mach-bmips/Kconfig create mode 100644 arch/mips/mach-bmips/Makefile create mode 100644 arch/mips/mach-bmips/dram.c create mode 100644 arch/mips/mach-bmips/include/ioremap.h create mode 100644 board/comtrend/ar5387un/Kconfig create mode 100644 board/comtrend/ar5387un/MAINTAINERS create mode 100644 board/comtrend/ar5387un/Makefile create mode 100644 board/comtrend/ar5387un/ar-5387un.c create mode 100644 board/comtrend/vr3032u/Kconfig create mode 100644 board/comtrend/vr3032u/MAINTAINERS create mode 100644 board/comtrend/vr3032u/Makefile create mode 100644 board/comtrend/vr3032u/vr-3032u.c create mode 100644 board/huawei/hg556a/Kconfig create mode 100644 board/huawei/hg556a/MAINTAINERS create mode 100644 board/huawei/hg556a/Makefile create mode 100644 board/huawei/hg556a/hg556a.c create mode 100644 configs/comtrend_ar5387un_ram_defconfig create mode 100644 configs/comtrend_vr3032u_ram_defconfig create mode 100644 configs/huawei_hg556a_ram_defconfig create mode 100644 drivers/cpu/bmips_cpu.c create mode 100644 drivers/ram/bmips_ram.c create mode 100644 drivers/serial/serial_bcm6345.c create mode 100644 drivers/sysreset/sysreset_syscon.c create mode 100644 include/configs/bmips_bcm63268.h create mode 100644 include/configs/bmips_bcm6328.h create mode 100644 include/configs/bmips_bcm6358.h create mode 100644 include/configs/bmips_common.h create mode 100644 include/configs/comtrend_ar5387un.h create mode 100644 include/configs/comtrend_vr3032u.h create mode 100644 include/configs/huawei_hg556a.h -- 2.1.4

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[U-Boot] [PATCH v5 0/7] OMAP: Move SATA to use block driver model and introduce a new framework for PHY management
by Jean-Jacques Hiblot 24 Apr '17

24 Apr '17

This series adds support for SATA using the driver model on omap platforms. It is based on the work of Mugunthan V N <mugunthanvnm(a)ti.com> in Feb 2016 In the process it adds a new framework to manage PHY devices changes since v4: - added some revievewed-by tags - fixed some nits (ordering, blank lines, ...) changes since v3: * Add a patch to split scsi_scan() as discussed in https://patchwork.ozlabs.org/patch/748210/ * reworked the PHY framework to support multiple port PHY devices (required to be compatible with the device-tree bindings used in linux). Updated the tests as well. * moved away from "generic[_-]phy" to simply use 'phy' instead. Expect for the name of the header file 'generic-phy.h' and for the names of the functions of the API, because it's already used by the Ethernet PHY code. * rebased on top of u-boot-dm/master * removed the patches already taken in u-boot-dm/master changes since v2: * Added unit tests for generic PHY uclass. * Changed the generic phy API to use a 'struct udevice*' to reference the phy device. * Don't modify anymore the root Makefile. * Updated the Kconfig with more details on the PHY framework. * Use a Unique Lincense Identifier (SPDX) * Use omap5-u-boot.dtsi to mark the ocp2scp bus as compatible with "simple-bus" * Split scsi_scan() in 2 for clarity. The function was becoming too long. changes since v1: * changed the way the 'old' sata code is compiled out when DM_SCSI is enabled. * added a new framework for PHY management. * added a new driver for the PIPE3 phy and use it in the dwc_ahci driver. * changed the interface of scsi_detect_dev() and moved the call part_init() out of it. * modified the fix to scsi_scan() in order to call scsi_detect_dev() only once. * the max_lun and max_id parameters are now taken from the device-tree. * Updated the defconfig changes to include the PHY driver and its dependencies. Jean-Jacques Hiblot (7): scsi: dm: split scsi_scan() drivers: phy: add generic PHY framework dm: test: Add tests for the generic PHY uclass drivers: phy: add PIPE3 phy driver dra7: dtsi: mark ocp2scp bus compatible with "simple-bus" drivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata device defconfig: dra7xx_evm: enable CONFIG_BLK and disk driver model for SCSI arch/arm/dts/omap5-u-boot.dtsi | 4 + arch/sandbox/dts/test.dts | 17 ++ common/scsi.c | 102 ++++++----- configs/dra7xx_evm_defconfig | 12 +- configs/dra7xx_hs_evm_defconfig | 11 +- configs/sandbox_defconfig | 2 + configs/sandbox_noblk_defconfig | 2 + configs/sandbox_spl_defconfig | 3 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/block/Kconfig | 10 ++ drivers/block/Makefile | 1 + drivers/block/dwc_ahci.c | 101 +++++++++++ drivers/phy/Kconfig | 62 +++++++ drivers/phy/Makefile | 10 ++ drivers/phy/phy-uclass.c | 139 +++++++++++++++ drivers/phy/sandbox-phy.c | 108 ++++++++++++ drivers/phy/ti-pipe3-phy.c | 373 ++++++++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/generic-phy.h | 224 ++++++++++++++++++++++++ test/dm/Makefile | 1 + test/dm/phy.c | 112 ++++++++++++ 22 files changed, 1243 insertions(+), 55 deletions(-) create mode 100644 drivers/block/dwc_ahci.c create mode 100644 drivers/phy/Kconfig create mode 100644 drivers/phy/Makefile create mode 100644 drivers/phy/phy-uclass.c create mode 100644 drivers/phy/sandbox-phy.c create mode 100644 drivers/phy/ti-pipe3-phy.c create mode 100644 include/generic-phy.h create mode 100644 test/dm/phy.c -- 1.9.1

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[U-Boot] [PATCH 0/1] Allow fsuuid command to be built
by Josua Mayer 24 Apr '17

24 Apr '17

Hi everybody, With the fsuuid command not being listed in Kconfig, and not being whitelisted, it was impossible to be build it. This patch rectifies that situation by adding a Kconfig piece for it. br Josua Mayer Josua Mayer (1): clearfog: enable distro boot code Kconfig | 1 + configs/clearfog_defconfig | 1 + include/configs/clearfog.h | 46 +++++++++++++++++++++++++++++++++++++++++----- 3 files changed, 43 insertions(+), 5 deletions(-) -- 2.12.2

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[U-Boot] [PATCH] sunxi: Fix arm64 fdtfile variable
by Andreas Färber 24 Apr '17

24 Apr '17

Currently $fdtfile is constructed from CONFIG_DEFAULT_TREE, containing the filename. However on arm64 that file is located in an allwinner subdirectory. To avoid the need for users/distros symlinking the .dtb files, prepend the vendor directory for ARM64. This aligns Pine64 with other boards such as Raspberry Pi 3. Signed-off-by: Andreas Färber <afaerber(a)suse.de> --- include/configs/sunxi-common.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 1d475b1..ad4012c 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -476,11 +476,17 @@ extern int soft_i2c_gpio_scl; CONSOLE_STDIN_SETTINGS \ CONSOLE_STDOUT_SETTINGS +#ifdef CONFIG_ARM64 +#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" +#else +#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ DFU_ALT_INFO_RAM \ - "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \ SUNXI_MTDIDS_DEFAULT \ SUNXI_MTDPARTS_DEFAULT \ -- 2.10.2

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