February 2017 - U-Boot

Re: [U-Boot] [RFC PATCH 2/2] efi_loader: gop: add support to use cfb_console's framebuffer
by Icenowy Zheng 08 Feb '17

08 Feb '17

2017年2月8日 10:44于 Bin Meng <bmeng.cn(a)gmail.com>写道： > > On Tue, Feb 7, 2017 at 8:58 PM, Icenowy Zheng <icenowy(a)aosc.xyz> wrote: > > As cfb_console now can expose its GraphicDevice, use it in the > > implementation of EFI GOP protocol, so that the graphics framebuffer can > > be passed to EFI applications. > > > > Signed-off-by: Icenowy Zheng <icenowy(a)aosc.xyz> > > --- > > > > Tested on an Allwinner H3 board with out-of-tree display support. > > > > cmd/bootefi.c | 2 +- > > lib/efi_loader/Makefile | 1 + > > lib/efi_loader/efi_gop.c | 29 ++++++++++++++++++++++++----- > > 3 files changed, 26 insertions(+), 6 deletions(-) > > > > Instead of adding support on legacy CFB console driver, can we use the > DM video driver instead? Many platforms are still using legacy video_hw_init, and may not have the possibility to get ported... > > Regards, > Bin

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[U-Boot] [PATCH 0/2] Add Tinker Board support
by Eddie Cai 08 Feb '17

08 Feb '17

This patch set add support for Asus Tinker board. Eddie Cai (2): rockchip: rename miniarm to tinker board dts: rk3288: change the dmc configuration to LPDDR3 arch/arm/dts/Makefile | 2 +- arch/arm/dts/rk3288-miniarm.dts | 58 ---------------------- arch/arm/dts/rk3288-tinker.dts | 57 +++++++++++++++++++++ .../{rk3288-miniarm.dtsi => rk3288-tinker.dtsi} | 0 arch/arm/mach-rockchip/rk3288-board.c | 2 +- arch/arm/mach-rockchip/rk3288/Kconfig | 8 +-- board/rockchip/miniarm_rk3288/MAINTAINERS | 6 --- .../{miniarm_rk3288 => tinker_rk3288}/Kconfig | 6 +-- board/rockchip/tinker_rk3288/MAINTAINERS | 6 +++ .../{miniarm_rk3288 => tinker_rk3288}/Makefile | 2 +- .../tinker-rk3288.c} | 0 ...rm-rk3288_defconfig => tinker-rk3288_defconfig} | 4 +- doc/README.rockchip | 2 +- .../configs/{miniarm_rk3288.h => tinker_rk3288.h} | 0 14 files changed, 76 insertions(+), 77 deletions(-) delete mode 100644 arch/arm/dts/rk3288-miniarm.dts create mode 100644 arch/arm/dts/rk3288-tinker.dts rename arch/arm/dts/{rk3288-miniarm.dtsi => rk3288-tinker.dtsi} (100%) delete mode 100644 board/rockchip/miniarm_rk3288/MAINTAINERS rename board/rockchip/{miniarm_rk3288 => tinker_rk3288}/Kconfig (64%) create mode 100644 board/rockchip/tinker_rk3288/MAINTAINERS rename board/rockchip/{miniarm_rk3288 => tinker_rk3288}/Makefile (79%) rename board/rockchip/{miniarm_rk3288/miniarm-rk3288.c => tinker_rk3288/tinker-rk3288.c} (100%) rename configs/{miniarm-rk3288_defconfig => tinker-rk3288_defconfig} (95%) rename include/configs/{miniarm_rk3288.h => tinker_rk3288.h} (100%) -- 2.7.4

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[U-Boot] [PATCH 1/3] dts: rk3288: correct sdram setting for miniarm
by Jacob Chen 08 Feb '17

08 Feb '17

miniarm board use lpddr3 Signed-off-by: Jacob Chen <jacob2.chen(a)rock-chips.com> --- arch/arm/dts/rk3288-miniarm.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/rk3288-miniarm.dts b/arch/arm/dts/rk3288-miniarm.dts index 9083028..3dd40e6 100644 --- a/arch/arm/dts/rk3288-miniarm.dts +++ b/arch/arm/dts/rk3288-miniarm.dts @@ -17,14 +17,14 @@ }; &dmc { - rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa - 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7 - 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0 - 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0 - 0x5 0x0>; - rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200 - 0xa60 0x40 0x10 0x0>; - rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; + rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d + 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6 + 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0 + 0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4 + 0x8 0x1f4>; + rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076 + 0x0 0xc3 0x6 0x2>; + rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>; }; -- 1.9.1

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[U-Boot] [U-boot] [PATCH 1/2] rockchip: configs: move env offset to common header
by Jacob Chen 08 Feb '17

08 Feb '17

To reduce redundant code. Signed-off-by: Jacob Chen <jacob2.chen(a)rock-chips.com> --- include/configs/evb_rk3288.h | 14 -------------- include/configs/fennec_rk3288.h | 14 -------------- include/configs/kylin_rk3036.h | 14 -------------- include/configs/miniarm_rk3288.h | 14 -------------- include/configs/popmetal_rk3288.h | 14 -------------- include/configs/rock2.h | 14 -------------- include/configs/rockchip-common.h | 14 ++++++++++++++ 7 files changed, 14 insertions(+), 84 deletions(-) diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h index 554ca0e..6a068bb 100644 --- a/include/configs/evb_rk3288.h +++ b/include/configs/evb_rk3288.h @@ -13,20 +13,6 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM -/* SPL @ 32k for 34k - * u-boot directly after @ 68k for 400k or so - * ENV @ 992k - */ -#define CONFIG_ENV_OFFSET ((1024-32) * 1024) -#else -/* SPL @ 32k for ~36k - * ENV @ 96k - * u-boot @ 128K - */ -#define CONFIG_ENV_OFFSET (96 * 1024) -#endif - #define CONFIG_SYS_WHITE_ON_BLACK #endif diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h index 554ca0e..6a068bb 100644 --- a/include/configs/fennec_rk3288.h +++ b/include/configs/fennec_rk3288.h @@ -13,20 +13,6 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM -/* SPL @ 32k for 34k - * u-boot directly after @ 68k for 400k or so - * ENV @ 992k - */ -#define CONFIG_ENV_OFFSET ((1024-32) * 1024) -#else -/* SPL @ 32k for ~36k - * ENV @ 96k - * u-boot @ 128K - */ -#define CONFIG_ENV_OFFSET (96 * 1024) -#endif - #define CONFIG_SYS_WHITE_ON_BLACK #endif diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h index bc28525..088aced 100644 --- a/include/configs/kylin_rk3036.h +++ b/include/configs/kylin_rk3036.h @@ -20,20 +20,6 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM -/* SPL @ 32k for 34k - * u-boot directly after @ 68k for 400k or so - * ENV @ 992k - */ -#define CONFIG_ENV_OFFSET ((1024-32) * 1024) -#else -/* SPL @ 32k for ~36k - * ENV @ 96k - * u-boot @ 128K - */ -#define CONFIG_ENV_OFFSET (96 * 1024) -#endif - #endif #endif diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h index 5a623ca..860eb40 100644 --- a/include/configs/miniarm_rk3288.h +++ b/include/configs/miniarm_rk3288.h @@ -18,20 +18,6 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM -/* SPL @ 32k for 34k - * u-boot directly after @ 68k for 400k or so - * ENV @ 992k - */ -#define CONFIG_ENV_OFFSET ((1024-32) * 1024) -#else -/* SPL @ 32k for ~36k - * ENV @ 96k - * u-boot @ 128K - */ -#define CONFIG_ENV_OFFSET (96 * 1024) -#endif - #define CONFIG_SYS_WHITE_ON_BLACK #endif diff --git a/include/configs/popmetal_rk3288.h b/include/configs/popmetal_rk3288.h index 554ca0e..6a068bb 100644 --- a/include/configs/popmetal_rk3288.h +++ b/include/configs/popmetal_rk3288.h @@ -13,20 +13,6 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM -/* SPL @ 32k for 34k - * u-boot directly after @ 68k for 400k or so - * ENV @ 992k - */ -#define CONFIG_ENV_OFFSET ((1024-32) * 1024) -#else -/* SPL @ 32k for ~36k - * ENV @ 96k - * u-boot @ 128K - */ -#define CONFIG_ENV_OFFSET (96 * 1024) -#endif - #define CONFIG_SYS_WHITE_ON_BLACK #endif diff --git a/include/configs/rock2.h b/include/configs/rock2.h index b9c2290..ec555dd 100644 --- a/include/configs/rock2.h +++ b/include/configs/rock2.h @@ -17,20 +17,6 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM -/* SPL @ 32k for 34k - * u-boot directly after @ 68k for 400k or so - * ENV @ 992k - */ -#define CONFIG_ENV_OFFSET ((1024-32) * 1024) -#else -/* SPL @ 32k for ~36k - * ENV @ 96k - * u-boot @ 128K - */ -#define CONFIG_ENV_OFFSET (96 * 1024) -#endif - #define CONFIG_SYS_WHITE_ON_BLACK #endif diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index be53e65..eb5f1ef 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -34,4 +34,18 @@ #endif +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else +/* SPL @ 32k for ~36k + * ENV @ 96k + * u-boot @ 128K + */ +#define CONFIG_ENV_OFFSET (96 * 1024) +#endif + #endif /* _ROCKCHIP_COMMON_H_ */ -- 1.9.1

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[U-Boot] [PATCH] rockchip: Correct MAINTAINER entry for chromebook_minnie
by Simon Glass 08 Feb '17

08 Feb '17

This is wrong at present, so genboardscfg.py gives the following warnings: WARNING: no status info for 'chromebook_minnie' WARNING: no maintainers for 'chromebook_minnie' Fix it. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- board/google/veyron/MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/google/veyron/MAINTAINERS b/board/google/veyron/MAINTAINERS index d582cb00e2b..246a3e3b555 100644 --- a/board/google/veyron/MAINTAINERS +++ b/board/google/veyron/MAINTAINERS @@ -12,9 +12,9 @@ F: board/google/veyron/ F: include/configs/veyron.h F: configs/chromebit_mickey_defconfig -CHROMEBIT MINNIE BOARD +CHROMEBOOK MINNIE BOARD M: Simon Glass <sjg(a)chromium.org> S: Maintained F: board/google/veyron/ F: include/configs/veyron.h -F: configs/chromebit_minnie_defconfig +F: configs/chromebook_minnie_defconfig -- 2.11.0.483.g087da7b7c-goog

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[U-Boot] [PATCH 0/2] Update configs for the firefly-rk3288
by Romain Perier 08 Feb '17

08 Feb '17

This set of patches enables SPL_BACK_TO_BROM feature that has been tested on this board. That is preferable if all rk3288-based boards use the same configuration and boot in the same way. Then, it enables ethernet address randomization. Romain Perier (2): Enable ROCKCHIP_SPL_BACK_TO_BROM for firefly-rk3288 board rockchip: Enable ETH address randomization for the firefly-rk3288 configs/firefly-rk3288_defconfig | 3 +++ include/configs/firefly-rk3288.h | 9 +++++++++ 2 files changed, 12 insertions(+) -- 2.9.3

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[U-Boot] Please pull u-boot-x86
by Bin Meng 08 Feb '17

08 Feb '17

Hi Tom, This is U-Boot x86 64-bit preliminary support, on Google Chromebook Link and QEMU targets. The following changes since commit c83a824e62277162ad35f52879b2316902c0eff5: Merge git://git.denx.de/u-boot-fsl-qoriq (2017-02-03 20:33:42 -0500) are available in the git repository at: git://git.denx.de/u-boot-x86.git for you to fetch changes up to 446d4e048ee3b00f7907e15cd02aa404cc714c77: x86: make LOAD_FROM_32_BIT visible for platforms (2017-02-07 13:36:50 +0800) ---------------------------------------------------------------- Andy Shevchenko (2): x86: Synchronize list of x86 subarchitectures (update bootparam.h) x86: make LOAD_FROM_32_BIT visible for platforms Bin Meng (13): x86: qemu: Add missing DECLARE_GLOBAL_DATA_PTR in e820.c x86: Wrap print_ch() with config option x86: spl: Add weak arch_cpu_init_dm() x86: Compile irq.c for 64-bit x86: qemu: Hide arch_cpu_init() and print_cpuinfo() for U-Boot proper x86: qemu: Fix compiler warnings for 64-bit x86: qemu: Set up device tree for SPL x86: qemu: Mark ucode as optional for SPL in u-boot.dtsi tools: binman: Call correct init for Entry_u_boot_spl_with_ucode_ptr tools: binman: Handle optional microcode case in SPL image x86: qemu: Add a text base for 64-bit U-Boot x86: qemu: Add build options for SPL x86: qemu: Add a config for 64-bit U-Boot Simon Glass (62): console: Don't enable CONFIG-CONSOLE_MUX, etc. in SPL spl: spi: Add a debug message if loading fails spl: Makefile: Define SPL_ earlier spl: Allow CPU drivers to be used in SPL spl: Allow PCI drivers to be used in SPL spl: Allow RTC drivers to be used in SPL spl: Allow timer drivers to be used in SPL spl: Allow PCH drivers to be used in SPL spl: Don't create a BSS padding when it is separate x86: Use unsigned long for address in table generation x86: Update mpspec to build on 64-bit machines x86: ivybridge: Declare global data where it is used x86: ivybridge: Add more debugging for failures x86: ivybridge: Fix types for 64-bit compilation x86: dts: Mark serial as needed before relocation x86: fsp: Fix cast for 64-bit compilation x86: lib: Fix types and casts for 64-bit compilation x86: Add Kconfig options to build 64-bit U-Boot x86: Kconfig: Add location options for 16/32-bit init x86: Use X86_16BIT_INIT instead of X86_RESET_VECTOR x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR x86: ivybridge: Allow 32-bit init to move to SPL x86: Add 64-bit start-up code x86: board_f: Update init sequence for 64-bit startup board_f/r: Use static const for the init sequences x86: board_r: Set the global data pointer after relocation x86: Do relocation before clearing BSS x86: Refactor relocation to prepare for 64-bit x86: Add support for 64-bit relocation x86: Tidy up use of size_t in relocation x86: Add an SPL implementation x86: Move the i386 code into its own directory x86: Add cpu code for x86_64 x86: Support global_data on x86_64 x86: Fix up CONFIG_X86_64 check x86: Add a link script for 64-bit x86 x86: Add a link script for SPL x86: Add SPL build rules for start-up code x86: Fix up byteorder.h for x86_64 x86: Drop flag_is_changable() on x86_64 x86: Fix up type sizes for 64-bit x86: ivybridge: Skip SATA init in SPL x86: ivybridge: Provide a dummy SDRAM init for 64-bit x86: Don't try to run the VGA BIOS in 64-bit mode x86: Don't build call64 and setjmp on 64-bit x86: Don't build cpu files which are not supported on 64-bit x86: Don't build 32-bit efi files on x86_64 x86: Don't try to boot Linux from SPL x86: Drop interrupt support in 64-bit mode x86: Support jumping from SPL to U-Boot x86: Move pirq_routing_table to global_data x86: Move turbo_state to global_data x86: Change irq_already_routed to a local variable x86: Move call64 to the i386 directory x86: Move setjmp to the i386 directory x86: Add a dummy setjmp implementation for x86_64 x86: link: Add a text base for 64-bit U-Boot x86: link: Add SPL declarations to the binman image x86: link: Set up device tree for SPL x86: link: Add build options for SPL x86: Update compile/link flags to support 64-bit U-Boot x86: link: Add a config for 64-bit U-Boot Makefile | 7 +- arch/x86/Kconfig | 94 +++++++++++++++++++ arch/x86/Makefile | 9 +- arch/x86/config.mk | 30 +++++- arch/x86/cpu/Makefile | 24 ++++- arch/x86/cpu/config.mk | 8 +- arch/x86/cpu/cpu.c | 504 ------------------------------------------------------------------------------------------------- arch/x86/cpu/i386/Makefile | 9 ++ arch/x86/cpu/{ => i386}/call64.S | 3 + arch/x86/cpu/i386/cpu.c | 598 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/x86/cpu/{interrupts.c => i386/interrupt.c} | 6 +- arch/x86/cpu/{ => i386}/setjmp.S | 0 arch/x86/cpu/intel_common/Makefile | 10 +- arch/x86/cpu/irq.c | 20 ++-- arch/x86/cpu/ivybridge/Makefile | 9 +- arch/x86/cpu/ivybridge/bd82x6x.c | 2 + arch/x86/cpu/ivybridge/cpu.c | 4 +- arch/x86/cpu/ivybridge/lpc.c | 2 + arch/x86/cpu/ivybridge/model_206ax.c | 2 + arch/x86/cpu/ivybridge/northbridge.c | 2 + arch/x86/cpu/ivybridge/sata.c | 4 +- arch/x86/cpu/ivybridge/sdram.c | 37 ++++++-- arch/x86/cpu/ivybridge/sdram_nop.c | 18 ++++ arch/x86/cpu/qemu/e820.c | 2 + arch/x86/cpu/qemu/qemu.c | 7 +- arch/x86/cpu/start.S | 12 +-- arch/x86/cpu/start64.S | 28 ++++++ arch/x86/cpu/turbo.c | 8 +- arch/x86/cpu/u-boot-64.lds | 76 +++++++++++++++ arch/x86/cpu/u-boot-spl.lds | 74 +++++++++++++++ arch/x86/cpu/u-boot.lds | 2 +- arch/x86/cpu/x86_64/Makefile | 6 ++ arch/x86/cpu/x86_64/cpu.c | 73 +++++++++++++++ arch/x86/cpu/x86_64/interrupts.c | 29 ++++++ arch/x86/cpu/x86_64/setjmp.c | 20 ++++ arch/x86/dts/chromebook_link.dts | 15 ++- arch/x86/dts/emulation-u-boot.dtsi | 6 ++ arch/x86/dts/qemu-x86_i440fx.dts | 4 + arch/x86/dts/qemu-x86_q35.dts | 4 + arch/x86/dts/serial.dtsi | 1 + arch/x86/dts/u-boot.dtsi | 19 ++++ arch/x86/include/asm/acpi_table.h | 2 +- arch/x86/include/asm/bootparam.h | 3 +- arch/x86/include/asm/byteorder.h | 17 ++-- arch/x86/include/asm/cpu.h | 12 +++ arch/x86/include/asm/fsp/fsp_hob.h | 4 +- arch/x86/include/asm/global_data.h | 9 +- arch/x86/include/asm/mp.h | 3 + arch/x86/include/asm/mpspec.h | 10 +- arch/x86/include/asm/posix_types.h | 5 + arch/x86/include/asm/sfi.h | 2 +- arch/x86/include/asm/spl.h | 8 ++ arch/x86/include/asm/tables.h | 2 +- arch/x86/include/asm/types.h | 5 + arch/x86/lib/Makefile | 11 +++ arch/x86/lib/acpi_table.c | 4 +- arch/x86/lib/bios.c | 4 +- arch/x86/lib/bootm.c | 7 ++ arch/x86/lib/init_helpers.c | 2 +- arch/x86/lib/interrupts.c | 5 + arch/x86/lib/mpspec.c | 14 +-- arch/x86/lib/pinctrl_ich6.c | 2 +- arch/x86/lib/pirq_routing.c | 14 +-- arch/x86/lib/relocate.c | 100 +++++++++++++++----- arch/x86/lib/sfi.c | 6 +- arch/x86/lib/spl.c | 159 +++++++++++++++++++++++++++++++ arch/x86/lib/tables.c | 11 +-- arch/x86/lib/zimage.c | 2 +- board/emulation/Kconfig | 7 ++ board/emulation/qemu-x86/Kconfig | 6 +- board/emulation/qemu-x86/MAINTAINERS | 7 ++ board/google/Kconfig | 7 ++ board/google/chromebook_link/Kconfig | 5 +- board/google/chromebook_link/MAINTAINERS | 7 ++ common/board_f.c | 16 ++-- common/board_r.c | 12 ++- common/console.c | 30 +++--- common/iomux.c | 4 +- common/spl/Kconfig | 47 ++++++++++ common/spl/spl_spi.c | 5 +- common/usb_kbd.c | 6 +- configs/chromebook_link64_defconfig | 89 ++++++++++++++++++ configs/chromebook_link_defconfig | 4 +- configs/qemu-x86_64_defconfig | 80 ++++++++++++++++ drivers/Makefile | 5 + drivers/misc/qfw.c | 4 +- drivers/pci/pci_rom.c | 2 +- drivers/video/ivybridge_igd.c | 6 +- include/configs/chromebook_link.h | 9 ++ include/configs/qemu-x86.h | 9 ++ include/smbios.h | 4 +- lib/smbios.c | 22 ++--- scripts/Makefile.spl | 18 +++- tools/binman/etype/u_boot_spl_with_ucode_ptr.py | 2 +- tools/binman/etype/u_boot_ucode.py | 6 ++ 95 files changed, 1929 insertions(+), 701 deletions(-) create mode 100644 arch/x86/cpu/i386/Makefile rename arch/x86/cpu/{ => i386}/call64.S (98%) create mode 100644 arch/x86/cpu/i386/cpu.c rename arch/x86/cpu/{interrupts.c => i386/interrupt.c} (99%) rename arch/x86/cpu/{ => i386}/setjmp.S (100%) create mode 100644 arch/x86/cpu/ivybridge/sdram_nop.c create mode 100644 arch/x86/cpu/start64.S create mode 100644 arch/x86/cpu/u-boot-64.lds create mode 100644 arch/x86/cpu/u-boot-spl.lds create mode 100644 arch/x86/cpu/x86_64/Makefile create mode 100644 arch/x86/cpu/x86_64/cpu.c create mode 100644 arch/x86/cpu/x86_64/interrupts.c create mode 100644 arch/x86/cpu/x86_64/setjmp.c create mode 100644 arch/x86/include/asm/spl.h create mode 100644 arch/x86/lib/spl.c create mode 100644 configs/chromebook_link64_defconfig create mode 100644 configs/qemu-x86_64_defconfig Regards, Bin

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Re: [U-Boot] [PATCH] DTS: Enable top USB port on CEI-TK1-SOM
by Peter.Chubb＠data61.csiro.au 08 Feb '17

08 Feb '17

>>>>> "Allen" == Allen Martin <amartin(a)nvidia.com> writes: Allen> On Tue, Feb 07, 2017 at 01:57:47PM +1100, Peter Chubb wrote: >> From: Peter Chubb <Peter.Chubb(a)data61.csiro.au> >> >> + usb@7d004000 { >> + status = "okay"; >> + }; >> + >> + usb-phy@7d004000 { >> + status = "okay"; >> + }; Allen> Shouldn't these have a vbus-gpio and vbus-supply? U-Boot seems to work OK without -- I can see storage devices plugged into the port. -- Dr Peter Chubb Tel: +61 2 9490 5852 http://ts.data61.csiro.au/ Trustworthy Systems Group Data61 (formerly NICTA)

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[U-Boot] [PATCH] board: freescale: ls2080a: Intergrate and enable PPA on LS2080A
by Abhimanyu Saini 07 Feb '17

07 Feb '17

Integrate and enable PPA on LS2080ARDB, LS2080AQDS, LS2088ARDB and LS2088AQDS boards. Signed-off-by: Abhimanyu Saini <abhimanyu.saini(a)nxp.com> --- board/freescale/ls2080aqds/ls2080aqds.c | 6 ++++++ board/freescale/ls2080ardb/ls2080ardb.c | 6 ++++++ include/configs/ls2080aqds.h | 10 ++++++++++ include/configs/ls2080ardb.h | 10 ++++++++++ 4 files changed, 32 insertions(+) diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 73a61fd..811b9a6 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -19,6 +19,9 @@ #include <asm/arch/soc.h> #include <hwconfig.h> #include <fsl_sec.h> +#ifdef CONFIG_FSL_LS_PPA +#include <asm/arch/ppa.h> +#endif #include "../common/qixis.h" #include "ls2080aqds_qixis.h" @@ -223,6 +226,9 @@ int board_init(void) #endif select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); rtc_enable_32khz_output(); +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif return 0; } diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 02954ef..339fa78 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -19,6 +19,9 @@ #include <i2c.h> #include <asm/arch/soc.h> #include <fsl_sec.h> +#ifdef CONFIG_FSL_LS_PPA +#include <asm/arch/ppa.h> +#endif #include "../common/qixis.h" #include "ls2080ardb_qixis.h" @@ -184,6 +187,9 @@ int board_init(void) /* invert AQR405 IRQ pins polarity */ out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); #endif +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif return 0; } diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 838568f..5573e94 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -14,6 +14,16 @@ unsigned long get_board_sys_clk(void); unsigned long get_board_ddr_clk(void); #endif +#define CONFIG_FSL_LS_PPA +#if defined(CONFIG_FSL_LS_PPA) +#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT + +#define CONFIG_SYS_LS_PPA_FW_IN_XIP +#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP +#define CONFIG_SYS_LS_PPA_FW_ADDR 0x580a00000 +#endif +#endif + #define CONFIG_SYS_FSL_CLK #ifdef CONFIG_FSL_QSPI diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 31df781..d411a4f 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -12,6 +12,16 @@ #undef CONFIG_CONS_INDEX #define CONFIG_CONS_INDEX 2 +#define CONFIG_FSL_LS_PPA +#if defined(CONFIG_FSL_LS_PPA) +#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT + +#define CONFIG_SYS_LS_PPA_FW_IN_XIP +#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP +#define CONFIG_SYS_LS_PPA_FW_ADDR 0x580a00000 +#endif +#endif + #define I2C_MUX_CH_VOL_MONITOR 0xa #define I2C_VOL_MONITOR_ADDR 0x38 #define CONFIG_VOL_MONITOR_IR36021_READ -- 1.9.1

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[U-Boot] [PATCH 1/2] defconfig: Add a config for AM335x High Security EVM with UART Boot support
by Andrew F. Davis 07 Feb '17

07 Feb '17

Add a new defconfig file for the AM335x High Security EVM. This config is specific for the case of UART booting Signed-off-by: Andrew F. Davis <afd(a)ti.com> --- configs/am335x_hs_evm_uart_defconfig | 69 ++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 configs/am335x_hs_evm_uart_defconfig diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig new file mode 100644 index 0000000000..26ea3e3aab --- /dev/null +++ b/configs/am335x_hs_evm_uart_defconfig @@ -0,0 +1,69 @@ +CONFIG_ARM=y +CONFIG_AM33XX=y +CONFIG_TI_SECURE_DEVICE=y +# CONFIG_SPL_EXT_SUPPORT is not set +# CONFIG_SPL_FAT_SUPPORT is not set +# CONFIG_SPL_LIBDISK_SUPPORT is not set +# CONFIG_SPL_MMC_SUPPORT is not set +# CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_TARGET_AM335X_EVM=y +CONFIG_ISW_ENTRY_ADDR=0x40301750 +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_IMAGE_POST_PROCESS=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +CONFIG_SYS_EXTRA_OPTIONS="NAND" +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_VERSION_VARIABLE=y +CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_MUSB_NEW_SUPPORT=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_ASKENV=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_OF_LIST="am335x-evm" +# CONFIG_BLK is not set +CONFIG_DFU_MMC=y +CONFIG_DFU_NAND=y +CONFIG_DFU_RAM=y +CONFIG_DM_I2C=y +CONFIG_MISC=y +CONFIG_DM_MMC=y +# CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DM_ETH=y +CONFIG_SYS_NS16550=y +CONFIG_TIMER=y +CONFIG_OMAP_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_MUSB_TI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Texas Instruments" +CONFIG_G_DNL_VENDOR_NUM=0x0451 +CONFIG_G_DNL_PRODUCT_NUM=0xd022 +CONFIG_USE_TINY_PRINTF=y +CONFIG_RSA=y +CONFIG_SPL_OF_LIBFDT=y -- 2.11.0

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