February 2017 - U-Boot

[U-Boot] [PATCH] arm: omap5: Fix generation of reserved-memory DT node
by Andrew F. Davis 17 Feb '17

17 Feb '17

When the node 'reserved-memory' is not defined in the DT we fail to add needed properties. We also fail to move 'offs' to point to the new node. Fix these here. Signed-off-by: Andrew F. Davis <afd(a)ti.com> --- arch/arm/mach-omap2/omap5/fdt.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/omap5/fdt.c b/arch/arm/mach-omap2/omap5/fdt.c index 900f0010f6..7a3a8db517 100644 --- a/arch/arm/mach-omap2/omap5/fdt.c +++ b/arch/arm/mach-omap2/omap5/fdt.c @@ -161,6 +161,7 @@ static int ft_hs_fixup_dram(void *fdt, bd_t *bd) u32 sec_mem_start = CONFIG_TI_SECURE_EMIF_REGION_START; u32 sec_mem_size = CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE; fdt64_t temp[2]; + fdt32_t two; /* If start address is zero, place at end of DRAM */ if (0 == sec_mem_start) @@ -181,7 +182,7 @@ static int ft_hs_fixup_dram(void *fdt, bd_t *bd) debug("Node %s not found\n", path); path = "/"; subpath = "reserved-memory"; - fdt_path_offset(fdt, path); + offs = fdt_path_offset(fdt, path); offs = fdt_add_subnode(fdt, offs, subpath); if (offs < 0) { printf("Could not create %s%s node.\n", path, subpath); @@ -189,6 +190,10 @@ static int ft_hs_fixup_dram(void *fdt, bd_t *bd) } path = "/reserved-memory"; offs = fdt_path_offset(fdt, path); + two = cpu_to_fdt32(2); + fdt_setprop(fdt, offs, "#address-cells", &two, sizeof(two)); + fdt_setprop(fdt, offs, "#size-cells", &two, sizeof(two)); + fdt_setprop(fdt, offs, "ranges", NULL, 0); } subpath = "secure_reserved"; -- 2.11.0

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[U-Boot] [PATCH] fsl_i2c.c: Fix warning on gcc-6.x
by Tom Rini 17 Feb '17

17 Feb '17

With gcc-6.x we see: drivers/i2c/fsl_i2c.c:86:3: warning: ‘fsl_i2c_speed_map’ defined but not used [-Wunused-const-variable=] The easy way to fix this is that since we only use fsl_i2c_speed_map at all on __M68K__ move the existing guards around slightly. Reported-by: Thomas Schaefer <Thomas.Schaefer(a)kontron.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- drivers/i2c/fsl_i2c.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index e9fbf828f34b..a1406baa87b2 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -53,6 +53,7 @@ static const struct fsl_i2c_base *i2c_base[4] = { /* I2C speed map for a DFSR value of 1 */ +#ifdef __M68K__ /* * Map I2C frequency dividers to FDR and DFSR values * @@ -84,7 +85,6 @@ static const struct { unsigned short divider; u8 fdr; } fsl_i2c_speed_map[] = { -#ifdef __M68K__ {20, 32}, {22, 33}, {24, 34}, {26, 35}, {28, 0}, {28, 36}, {30, 1}, {32, 37}, {34, 2}, {36, 38}, {40, 3}, {40, 39}, @@ -102,8 +102,8 @@ static const struct { {1536, 61}, {1792, 62}, {1920, 27}, {2048, 63}, {2304, 28}, {2560, 29}, {3072, 30}, {3840, 31}, {-1, 31} -#endif }; +#endif /** * Set the I2C bus speed for a given I2C device -- 1.9.1

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[U-Boot] Please pull u-boot-marvell/master
by Stefan Roese 17 Feb '17

17 Feb '17

Hi Tom, please pull the following fixes for MVEBU. Currently, I've not planned to send anything else for the upcoming release. Thanks, Stefan The following changes since commit 85d0bea153c76f4a3912b5683222885bfd37c769: Prepare v2017.03-rc2 (2017-02-13 11:47:45 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-marvell.git for you to fetch changes up to 93f48779356ced7336a5045299b4920f01d6e599: tools: kwboot: don't adjust destaddr when patching the image (2017-02-17 10:15:56 +0100) ---------------------------------------------------------------- Chris Packham (1): tools: kwboot: don't adjust destaddr when patching the image Mario Six (1): tools: kwbimage: Fix unchecked return value and fd leak tools/kwbimage.c | 13 +++++++++++-- tools/kwboot.c | 8 -------- 2 files changed, 11 insertions(+), 10 deletions(-)

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[U-Boot] Veyron-speedy u-boot
by Vagrant Cascadian 17 Feb '17

17 Feb '17

> I'm very glad that it's possible to chainload and the output comes out > on the laptop screen Really excited to hear about your work on this! I'd be happy to test it on a veryon-speedy system I have available; Please feel free to CC me with updates. live well, vagrant

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[U-Boot] ARMv7 EFI loader broken?
by Michal Suchanek 17 Feb '17

17 Feb '17

Hello, I tired to build u-boot master for Snow board, install grub, chainload grub. In short, it fails. First, u-boot searches for EFI loader in ${distro_bootpart} which defaults to unset and is interpreted as 1. grub wants the partition it installs to to have the EFI System GUID. So to boot you need to set the first partition to EFI System GUID and install grub there. Further, grub installs as EFI/debian/grubarm.efi while u-boot searches for /efi/boot/bootarm.efi. This is not even a variable - it's hardcoded in several places in the default efi boot script. Given that saving environment does not work on Snow changing the environment requires rebuild either way. Or change what is on the disk. Finally, when grub loads I get this: snow # setenv distro_bootpart 4 snow # boot switch to partitions #0, OK mmc1 is current device Scanning mmc 1:4... Found EFI removebla media binary efi/boot/bootarm.efi reading efi/boot/bootarm.efi 88576 bytes read in 42 ms (2 MiB/s) libfdt fdt_check_header(): FDT_ERR_BADMAGIC ## Starting EFI application at 42000000 ... Scanning disks on usb... Scanning disks on mmc... MMC Device 2 not found MMC Device 3 not found Found 6 disks ←[?25h←[?25l←[?25l And that is all. No reaction to keypresses. Any idea what is wrong in this case? It seems like grub starts and then fails to do whatever it is supposed to do. Is there some special support in grub needed? I would expect that would be against the point of having an EFI emulation, right? Thanks Michal

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[U-Boot] [PATCH v1 1/3] x86: Introduce INTEL_MID quirk option
by Andy Shevchenko 17 Feb '17

17 Feb '17

Intel Mobile Internet Device (MID) platforms have special treatment in some cases, such as CPU enumeration or boot parameters configuration. Here we introduce specific quirk option for such cases. It is supposed to be selected by Intel MID platform boards, for example, Intel Edison. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- arch/x86/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5f9597b230..ba57bcfca4 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -80,6 +80,10 @@ config VENDOR_INTEL endchoice +# subarchitectures-specific options below +config INTEL_MID + bool + # board-specific options below source "board/advantech/Kconfig" source "board/congatec/Kconfig" -- 2.11.0

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[U-Boot] [PATCH v2 00/10] zynq: clk: Move zynq platform to clock framework
by stefan.herbrechtsmeier＠weidmueller.com 17 Feb '17

17 Feb '17

From: Stefan Herbrechtsmeier <stefan.herbrechtsmeier(a)weidmueller.com> The old platform clock driver use a dynamic array which is filled at every boot with static clock tree information and unused clock rates. This needs much memory and complicates the strip down for the SPL. The new clock framework driver contains the tree information in functions and reads clock rates on demand. This series depends on patch 'mmc: sdhci: Distinguish between base clock and maximum peripheral frequency' Changes in v2: - Rebase - Group ifndef CONFIG_SPL_BUILD inside switch case of zynq_clk_get_register() - Put same switch case code together in zynq_clk_get_*_pll() - Replace ZYNQ_CLKMUX_SEL_* by there numbers - Return error code and add debug message for unknown gem eimo rx clock source - Correct zynq_clk_calc_peripheral_two_divs() parameter indetation - Add support for unknown clock rate to soc_clk_dump() - Return a error and print a debug message if a gem emio rx clock source is unknown - Correct the checks for valid clock objects - Add patch to determine base clock frequency of zynq mmc driver via clock framework - Add patch to add fdt max-frequency support to zynq mmc driver Stefan Herbrechtsmeier (10): net: zynq: Don't overwrite gem_rclk_ctrl with default value net: zynq: Add clk framework support to zynq ethernet driver zynq: Add clk framework support to zynq timer zynq: Move static clock names into separate array zynq: Remove zynq_clk_get_name function clk: zynq: Add zynq clock framework driver zynq: Move zynq to clock framework clk: zynq: Add optional ethernet emio clock source support mmc: zynq: Determine base clock frequency via clock framework mmc: zynq: Add fdt max-frequency support arch/arm/Kconfig | 3 + arch/arm/dts/zynq-7000.dtsi | 2 + arch/arm/include/asm/arch-zynqmp/sys_proto.h | 7 - arch/arm/mach-zynq/clk.c | 690 +++------------------------ arch/arm/mach-zynq/cpu.c | 1 - arch/arm/mach-zynq/include/mach/clk.h | 6 - arch/arm/mach-zynq/include/mach/sys_proto.h | 1 - arch/arm/mach-zynq/slcr.c | 29 -- arch/arm/mach-zynq/timer.c | 23 + drivers/clk/Kconfig | 8 + drivers/clk/Makefile | 1 + drivers/clk/clk_zynq.c | 488 +++++++++++++++++++ drivers/mmc/zynq_sdhci.c | 33 +- drivers/net/zynq_gem.c | 28 +- drivers/serial/serial_zynq.c | 6 +- include/configs/topic_miami.h | 2 - include/configs/zynq_zybo.h | 3 - scripts/config_whitelist.txt | 1 - 18 files changed, 634 insertions(+), 698 deletions(-) create mode 100644 drivers/clk/clk_zynq.c -- 2.7.4 Kommanditgesellschaft - Sitz: Detmold - Amtsgericht Lemgo HRA 2790 - Komplementärin: Weidmüller Interface Führungsgesellschaft mbH - Sitz: Detmold - Amtsgericht Lemgo HRB 3924; Geschäftsführer: José Carlos Álvarez Tobar, Elke Eckstein, Dr. Peter Köhler, Jörg Timmermann; USt-ID-Nr. DE124599660

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[U-Boot] [PATCH] tools: kwbimage: Fix unchecked return value and fd leak
by Mario Six 17 Feb '17

17 Feb '17

The return value of fstat was not checked in kwbimage, and in the case of an error, the already open file was not closed. Fix both errors. Reported-by: Coverity (CID: 155971) Reported-by: Coverity (CID: 155969) Signed-off-by: Mario Six <mario.six(a)gdsys.cc> --- tools/kwbimage.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/tools/kwbimage.c b/tools/kwbimage.c index 93797c99da..2c637c7446 100644 --- a/tools/kwbimage.c +++ b/tools/kwbimage.c @@ -992,7 +992,11 @@ int add_binary_header_v1(uint8_t *cur) return -1; } - fstat(fileno(bin), &s); + if (fstat(fileno(bin), &s)) { + fprintf(stderr, "Cannot stat binary file %s\n", + binarye->binary.file); + goto err_close; + } binhdrsz = sizeof(struct opt_hdr_v1) + (binarye->binary.nargs + 2) * sizeof(uint32_t) + @@ -1022,7 +1026,7 @@ int add_binary_header_v1(uint8_t *cur) fprintf(stderr, "Could not read binary image %s\n", binarye->binary.file); - return -1; + goto err_close; } fclose(bin); @@ -1040,6 +1044,11 @@ int add_binary_header_v1(uint8_t *cur) cur += sizeof(uint32_t); return 0; + +err_close: + fclose(bin); + + return -1; } #if defined(CONFIG_KWB_SECURE) -- 2.11.0

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[U-Boot] db-88f6820-amc board fails to boot with latest u-boot master
by Chris Packham 17 Feb '17

17 Feb '17

Hi, I just tried UART booting db-88f6820-amc with the latest u-boot master and it fails to reach the normal u-boot prompt. I don't know if this affects the normal SPI booting. I've bisected down to commit 94084eea3bd3 ("tools: kwbimage: Fix dest addr"). Reverting this gets things working again, but I'm guessing it'll break secure boot. Should the size adjustment be conditional on something? Does db-88f6820-amc_defconfig need something that the other armada configs have enabled? Thanks, Chris

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[U-Boot] [PATCH] dm: rtc: Add 16-bit read/write support
by Bin Meng 17 Feb '17

17 Feb '17

At present there are only 8-bit and 32-bit read/write routines in the rtc uclass driver. This adds the 16-bit support. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- drivers/rtc/rtc-uclass.c | 30 ++++++++++++++++++++++++++++++ include/rtc.h | 20 ++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c index 300e9b3..89312c5 100644 --- a/drivers/rtc/rtc-uclass.c +++ b/drivers/rtc/rtc-uclass.c @@ -60,6 +60,36 @@ int rtc_write8(struct udevice *dev, unsigned int reg, int val) return ops->write8(dev, reg, val); } +int rtc_read16(struct udevice *dev, unsigned int reg, u16 *valuep) +{ + u16 value = 0; + int ret; + int i; + + for (i = 0; i < sizeof(value); i++) { + ret = rtc_read8(dev, reg + i); + if (ret < 0) + return ret; + value |= ret << (i << 3); + } + + *valuep = value; + return 0; +} + +int rtc_write16(struct udevice *dev, unsigned int reg, u16 value) +{ + int i, ret; + + for (i = 0; i < sizeof(value); i++) { + ret = rtc_write8(dev, reg + i, (value >> (i << 3)) & 0xff); + if (ret) + return ret; + } + + return 0; +} + int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep) { u32 value = 0; diff --git a/include/rtc.h b/include/rtc.h index 69fe8d4..49142b6 100644 --- a/include/rtc.h +++ b/include/rtc.h @@ -128,6 +128,26 @@ int rtc_read8(struct udevice *dev, unsigned int reg); int rtc_write8(struct udevice *dev, unsigned int reg, int val); /** + * rtc_read16() - Read a 16-bit value from the RTC + * + * @dev: Device to read from + * @reg: Offset to start reading from + * @valuep: Place to put the value that is read + * @return 0 if OK, -ve on error + */ +int rtc_read16(struct udevice *dev, unsigned int reg, u16 *valuep); + +/** + * rtc_write16() - Write a 16-bit value to the RTC + * + * @dev: Device to write to + * @reg: Register to start writing to + * @value: Value to write + * @return 0 if OK, -ve on error + */ +int rtc_write16(struct udevice *dev, unsigned int reg, u16 value); + +/** * rtc_read32() - Read a 32-bit value from the RTC * * @dev: Device to read from -- 2.9.2

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