March 2016 - U-Boot

[U-Boot] [PATCH v3 0/4] usb: Reduce USB scanning time
by Stefan Roese 15 Mar '16

15 Mar '16

My current x86 platform (Bay Trail, not in mainline yet) has a quite complex USB infrastructure with many USB hubs. Here the USB scan takes an incredible huge amount of time: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 28.415 seconds This is of course not acceptable on platforms, where USB needs to get scanned at every bootup. As this increases the bootup time of this device by nearly 30 seconds! This patch series greatly reduces the USB scanning time. This is done by multiple means: - Remove or reduce delays and timeouts - Remove a 2nd reset of the USB hubs - Change USB port timeout handling and introduce quasi parallel USB port scanning As a result, the USB scanning time is greatly reduced: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 1.822 seconds As you can see, the time is reduced from 28.4 to 1.8 seconds! Please find more details to the changes in the patch description. Testing and comments welcome! Thanks, Stefan Changes in v3: - Changed small timeout from 10ms to 20ms as this results in a much faster USB scanning time (10ms too small and 20ms enough in many cases) - Introduced scanning list containing all USB devices of one USB controller that need to get scanned - Don't delay in usb_hub_power_on(). Instead skip querying these devices until the delay time is reached. Changes in v2: - Add Acked-by / Tested-by from Hans and Stephen - Make this change unconditional - Add Acked-by / Tested-by from Hans and Stephen - Make this change unconditional - Add Tested-by from Stephen - Remove static USB port configuration patch (for now) Stefan Roese (4): usb: legacy_hub_port_reset(): Speedup hub reset handling usb: Remove 200 ms delay in usb_hub_port_connect_change() usb: Don't reset the USB hub a 2nd time usb: Change power-on / scanning timeout handling common/usb.c | 13 +-- common/usb_hub.c | 301 +++++++++++++++++++++++++++++++++++++------------------ include/usb.h | 3 + 3 files changed, 208 insertions(+), 109 deletions(-) -- 2.7.3

3 16

[U-Boot] [PATCH 1/2] sunxi: Sync dts files with the upstream kernel
by Hans de Goede 15 Mar '16

15 Mar '16

Sync dts files with the upstream kernel including changes queued for 4.6: https://git.kernel.org/cgit/linux/kernel/git/mripard/linux.git/commit/?h=su… Note this adds a number of new unused board dts files. I've asked the authors of the kernel commits adding these to submit a matching defconfig to u-boot. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- arch/arm/dts/Makefile | 8 +- arch/arm/dts/{sun8i-a23.dtsi => axp22x.dtsi} | 138 ++++++++---- arch/arm/dts/sun4i-a10-a1000.dts | 4 + arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts | 22 ++ arch/arm/dts/sun4i-a10-cubieboard.dts | 4 + arch/arm/dts/sun4i-a10-gemei-g9.dts | 63 +++++- arch/arm/dts/sun4i-a10-inet1.dts | 48 ++++ arch/arm/dts/sun4i-a10-inet97fv2.dts | 127 ++++++++++- arch/arm/dts/sun4i-a10-inet9f-rev03.dts | 181 +++++++++++++++ arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts | 86 +------ arch/arm/dts/sun4i-a10-jesurun-q5.dts | 15 ++ arch/arm/dts/sun4i-a10-marsboard.dts | 23 ++ arch/arm/dts/sun4i-a10-mk802.dts | 37 +++ arch/arm/dts/sun4i-a10-olinuxino-lime.dts | 12 + arch/arm/dts/sun4i-a10-pcduino.dts | 58 ++++- ...sun8i-q8-common.dtsi => sun4i-a10-pcduino2.dts} | 54 ++--- arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts | 69 ++++++ arch/arm/dts/sun4i-a10.dtsi | 153 +++++++++++-- arch/arm/dts/sun5i-a10s-auxtek-t004.dts | 14 ++ arch/arm/dts/sun5i-a10s-olinuxino-micro.dts | 2 +- arch/arm/dts/sun5i-a13-empire-electronix-d709.dts | 19 +- arch/arm/dts/sun5i-a13-inet-98v-rev2.dts | 26 +-- arch/arm/dts/sun5i-a13-utoo-p66.dts | 30 +++ arch/arm/dts/sun5i-q8-common.dtsi | 10 + arch/arm/dts/sun5i-r8-chip.dts | 47 +++- arch/arm/dts/sun5i.dtsi | 31 +++ arch/arm/dts/sun6i-a31-colombus.dts | 24 ++ arch/arm/dts/sun6i-a31-hummingbird.dts | 132 ++++++----- arch/arm/dts/sun6i-a31.dtsi | 65 +++++- arch/arm/dts/sun6i-a31s-primo81.dts | 247 ++++++++++++++++++++- ...er-tab7200.dts => sun6i-a31s-sina31s-core.dtsi} | 143 +++++------- ...n8i-a23-gt90h-v4.dts => sun6i-a31s-sina31s.dts} | 106 +++++---- ....dts => sun6i-a31s-yones-toptech-bs1078-v2.dts} | 180 ++++++++------- arch/arm/dts/sun7i-a20-bananapi.dts | 78 ++++++- arch/arm/dts/sun7i-a20-cubieboard2.dts | 23 ++ arch/arm/dts/sun7i-a20-cubietruck.dts | 4 + ...exler-tab7200.dts => sun7i-a20-icnova-swac.dts} | 50 ++--- ...un4i-a10-mk802.dts => sun7i-a20-itead-ibox.dts} | 91 ++++---- arch/arm/dts/sun7i-a20-lamobo-r1.dts | 10 - arch/arm/dts/sun7i-a20-mk808c.dts | 39 ++++ arch/arm/dts/sun7i-a20-olimex-som-evb.dts | 95 ++++++-- arch/arm/dts/sun7i-a20-olinuxino-lime.dts | 12 + arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 47 ++++ arch/arm/dts/sun7i-a20-olinuxino-micro.dts | 6 + arch/arm/dts/sun7i-a20-orangepi-mini.dts | 33 +++ arch/arm/dts/sun7i-a20-orangepi.dts | 29 +++ arch/arm/dts/sun7i-a20-pcduino3-nano.dts | 69 +++++- arch/arm/dts/sun7i-a20-pcduino3.dts | 58 ++++- arch/arm/dts/sun7i-a20-wexler-tab7200.dts | 90 +++++++- arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts | 187 +++++++++++++++- arch/arm/dts/sun7i-a20.dtsi | 113 +++++++++- arch/arm/dts/sun8i-a23-a33.dtsi | 71 ++++-- arch/arm/dts/sun8i-a23-gt90h-v4.dts | 120 +++++++++- arch/arm/dts/sun8i-a23.dtsi | 25 +++ arch/arm/dts/sun8i-a33-sinlinx-sina33.dts | 83 ++++++- arch/arm/dts/sun8i-a33.dtsi | 45 ++++ ...-common.dtsi => sun8i-a83t-cubietruck-plus.dts} | 48 ++-- arch/arm/dts/sun8i-a83t.dtsi | 125 +++++------ arch/arm/dts/sun8i-h3-orangepi-pc.dts | 69 ++++++ arch/arm/dts/sun8i-h3-orangepi-plus.dts | 63 ++++++ arch/arm/dts/sun8i-h3.dtsi | 189 +++++++++++----- arch/arm/dts/sun8i-q8-common.dtsi | 96 +++++++- arch/arm/dts/sun9i-a80-cubieboard4.dts | 36 +++ arch/arm/dts/sun9i-a80-optimus.dts | 48 ++-- arch/arm/dts/sun9i-a80.dtsi | 204 +++++++++++++++-- ...-inet97fv2.dts => sunxi-itead-core-common.dtsi} | 55 +++-- arch/arm/dts/sunxi-q8-common.dtsi | 6 + 67 files changed, 3566 insertions(+), 929 deletions(-) copy arch/arm/dts/{sun8i-a23.dtsi => axp22x.dtsi} (55%) copy arch/arm/dts/{sun8i-q8-common.dtsi => sun4i-a10-pcduino2.dts} (71%) copy arch/arm/dts/{sun7i-a20-wexler-tab7200.dts => sun6i-a31s-sina31s-core.dtsi} (60%) copy arch/arm/dts/{sun8i-a23-gt90h-v4.dts => sun6i-a31s-sina31s.dts} (67%) copy arch/arm/dts/{sun4i-a10-pov-protab2-ips9.dts => sun6i-a31s-yones-toptech-bs1078-v2.dts} (62%) copy arch/arm/dts/{sun7i-a20-wexler-tab7200.dts => sun7i-a20-icnova-swac.dts} (85%) copy arch/arm/dts/{sun4i-a10-mk802.dts => sun7i-a20-itead-ibox.dts} (70%) copy arch/arm/dts/{sunxi-q8-common.dtsi => sun8i-a83t-cubietruck-plus.dts} (76%) copy arch/arm/dts/{sun4i-a10-inet97fv2.dts => sunxi-itead-core-common.dtsi} (80%) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9566c81..ec99835 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -126,6 +126,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-mk802ii.dtb \ sun4i-a10-olinuxino-lime.dtb \ sun4i-a10-pcduino.dtb \ + sun4i-a10-pcduino2.dtb \ sun4i-a10-pov-protab2-ips9.dtb dtb-$(CONFIG_MACH_SUN5I) += \ sun5i-a10s-auxtek-t003.dtb \ @@ -156,7 +157,9 @@ dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31s-colorfly-e708-q1.dtb \ sun6i-a31s-cs908.dtb \ sun6i-a31s-primo81.dtb \ - sun6i-a31s-sinovoip-bpi-m2.dtb + sun6i-a31s-sina31s.dtb \ + sun6i-a31s-sinovoip-bpi-m2.dtb \ + sun6i-a31s-yones-toptech-bs1078-v2.dtb dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-ainol-aw1.dtb \ sun7i-a20-bananapi.dtb \ @@ -165,6 +168,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-cubietruck.dtb \ sun7i-a20-hummingbird.dtb \ sun7i-a20-i12-tvbox.dtb \ + sun7i-a20-icnova-swac.dtb \ + sun7i-a20-itead-ibox.dtb \ sun7i-a20-lamobo-r1.dtb \ sun7i-a20-m3.dtb \ sun7i-a20-m5.dtb \ @@ -191,6 +196,7 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \ sun8i-a33-sinlinx-sina33.dtb dtb-$(CONFIG_MACH_SUN8I_A83T) += \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ + sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-sinovoip-bpi-m3.dtb dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h3-orangepi-pc.dtb \ diff --git a/arch/arm/dts/sun8i-a23.dtsi b/arch/arm/dts/axp22x.dtsi similarity index 55% copy from arch/arm/dts/sun8i-a23.dtsi copy to arch/arm/dts/axp22x.dtsi index 2cc27c7..0cfec50 100644 --- a/arch/arm/dts/sun8i-a23.dtsi +++ b/arch/arm/dts/axp22x.dtsi @@ -1,5 +1,5 @@ /* - * Copyright 2014 Chen-Yu Tsai + * Copyright 2015 Chen-Yu Tsai * * Chen-Yu Tsai <wens(a)csie.org> * @@ -42,60 +42,104 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "sun8i-a23-a33.dtsi" +/* + * AXP221/221s/223 Integrated Power Management Chip + * http://www.x-powers.com/product/AXP22X.php + * http://dl.linux-sunxi.org/AXP/AXP221%20Datasheet%20V1.2%2020130326%20.pdf + */ -/ { - memory { - reg = <0x40000000 0x40000000>; - }; +&axp22x { + interrupt-controller; + #interrupt-cells = <1>; - clocks { - mbus_clk: clk@01c2015c { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-mbus-clk"; - reg = <0x01c2015c 0x4>; - clocks = <&osc24M>, <&pll6 1>, <&pll5>; - clock-output-names = "mbus"; + regulators { + /* Default work frequency for buck regulators */ + x-powers,dcdc-freq = <3000>; + + reg_dcdc1: dcdc1 { + regulator-name = "dcdc1"; + }; + + reg_dcdc2: dcdc2 { + regulator-name = "dcdc2"; + }; + + reg_dcdc3: dcdc3 { + regulator-name = "dcdc3"; + }; + + reg_dcdc4: dcdc4 { + regulator-name = "dcdc4"; + }; + + reg_dcdc5: dcdc5 { + regulator-name = "dcdc5"; + }; + + reg_dc1sw: dc1sw { + regulator-name = "dc1sw"; + }; + + reg_dc5ldo: dc5ldo { + regulator-name = "dc5ldo"; + }; + + reg_aldo1: aldo1 { + regulator-name = "aldo1"; + }; + + reg_aldo2: aldo2 { + regulator-name = "aldo2"; }; - }; - soc@01c00000 { - usb_otg: usb@01c19000 { - compatible = "allwinner,sun6i-a31-musb"; - reg = <0x01c19000 0x0400>; - clocks = <&ahb1_gates 24>; - resets = <&ahb1_rst 24>; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "mc"; - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; + reg_aldo3: aldo3 { + regulator-name = "aldo3"; + }; + + reg_dldo1: dldo1 { + regulator-name = "dldo1"; + }; + + reg_dldo2: dldo2 { + regulator-name = "dldo2"; + }; + + reg_dldo3: dldo3 { + regulator-name = "dldo3"; + }; + + reg_dldo4: dldo4 { + regulator-name = "dldo4"; + }; + + reg_eldo1: eldo1 { + regulator-name = "eldo1"; + }; + + reg_eldo2: eldo2 { + regulator-name = "eldo2"; + }; + + reg_eldo3: eldo3 { + regulator-name = "eldo3"; + }; + + reg_ldo_io0: ldo_io0 { + regulator-name = "ldo_io0"; status = "disabled"; }; - usbphy: phy@01c19400 { - compatible = "allwinner,sun8i-a23-usb-phy"; - reg = <0x01c19400 0x10>, - <0x01c1a800 0x4>; - reg-names = "phy_ctrl", - "pmu1"; - clocks = <&usb_clk 8>, - <&usb_clk 9>; - clock-names = "usb0_phy", - "usb1_phy"; - resets = <&usb_clk 0>, - <&usb_clk 1>; - reset-names = "usb0_reset", - "usb1_reset"; + reg_ldo_io1: ldo_io1 { + regulator-name = "ldo_io1"; status = "disabled"; - #phy-cells = <1>; }; - }; -}; -&pio { - compatible = "allwinner,sun8i-a23-pinctrl"; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; + reg_rtc_ldo: rtc_ldo { + /* RTC_LDO is a fixed, always-on regulator */ + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "rtc_ldo"; + }; + }; }; diff --git a/arch/arm/dts/sun4i-a10-a1000.dts b/arch/arm/dts/sun4i-a10-a1000.dts index 2630d78..97570cb 100644 --- a/arch/arm/dts/sun4i-a10-a1000.dts +++ b/arch/arm/dts/sun4i-a10-a1000.dts @@ -93,6 +93,10 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + &ehci0 { status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts index 1430568..023b03e 100644 --- a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts +++ b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts @@ -45,6 +45,7 @@ #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> / { model = "Chuwi V7 CW0825"; @@ -78,6 +79,27 @@ }; }; +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; + + ft5306de4: touchscreen@38 { + compatible = "edt,edt-ft5406"; + reg = <0x38>; + interrupt-parent = <&pio>; + interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <1024>; + touchscreen-size-y = <768>; + }; +}; + &lradc { vref-supply = <&reg_vcc3v0>; status = "okay"; diff --git a/arch/arm/dts/sun4i-a10-cubieboard.dts b/arch/arm/dts/sun4i-a10-cubieboard.dts index 046a84d..710e2ef 100644 --- a/arch/arm/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/dts/sun4i-a10-cubieboard.dts @@ -83,6 +83,10 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + &cpu0 { cpu-supply = <&reg_dcdc2>; }; diff --git a/arch/arm/dts/sun4i-a10-gemei-g9.dts b/arch/arm/dts/sun4i-a10-gemei-g9.dts index 570754d..ac64781 100644 --- a/arch/arm/dts/sun4i-a10-gemei-g9.dts +++ b/arch/arm/dts/sun4i-a10-gemei-g9.dts @@ -47,6 +47,7 @@ #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> / { model = "Gemei G9 Tablet"; @@ -64,12 +65,22 @@ /* * TODO: * 2x cameras via CSI - * bma250 IRQs * AXP battery management * NAND * OTG * Touchscreen - gt801_2plus1 @ i2c adapter 2 @ 0x48 */ +&codec { + /* PH15 controls power to external amplifier (ft2012q) */ + pinctrl-names = "default"; + pinctrl-0 = <&codec_pa_pin>; + allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; &ehci0 { status = "okay"; @@ -85,15 +96,13 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; +#include "axp209.dtsi" + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_a>; @@ -103,17 +112,13 @@ bma250@18 { compatible = "bosch,bma250"; reg = <0x18>; - - /* - * TODO: interrupt pins: - * int1 - PH00 - * int2 - PI10 - */ + interrupt-parent = <&pio>; + interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH00 / EINT0 */ }; }; &lradc { - vref-supply = <&reg_vcc3v0>; + vref-supply = <&reg_ldo2>; status = "okay"; @@ -149,6 +154,40 @@ status = "okay"; }; +&pio { + codec_pa_pin: codec_pa_pin@0 { + allwinner,pins = "PH15"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd-int-dll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + &reg_usb1_vbus { status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-inet1.dts b/arch/arm/dts/sun4i-a10-inet1.dts index 487ce63..e09053b 100644 --- a/arch/arm/dts/sun4i-a10-inet1.dts +++ b/arch/arm/dts/sun4i-a10-inet1.dts @@ -47,6 +47,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/sun4i-a10.h> +#include <dt-bindings/pwm/pwm.h> / { model = "iNet-1"; @@ -56,11 +57,25 @@ serial0 = &uart0; }; + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&bl_en_pin_inet>; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ + }; + chosen { stdout-path = "serial0:115200n8"; }; }; +&codec { + status = "okay"; +}; + &cpu0 { cpu-supply = <&reg_dcdc2>; }; @@ -104,6 +119,19 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins_a>; status = "okay"; + + ft5x: touchscreen@38 { + compatible = "edt,edt-ft5406"; + reg = <0x38>; + interrupt-parent = <&pio>; + interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_wake_pin>; + wake-gpios = <&pio 1 13 GPIO_ACTIVE_HIGH>; /* PB13 */ + touchscreen-size-x = <600>; + touchscreen-size-y = <1024>; + touchscreen-swapped-x-y; + }; }; &lradc { @@ -151,6 +179,20 @@ }; &pio { + bl_en_pin_inet: bl_en_pin@0 { + allwinner,pins = "PH7"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + touchscreen_wake_pin: touchscreen_wake_pin@0 { + allwinner,pins = "PB13"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in"; @@ -166,6 +208,12 @@ }; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins_a>; + status = "okay"; +}; + &reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; diff --git a/arch/arm/dts/sun4i-a10-inet97fv2.dts b/arch/arm/dts/sun4i-a10-inet97fv2.dts index 6c927a8..04b0d2d 100644 --- a/arch/arm/dts/sun4i-a10-inet97fv2.dts +++ b/arch/arm/dts/sun4i-a10-inet97fv2.dts @@ -47,6 +47,8 @@ #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> / { model = "INet-97F Rev 02"; @@ -61,8 +63,8 @@ }; }; -&ehci0 { - status = "okay"; +&cpu0 { + cpu-supply = <&reg_dcdc2>; }; &ehci1 { @@ -75,12 +77,71 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupts = <0>; + }; +}; + +#include "axp209.dtsi" + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; + + ft5406ee8: touchscreen@38 { + compatible = "edt,edt-ft5406"; + reg = <0x38>; + interrupt-parent = <&pio>; + interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + }; +}; + +&lradc { + vref-supply = <&reg_ldo2>; + status = "okay"; + + button@200 { + label = "Menu"; + linux,code = <KEY_MENU>; + channel = <0>; + voltage = <200000>; + }; + + button@600 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <600000>; + }; - interrupt-controller; - #interrupt-cells = <1>; + button@800 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <800000>; + }; + + button@1000 { + label = "Home"; + linux,code = <KEY_HOMEPAGE>; + channel = <0>; + voltage = <1000000>; + }; + + button@1200 { + label = "Esc"; + linux,code = <KEY_ESC>; + channel = <0>; + voltage = <1200000>; }; }; @@ -94,15 +155,52 @@ status = "okay"; }; -&ohci0 { +&otg_sram { status = "okay"; }; -&ohci1 { - status = "okay"; +&pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; }; -&reg_usb1_vbus { +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd-int-dll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +&reg_usb0_vbus { status = "okay"; }; @@ -116,8 +214,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { - usb1_vbus-supply = <&reg_usb1_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <&reg_usb0_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts index 8446465..bba4f9c 100644 --- a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts +++ b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts @@ -59,6 +59,159 @@ chosen { stdout-path = "serial0:115200n8"; }; + + gpio_keys { + compatible = "gpio-keys-polled"; + pinctrl-names = "default"; + pinctrl-0 = <&key_pins_inet9f>; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <20>; + + button@0 { + label = "Left Joystick Left"; + linux,code = <ABS_X>; + linux,input-type = <EV_ABS>; + linux,input-value = <0xffffffff>; /* -1 */ + gpios = <&pio 0 6 GPIO_ACTIVE_LOW>; /* PA6 */ + }; + + button@1 { + label = "Left Joystick Right"; + linux,code = <ABS_X>; + linux,input-type = <EV_ABS>; + linux,input-value = <1>; + gpios = <&pio 0 5 GPIO_ACTIVE_LOW>; /* PA5 */ + }; + + button@2 { + label = "Left Joystick Up"; + linux,code = <ABS_Y>; + linux,input-type = <EV_ABS>; + linux,input-value = <0xffffffff>; /* -1 */ + gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */ + }; + + button@3 { + label = "Left Joystick Down"; + linux,code = <ABS_Y>; + linux,input-type = <EV_ABS>; + linux,input-value = <1>; + gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */ + }; + + button@4 { + label = "Right Joystick Left"; + linux,code = <ABS_Z>; + linux,input-type = <EV_ABS>; + linux,input-value = <0xffffffff>; /* -1 */ + gpios = <&pio 0 1 GPIO_ACTIVE_LOW>; /* PA1 */ + }; + + button@5 { + label = "Right Joystick Right"; + linux,code = <ABS_Z>; + linux,input-type = <EV_ABS>; + linux,input-value = <1>; + gpios = <&pio 0 0 GPIO_ACTIVE_LOW>; /* PA0 */ + }; + + button@6 { + label = "Right Joystick Up"; + linux,code = <ABS_RZ>; + linux,input-type = <EV_ABS>; + linux,input-value = <0xffffffff>; /* -1 */ + gpios = <&pio 0 3 GPIO_ACTIVE_LOW>; /* PA3 */ + }; + + button@7 { + label = "Right Joystick Down"; + linux,code = <ABS_RZ>; + linux,input-type = <EV_ABS>; + linux,input-value = <1>; + gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */ + }; + + button@8 { + label = "DPad Left"; + linux,code = <ABS_HAT0X>; + linux,input-type = <EV_ABS>; + linux,input-value = <0xffffffff>; /* -1 */ + gpios = <&pio 7 23 GPIO_ACTIVE_LOW>; /* PH23 */ + }; + + button@9 { + label = "DPad Right"; + linux,code = <ABS_HAT0X>; + linux,input-type = <EV_ABS>; + linux,input-value = <1>; + gpios = <&pio 7 24 GPIO_ACTIVE_LOW>; /* PH24 */ + }; + + button@10 { + label = "DPad Up"; + linux,code = <ABS_HAT0Y>; + linux,input-type = <EV_ABS>; + linux,input-value = <0xffffffff>; /* -1 */ + gpios = <&pio 7 25 GPIO_ACTIVE_LOW>; /* PH25 */ + }; + + button@11 { + label = "DPad Down"; + linux,code = <ABS_HAT0Y>; + linux,input-type = <EV_ABS>; + linux,input-value = <1>; + gpios = <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */ + }; + + button@12 { + label = "Button X"; + linux,code = <BTN_X>; + gpios = <&pio 0 16 GPIO_ACTIVE_LOW>; /* PA16 */ + }; + + button@13 { + label = "Button Y"; + linux,code = <BTN_Y>; + gpios = <&pio 0 14 GPIO_ACTIVE_LOW>; /* PA14 */ + }; + + button@14 { + label = "Button A"; + linux,code = <BTN_A>; + gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */ + }; + + button@15 { + label = "Button B"; + linux,code = <BTN_B>; + gpios = <&pio 0 15 GPIO_ACTIVE_LOW>; /* PA15 */ + }; + + button@16 { + label = "Select Button"; + linux,code = <BTN_SELECT>; + gpios = <&pio 0 11 GPIO_ACTIVE_LOW>; /* PA11 */ + }; + + button@17 { + label = "Start Button"; + linux,code = <BTN_START>; + gpios = <&pio 0 12 GPIO_ACTIVE_LOW>; /* PA12 */ + }; + + button@18 { + label = "Top Left Button"; + linux,code = <BTN_TL>; + gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */ + }; + + button@19 { + label = "Top Right Button"; + linux,code = <BTN_TR>; + gpios = <&pio 0 13 GPIO_ACTIVE_LOW>; /* PA13 */ + }; + }; }; &cpu0 { @@ -86,12 +239,29 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_a>; status = "okay"; + + /* Accelerometer */ + bma250@18 { + compatible = "bosch,bma250"; + reg = <0x18>; + interrupt-parent = <&pio>; + interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH0 / EINT0 */ + }; }; &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins_a>; status = "okay"; + + ft5406ee8: touchscreen@38 { + compatible = "edt,edt-ft5406"; + reg = <0x38>; + interrupt-parent = <&pio>; + interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <800>; + touchscreen-size-y = <480>; + }; }; &lradc { @@ -149,6 +319,17 @@ }; &pio { + key_pins_inet9f: key_pins@0 { + allwinner,pins = "PA0", "PA1", "PA3", "PA4", + "PA5", "PA6", "PA8", "PA9", + "PA11", "PA12", "PA13", + "PA14", "PA15", "PA16", "PA17", + "PH22", "PH23", "PH24", "PH25", "PH26"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in"; diff --git a/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts b/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts index 985e155..4e798f0 100644 --- a/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts +++ b/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts @@ -1,5 +1,6 @@ /* * Copyright 2015 Josef Gajdusek <atx(a)atx.name> + * Copyright 2015 - Marcus Cooper <codekipper(a)gmail.com> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -42,22 +43,11 @@ /dts-v1/; #include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> +#include "sunxi-itead-core-common.dtsi" / { model = "Iteaduino Plus A10"; compatible = "itead,iteaduino-plus-a10", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; }; &ahci { @@ -65,18 +55,6 @@ status = "okay"; }; -&cpu0 { - cpu-supply = <&reg_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - &emac { pinctrl-names = "default"; pinctrl-0 = <&emac_pins_a>; @@ -89,12 +67,7 @@ }; &i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; - axp209: pmic@34 { - reg = <0x34>; interrupts = <0>; }; }; @@ -135,68 +108,13 @@ status = "okay"; }; -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - &reg_ahci_5v { status = "okay"; }; -#include "axp209.dtsi" - -&reg_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1450000>; - regulator-name = "vdd-cpu"; -}; - -&reg_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-int-dll"; -}; - -&reg_ldo1 { - regulator-name = "vdd-rtc"; -}; - -&reg_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -&reg_usb1_vbus { - status = "okay"; -}; - -&reg_usb2_vbus { - status = "okay"; -}; - &spi0 { pinctrl-names = "default"; pinctrl-0 = <&spi0_pins_a>, <&spi0_cs0_pins_a>; status = "okay"; }; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <&reg_usb1_vbus>; - usb2_vbus-supply = <&reg_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/dts/sun4i-a10-jesurun-q5.dts index dc2f2ae..7afc7a6 100644 --- a/arch/arm/dts/sun4i-a10-jesurun-q5.dts +++ b/arch/arm/dts/sun4i-a10-jesurun-q5.dts @@ -156,6 +156,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { emac_power_pin_q5: emac_power_pin@0 { allwinner,pins = "PH19"; @@ -172,6 +176,11 @@ }; }; +&reg_usb0_vbus { + regulator-boot-on; + status = "okay"; +}; + &reg_usb1_vbus { status = "okay"; }; @@ -186,7 +195,13 @@ status = "okay"; }; +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + &usbphy { + usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun4i-a10-marsboard.dts b/arch/arm/dts/sun4i-a10-marsboard.dts index 02158bc..8e50723 100644 --- a/arch/arm/dts/sun4i-a10-marsboard.dts +++ b/arch/arm/dts/sun4i-a10-marsboard.dts @@ -91,6 +91,10 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + &ehci0 { status = "okay"; }; @@ -154,6 +158,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_marsboard: led_pins@0 { allwinner,pins = "PB5", "PB6", "PB7", "PB8"; @@ -161,6 +169,13 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; }; &reg_usb1_vbus { @@ -184,7 +199,15 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun4i-a10-mk802.dts b/arch/arm/dts/sun4i-a10-mk802.dts index 3c7eebe..ee46ea8 100644 --- a/arch/arm/dts/sun4i-a10-mk802.dts +++ b/arch/arm/dts/sun4i-a10-mk802.dts @@ -44,6 +44,7 @@ #include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> / { model = "MK802"; @@ -58,6 +59,10 @@ }; }; +&codec { + status = "okay"; +}; + &ehci0 { status = "okay"; }; @@ -80,7 +85,25 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + usb2_vbus_pin_mk802: usb2_vbus_pin@0 { allwinner,pins = "PH12"; allwinner,function = "gpio_out"; @@ -89,6 +112,10 @@ }; }; +&reg_usb0_vbus { + status = "okay"; +}; + &reg_usb1_vbus { status = "okay"; }; @@ -105,7 +132,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts index 28e32ad..b350448 100644 --- a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts +++ b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts @@ -124,6 +124,18 @@ }; }; +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + }; +}; + &mdio { status = "okay"; diff --git a/arch/arm/dts/sun4i-a10-pcduino.dts b/arch/arm/dts/sun4i-a10-pcduino.dts index 4e3e1b9..39034aa 100644 --- a/arch/arm/dts/sun4i-a10-pcduino.dts +++ b/arch/arm/dts/sun4i-a10-pcduino.dts @@ -104,6 +104,10 @@ }; }; +&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + &ehci0 { status = "okay"; }; @@ -129,12 +133,8 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; @@ -164,6 +164,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_pcduino: led_pins@0 { allwinner,pins = "PH15", "PH16"; @@ -178,14 +182,40 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; }; -&reg_usb1_vbus { - status = "okay"; +#include "axp209.dtsi" + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; }; -&reg_usb2_vbus { - status = "okay"; +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; }; &uart0 { @@ -194,8 +224,16 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { - usb1_vbus-supply = <&reg_usb1_vbus>; - usb2_vbus-supply = <&reg_usb2_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb1_vbus-supply = <&reg_vcc5v0>; /* USB1 VBUS is always on */ + usb2_vbus-supply = <&reg_vcc5v0>; /* USB2 VBUS is always on */ status = "okay"; }; diff --git a/arch/arm/dts/sun8i-q8-common.dtsi b/arch/arm/dts/sun4i-a10-pcduino2.dts similarity index 71% copy from arch/arm/dts/sun8i-q8-common.dtsi copy to arch/arm/dts/sun4i-a10-pcduino2.dts index 07cd268..de483a1 100644 --- a/arch/arm/dts/sun8i-q8-common.dtsi +++ b/arch/arm/dts/sun4i-a10-pcduino2.dts @@ -1,5 +1,5 @@ /* - * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * Copyright 2015 Siarhei Siamashka <siarhei.siamashka(a)gmail.com> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -39,46 +39,40 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ -#include "sunxi-q8-common.dtsi" -/ { - aliases { - serial0 = &r_uart; - }; +/* + * The LinkSprite pcDuino2 board is almost identical to the older + * LinkSprite pcDuino1 board. The only software visible difference + * is that the pcDuino2 board got a USB VBUS voltage regulator, which + * is controlled by the PD2 pin (pulled-up by default). Also one of + * the USB host ports has been replaced with a USB WIFI chip. + */ - chosen { - stdout-path = "serial0:115200n8"; - }; -}; +#include "sun4i-a10-pcduino.dts" -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8>; - vmmc-supply = <&reg_vcc3v0>; - bus-width = <4>; - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ - cd-inverted; - status = "okay"; +/ { + model = "LinkSprite pcDuino2"; + compatible = "linksprite,a10-pcduino2", "allwinner,sun4i-a10"; }; &pio { - bl_en_pin_q8: bl_en_pin@0 { - allwinner,pins = "PH6"; - allwinner,function = "gpio_in"; + usb2_vbus_pin_pcduino2: usb2_vbus_pin@0 { + allwinner,pins = "PD2"; + allwinner,function = "gpio_out"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - - mmc0_cd_pin_q8: mmc0_cd_pin@0 { - allwinner,pins = "PB4"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; }; -&r_uart { +&reg_usb2_vbus { pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins_a>; + pinctrl-0 = <&usb2_vbus_pin_pcduino2>; + gpio = <&pio 3 2 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <&reg_vcc3v3>; /* USB WIFI is always on */ + usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; }; diff --git a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts index 223515e..ea90634 100644 --- a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts +++ b/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts @@ -47,6 +47,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/sun4i-a10.h> +#include <dt-bindings/pwm/pwm.h> / { model = "Point of View Protab2-IPS9"; @@ -56,11 +57,28 @@ serial0 = &uart0; }; + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&bl_en_pin_protab>; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ + }; + chosen { stdout-path = "serial0:115200n8"; }; }; +&codec { + pinctrl-names = "default"; + pinctrl-0 = <&codec_pa_pin>; + allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */ + status = "okay"; +}; + &cpu0 { cpu-supply = <&reg_dcdc2>; }; @@ -86,12 +104,36 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_a>; status = "okay"; + + /* Accelerometer */ + bma250@18 { + compatible = "bosch,bma250"; + reg = <0x18>; + interrupt-parent = <&pio>; + interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH0 / EINT0 */ + }; }; &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins_a>; status = "okay"; + + pixcir_ts@5c { + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_pins>; + compatible = "pixcir,pixcir_tangoc"; + reg = <0x5c>; + interrupt-parent = <&pio>; + interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; /* EINT21 (PH21) */ + attb-gpio = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */ + enable-gpios = <&pio 0 5 GPIO_ACTIVE_LOW>; + wake-gpios = <&pio 1 13 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1024>; + touchscreen-size-y = <768>; + touchscreen-inverted-x; + touchscreen-inverted-y; + }; }; &lradc { @@ -128,6 +170,27 @@ }; &pio { + bl_en_pin_protab: bl_en_pin@0 { + allwinner,pins = "PH7"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + codec_pa_pin: codec_pa_pin@0 { + allwinner,pins = "PH15"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + touchscreen_pins: touchscreen_pins@0 { + allwinner,pins = "PA5", "PB13"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in"; @@ -143,6 +206,12 @@ }; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins_a>; + status = "okay"; +}; + &reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; diff --git a/arch/arm/dts/sun4i-a10.dtsi b/arch/arm/dts/sun4i-a10.dtsi index 463bacd..2c8f5e6 100644 --- a/arch/arm/dts/sun4i-a10.dtsi +++ b/arch/arm/dts/sun4i-a10.dtsi @@ -45,6 +45,7 @@ #include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/clock/sun4i-a10-pll2.h> #include <dt-bindings/dma/sun4i-a10.h> #include <dt-bindings/pinctrl/sun4i-a10.h> @@ -65,7 +66,7 @@ "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, - <&ahb_gates 44>; + <&ahb_gates 44>, <&dram_gates 26>; status = "disabled"; }; @@ -74,7 +75,8 @@ "simple-framebuffer"; allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi"; clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, - <&ahb_gates 44>, <&ahb_gates 46>; + <&ahb_gates 44>, <&ahb_gates 46>, + <&dram_gates 25>, <&dram_gates 26>; status = "disabled"; }; @@ -83,7 +85,8 @@ "simple-framebuffer"; allwinner,pipeline = "de_fe0-de_be0-lcd0"; clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>, - <&ahb_gates 46>; + <&ahb_gates 46>, <&dram_gates 25>, + <&dram_gates 26>; status = "disabled"; }; @@ -92,7 +95,8 @@ "simple-framebuffer"; allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0"; clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, - <&ahb_gates 44>, <&ahb_gates 46>; + <&ahb_gates 44>, <&ahb_gates 46>, + <&dram_gates 25>, <&dram_gates 26>; status = "disabled"; }; }; @@ -195,6 +199,15 @@ clock-output-names = "pll1"; }; + pll2: clk@01c20008 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-pll2-clk"; + reg = <0x01c20008 0x8>; + clocks = <&osc24M>; + clock-output-names = "pll2-1x", "pll2-2x", + "pll2-4x", "pll2-8x"; + }; + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk"; @@ -241,6 +254,7 @@ compatible = "allwinner,sun4i-a10-axi-gates-clk"; reg = <0x01c2005c 0x4>; clocks = <&axi>; + clock-indices = <0>; clock-output-names = "axi_dram"; }; @@ -257,17 +271,36 @@ compatible = "allwinner,sun4i-a10-ahb-gates-clk"; reg = <0x01c20060 0x8>; clocks = <&ahb>; + clock-indices = <0>, <1>, + <2>, <3>, + <4>, <5>, <6>, + <7>, <8>, <9>, + <10>, <11>, <12>, + <13>, <14>, <16>, + <17>, <18>, <20>, + <21>, <22>, <23>, + <24>, <25>, <26>, + <32>, <33>, <34>, + <35>, <36>, <37>, + <40>, <41>, <43>, + <44>, <45>, + <46>, <47>, + <50>, <52>; clock-output-names = "ahb_usb0", "ahb_ehci0", - "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", - "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", - "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", - "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", - "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", - "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", - "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", - "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi", - "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", - "ahb_de_fe1", "ahb_mp", "ahb_mali400"; + "ahb_ohci0", "ahb_ehci1", + "ahb_ohci1", "ahb_ss", "ahb_dma", + "ahb_bist", "ahb_mmc0", "ahb_mmc1", + "ahb_mmc2", "ahb_mmc3", "ahb_ms", + "ahb_nand", "ahb_sdram", "ahb_ace", + "ahb_emac", "ahb_ts", "ahb_spi0", + "ahb_spi1", "ahb_spi2", "ahb_spi3", + "ahb_pata", "ahb_sata", "ahb_gps", + "ahb_ve", "ahb_tvd", "ahb_tve0", + "ahb_tve1", "ahb_lcd0", "ahb_lcd1", + "ahb_csi0", "ahb_csi1", "ahb_hdmi", + "ahb_de_be0", "ahb_de_be1", + "ahb_de_fe0", "ahb_de_fe1", + "ahb_mp", "ahb_mali400"; }; apb0: apb0@01c20054 { @@ -283,9 +316,14 @@ compatible = "allwinner,sun4i-a10-apb0-gates-clk"; reg = <0x01c20068 0x4>; clocks = <&apb0>; + clock-indices = <0>, <1>, + <2>, <3>, + <5>, <6>, + <7>, <10>; clock-output-names = "apb0_codec", "apb0_spdif", - "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", - "apb0_ir1", "apb0_keypad"; + "apb0_ac97", "apb0_iis", + "apb0_pio", "apb0_ir0", + "apb0_ir1", "apb0_keypad"; }; apb1: clk@01c20058 { @@ -301,12 +339,22 @@ compatible = "allwinner,sun4i-a10-apb1-gates-clk"; reg = <0x01c2006c 0x4>; clocks = <&apb1>; + clock-indices = <0>, <1>, + <2>, <4>, + <5>, <6>, + <7>, <16>, + <17>, <18>, + <19>, <20>, + <21>, <22>, + <23>; clock-output-names = "apb1_i2c0", "apb1_i2c1", - "apb1_i2c2", "apb1_can", "apb1_scr", - "apb1_ps20", "apb1_ps21", "apb1_uart0", - "apb1_uart1", "apb1_uart2", "apb1_uart3", - "apb1_uart4", "apb1_uart5", "apb1_uart6", - "apb1_uart7"; + "apb1_i2c2", "apb1_can", + "apb1_scr", "apb1_ps20", + "apb1_ps21", "apb1_uart0", + "apb1_uart1", "apb1_uart2", + "apb1_uart3", "apb1_uart4", + "apb1_uart5", "apb1_uart6", + "apb1_uart7"; }; nand_clk: clk@01c20080 { @@ -446,6 +494,48 @@ clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; clock-output-names = "spi3"; }; + + dram_gates: clk@01c20100 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-dram-gates-clk"; + reg = <0x01c20100 0x4>; + clocks = <&pll5 0>; + clock-indices = <0>, + <1>, <2>, + <3>, + <4>, + <5>, <6>, + <15>, + <24>, <25>, + <26>, <27>, + <28>, <29>; + clock-output-names = "dram_ve", + "dram_csi0", "dram_csi1", + "dram_ts", + "dram_tvd", + "dram_tve0", "dram_tve1", + "dram_output", + "dram_de_fe1", "dram_de_fe0", + "dram_de_be0", "dram_de_be1", + "dram_de_mp", "dram_ace"; + }; + + ve_clk: clk@01c2013c { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-ve-clk"; + reg = <0x01c2013c 0x4>; + clocks = <&pll4>; + clock-output-names = "ve"; + }; + + codec_clk: clk@01c20140 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-codec-clk"; + reg = <0x01c20140 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "codec"; + }; }; soc@01c00000 { @@ -656,6 +746,14 @@ status = "disabled"; }; + crypto: crypto-engine@01c15000 { + compatible = "allwinner,sun4i-a10-crypto"; + reg = <0x01c15000 0x1000>; + interrupts = <86>; + clocks = <&ahb_gates 5>, <&ss_clk>; + clock-names = "ahb", "mod"; + }; + spi2: spi@01c17000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c17000 0x1000>; @@ -961,6 +1059,19 @@ status = "disabled"; }; + codec: codec@01c22c00 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-codec"; + reg = <0x01c22c00 0x40>; + interrupts = <30>; + clocks = <&apb0_gates 0>, <&codec_clk>; + clock-names = "apb", "codec"; + dmas = <&dma SUN4I_DMA_NORMAL 19>, + <&dma SUN4I_DMA_NORMAL 19>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + sid: eeprom@01c23800 { compatible = "allwinner,sun4i-a10-sid"; reg = <0x01c23800 0x10>; diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts index 2b3511e..a790ec8 100644 --- a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts +++ b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts @@ -86,6 +86,20 @@ status = "okay"; }; +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp152: pmic@30 { + compatible = "x-powers,axp152"; + reg = <0x30>; + interrupts = <0>; + interrupt-controller; + #interrupt-cells = <1>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t004>; diff --git a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts index 5a422c1..86d046a 100644 --- a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts @@ -111,7 +111,7 @@ status = "okay"; at24@50 { - compatible = "at,24c16"; + compatible = "atmel,24c16"; pagesize = <16>; reg = <0x50>; read-only; diff --git a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts b/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts index 7fbb0b0..6efbba6 100644 --- a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts +++ b/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts @@ -123,7 +123,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_inet98fv2>; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_d709>; vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ @@ -131,27 +131,12 @@ status = "okay"; }; -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins_a>; - vmmc-supply = <&reg_vcc3v3>; - bus-width = <8>; - non-removable; - status = "okay"; - - mmccard: mmccard@0 { - reg = <0>; - compatible = "mmc-card"; - broken-hpi; - }; -}; - &otg_sram { status = "okay"; }; &pio { - mmc0_cd_pin_inet98fv2: mmc0_cd_pin@0 { + mmc0_cd_pin_d709: mmc0_cd_pin@0 { allwinner,pins = "PG0"; allwinner,function = "gpio_in"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; diff --git a/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts b/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts index 6d466a2..1b11ec9 100644 --- a/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts +++ b/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts @@ -123,21 +123,6 @@ status = "okay"; }; -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins_a>; - vmmc-supply = <&reg_vcc3v3>; - bus-width = <8>; - non-removable; - status = "okay"; - - mmccard: mmccard@0 { - reg = <0>; - compatible = "mmc-card"; - broken-hpi; - }; -}; - &otg_sram { status = "okay"; }; @@ -201,11 +186,6 @@ status = "okay"; }; -&reg_usb1_vbus { - gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */ - status = "okay"; -}; - &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins_b>; @@ -221,16 +201,12 @@ allwinner,pins = "PG12"; }; -&usb1_vbus_pin_a { - allwinner,pins = "PG11"; -}; - &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ usb0_vbus-supply = <&reg_usb0_vbus>; - usb1_vbus-supply = <&reg_usb1_vbus>; + usb1_vbus-supply = <&reg_ldo3>; status = "okay"; }; diff --git a/arch/arm/dts/sun5i-a13-utoo-p66.dts b/arch/arm/dts/sun5i-a13-utoo-p66.dts index eb793d5..fa9ddfd 100644 --- a/arch/arm/dts/sun5i-a13-utoo-p66.dts +++ b/arch/arm/dts/sun5i-a13-utoo-p66.dts @@ -47,11 +47,21 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/sun4i-a10.h> +#include <dt-bindings/pwm/pwm.h> / { model = "Utoo P66"; compatible = "utoo,p66", "allwinner,sun5i-a13"; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + /* Note levels of 10 / 20% result in backlight off */ + brightness-levels = <0 30 40 50 60 70 80 90 100>; + default-brightness-level = <6>; + /* TODO: backlight uses axp gpio1 as enable pin */ + }; + i2c_lcd: i2c@0 { /* The lcd panel i2c interface is hooked up via gpios */ compatible = "i2c-gpio"; @@ -63,6 +73,13 @@ }; }; +&codec { + pinctrl-names = "default"; + pinctrl-0 = <&codec_pa_pin>; + allwinner,pa-gpios = <&pio 6 3 GPIO_ACTIVE_HIGH>; /* PG3 */ + status = "okay"; +}; + &cpu0 { cpu-supply = <&reg_dcdc2>; }; @@ -158,6 +175,13 @@ }; &pio { + codec_pa_pin: codec_pa_pin@0 { + allwinner,pins = "PG3"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + mmc0_cd_pin_p66: mmc0_cd_pin@0 { allwinner,pins = "PG0"; allwinner,function = "gpio_in"; @@ -201,6 +225,12 @@ }; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>; + status = "okay"; +}; + &reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; diff --git a/arch/arm/dts/sun5i-q8-common.dtsi b/arch/arm/dts/sun5i-q8-common.dtsi index 0641d68..a78e189 100644 --- a/arch/arm/dts/sun5i-q8-common.dtsi +++ b/arch/arm/dts/sun5i-q8-common.dtsi @@ -41,11 +41,21 @@ */ #include "sunxi-q8-common.dtsi" +#include <dt-bindings/pwm/pwm.h> + / { aliases { serial0 = &uart1; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + /* TODO: backlight uses axp gpio1 as enable pin */ + }; + chosen { stdout-path = "serial0:115200n8"; }; diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts index abf3ccb..6ad19e2 100644 --- a/arch/arm/dts/sun5i-r8-chip.dts +++ b/arch/arm/dts/sun5i-r8-chip.dts @@ -64,6 +64,26 @@ chosen { stdout-path = "serial0:115200n8"; }; + + wifi_reg_on: wifi_reg_on { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&chip_wifi_reg_on_pin>; + + regulator-name = "wifi-reg-on"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pio 2 19 GPIO_ACTIVE_HIGH>; /* PC19 */ + enable-active-high; + }; +}; + +&codec { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&reg_dcdc2>; }; &ehci0 { @@ -109,10 +129,14 @@ }; }; +&mmc0_pins_a { + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>; - vmmc-supply = <&reg_vcc3v3>; + vmmc-supply = <&wifi_reg_on>; bus-width = <4>; non-removable; status = "okay"; @@ -134,6 +158,13 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 { + allwinner,pins = "PC19"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + chip_id_det_pin: chip_id_det_pin@0 { allwinner,pins = "PG2"; allwinner,function = "gpio_in"; @@ -167,6 +198,20 @@ regulator-always-on; }; +&reg_ldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vdd-wifi1"; + regulator-always-on; +}; + +&reg_ldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vdd-wifi2"; + regulator-always-on; +}; + &reg_ldo5 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi index 9ffee9b..59a9426 100644 --- a/arch/arm/dts/sun5i.dtsi +++ b/arch/arm/dts/sun5i.dtsi @@ -44,6 +44,7 @@ #include "skeleton.dtsi" +#include <dt-bindings/clock/sun4i-a10-pll2.h> #include <dt-bindings/dma/sun4i-a10.h> #include <dt-bindings/pinctrl/sun4i-a10.h> @@ -102,6 +103,15 @@ clock-output-names = "pll1"; }; + pll2: clk@01c20008 { + #clock-cells = <1>; + compatible = "allwinner,sun5i-a13-pll2-clk"; + reg = <0x01c20008 0x8>; + clocks = <&osc24M>; + clock-output-names = "pll2-1x", "pll2-2x", + "pll2-4x", "pll2-8x"; + }; + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk"; @@ -285,6 +295,14 @@ clock-output-names = "usb_ohci0", "usb_phy"; }; + codec_clk: clk@01c20140 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-codec-clk"; + reg = <0x01c20140 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "codec"; + }; + mbus_clk: clk@01c2015c { #clock-cells = <0>; compatible = "allwinner,sun5i-a13-mbus-clk"; @@ -571,6 +589,19 @@ status = "disabled"; }; + codec: codec@01c22c00 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun4i-a10-codec"; + reg = <0x01c22c00 0x40>; + interrupts = <30>; + clocks = <&apb0_gates 0>, <&codec_clk>; + clock-names = "apb", "codec"; + dmas = <&dma SUN4I_DMA_NORMAL 19>, + <&dma SUN4I_DMA_NORMAL 19>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + sid: eeprom@01c23800 { compatible = "allwinner,sun4i-a10-sid"; reg = <0x01c23800 0x10>; diff --git a/arch/arm/dts/sun6i-a31-colombus.dts b/arch/arm/dts/sun6i-a31-colombus.dts index 0d0b6f2..f9cf368 100644 --- a/arch/arm/dts/sun6i-a31-colombus.dts +++ b/arch/arm/dts/sun6i-a31-colombus.dts @@ -60,6 +60,16 @@ chosen { stdout-path = "serial0:115200n8"; }; + + i2c_lcd: i2c@0 { + /* The lcd panel i2c interface is hooked up via gpios */ + compatible = "i2c-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c_lcd_pins>; + gpios = <&pio 0 23 GPIO_ACTIVE_HIGH>, /* PA23, sda */ + <&pio 0 24 GPIO_ACTIVE_HIGH>; /* PA24, scl */ + i2c-gpio,delay-us = <5>; + }; }; &ehci1 { @@ -94,6 +104,13 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins_a>; status = "okay"; + + mma8452: mma8452@1d { + compatible = "fsl,mma8452"; + reg = <0x1d>; + interrupt-parent = <&pio>; + interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PA9 */ + }; }; &mmc0 { @@ -124,6 +141,13 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + i2c_lcd_pins: i2c_lcd_pin@0 { + allwinner,pins = "PA23", "PA24"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; }; &reg_usb2_vbus { diff --git a/arch/arm/dts/sun6i-a31-hummingbird.dts b/arch/arm/dts/sun6i-a31-hummingbird.dts index d0cfada..9a74637 100644 --- a/arch/arm/dts/sun6i-a31-hummingbird.dts +++ b/arch/arm/dts/sun6i-a31-hummingbird.dts @@ -54,6 +54,8 @@ compatible = "merrii,a31-hummingbird", "allwinner,sun6i-a31"; aliases { + rtc0 = &pcf8563; + rtc1 = &rtc; serial0 = &uart0; }; @@ -67,13 +69,17 @@ }; }; +&cpu0 { + cpu-supply = <&reg_dcdc3>; +}; + &ehci0 { status = "okay"; }; &gmac { pinctrl-names = "default"; - pinctrl-0 = <&gmac_pins_rgmii_a>; + pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_hummingbird>; phy = <&phy1>; phy-mode = "rgmii"; snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; @@ -119,7 +125,7 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>; - vmmc-supply = <&vcc_3v0>; + vmmc-supply = <&reg_dcdc1>; bus-width = <4>; cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ cd-inverted; @@ -134,7 +140,7 @@ &mmc1 { pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins_a>, <&wifi_reset_pin_hummingbird>; - vmmc-supply = <&vcc_wifi>; + vmmc-supply = <&reg_aldo1>; mmc-pwrseq = <&wifi_pwrseq>; bus-width = <4>; non-removable; @@ -146,6 +152,13 @@ }; &pio { + gmac_phy_reset_pin_hummingbird: gmac_phy_reset_pin@0 { + allwinner,pins = "PA21"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 { allwinner,pins = "PA8"; allwinner,function = "gpio_in"; @@ -164,70 +177,69 @@ &p2wi { status = "okay"; - axp221: pmic@68 { + axp22x: pmic@68 { compatible = "x-powers,axp221"; reg = <0x68>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <1>; - dcdc1-supply = <&vcc_3v0>; - dcdc5-supply = <&vcc_dram>; - - regulators { - x-powers,dcdc-freq = <3000>; - - vcc_3v0: dcdc1 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "vcc-3v0"; - }; - - vdd_cpu: dcdc2 { - regulator-always-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1320000>; - regulator-name = "vdd-cpu"; - }; - - vdd_gpu: dcdc3 { - regulator-always-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1320000>; - regulator-name = "vdd-gpu"; - }; - - vdd_sys_dll: dcdc4 { - regulator-always-on; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-name = "vdd-sys-dll"; - }; - - vcc_dram: dcdc5 { - regulator-always-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vcc-dram"; - }; - - vcc_wifi: aldo1 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_wifi"; - }; - - avcc: aldo3 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; - }; - }; }; }; +#include "axp22x.dtsi" + +&reg_aldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +&reg_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc"; +}; + +&reg_dc5ldo { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpus"; +}; + +&reg_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +&reg_dcdc2 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-gpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc4 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-sys-dll"; +}; + +&reg_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + &reg_usb1_vbus { gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */ status = "okay"; diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi index 44f889f..1867af2 100644 --- a/arch/arm/dts/sun6i-a31.dtsi +++ b/arch/arm/dts/sun6i-a31.dtsi @@ -61,7 +61,7 @@ #size-cells = <1>; ranges; - framebuffer@0 { + simplefb_hdmi: framebuffer@0 { compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; @@ -69,7 +69,7 @@ status = "disabled"; }; - framebuffer@1 { + simplefb_lcd: framebuffer@1 { compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; @@ -252,6 +252,20 @@ compatible = "allwinner,sun6i-a31-ahb1-gates-clk"; reg = <0x01c20060 0x8>; clocks = <&ahb1>; + clock-indices = <1>, <5>, + <6>, <8>, <9>, + <10>, <11>, <12>, + <13>, <14>, + <17>, <18>, <19>, + <20>, <21>, <22>, + <23>, <24>, <26>, + <27>, <29>, + <30>, <31>, <32>, + <36>, <37>, <40>, + <43>, <44>, <45>, + <46>, <47>, <50>, + <52>, <55>, <56>, + <57>, <58>; clock-output-names = "ahb1_mipidsi", "ahb1_ss", "ahb1_dma", "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", "ahb1_mmc3", "ahb1_nand1", @@ -281,6 +295,9 @@ compatible = "allwinner,sun6i-a31-apb1-gates-clk"; reg = <0x01c20068 0x4>; clocks = <&apb1>; + clock-indices = <0>, <4>, + <5>, <12>, + <13>; clock-output-names = "apb1_codec", "apb1_digital_mic", "apb1_pio", "apb1_daudio0", "apb1_daudio1"; @@ -299,6 +316,10 @@ compatible = "allwinner,sun6i-a31-apb2-gates-clk"; reg = <0x01c2006c 0x4>; clocks = <&apb2>; + clock-indices = <0>, <1>, + <2>, <3>, <16>, + <17>, <18>, <19>, + <20>, <21>; clock-output-names = "apb2_i2c0", "apb2_i2c1", "apb2_i2c2", "apb2_i2c3", "apb2_uart0", "apb2_uart1", @@ -346,6 +367,14 @@ "mmc3_sample"; }; + ss_clk: clk@01c2009c { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c2009c 0x4>; + clocks = <&osc24M>, <&pll6 0>; + clock-output-names = "ss"; + }; + spi0_clk: clk@01c200a0 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; @@ -384,6 +413,9 @@ compatible = "allwinner,sun6i-a31-usb-clk"; reg = <0x01c200cc 0x4>; clocks = <&osc24M>; + clock-indices = <8>, <9>, <10>, + <16>, <17>, + <18>; clock-output-names = "usb_phy0", "usb_phy1", "usb_phy2", "usb_ohci0", "usb_ohci1", "usb_ohci2"; @@ -677,6 +709,16 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + mmc3_8bit_emmc_pins: mmc3@1 { + allwinner,pins = "PC6", "PC7", "PC8", "PC9", + "PC10", "PC11", "PC12", + "PC13", "PC14", "PC15", + "PC24"; + allwinner,function = "mmc3"; + allwinner,drive = <SUN4I_PINCTRL_40_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + gmac_pins_mii_a: gmac_mii@0 { allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA8", "PA9", "PA11", @@ -754,6 +796,13 @@ reg = <0x01c20ca0 0x20>; }; + lradc: lradc@01c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x100>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + rtp: rtp@01c25000 { compatible = "allwinner,sun6i-a31-ts"; reg = <0x01c25000 0x100>; @@ -900,6 +949,16 @@ #size-cells = <0>; }; + crypto: crypto-engine@01c15000 { + compatible = "allwinner,sun4i-a10-crypto"; + reg = <0x01c15000 0x1000>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ahb1_gates 5>, <&ss_clk>; + clock-names = "ahb", "mod"; + resets = <&ahb1_rst 5>; + reset-names = "ahb"; + }; + timer@01c60000 { compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer"; @@ -1061,7 +1120,7 @@ resets = <&apb0_rst 0>; gpio-controller; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <3>; #size-cells = <0>; #gpio-cells = <3>; diff --git a/arch/arm/dts/sun6i-a31s-primo81.dts b/arch/arm/dts/sun6i-a31s-primo81.dts index cfdc03e..379746a 100644 --- a/arch/arm/dts/sun6i-a31s-primo81.dts +++ b/arch/arm/dts/sun6i-a31s-primo81.dts @@ -1,16 +1,57 @@ /* - * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * Copyright 2014 Siarhei Siamashka <siarhei.siamashka(a)gmail.com> + * Copyright 2015 Karsten Merker <merker(a)debian.org> + * Copyright 2015 Chen-Yu Tsai <wens(a)csie.org> * - * Minimal dts file for the MSI Primo81 for u-boot only + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. * - * SPDX-License-Identifier: GPL-2.0+ or X11 + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; #include "sun6i-a31s.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> / { - model = "MSI Primo81"; + model = "MSI Primo81 tablet"; compatible = "msi,primo81", "allwinner,sun6i-a31s"; aliases { @@ -22,8 +63,202 @@ }; }; -&uart0 { +&cpu0 { + cpu-supply = <&reg_dcdc3>; +}; + +&ehci0 { + /* rtl8188etv wifi is connected here */ + status = "okay"; +}; + +&i2c0 { + /* pull-ups and device VDDIO use AXP221 DLDO3 */ + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "failed"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; + + ctp@5d { + pinctrl-names = "default"; + pinctrl-0 = <&gt911_int_primo81>; + compatible = "goodix,gt911"; + reg = <0x5d>; + interrupt-parent = <&pio>; + interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>; /* PA3 */ + touchscreen-swapped-x-y; + }; +}; + +&i2c2 { pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; + + accelerometer@1c { + pinctrl-names = "default"; + pinctrl-0 = <&mma8452_int_primo81>; + compatible = "fsl,mma8452"; + reg = <0x1c>; + interrupt-parent = <&pio>; + interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; /* PA9 */ + #io-channel-cells = <1>; + }; +}; + +&lradc { + vref-supply = <&reg_aldo3>; + status = "okay"; + + button@158 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <158730>; + }; + + button@349 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <349206>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_primo81>; + vmmc-supply = <&reg_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ + cd-inverted; + status = "okay"; +}; + +&pio { + gt911_int_primo81: gt911_int_pin@0 { + allwinner,pins = "PA3"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mma8452_int_primo81: mma8452_int_pin@0 { + allwinner,pins = "PA9"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + mmc0_cd_pin_primo81: mmc0_cd_pin@0 { + allwinner,pins = "PA8"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; +}; + +&p2wi { + status = "okay"; + + axp22x: pmic@68 { + compatible = "x-powers,axp221"; + reg = <0x68>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +#include "axp22x.dtsi" + +&reg_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc"; +}; + +&reg_dc1sw { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-lcd"; +}; + +&reg_dc5ldo { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpus"; /* This is an educated guess */ +}; + +&reg_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +&reg_dcdc2 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-gpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc4 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-sys-dll"; +}; + +&reg_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +&reg_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +&reg_dldo3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vddio-csi"; +}; + +&reg_eldo3 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-mipi-bridge"; +}; + +&simplefb_lcd { + vcc-lcd-supply = <&reg_dc1sw>; + vdd-mipi-bridge-supply = <&reg_eldo3>; +}; + +&usb_otg { + /* otg support requires support for AXP221 usb-power-supply and GPIO */ + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <&reg_dldo1>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi similarity index 60% copy from arch/arm/dts/sun7i-a20-wexler-tab7200.dts copy to arch/arm/dts/sun6i-a31s-sina31s-core.dtsi index 83c6d3f..4ec0c86 100644 --- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts +++ b/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi @@ -1,6 +1,5 @@ /* - * Copyright 2015 Aleksei Mamlin - * Aleksei Mamlin <mamlinav(a)gmail.com> + * Copyright 2015 Chen-Yu Tsai <wens(a)csie.org> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -42,142 +41,102 @@ */ /dts-v1/; -#include "sun7i-a20.dtsi" +#include "sun6i-a31s.dtsi" #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> / { - model = "Wexler TAB7200"; - compatible = "wexler,tab7200", "allwinner,sun7i-a20"; + model = "Sinlinx SinA31s Core Board"; + compatible = "sinlinx,sina31s", "allwinner,sun6i-a31s"; aliases { serial0 = &uart0; }; - - chosen { - stdout-path = "serial0:115200n8"; - }; }; &cpu0 { - cpu-supply = <&reg_dcdc2>; -}; - -&ehci0 { - status = "okay"; + cpu-supply = <&reg_dcdc3>; }; -&ehci1 { +/* eMMC on core board */ +&mmc3 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_8bit_emmc_pins>; + vmmc-supply = <&reg_dcdc1>; + vqmmc-supply = <&reg_dcdc1>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; status = "okay"; }; -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; +/* AXP221s PMIC on core board */ +&p2wi { status = "okay"; - axp209: pmic@34 { - reg = <0x34>; + axp22x: pmic@68 { + compatible = "x-powers,axp221"; + reg = <0x68>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; }; }; -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; -}; +#include "axp22x.dtsi" -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_a>; - status = "okay"; -}; - -&lradc { - vref-supply = <&reg_vcc3v0>; - status = "okay"; - - button@571 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <571428>; - }; - - button@761 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <761904>; - }; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; - vmmc-supply = <&reg_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ - cd-inverted; - status = "okay"; +&reg_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc"; }; -&ohci0 { - status = "okay"; +&reg_dc5ldo { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpus"; }; -&ohci1 { - status = "okay"; +&reg_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; }; -#include "axp209.dtsi" - &reg_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1450000>; - regulator-name = "vdd-cpu"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-gpu"; }; &reg_dcdc3 { regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-int-dll"; -}; - -&reg_ldo1 { - regulator-name = "vdd-rtc"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpu"; }; -&reg_ldo2 { +&reg_dcdc4 { regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-sys-dll"; }; -&reg_usb1_vbus { - status = "okay"; -}; - -&reg_usb2_vbus { - status = "okay"; +&reg_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; }; +/* UART0 pads available on core board */ &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; -&usbphy { - usb1_vbus-supply = <&reg_usb1_vbus>; - usb2_vbus-supply = <&reg_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/dts/sun6i-a31s-sina31s.dts similarity index 67% copy from arch/arm/dts/sun8i-a23-gt90h-v4.dts copy to arch/arm/dts/sun6i-a31s-sina31s.dts index 1aeb06c..6ead2f5 100644 --- a/arch/arm/dts/sun8i-a23-gt90h-v4.dts +++ b/arch/arm/dts/sun6i-a31s-sina31s.dts @@ -1,5 +1,5 @@ /* - * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * Copyright 2015 Chen-Yu Tsai <wens(a)csie.org> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -40,104 +40,112 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/dts-v1/; -#include "sun8i-a23.dtsi" -#include "sunxi-common-regulators.dtsi" +/* The SinA31s development board has the SinA31s core board soldered on */ +#include "sun6i-a31s-sina31s-core.dtsi" -#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> / { - model = "Allwinner GT90H Quad Core Tablet (v4)"; - compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a33"; - - aliases { - serial0 = &r_uart; - }; + model = "Sinlinx SinA31s Development Board"; + compatible = "sinlinx,sina31s-sdk", "allwinner,sun6i-a31s"; chosen { stdout-path = "serial0:115200n8"; }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_sina31s>; + + status { + label = "sina31s:status:usr"; + gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */ + }; + }; }; &ehci0 { + /* USB 2.0 4 port hub IC */ + status = "okay"; +}; + +&ehci1 { status = "okay"; }; -&i2c0 { +&gmac { pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; + pinctrl-0 = <&gmac_pins_mii_a>; + phy = <&phy1>; + phy-mode = "mii"; + phy-supply = <&reg_dldo1>; status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; }; -&i2c1 { +&ir { pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; + pinctrl-0 = <&ir_pins_a>; status = "okay"; }; &lradc { - vref-supply = <&reg_vcc3v0>; + vref-supply = <&reg_aldo3>; status = "okay"; - button@200 { + button@158 { label = "Volume Up"; linux,code = <KEY_VOLUMEUP>; channel = <0>; - voltage = <200000>; + voltage = <158730>; }; - button@400 { + button@349 { label = "Volume Down"; linux,code = <KEY_VOLUMEDOWN>; channel = <0>; - voltage = <400000>; - }; - - button@600 { - label = "Back"; - linux,code = <KEY_BACK>; - channel = <0>; - voltage = <600000>; + voltage = <349206>; }; }; &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gt90h>; - /* FIXME this really is aldo1, correct once we've pmic support */ - vmmc-supply = <&reg_vcc3v0>; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina31s>; + vmmc-supply = <&reg_dcdc1>; bus-width = <4>; - cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-gpios = <&pio 0 4 GPIO_ACTIVE_HIGH>; /* PA4 */ cd-inverted; status = "okay"; }; +&ohci1 { + status = "okay"; +}; + &pio { - mmc0_cd_pin_gt90h: mmc0_cd_pin@0 { - allwinner,pins = "PB4"; + led_pin_sina31s: led_pin@0 { + allwinner,pins = "PH13"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc0_cd_pin_sina31s: mmc0_cd_pin@0 { + allwinner,pins = "PA4"; allwinner,function = "gpio_in"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; }; -&r_uart { - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins_a>; - status = "okay"; -}; - -/* - * FIXME for now we only support host mode and rely on u-boot to have - * turned on Vbus which is controlled by the axp223 pmic on the board. - * - * Once we have axp223 support we should switch to fully supporting otg. - */ -&usb_otg { - dr_mode = "host"; - status = "okay"; +&reg_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-gmac-phy"; }; &usbphy { diff --git a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts similarity index 62% copy from arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts copy to arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts index 223515e..360adfb 100644 --- a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts +++ b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts @@ -1,5 +1,5 @@ /* - * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * Copyright 2015 Lawrence Yu <lyu(a)micile.com> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -41,19 +41,20 @@ */ /dts-v1/; -#include "sun4i-a10.dtsi" +#include "sun6i-a31s.dtsi" #include "sunxi-common-regulators.dtsi" + #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/sun4i-a10.h> / { - model = "Point of View Protab2-IPS9"; - compatible = "pov,protab2-ips9", "allwinner,sun4i-a10"; + model = "Yones TopTech BS1078 v2 Tablet"; + compatible = "yones-toptech,bs1078-v2", "allwinner,sun6i-a31s"; aliases { serial0 = &uart0; + i2c1 = &i2c1; + i2c2 = &i2c2; }; chosen { @@ -61,130 +62,134 @@ }; }; -&cpu0 { - cpu-supply = <&reg_dcdc2>; -}; - -&ehci0 { +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; status = "okay"; }; -&i2c0 { +&i2c2 { pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; + pinctrl-0 = <&i2c2_pins_a>; status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; }; -#include "axp209.dtsi" - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; +&ehci0 { status = "okay"; }; -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_a>; +&ehci1 { status = "okay"; }; -&lradc { - vref-supply = <&reg_ldo2>; +&ohci0 { status = "okay"; +}; - button@400 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <400000>; - }; +&ohci1 { + status = "okay"; +}; - button@800 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <800000>; +&pio { + mmc0_cd_pin_bs1078v2: mmc0_cd_pin@0 { + allwinner,pins = "PA8"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; }; &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; - vmmc-supply = <&reg_vcc3v3>; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bs1078v2>; + vmmc-supply = <&reg_vcc3v0>; bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ cd-inverted; status = "okay"; }; -&otg_sram { - status = "okay"; +&mmc0_pins_a { + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; -&pio { - usb0_id_detect_pin: usb0_id_detect_pin@0 { - allwinner,pins = "PH4"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; +&p2wi { + status = "okay"; - usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { - allwinner,pins = "PH5"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + axp22x: pmic@68 { + compatible = "x-powers,axp221"; + reg = <0x68>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; }; }; -&reg_dcdc2 { +#include "axp22x.dtsi" + +&reg_aldo3 { regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "avcc"; }; -&reg_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; +&reg_dc1sw { + regulator-name = "vcc-lcd-usb2"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; }; -&reg_ldo1 { - regulator-name = "vdd-rtc"; +&reg_dc5ldo { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpus"; }; -&reg_ldo2 { +&reg_dcdc1 { regulator-always-on; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; + regulator-name = "vcc-3v0"; +}; + +&reg_dcdc2 { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-gpu"; }; -&reg_ldo3 { - /* - * We need to always power the camera sensor, otherwhise all access - * to i2c1 is blocked. - */ +&reg_dcdc3 { regulator-always-on; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-name = "vdd-csi"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-cpu"; }; -&reg_usb0_vbus { - status = "okay"; +&reg_dcdc4 { + regulator-always-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1320000>; + regulator-name = "vdd-sys-dll"; }; -&reg_usb1_vbus { - status = "okay"; +&reg_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +&reg_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +/* Voltage source for I2C pullup resistors for I2C Bus 0 */ +&reg_dldo3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vddio-csi"; }; &uart0 { @@ -193,17 +198,8 @@ status = "okay"; }; -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - &usbphy { - pinctrl-names = "default"; - pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; - usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - usb0_vbus-supply = <&reg_usb0_vbus>; - usb1_vbus-supply = <&reg_usb1_vbus>; + usb1_vbus-supply = <&reg_dldo1>; + usb2_vbus-supply = <&reg_dc1sw>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-bananapi.dts b/arch/arm/dts/sun7i-a20-bananapi.dts index 9f7b472..67c8a76 100644 --- a/arch/arm/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/dts/sun7i-a20-bananapi.dts @@ -92,6 +92,24 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&reg_dcdc2>; + operating-points = < + /* kHz uV */ + 960000 1400000 + 912000 1400000 + 864000 1350000 + 720000 1250000 + 528000 1150000 + 312000 1100000 + 144000 1050000 + >; +}; + &ehci0 { status = "okay"; }; @@ -119,13 +137,9 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; @@ -159,7 +173,18 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + mmc0_cd_pin_bananapi: mmc0_cd_pin@0 { allwinner,pins = "PH10"; allwinner,function = "gpio_in"; @@ -182,6 +207,37 @@ }; }; +#include "axp209.dtsi" + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +&reg_usb0_vbus { + status = "okay"; +}; + &reg_usb1_vbus { status = "okay"; }; @@ -216,7 +272,21 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-cubieboard2.dts b/arch/arm/dts/sun7i-a20-cubieboard2.dts index 39a51d5..1fa832d 100644 --- a/arch/arm/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/dts/sun7i-a20-cubieboard2.dts @@ -84,6 +84,10 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + &cpu0 { cpu-supply = <&reg_dcdc2>; }; @@ -150,6 +154,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_cubieboard2: led_pins@0 { allwinner,pins = "PH20", "PH21"; @@ -157,12 +165,24 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; }; &reg_ahci_5v { status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + #include "axp209.dtsi" &reg_dcdc2 { @@ -205,6 +225,9 @@ }; &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-cubietruck.dts b/arch/arm/dts/sun7i-a20-cubietruck.dts index e6b0192..8da939a 100644 --- a/arch/arm/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/dts/sun7i-a20-cubietruck.dts @@ -101,6 +101,10 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + &cpu0 { cpu-supply = <&reg_dcdc2>; }; diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-icnova-swac.dts similarity index 85% copy from arch/arm/dts/sun7i-a20-wexler-tab7200.dts copy to arch/arm/dts/sun7i-a20-icnova-swac.dts index 83c6d3f..f5b5325 100644 --- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts +++ b/arch/arm/dts/sun7i-a20-icnova-swac.dts @@ -1,6 +1,5 @@ /* - * Copyright 2015 Aleksei Mamlin - * Aleksei Mamlin <mamlinav(a)gmail.com> + * Copyright 2015 Stefan Roese <sr(a)denx.de> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -46,12 +45,12 @@ #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> / { - model = "Wexler TAB7200"; - compatible = "wexler,tab7200", "allwinner,sun7i-a20"; + model = "ICnova-A20 SWAC"; + compatible = "swac,icnova-a20-swac", "incircuit,icnova-a20", "allwinner,sun7i-a20"; aliases { serial0 = &uart0; @@ -74,6 +73,18 @@ status = "okay"; }; +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_mii_a>; + phy = <&phy1>; + phy-mode = "mii"; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; @@ -92,37 +103,12 @@ status = "okay"; }; -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_a>; - status = "okay"; -}; - -&lradc { - vref-supply = <&reg_vcc3v0>; - status = "okay"; - - button@571 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <571428>; - }; - - button@761 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <761904>; - }; -}; - &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <&reg_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-gpios = <&pio 8 5 GPIO_ACTIVE_HIGH>; /* PI5 */ cd-inverted; status = "okay"; }; @@ -140,7 +126,7 @@ &reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1450000>; + regulator-max-microvolt = <1400000>; regulator-name = "vdd-cpu"; }; diff --git a/arch/arm/dts/sun4i-a10-mk802.dts b/arch/arm/dts/sun7i-a20-itead-ibox.dts similarity index 70% copy from arch/arm/dts/sun4i-a10-mk802.dts copy to arch/arm/dts/sun7i-a20-itead-ibox.dts index 3c7eebe..661c21d 100644 --- a/arch/arm/dts/sun4i-a10-mk802.dts +++ b/arch/arm/dts/sun7i-a20-itead-ibox.dts @@ -1,5 +1,5 @@ /* - * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * Copyright 2015 - Marcus Cooper <codekipper(a)gmail.com> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -41,72 +41,85 @@ */ /dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> +#include "sun7i-a20.dtsi" +#include "sunxi-itead-core-common.dtsi" / { - model = "MK802"; - compatible = "allwinner,mk802", "allwinner,sun4i-a10"; + model = "Itead Ibox A20"; + compatible = "itead,itead-ibox-a20", "allwinner,sun7i-a20"; - aliases { - serial0 = &uart0; - }; + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_itead_core>; + + green { + label = "itead_core:green:usr"; + gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; - chosen { - stdout-path = "serial0:115200n8"; + blue { + label = "itead_core:blue:usr"; + gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; }; }; -&ehci0 { +&ahci { + target-supply = <&reg_ahci_5v>; status = "okay"; }; -&ehci1 { +&codec { status = "okay"; }; -&mmc0 { +&gmac { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; - vmmc-supply = <&reg_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ - cd-inverted; + pinctrl-0 = <&gmac_pins_mii_a>; + phy = <&phy1>; + phy-mode = "mii"; status = "okay"; -}; -&ohci0 { - status = "okay"; + phy1: ethernet-phy@1 { + reg = <1>; + }; }; -&pio { - usb2_vbus_pin_mk802: usb2_vbus_pin@0 { - allwinner,pins = "PH12"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; +&i2c0 { + axp209: pmic@34 { + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; }; }; -&reg_usb1_vbus { +&ir0 { + pinctrl-names = "default"; + pinctrl-0 = <&ir0_rx_pins_a>; status = "okay"; }; -&reg_usb2_vbus { - pinctrl-0 = <&usb2_vbus_pin_mk802>; - gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */ +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; status = "okay"; }; -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; +&pio { + led_pins_itead_core: led_pins@0 { + allwinner,pins = "PH20","PH21"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_20_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; -&usbphy { - usb1_vbus-supply = <&reg_usb1_vbus>; - usb2_vbus-supply = <&reg_usb2_vbus>; +&reg_ahci_5v { status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/dts/sun7i-a20-lamobo-r1.dts index 975b0b2..5ee43d8 100644 --- a/arch/arm/dts/sun7i-a20-lamobo-r1.dts +++ b/arch/arm/dts/sun7i-a20-lamobo-r1.dts @@ -97,16 +97,6 @@ &cpu0 { cpu-supply = <&reg_dcdc2>; - operating-points = < - /* kHz uV */ - 960000 1400000 - 912000 1400000 - 864000 1350000 - 720000 1250000 - 528000 1150000 - 312000 1100000 - 144000 1050000 - >; }; &ehci0 { diff --git a/arch/arm/dts/sun7i-a20-mk808c.dts b/arch/arm/dts/sun7i-a20-mk808c.dts index 4f432f8..90ff4a2 100644 --- a/arch/arm/dts/sun7i-a20-mk808c.dts +++ b/arch/arm/dts/sun7i-a20-mk808c.dts @@ -53,6 +53,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pinctrl/sun4i-a10.h> / { model = "mk808c"; @@ -68,6 +69,10 @@ }; }; +&codec { + status = "okay"; +}; + &ehci0 { status = "okay"; }; @@ -121,6 +126,30 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + +&pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&reg_usb0_vbus { + status = "okay"; +}; + &reg_usb1_vbus { status = "okay"; }; @@ -141,7 +170,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts index 6904dbd..23aacce 100644 --- a/arch/arm/dts/sun7i-a20-olimex-som-evb.dts +++ b/arch/arm/dts/sun7i-a20-olimex-som-evb.dts @@ -1,5 +1,6 @@ /* * Copyright 2015 - Marcus Cooper <codekipper(a)gmail.com> + * Copyright 2015 - Karsten Merker <merker(a)debian.org> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -45,6 +46,7 @@ #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pinctrl/sun4i-a10.h> @@ -71,14 +73,6 @@ default-state = "on"; }; }; - - reg_axp_ipsout: axp_ipsout { - compatible = "regulator-fixed"; - regulator-name = "axp-ipsout"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; }; &ahci { @@ -94,6 +88,10 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + &gmac { pinctrl-names = "default"; pinctrl-0 = <&gmac_pins_rgmii_a>; @@ -118,10 +116,58 @@ }; }; -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; +&lradc { + vref-supply = <&reg_vcc3v0>; status = "okay"; + + button@190 { + label = "Volume Up"; + linux,code = <KEY_VOLUMEUP>; + channel = <0>; + voltage = <190000>; + }; + + button@390 { + label = "Volume Down"; + linux,code = <KEY_VOLUMEDOWN>; + channel = <0>; + voltage = <390000>; + }; + + button@600 { + label = "Menu"; + linux,code = <KEY_MENU>; + channel = <0>; + voltage = <600000>; + }; + + button@800 { + label = "Search"; + linux,code = <KEY_SEARCH>; + channel = <0>; + voltage = <800000>; + }; + + button@980 { + label = "Home"; + linux,code = <KEY_HOMEPAGE>; + channel = <0>; + voltage = <980000>; + }; + + button@1180 { + label = "Esc"; + linux,code = <KEY_ESC>; + channel = <0>; + voltage = <1180000>; + }; + + button@1400 { + label = "Enter"; + linux,code = <KEY_ENTER>; + channel = <0>; + voltage = <1400000>; + }; }; &mmc0 { @@ -134,6 +180,16 @@ status = "okay"; }; +&mmc3 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olimex_som_evb>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 0 GPIO_ACTIVE_HIGH>; /* PH0 */ + cd-inverted; + status = "okay"; +}; + &ohci0 { status = "okay"; }; @@ -161,15 +217,22 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + mmc3_cd_pin_olimex_som_evb: mmc3_cd_pin@0 { + allwinner,pins = "PH0"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + usb0_id_detect_pin: usb0_id_detect_pin@0 { - allwinner,pins = "PH04"; + allwinner,pins = "PH4"; allwinner,function = "gpio_in"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { - allwinner,pins = "PH05"; + allwinner,pins = "PH5"; allwinner,function = "gpio_in"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; @@ -187,7 +250,7 @@ &reg_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1425000>; + regulator-max-microvolt = <1400000>; regulator-name = "vdd-cpu"; }; @@ -235,8 +298,8 @@ &usbphy { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; - usb0_id_det-gpios = <&pio 7 04 GPIO_ACTIVE_HIGH>; /* PH04 */ - usb0_vbus_det-gpios = <&pio 7 05 GPIO_ACTIVE_HIGH>; /* PH05 */ + usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH04 */ + usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH05 */ usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts index 0423708..35ad700 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime.dts @@ -117,6 +117,18 @@ }; }; +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index 8acff78..d5c796c 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -170,6 +170,12 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_a>; status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + }; }; &mmc0 { @@ -190,6 +196,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 { allwinner,pins = "PC3"; @@ -204,6 +214,27 @@ allwinner,drive = <SUN4I_PINCTRL_20_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + + usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 { + allwinner,pins = "PH5"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_DOWN>; + }; + + usb0_vbus_pin_lime2: usb0_vbus_pin@0 { + allwinner,pins = "PC17"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; &reg_ahci_5v { @@ -212,6 +243,12 @@ status = "okay"; }; +&reg_usb0_vbus { + pinctrl-0 = <&usb0_vbus_pin_lime2>; + gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + &reg_usb1_vbus { status = "okay"; }; @@ -226,7 +263,17 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts index c5d70ca..7e3006f 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-micro.dts @@ -125,6 +125,12 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_a>; status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + }; }; &i2c2 { diff --git a/arch/arm/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/dts/sun7i-a20-orangepi-mini.dts index 73cd81e..2be04c4 100644 --- a/arch/arm/dts/sun7i-a20-orangepi-mini.dts +++ b/arch/arm/dts/sun7i-a20-orangepi-mini.dts @@ -95,6 +95,10 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + &ehci0 { status = "okay"; }; @@ -156,7 +160,18 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + mmc0_cd_pin_orangepi: mmc0_cd_pin@0 { allwinner,pins = "PH10"; allwinner,function = "gpio_in"; @@ -225,6 +240,10 @@ regulator-name = "avcc"; }; +&reg_usb0_vbus { + status = "okay"; +}; + &reg_usb1_vbus { pinctrl-0 = <&usb1_vbus_pin_bananapro>; gpio = <&pio 7 26 GPIO_ACTIVE_HIGH>; /* PH26 */ @@ -243,7 +262,21 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-orangepi.dts b/arch/arm/dts/sun7i-a20-orangepi.dts index 55a06ce..71125bf 100644 --- a/arch/arm/dts/sun7i-a20-orangepi.dts +++ b/arch/arm/dts/sun7i-a20-orangepi.dts @@ -141,7 +141,18 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + mmc0_cd_pin_orangepi: mmc0_cd_pin@0 { allwinner,pins = "PH10"; allwinner,function = "gpio_in"; @@ -203,6 +214,10 @@ regulator-name = "avcc"; }; +&reg_usb0_vbus { + status = "okay"; +}; + &reg_usb1_vbus { pinctrl-0 = <&usb1_vbus_pin_bananapro>; gpio = <&pio 7 26 GPIO_ACTIVE_HIGH>; /* PH26 */ @@ -221,7 +236,21 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts index 5361fce..ddac732 100644 --- a/arch/arm/dts/sun7i-a20-pcduino3-nano.dts +++ b/arch/arm/dts/sun7i-a20-pcduino3-nano.dts @@ -82,6 +82,14 @@ status = "okay"; }; +&codec { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + &ehci0 { status = "okay"; }; @@ -108,13 +116,9 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; @@ -142,6 +146,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { ahci_pwr_pin_pcduino3_nano: ahci_pwr_pin@0 { allwinner,pins = "PH2"; @@ -157,8 +165,15 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + usb1_vbus_pin_pcduino3_nano: usb1_vbus_pin@0 { - allwinner,pins = "PH11"; + allwinner,pins = "PD2"; allwinner,function = "gpio_out"; allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; @@ -171,13 +186,37 @@ status = "okay"; }; -&reg_usb1_vbus { - pinctrl-0 = <&usb1_vbus_pin_pcduino3_nano>; - gpio = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ - status = "okay"; +#include "axp209.dtsi" + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-pll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; }; -&reg_usb2_vbus { +/* A single regulator (U24) powers both USB host ports. */ +&reg_usb1_vbus { + pinctrl-0 = <&usb1_vbus_pin_pcduino3_nano>; + gpio = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */ status = "okay"; }; @@ -187,8 +226,16 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ usb1_vbus-supply = <&reg_usb1_vbus>; - usb2_vbus-supply = <&reg_usb2_vbus>; + usb2_vbus-supply = <&reg_usb1_vbus>; status = "okay"; }; diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts index afc9ece..1a8b39b 100644 --- a/arch/arm/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/dts/sun7i-a20-pcduino3.dts @@ -111,6 +111,14 @@ allwinner,pins = "PH2"; }; +&codec { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + &ehci0 { status = "okay"; }; @@ -137,16 +145,14 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; +#include "axp209.dtsi" + &ir0 { pinctrl-names = "default"; pinctrl-0 = <&ir0_rx_pins_a>; @@ -171,6 +177,10 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_pcduino3: led_pins@0 { allwinner,pins = "PH15", "PH16"; @@ -185,6 +195,13 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; }; &reg_ahci_5v { @@ -192,6 +209,31 @@ status = "okay"; }; +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-pll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + &reg_usb1_vbus { status = "okay"; }; @@ -206,7 +248,15 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts index 83c6d3f..2f6b21a 100644 --- a/arch/arm/dts/sun7i-a20-wexler-tab7200.dts +++ b/arch/arm/dts/sun7i-a20-wexler-tab7200.dts @@ -48,6 +48,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pwm/pwm.h> / { model = "Wexler TAB7200"; @@ -57,11 +58,28 @@ serial0 = &uart0; }; + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + pinctrl-names = "default"; + pinctrl-0 = <&bl_enable_pin>; + enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ + }; + chosen { stdout-path = "serial0:115200n8"; }; }; +&codec { + pinctrl-names = "default"; + pinctrl-0 = <&codec_pa_pin>; + allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */ + status = "okay"; +}; + &cpu0 { cpu-supply = <&reg_dcdc2>; }; @@ -86,6 +104,8 @@ }; }; +#include "axp209.dtsi" + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_a>; @@ -96,6 +116,18 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c2_pins_a>; status = "okay"; + + gt911: touchscreen@5d { + compatible = "goodix,gt911"; + reg = <0x5d>; + interrupt-parent = <&pio>; + interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; /* EINT21 (PH21) */ + pinctrl-names = "default"; + pinctrl-0 = <&ts_reset_pin>; + irq-gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* INT (PH21) */ + reset-gpios = <&pio 1 13 GPIO_ACTIVE_HIGH>; /* RST (PB13) */ + touchscreen-swapped-x-y; + }; }; &lradc { @@ -135,7 +167,45 @@ status = "okay"; }; -#include "axp209.dtsi" +&otg_sram { + status = "okay"; +}; + +&pio { + bl_enable_pin: bl_enable_pin@0 { + allwinner,pins = "PH7"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + codec_pa_pin: codec_pa_pin@0 { + allwinner,pins = "PH15"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + ts_reset_pin: ts_reset_pin@0 { + allwinner,pins = "PB13"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins_a>; + status = "okay"; +}; &reg_dcdc2 { regulator-always-on; @@ -162,6 +232,10 @@ regulator-name = "avcc"; }; +&reg_usb0_vbus { + status = "okay"; +}; + &reg_usb1_vbus { status = "okay"; }; @@ -176,7 +250,21 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <&reg_usb0_vbus>; usb1_vbus-supply = <&reg_usb1_vbus>; usb2_vbus-supply = <&reg_usb2_vbus>; status = "okay"; diff --git a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts index e7d84fe..dc31d47 100644 --- a/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts +++ b/arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts @@ -1,13 +1,52 @@ /* - * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * Copyright 2015 Jelle de Jong <jelledejong(a)powercraft.nl> * - * Minimal dts file for the Wits Pro A20 DKT for u-boot only + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. * - * SPDX-License-Identifier: GPL-2.0+ or X11 + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; #include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> / { model = "Wits Pro A20 DKT"; @@ -20,6 +59,17 @@ chosen { stdout-path = "serial0:115200n8"; }; + + mmc3_pwrseq: mmc3_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&vmmc3_pin_ap6xxx_wl_regon>; + reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */ + }; +}; + +&cpu0 { + cpu-supply = <&reg_dcdc2>; }; &ehci0 { @@ -42,6 +92,60 @@ }; }; +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + +#include "axp209.dtsi" + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +&mmc3 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins_a>; + vmmc-supply = <&reg_vcc3v3>; + mmc-pwrseq = <&mmc3_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + brcmf: bcrmf@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&pio>; + interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */ + interrupt-names = "host-wake"; + }; +}; + &ohci0 { status = "okay"; }; @@ -50,8 +154,85 @@ status = "okay"; }; +&otg_sram { + status = "okay"; +}; + +&pio { + vmmc3_pin_ap6xxx_wl_regon: vmmc3_pin@0 { + allwinner,pins = "PH9"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1450000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +&reg_usb0_vbus { + status = "okay"; +}; + +&reg_usb1_vbus { + status = "okay"; +}; + +&reg_usb2_vbus { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <&reg_usb0_vbus>; + usb1_vbus-supply = <&reg_usb1_vbus>; + usb2_vbus-supply = <&reg_usb2_vbus>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun7i-a20.dtsi b/arch/arm/dts/sun7i-a20.dtsi index 71ab6b8..0940a78 100644 --- a/arch/arm/dts/sun7i-a20.dtsi +++ b/arch/arm/dts/sun7i-a20.dtsi @@ -47,6 +47,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/clock/sun4i-a10-pll2.h> #include <dt-bindings/dma/sun4i-a10.h> #include <dt-bindings/pinctrl/sun4i-a10.h> @@ -67,7 +68,7 @@ "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>, - <&ahb_gates 44>; + <&ahb_gates 44>, <&dram_gates 26>; status = "disabled"; }; @@ -75,7 +76,8 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; - clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; + clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>, + <&dram_gates 26>; status = "disabled"; }; @@ -84,7 +86,7 @@ "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-tve0"; clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, - <&ahb_gates 44>; + <&ahb_gates 44>, <&dram_gates 26>; status = "disabled"; }; }; @@ -107,7 +109,7 @@ 720000 1200000 528000 1100000 312000 1000000 - 144000 900000 + 144000 1000000 >; #cooling-cells = <2>; cooling-min-level = <0>; @@ -199,6 +201,15 @@ clock-output-names = "pll1"; }; + pll2: clk@01c20008 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-pll2-clk"; + reg = <0x01c20008 0x8>; + clocks = <&osc24M>; + clock-output-names = "pll2-1x", "pll2-2x", + "pll2-4x", "pll2-8x"; + }; + pll4: clk@01c20018 { #clock-cells = <0>; compatible = "allwinner,sun7i-a20-pll4-clk"; @@ -267,6 +278,19 @@ compatible = "allwinner,sun7i-a20-ahb-gates-clk"; reg = <0x01c20060 0x8>; clocks = <&ahb>; + clock-indices = <0>, <1>, + <2>, <3>, <4>, + <5>, <6>, <7>, <8>, + <9>, <10>, <11>, <12>, + <13>, <14>, <16>, + <17>, <18>, <20>, <21>, + <22>, <23>, <25>, + <28>, <32>, <33>, <34>, + <35>, <36>, <37>, <40>, + <41>, <42>, <43>, + <44>, <45>, <46>, + <47>, <49>, <50>, + <52>; clock-output-names = "ahb_usb0", "ahb_ehci0", "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", @@ -295,6 +319,10 @@ compatible = "allwinner,sun7i-a20-apb0-gates-clk"; reg = <0x01c20068 0x4>; clocks = <&apb0>; + clock-indices = <0>, <1>, + <2>, <3>, <4>, + <5>, <6>, <7>, + <8>, <10>; clock-output-names = "apb0_codec", "apb0_spdif", "apb0_ac97", "apb0_iis0", "apb0_iis1", "apb0_pio", "apb0_ir0", "apb0_ir1", @@ -314,6 +342,12 @@ compatible = "allwinner,sun7i-a20-apb1-gates-clk"; reg = <0x01c2006c 0x4>; clocks = <&apb1>; + clock-indices = <0>, <1>, + <2>, <3>, <4>, + <5>, <6>, <7>, + <15>, <16>, <17>, + <18>, <19>, <20>, + <21>, <22>, <23>; clock-output-names = "apb1_i2c0", "apb1_i2c1", "apb1_i2c2", "apb1_i2c3", "apb1_can", "apb1_scr", "apb1_ps20", "apb1_ps21", @@ -442,6 +476,14 @@ clock-output-names = "ir1"; }; + keypad_clk: clk@01c200c4 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c200c4 0x4>; + clocks = <&osc24M>; + clock-output-names = "keypad"; + }; + usb_clk: clk@01c200cc { #clock-cells = <1>; #reset-cells = <1>; @@ -460,6 +502,48 @@ clock-output-names = "spi3"; }; + dram_gates: clk@01c20100 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-dram-gates-clk"; + reg = <0x01c20100 0x4>; + clocks = <&pll5 0>; + clock-indices = <0>, + <1>, <2>, + <3>, + <4>, + <5>, <6>, + <15>, + <24>, <25>, + <26>, <27>, + <28>, <29>; + clock-output-names = "dram_ve", + "dram_csi0", "dram_csi1", + "dram_ts", + "dram_tvd", + "dram_tve0", "dram_tve1", + "dram_output", + "dram_de_fe1", "dram_de_fe0", + "dram_de_be0", "dram_de_be1", + "dram_de_mp", "dram_ace"; + }; + + ve_clk: clk@01c2013c { + #clock-cells = <0>; + #reset-cells = <0>; + compatible = "allwinner,sun4i-a10-ve-clk"; + reg = <0x01c2013c 0x4>; + clocks = <&pll4>; + clock-output-names = "ve"; + }; + + codec_clk: clk@01c20140 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-codec-clk"; + reg = <0x01c20140 0x4>; + clocks = <&pll2 SUN4I_A10_PLL2_1X>; + clock-output-names = "codec"; + }; + mbus_clk: clk@01c2015c { #clock-cells = <0>; compatible = "allwinner,sun5i-a13-mbus-clk"; @@ -744,6 +828,14 @@ status = "disabled"; }; + crypto: crypto-engine@01c15000 { + compatible = "allwinner,sun4i-a10-crypto"; + reg = <0x01c15000 0x1000>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ahb_gates 5>, <&ss_clk>; + clock-names = "ahb", "mod"; + }; + spi2: spi@01c17000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c17000 0x1000>; @@ -1159,6 +1251,19 @@ status = "disabled"; }; + codec: codec@01c22c00 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun7i-a20-codec"; + reg = <0x01c22c00 0x40>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb0_gates 0>, <&codec_clk>; + clock-names = "apb", "codec"; + dmas = <&dma SUN4I_DMA_NORMAL 19>, + <&dma SUN4I_DMA_NORMAL 19>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + sid: eeprom@01c23800 { compatible = "allwinner,sun7i-a20-sid"; reg = <0x01c23800 0x200>; diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi index 9c4a55c..7e05e09 100644 --- a/arch/arm/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/dts/sun8i-a23-a33.dtsi @@ -56,7 +56,7 @@ #size-cells = <1>; ranges; - framebuffer@0 { + simplefb_lcd: framebuffer@0 { compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; @@ -175,27 +175,13 @@ clock-output-names = "apb1"; }; - ahb1_gates: clk@01c20060 { - #clock-cells = <1>; - compatible = "allwinner,sun8i-a23-ahb1-gates-clk"; - reg = <0x01c20060 0x8>; - clocks = <&ahb1>; - clock-output-names = "ahb1_mipidsi", "ahb1_dma", - "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", - "ahb1_nand", "ahb1_sdram", - "ahb1_hstimer", "ahb1_spi0", - "ahb1_spi1", "ahb1_otg", "ahb1_ehci", - "ahb1_ohci", "ahb1_ve", "ahb1_lcd", - "ahb1_csi", "ahb1_be", "ahb1_fe", - "ahb1_gpu", "ahb1_spinlock", - "ahb1_drc"; - }; - apb1_gates: clk@01c20068 { #clock-cells = <1>; compatible = "allwinner,sun8i-a23-apb1-gates-clk"; reg = <0x01c20068 0x4>; clocks = <&apb1>; + clock-indices = <0>, <5>, + <12>, <13>; clock-output-names = "apb1_codec", "apb1_pio", "apb1_daudio0", "apb1_daudio1"; }; @@ -213,6 +199,10 @@ compatible = "allwinner,sun8i-a23-apb2-gates-clk"; reg = <0x01c2006c 0x4>; clocks = <&apb2>; + clock-indices = <0>, <1>, + <2>, <16>, + <17>, <18>, + <19>, <20>; clock-output-names = "apb2_i2c0", "apb2_i2c1", "apb2_i2c2", "apb2_uart0", "apb2_uart1", "apb2_uart2", @@ -391,12 +381,19 @@ allwinner,pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", - "PC15"; + "PC15", "PC16"; allwinner,function = "mmc2"; allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + pwm0_pins: pwm0 { + allwinner,pins = "PH0"; + allwinner,function = "pwm0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + i2c0_pins_a: i2c0@0 { allwinner,pins = "PH2", "PH3"; allwinner,function = "i2c0"; @@ -451,6 +448,14 @@ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; }; + pwm: pwm@01c21400 { + compatible = "allwinner,sun7i-a20-pwm"; + reg = <0x01c21400 0xc>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + lradc: lradc@01c22800 { compatible = "allwinner,sun4i-a10-lradc-keys"; reg = <0x01c22800 0x100>; @@ -574,6 +579,14 @@ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; }; + nmi_intc: interrupt-controller@01f00c0c { + compatible = "allwinner,sun6i-a31-sc-nmi"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x01f00c0c 0x38>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + }; + prcm@01f01400 { compatible = "allwinner,sun8i-a23-prcm"; reg = <0x01f01400 0x200>; @@ -642,10 +655,18 @@ resets = <&apb0_rst 0>; gpio-controller; interrupt-controller; + #interrupt-cells = <3>; #address-cells = <1>; #size-cells = <0>; #gpio-cells = <3>; + r_rsb_pins: r_rsb { + allwinner,pins = "PL0", "PL1"; + allwinner,function = "s_rsb"; + allwinner,drive = <SUN4I_PINCTRL_20_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + r_uart_pins_a: r_uart@0 { allwinner,pins = "PL2", "PL3"; allwinner,function = "s_uart"; @@ -653,5 +674,19 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; }; + + r_rsb: rsb@01f03400 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x01f03400 0x400>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb0_gates 3>; + clock-frequency = <3000000>; + resets = <&apb0_rst 3>; + pinctrl-names = "default"; + pinctrl-0 = <&r_rsb_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; diff --git a/arch/arm/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/dts/sun8i-a23-gt90h-v4.dts index 1aeb06c..b2ce284 100644 --- a/arch/arm/dts/sun8i-a23-gt90h-v4.dts +++ b/arch/arm/dts/sun8i-a23-gt90h-v4.dts @@ -47,15 +47,26 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/pinctrl/sun4i-a10.h> +#include <dt-bindings/pwm/pwm.h> / { - model = "Allwinner GT90H Quad Core Tablet (v4)"; - compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a33"; + model = "Allwinner GT90H Dual Core Tablet (v4)"; + compatible = "allwinner,gt90h-v4", "allwinner,sun8i-a23"; aliases { serial0 = &r_uart; }; + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&bl_en_pin_gt90h>; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -106,8 +117,7 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gt90h>; - /* FIXME this really is aldo1, correct once we've pmic support */ - vmmc-supply = <&reg_vcc3v0>; + vmmc-supply = <&reg_aldo1>; bus-width = <4>; cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ cd-inverted; @@ -115,6 +125,13 @@ }; &pio { + bl_en_pin_gt90h: bl_en_pin@0 { + allwinner,pins = "PH6"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + mmc0_cd_pin_gt90h: mmc0_cd_pin@0 { allwinner,pins = "PB4"; allwinner,function = "gpio_in"; @@ -123,12 +140,106 @@ }; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>; + status = "okay"; +}; + +&r_rsb { + status = "okay"; + + axp22x: pmic@3a3 { + compatible = "x-powers,axp223"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <&reg_dcdc1>; + }; +}; + &r_uart { pinctrl-names = "default"; pinctrl-0 = <&r_uart_pins_a>; status = "okay"; }; +#include "axp22x.dtsi" + +&reg_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-io"; +}; + +&reg_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2350000>; + regulator-max-microvolt = <2650000>; + regulator-name = "vdd-dll"; +}; + +&reg_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pll-avcc"; +}; + +&reg_dc1sw { + regulator-name = "vcc-lcd"; +}; + +&reg_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpus"; +}; + +&reg_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-sys"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +&reg_dldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +&reg_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + +&simplefb_lcd { + vcc-lcd-supply = <&reg_dc1sw>; +}; + /* * FIXME for now we only support host mode and rely on u-boot to have * turned on Vbus which is controlled by the axp223 pmic on the board. @@ -141,5 +252,6 @@ }; &usbphy { + usb1_vbus-supply = <&reg_dldo1>; status = "okay"; }; diff --git a/arch/arm/dts/sun8i-a23.dtsi b/arch/arm/dts/sun8i-a23.dtsi index 2cc27c7..92e6616 100644 --- a/arch/arm/dts/sun8i-a23.dtsi +++ b/arch/arm/dts/sun8i-a23.dtsi @@ -50,6 +50,31 @@ }; clocks { + ahb1_gates: clk@01c20060 { + #clock-cells = <1>; + compatible = "allwinner,sun8i-a23-ahb1-gates-clk"; + reg = <0x01c20060 0x8>; + clocks = <&ahb1>; + clock-indices = <1>, <6>, + <8>, <9>, <10>, + <13>, <14>, + <19>, <20>, + <21>, <24>, <26>, + <29>, <32>, <36>, + <40>, <44>, <46>, + <52>, <53>, + <54>, <57>; + clock-output-names = "ahb1_mipidsi", "ahb1_dma", + "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", + "ahb1_nand", "ahb1_sdram", + "ahb1_hstimer", "ahb1_spi0", + "ahb1_spi1", "ahb1_otg", "ahb1_ehci", + "ahb1_ohci", "ahb1_ve", "ahb1_lcd", + "ahb1_csi", "ahb1_be", "ahb1_fe", + "ahb1_gpu", "ahb1_msgbox", + "ahb1_spinlock", "ahb1_drc"; + }; + mbus_clk: clk@01c2015c { #clock-cells = <0>; compatible = "allwinner,sun8i-a23-mbus-clk"; diff --git a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts index 1d5390d..fef6abc 100644 --- a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts +++ b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts @@ -68,7 +68,7 @@ }; &lradc { - vref-supply = <&reg_vcc3v0>; + vref-supply = <&reg_dcdc1>; status = "okay"; button@200 { @@ -96,7 +96,7 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina33>; - vmmc-supply = <&reg_vcc3v0>; + vmmc-supply = <&reg_dcdc1>; bus-width = <4>; cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ cd-inverted; @@ -106,13 +106,16 @@ &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; - vmmc-supply = <&reg_vcc3v0>; + vmmc-supply = <&reg_dcdc1>; bus-width = <8>; non-removable; + cap-mmc-hw-reset; status = "okay"; }; &mmc2_8bit_pins { + /* Increase drive strength for DDR modes */ + allwinner,drive = <SUN4I_PINCTRL_40_MA>; /* eMMC is missing pull-ups */ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; }; @@ -130,6 +133,80 @@ }; }; +&r_rsb { + status = "okay"; + + axp22x: pmic@3a3 { + compatible = "x-powers,axp223"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <&reg_dcdc1>; + }; +}; + +#include "axp22x.dtsi" + +&reg_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-io"; +}; + +&reg_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2350000>; + regulator-max-microvolt = <2650000>; + regulator-name = "vdd-dll"; +}; + +&reg_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pll-avcc"; +}; + +&reg_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpus"; +}; + +&reg_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-sys"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +&reg_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_b>; diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi index faa7d3c..001d840 100644 --- a/arch/arm/dts/sun8i-a33.dtsi +++ b/arch/arm/dts/sun8i-a33.dtsi @@ -72,6 +72,41 @@ clock-output-names = "pll11"; }; + ahb1_gates: clk@01c20060 { + #clock-cells = <1>; + compatible = "allwinner,sun8i-a33-ahb1-gates-clk"; + reg = <0x01c20060 0x8>; + clocks = <&ahb1>; + clock-indices = <1>, <5>, + <6>, <8>, <9>, + <10>, <13>, <14>, + <19>, <20>, + <21>, <24>, <26>, + <29>, <32>, <36>, + <40>, <44>, <46>, + <52>, <53>, + <54>, <57>, + <58>; + clock-output-names = "ahb1_mipidsi", "ahb1_ss", + "ahb1_dma","ahb1_mmc0", "ahb1_mmc1", + "ahb1_mmc2", "ahb1_nand", "ahb1_sdram", + "ahb1_hstimer", "ahb1_spi0", + "ahb1_spi1", "ahb1_otg", "ahb1_ehci", + "ahb1_ohci", "ahb1_ve", "ahb1_lcd", + "ahb1_csi", "ahb1_be", "ahb1_fe", + "ahb1_gpu", "ahb1_msgbox", + "ahb1_spinlock", "ahb1_drc", + "ahb1_sat"; + }; + + ss_clk: clk@01c2009c { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c2009c 0x4>; + clocks = <&osc24M>, <&pll6 0>; + clock-output-names = "ss"; + }; + mbus_clk: clk@01c2015c { #clock-cells = <0>; compatible = "allwinner,sun8i-a23-mbus-clk"; @@ -82,6 +117,16 @@ }; soc@01c00000 { + crypto: crypto-engine@01c15000 { + compatible = "allwinner,sun4i-a10-crypto"; + reg = <0x01c15000 0x1000>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ahb1_gates 5>, <&ss_clk>; + clock-names = "ahb", "mod"; + resets = <&ahb1_rst 5>; + reset-names = "ahb"; + }; + usb_otg: usb@01c19000 { compatible = "allwinner,sun8i-a33-musb"; reg = <0x01c19000 0x0400>; diff --git a/arch/arm/dts/sunxi-q8-common.dtsi b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts similarity index 76% copy from arch/arm/dts/sunxi-q8-common.dtsi copy to arch/arm/dts/sun8i-a83t-cubietruck-plus.dts index 17b26ff..88b1e09 100644 --- a/arch/arm/dts/sunxi-q8-common.dtsi +++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus.dts @@ -1,5 +1,7 @@ /* - * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * Copyright 2015 Chen-Yu Tsai + * + * Chen-Yu Tsai <wens(a)csie.org> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -40,38 +42,24 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> -#include "sunxi-common-regulators.dtsi" - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; -}; +/dts-v1/; +#include "sun8i-a83t.dtsi" -&lradc { - vref-supply = <&reg_vcc3v0>; - status = "okay"; +/ { + model = "Cubietech Cubietruck Plus"; + compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t"; - button@200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; + aliases { + serial0 = &uart0; }; - button@400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; + chosen { + stdout-path = "serial0:115200n8"; }; }; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_b>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi index 245b819..d3473f8 100644 --- a/arch/arm/dts/sun8i-a83t.dtsi +++ b/arch/arm/dts/sun8i-a83t.dtsi @@ -52,12 +52,6 @@ / { interrupt-parent = <&gic>; - chosen { - #address-cells = <1>; - #size-cells = <1>; - ranges; - }; - cpus { #address-cells = <1>; #size-cells = <0>; @@ -85,6 +79,7 @@ device_type = "cpu"; reg = <3>; }; + cpu@100 { compatible = "arm,cortex-a7"; device_type = "cpu"; @@ -96,6 +91,7 @@ device_type = "cpu"; reg = <0x101>; }; + cpu@102 { compatible = "arm,cortex-a7"; device_type = "cpu"; @@ -109,18 +105,12 @@ }; }; - memory { - reg = <0x40000000 0x80000000>; - }; - timer { compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - clock-frequency = <24000000>; - arm,cpu-registers-not-fw-configured; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; }; clocks { @@ -128,6 +118,7 @@ #size-cells = <1>; ranges; + /* TODO: PRCM block has a mux for this. */ osc24M: osc24M_clk { #clock-cells = <0>; compatible = "fixed-clock"; @@ -135,36 +126,39 @@ clock-output-names = "osc24M"; }; - osc32k: osc32k_clk { + /* + * This is called "internal OSC" in some places. + * It is an internal RC-based oscillator. + * TODO: Its controls are in the PRCM block. + */ + osc16M: osc16M_clk { #clock-cells = <0>; compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "osc32k"; + clock-frequency = <16000000>; + clock-output-names = "osc16M"; + }; + + osc16Md512: osc16Md512_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <512>; + clock-mult = <1>; + clocks = <&osc16M>; + clock-output-names = "osc16M-d512"; }; }; - soc@01c00000 { + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; - gic: interrupt-controller@01c81000 { - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x1000>, - <0x01c84000 0x2000>, - <0x01c86000 0x2000>; - interrupt-controller; - #interrupt-cells = <3>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - }; - pio: pinctrl@01c20800 { compatible = "allwinner,sun8i-a83t-pinctrl"; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; reg = <0x01c20800 0x400>; clocks = <&osc24M>; gpio-controller; @@ -172,27 +166,6 @@ #interrupt-cells = <3>; #gpio-cells = <3>; - i2c0_pins_a: i2c0@0 { - allwinner,pins = "PH0", "PH1"; - allwinner,function = "i2c0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - i2c1_pins_a: i2c1@0 { - allwinner,pins = "PH2", "PH3"; - allwinner,function = "i2c1"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - i2c2_pins_a: i2c2@0 { - allwinner,pins = "PH4", "PH5"; - allwinner,function = "i2c2"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; @@ -201,24 +174,6 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; - mmc1_pins_a: mmc1@0 { - allwinner,pins = "PG0", "PG1", "PG2", - "PG3", "PG4", "PG5"; - allwinner,function = "mmc1"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc2_8bit_pins: mmc2_8bit { - allwinner,pins = "PC5", "PC6", "PC8", - "PC9", "PC10", "PC11", - "PC12", "PC13", "PC14", - "PC15"; - allwinner,function = "mmc2"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - uart0_pins_a: uart0@0 { allwinner,pins = "PF2", "PF4"; allwinner,function = "uart0"; @@ -234,6 +189,21 @@ }; }; + timer@01c20c00 { + compatible = "allwinner,sun4i-a10-timer"; + reg = <0x01c20c00 0xa0>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc24M>; + }; + + watchdog@01c20ca0 { + compatible = "allwinner,sun6i-a31-wdt"; + reg = <0x01c20ca0 0x20>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc24M>; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; @@ -243,5 +213,16 @@ clocks = <&osc24M>; status = "disabled"; }; + + gic: interrupt-controller@01c81000 { + compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x1000>, + <0x01c84000 0x2000>, + <0x01c86000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; + }; }; }; diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/dts/sun8i-h3-orangepi-pc.dts index 4b25dcc..30ccca0 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts @@ -45,6 +45,7 @@ #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> #include <dt-bindings/pinctrl/sun4i-a10.h> / { @@ -58,6 +59,43 @@ chosen { stdout-path = "serial0:115200n8"; }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_opc>; + + status_led { + label = "status:red:user"; + gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; + }; + }; + + r_leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_r_opc>; + + tx { + label = "pwr:green:user"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + r_gpio_keys { + compatible = "gpio-keys"; + input-name = "sw4"; + + pinctrl-names = "default"; + pinctrl-0 = <&sw_r_opc>; + + sw4@0 { + label = "sw4"; + linux,code = <BTN_0>; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; }; &ehci1 { @@ -72,6 +110,12 @@ status = "okay"; }; +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; @@ -94,6 +138,31 @@ status = "okay"; }; +&pio { + leds_opc: led_pins@0 { + allwinner,pins = "PA15"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&r_pio { + leds_r_opc: led_pins@0 { + allwinner,pins = "PL10"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + sw_r_opc: key_pins@0 { + allwinner,pins = "PL03"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-plus.dts index 1cb6c66..900ec4f 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts @@ -45,6 +45,7 @@ #include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> #include <dt-bindings/pinctrl/sun4i-a10.h> / { @@ -70,6 +71,68 @@ enable-active-high; gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_opc>; + + status_led { + label = "status:red:user"; + gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; + }; + }; + + r_leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_r_opc>; + + tx { + label = "pwr:green:user"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + r_gpio_keys { + compatible = "gpio-keys"; + input-name = "sw4"; + + pinctrl-names = "default"; + pinctrl-0 = <&sw_r_opc>; + + sw4@0 { + label = "sw4"; + linux,code = <BTN_0>; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pio { + leds_opc: led_pins@0 { + allwinner,pins = "PA15"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&r_pio { + leds_r_opc: led_pins@0 { + allwinner,pins = "PL10"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + sw_r_opc: key_pins@0 { + allwinner,pins = "PL03"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; &ehci1 { diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi index 0faa38a..c2f63c5 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -83,12 +83,6 @@ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - clock-frequency = <24000000>; - arm,cpu-registers-not-fw-configured; - }; - - memory { - reg = <0x40000000 0x80000000>; }; clocks { @@ -131,15 +125,24 @@ compatible = "allwinner,sun6i-a31-pll6-clk"; reg = <0x01c20028 0x4>; clocks = <&osc24M>; - clock-output-names = "pll6", "pll6x2", "pll6d2"; + clock-output-names = "pll6", "pll6x2"; }; - pll8: clk@01c20044 { - #clock-cells = <1>; - compatible = "allwinner,sun6i-a31-pll6-clk"; - reg = <0x01c20044 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll8", "pll8x2"; + pll6d2: pll6d2_clk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <2>; + clock-mult = <1>; + clocks = <&pll6 0>; + clock-output-names = "pll6d2"; + }; + + /* dummy clock until pll6 can be reused */ + pll8: pll8_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <1>; + clock-output-names = "pll8"; }; cpu: cpu_clk@01c20050 { @@ -170,7 +173,7 @@ #clock-cells = <0>; compatible = "allwinner,sun8i-h3-ahb2-clk"; reg = <0x01c2005c 0x4>; - clocks = <&ahb1>, <&pll6 2>; + clocks = <&ahb1>, <&pll6d2>; clock-output-names = "ahb2"; }; @@ -213,34 +216,34 @@ <76>, <77>, <78>, <96>, <97>, <98>, <112>, <113>, - <114>, <115>, <116>, - <128>, <135>; - clock-output-names = "ahb1_ce", "ahb1_dma", "ahb1_mmc0", - "ahb1_mmc1", "ahb1_mmc2", "ahb1_nand", - "ahb1_sdram", "ahb2_gmac", "ahb1_ts", - "ahb1_hstimer", "ahb1_spi0", - "ahb1_spi1", "ahb1_otg", - "ahb1_otg_ehci0", "ahb1_ehic1", - "ahb1_ehic2", "ahb1_ehic3", - "ahb1_otg_ohci0", "ahb2_ohic1", - "ahb2_ohic2", "ahb2_ohic3", "ahb1_ve", - "ahb1_lcd0", "ahb1_lcd1", "ahb1_deint", - "ahb1_csi", "ahb1_tve", "ahb1_hdmi", - "ahb1_de", "ahb1_gpu", "ahb1_msgbox", - "ahb1_spinlock", "apb1_codec", - "apb1_spdif", "apb1_pio", "apb1_ths", - "apb1_i2s0", "apb1_i2s1", "apb1_i2s2", - "apb2_i2c0", "apb2_i2c1", "apb2_i2c2", - "apb2_uart0", "apb2_uart1", - "apb2_uart2", "apb2_uart3", "apb2_scr", - "ahb1_ephy", "ahb1_dbg"; + <114>, <115>, + <116>, <128>, <135>; + clock-output-names = "bus_ce", "bus_dma", "bus_mmc0", + "bus_mmc1", "bus_mmc2", "bus_nand", + "bus_sdram", "bus_gmac", "bus_ts", + "bus_hstimer", "bus_spi0", + "bus_spi1", "bus_otg", + "bus_otg_ehci0", "bus_ehci1", + "bus_ehci2", "bus_ehci3", + "bus_otg_ohci0", "bus_ohci1", + "bus_ohci2", "bus_ohci3", "bus_ve", + "bus_lcd0", "bus_lcd1", "bus_deint", + "bus_csi", "bus_tve", "bus_hdmi", + "bus_de", "bus_gpu", "bus_msgbox", + "bus_spinlock", "bus_codec", + "bus_spdif", "bus_pio", "bus_ths", + "bus_i2s0", "bus_i2s1", "bus_i2s2", + "bus_i2c0", "bus_i2c1", "bus_i2c2", + "bus_uart0", "bus_uart1", + "bus_uart2", "bus_uart3", + "bus_scr", "bus_ephy", "bus_dbg"; }; mmc0_clk: clk@01c20088 { #clock-cells = <1>; compatible = "allwinner,sun4i-a10-mmc-clk"; reg = <0x01c20088 0x4>; - clocks = <&osc24M>, <&pll6 0>, <&pll8 0>; + clocks = <&osc24M>, <&pll6 0>, <&pll8>; clock-output-names = "mmc0", "mmc0_output", "mmc0_sample"; @@ -250,7 +253,7 @@ #clock-cells = <1>; compatible = "allwinner,sun4i-a10-mmc-clk"; reg = <0x01c2008c 0x4>; - clocks = <&osc24M>, <&pll6 0>, <&pll8 0>; + clocks = <&osc24M>, <&pll6 0>, <&pll8>; clock-output-names = "mmc1", "mmc1_output", "mmc1_sample"; @@ -260,7 +263,7 @@ #clock-cells = <1>; compatible = "allwinner,sun4i-a10-mmc-clk"; reg = <0x01c20090 0x4>; - clocks = <&osc24M>, <&pll6 0>, <&pll8 0>; + clocks = <&osc24M>, <&pll6 0>, <&pll8>; clock-output-names = "mmc2", "mmc2_output", "mmc2_sample"; @@ -285,6 +288,33 @@ clocks = <&osc24M>, <&pll6 1>, <&pll5>; clock-output-names = "mbus"; }; + + apb0: apb0_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&osc24M>; + clock-output-names = "apb0"; + }; + + apb0_gates: clk@01f01428 { + compatible = "allwinner,sun8i-h3-apb0-gates-clk", + "allwinner,sun4i-a10-gates-clk"; + reg = <0x01f01428 0x4>; + #clock-cells = <1>; + clocks = <&apb0>; + clock-indices = <0>, <1>; + clock-output-names = "apb0_pio", "apb0_ir"; + }; + + ir_clk: ir_clk@01f01454 { + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01f01454 0x4>; + #clock-cells = <0>; + clocks = <&osc32k>, <&osc24M>; + clock-output-names = "ir"; + }; }; soc { @@ -298,7 +328,7 @@ reg = <0x01c02000 0x1000>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; clocks = <&bus_gates 6>; - resets = <&bus_rst 6>; + resets = <&ahb_rst 6>; #dma-cells = <1>; }; @@ -313,7 +343,7 @@ "mmc", "output", "sample"; - resets = <&bus_rst 8>; + resets = <&ahb_rst 8>; reset-names = "ahb"; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -332,7 +362,7 @@ "mmc", "output", "sample"; - resets = <&bus_rst 9>; + resets = <&ahb_rst 9>; reset-names = "ahb"; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -351,7 +381,7 @@ "mmc", "output", "sample"; - resets = <&bus_rst 10>; + resets = <&ahb_rst 10>; reset-names = "ahb"; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -396,7 +426,7 @@ reg = <0x01c1b000 0x100>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; clocks = <&bus_gates 25>, <&bus_gates 29>; - resets = <&bus_rst 25>, <&bus_rst 29>; + resets = <&ahb_rst 25>, <&ahb_rst 29>; phys = <&usbphy 1>; phy-names = "usb"; status = "disabled"; @@ -408,7 +438,7 @@ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; clocks = <&bus_gates 29>, <&bus_gates 25>, <&usb_clk 17>; - resets = <&bus_rst 29>, <&bus_rst 25>; + resets = <&ahb_rst 29>, <&ahb_rst 25>; phys = <&usbphy 1>; phy-names = "usb"; status = "disabled"; @@ -419,7 +449,7 @@ reg = <0x01c1c000 0x100>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; clocks = <&bus_gates 26>, <&bus_gates 30>; - resets = <&bus_rst 26>, <&bus_rst 30>; + resets = <&ahb_rst 26>, <&ahb_rst 30>; phys = <&usbphy 2>; phy-names = "usb"; status = "disabled"; @@ -431,7 +461,7 @@ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; clocks = <&bus_gates 30>, <&bus_gates 26>, <&usb_clk 18>; - resets = <&bus_rst 30>, <&bus_rst 26>; + resets = <&ahb_rst 30>, <&ahb_rst 26>; phys = <&usbphy 2>; phy-names = "usb"; status = "disabled"; @@ -442,7 +472,7 @@ reg = <0x01c1d000 0x100>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; clocks = <&bus_gates 27>, <&bus_gates 31>; - resets = <&bus_rst 27>, <&bus_rst 31>; + resets = <&ahb_rst 27>, <&ahb_rst 31>; phys = <&usbphy 3>; phy-names = "usb"; status = "disabled"; @@ -454,7 +484,7 @@ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; clocks = <&bus_gates 31>, <&bus_gates 27>, <&usb_clk 19>; - resets = <&bus_rst 31>, <&bus_rst 27>; + resets = <&ahb_rst 31>, <&ahb_rst 27>; phys = <&usbphy 3>; phy-names = "usb"; status = "disabled"; @@ -469,7 +499,7 @@ gpio-controller; #gpio-cells = <3>; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <3>; uart0_pins_a: uart0@0 { allwinner,pins = "PA4", "PA5"; @@ -502,10 +532,22 @@ }; }; - bus_rst: reset@01c202c0 { + ahb_rst: reset@01c202c0 { #reset-cells = <1>; - compatible = "allwinner,sun8i-h3-bus-reset"; - reg = <0x01c202c0 0x1c>; + compatible = "allwinner,sun6i-a31-ahb1-reset"; + reg = <0x01c202c0 0xc>; + }; + + apb1_rst: reset@01c202d0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x01c202d0 0x4>; + }; + + apb2_rst: reset@01c202d8 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-clock-reset"; + reg = <0x01c202d8 0x4>; }; timer@01c20c00 { @@ -529,7 +571,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&bus_gates 112>; - resets = <&bus_rst 144>; + resets = <&apb2_rst 16>; dmas = <&dma 6>, <&dma 6>; dma-names = "rx", "tx"; status = "disabled"; @@ -542,7 +584,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&bus_gates 113>; - resets = <&bus_rst 145>; + resets = <&apb2_rst 17>; dmas = <&dma 7>, <&dma 7>; dma-names = "rx", "tx"; status = "disabled"; @@ -555,7 +597,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&bus_gates 114>; - resets = <&bus_rst 146>; + resets = <&apb2_rst 18>; dmas = <&dma 8>, <&dma 8>; dma-names = "rx", "tx"; status = "disabled"; @@ -568,7 +610,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&bus_gates 115>; - resets = <&bus_rst 147>; + resets = <&apb2_rst 19>; dmas = <&dma 9>, <&dma 9>; dma-names = "rx", "tx"; status = "disabled"; @@ -591,5 +633,40 @@ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; }; + + apb0_reset: reset@01f014b0 { + reg = <0x01f014b0 0x4>; + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; + + ir: ir@01f02000 { + compatible = "allwinner,sun5i-a13-ir"; + clocks = <&apb0_gates 1>, <&ir_clk>; + clock-names = "apb", "ir"; + resets = <&apb0_reset 1>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x01f02000 0x40>; + status = "disabled"; + }; + + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun8i-h3-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb0_gates 0>; + resets = <&apb0_reset 0>; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + + ir_pins_a: ir@0 { + allwinner,pins = "PL11"; + allwinner,function = "s_cir_rx"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + }; }; }; diff --git a/arch/arm/dts/sun8i-q8-common.dtsi b/arch/arm/dts/sun8i-q8-common.dtsi index 07cd268..346a49d 100644 --- a/arch/arm/dts/sun8i-q8-common.dtsi +++ b/arch/arm/dts/sun8i-q8-common.dtsi @@ -41,11 +41,23 @@ */ #include "sunxi-q8-common.dtsi" +#include <dt-bindings/pwm/pwm.h> + / { aliases { serial0 = &r_uart; }; + backlight: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&bl_en_pin_q8>; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; + default-brightness-level = <8>; + enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -54,7 +66,7 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8>; - vmmc-supply = <&reg_vcc3v0>; + vmmc-supply = <&reg_dcdc1>; bus-width = <4>; cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ cd-inverted; @@ -77,8 +89,90 @@ }; }; +&r_rsb { + status = "okay"; + + axp22x: pmic@3a3 { + compatible = "x-powers,axp223"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <&reg_dcdc1>; + }; +}; + +#include "axp22x.dtsi" + +&reg_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-io"; +}; + +&reg_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2350000>; + regulator-max-microvolt = <2650000>; + regulator-name = "vdd-dll"; +}; + +&reg_aldo3 { + regulator-always-on; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pll-avcc"; +}; + +&reg_dc1sw { + regulator-name = "vcc-lcd"; +}; + +&reg_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpus"; +}; + +&reg_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-3v0"; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-sys"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +&reg_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + &r_uart { pinctrl-names = "default"; pinctrl-0 = <&r_uart_pins_a>; status = "okay"; }; + +&simplefb_lcd { + vcc-lcd-supply = <&reg_dc1sw>; +}; diff --git a/arch/arm/dts/sun9i-a80-cubieboard4.dts b/arch/arm/dts/sun9i-a80-cubieboard4.dts index 6484dcf..eb2ccd0 100644 --- a/arch/arm/dts/sun9i-a80-cubieboard4.dts +++ b/arch/arm/dts/sun9i-a80-cubieboard4.dts @@ -62,9 +62,31 @@ stdout-path = "serial0:115200n8"; }; + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_cubieboard4>; + + green { + label = "cubieboard4:green:usr"; + gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */ + }; + + red { + label = "cubieboard4:red:usr"; + gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + }; + }; }; &pio { + led_pins_cubieboard4: led-pins@0 { + allwinner,pins = "PH6", "PH17"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 { allwinner,pins = "PH18"; allwinner,function = "gpio_in"; @@ -89,6 +111,20 @@ vmmc-supply = <&reg_vcc3v0>; bus-width = <8>; non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&mmc2_8bit_pins { + /* Increase drive strength for DDR modes */ + allwinner,drive = <SUN4I_PINCTRL_40_MA>; +}; + +&r_ir { + status = "okay"; +}; + +&r_rsb { status = "okay"; }; diff --git a/arch/arm/dts/sun9i-a80-optimus.dts b/arch/arm/dts/sun9i-a80-optimus.dts index 6ce4b5e..d7a20d9 100644 --- a/arch/arm/dts/sun9i-a80-optimus.dts +++ b/arch/arm/dts/sun9i-a80-optimus.dts @@ -65,7 +65,7 @@ leds { compatible = "gpio-leds"; pinctrl-names = "default"; - pinctrl-0 = <&led_pins_optimus>; + pinctrl-0 = <&led_pins_optimus>, <&led_r_pins_optimus>; /* The LED names match those found on the board */ @@ -74,7 +74,10 @@ gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; }; - /* led3 is on PM15, in R_PIO */ + led3 { + label = "optimus:led3:usr"; + gpios = <&r_pio 1 15 GPIO_ACTIVE_HIGH>; /* PM15 */ + }; led4 { label = "optimus:led4:usr"; @@ -106,17 +109,6 @@ status = "okay"; }; -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins_a>; - status = "okay"; -}; - -&i2c3_pins_a { - /* Enable internal pull-up */ - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; -}; - &ohci0 { status = "okay"; }; @@ -171,30 +163,42 @@ vmmc-supply = <&reg_vcc3v0>; bus-width = <8>; non-removable; + cap-mmc-hw-reset; status = "okay"; }; +&mmc2_8bit_pins { + /* Increase drive strength for DDR modes */ + allwinner,drive = <SUN4I_PINCTRL_40_MA>; +}; + &reg_usb1_vbus { pinctrl-0 = <&usb1_vbus_pin_optimus>; gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ status = "okay"; }; -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; +&r_ir { status = "okay"; }; -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&uart4_pins_a>; +&r_pio { + led_r_pins_optimus: led-pins@1 { + allwinner,pins = "PM15"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&r_rsb { status = "okay"; }; -&uart4_pins_a { - /* Enable internal pull-up */ - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; }; &usbphy1 { diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi index a43ad77..f68b324 100644 --- a/arch/arm/dts/sun9i-a80.dtsi +++ b/arch/arm/dts/sun9i-a80.dtsi @@ -128,6 +128,17 @@ */ ranges = <0 0 0 0x20000000>; + /* + * This clock is actually configurable from the PRCM address + * space. The external 24M oscillator can be turned off, and + * the clock switched to an internal 16M RC oscillator. Under + * normal operation there's no reason to do this, and the + * default is to use the external good one, so just model this + * as a fixed clock. Also it is not entirely clear if the + * osc24M mux in the PRCM affects the entire clock tree, which + * would also throw all the PLL clock rates off, or just the + * downstream clocks in the PRCM. + */ osc24M: osc24M_clk { #clock-cells = <0>; compatible = "fixed-clock"; @@ -135,6 +146,13 @@ clock-output-names = "osc24M"; }; + /* + * The 32k clock is from an external source, normally the + * AC100 codec/RTC chip. This clock is by default enabled + * and clocked at 32768 Hz, from the oscillator connected + * to the AC100. It is configurable, but no such driver or + * bindings exist yet. + */ osc32k: osc32k_clk { #clock-cells = <0>; compatible = "fixed-clock"; @@ -164,6 +182,14 @@ "usb_phy2", "usb_hsic_12M"; }; + pll3: clk@06000008 { + /* placeholder until implemented */ + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-rate = <0>; + clock-output-names = "pll3"; + }; + pll4: clk@0600000c { #clock-cells = <0>; compatible = "allwinner,sun9i-a80-pll4-clk"; @@ -277,9 +303,12 @@ compatible = "allwinner,sun9i-a80-ahb0-gates-clk"; reg = <0x06000580 0x4>; clocks = <&ahb0>; - clock-indices = <0>, <1>, <3>, <5>, <8>, <12>, <13>, - <14>, <15>, <16>, <18>, <20>, <21>, - <22>, <23>; + clock-indices = <0>, <1>, <3>, + <5>, <8>, <12>, + <13>, <14>, + <15>, <16>, <18>, + <20>, <21>, <22>, + <23>; clock-output-names = "ahb0_fd", "ahb0_ve", "ahb0_gpu", "ahb0_ss", "ahb0_sd", "ahb0_nand1", "ahb0_nand0", "ahb0_sdram", @@ -293,7 +322,10 @@ compatible = "allwinner,sun9i-a80-ahb1-gates-clk"; reg = <0x06000584 0x4>; clocks = <&ahb1>; - clock-indices = <0>, <1>, <17>, <21>, <22>, <23>, <24>; + clock-indices = <0>, <1>, + <17>, <21>, + <22>, <23>, + <24>; clock-output-names = "ahb1_usbotg", "ahb1_usbhci", "ahb1_gmac", "ahb1_msgbox", "ahb1_spinlock", "ahb1_hstimer", @@ -305,8 +337,9 @@ compatible = "allwinner,sun9i-a80-ahb2-gates-clk"; reg = <0x06000588 0x4>; clocks = <&ahb2>; - clock-indices = <0>, <1>, <2>, <4>, <5>, <7>, <8>, - <11>; + clock-indices = <0>, <1>, + <2>, <4>, <5>, + <7>, <8>, <11>; clock-output-names = "ahb2_lcd0", "ahb2_lcd1", "ahb2_edp", "ahb2_csi", "ahb2_hdmi", "ahb2_de", "ahb2_mp", "ahb2_mipi_dsi"; @@ -317,8 +350,10 @@ compatible = "allwinner,sun9i-a80-apb0-gates-clk"; reg = <0x06000590 0x4>; clocks = <&apb0>; - clock-indices = <1>, <5>, <11>, <12>, <13>, <15>, - <17>, <18>, <19>; + clock-indices = <1>, <5>, + <11>, <12>, <13>, + <15>, <17>, <18>, + <19>; clock-output-names = "apb0_spdif", "apb0_pio", "apb0_ac97", "apb0_i2s0", "apb0_i2s1", "apb0_lradc", "apb0_gpadc", "apb0_twd", @@ -330,14 +365,79 @@ compatible = "allwinner,sun9i-a80-apb1-gates-clk"; reg = <0x06000594 0x4>; clocks = <&apb1>; - clock-indices = <0>, <1>, <2>, <3>, <4>, - <16>, <17>, <18>, <19>, <20>, <21>; + clock-indices = <0>, <1>, + <2>, <3>, <4>, + <16>, <17>, + <18>, <19>, + <20>, <21>; clock-output-names = "apb1_i2c0", "apb1_i2c1", "apb1_i2c2", "apb1_i2c3", "apb1_i2c4", "apb1_uart0", "apb1_uart1", "apb1_uart2", "apb1_uart3", "apb1_uart4", "apb1_uart5"; }; + + cpus_clk: clk@08001410 { + compatible = "allwinner,sun9i-a80-cpus-clk"; + reg = <0x08001410 0x4>; + #clock-cells = <0>; + clocks = <&osc32k>, <&osc24M>, <&pll4>, <&pll3>; + clock-output-names = "cpus"; + }; + + ahbs: ahbs_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&cpus_clk>; + clock-output-names = "ahbs"; + }; + + apbs: clk@0800141c { + compatible = "allwinner,sun8i-a23-apb0-clk"; + reg = <0x0800141c 0x4>; + #clock-cells = <0>; + clocks = <&ahbs>; + clock-output-names = "apbs"; + }; + + apbs_gates: clk@08001428 { + compatible = "allwinner,sun9i-a80-apbs-gates-clk"; + reg = <0x08001428 0x4>; + #clock-cells = <1>; + clocks = <&apbs>; + clock-indices = <0>, <1>, + <2>, <3>, + <4>, <5>, + <6>, <7>, + <12>, <13>, + <16>, <17>, + <18>, <20>; + clock-output-names = "apbs_pio", "apbs_ir", + "apbs_timer", "apbs_rsb", + "apbs_uart", "apbs_1wire", + "apbs_i2c0", "apbs_i2c1", + "apbs_ps2_0", "apbs_ps2_1", + "apbs_dma", "apbs_i2s0", + "apbs_i2s1", "apbs_twd"; + }; + + r_1wire_clk: clk@08001450 { + reg = <0x08001450 0x4>; + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + clocks = <&osc32k>, <&osc24M>; + clock-output-names = "r_1wire"; + }; + + r_ir_clk: clk@08001454 { + reg = <0x08001454 0x4>; + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + clocks = <&osc32k>, <&osc24M>; + clock-output-names = "r_ir"; + }; }; soc { @@ -443,7 +543,7 @@ }; mmc0: mmc@01c0f000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun9i-a80-mmc"; reg = <0x01c0f000 0x1000>; clocks = <&mmc_config_clk 0>, <&mmc0_clk 0>, <&mmc0_clk 1>, <&mmc0_clk 2>; @@ -457,7 +557,7 @@ }; mmc1: mmc@01c10000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun9i-a80-mmc"; reg = <0x01c10000 0x1000>; clocks = <&mmc_config_clk 1>, <&mmc1_clk 0>, <&mmc1_clk 1>, <&mmc1_clk 2>; @@ -471,7 +571,7 @@ }; mmc2: mmc@01c11000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun9i-a80-mmc"; reg = <0x01c11000 0x1000>; clocks = <&mmc_config_clk 2>, <&mmc2_clk 0>, <&mmc2_clk 1>, <&mmc2_clk 2>; @@ -485,7 +585,7 @@ }; mmc3: mmc@01c12000 { - compatible = "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun9i-a80-mmc"; reg = <0x01c12000 0x1000>; clocks = <&mmc_config_clk 3>, <&mmc3_clk 0>, <&mmc3_clk 1>, <&mmc3_clk 2>; @@ -582,7 +682,7 @@ clocks = <&apb0_gates 5>; gpio-controller; interrupt-controller; - #interrupt-cells = <2>; + #interrupt-cells = <3>; #size-cells = <0>; #gpio-cells = <3>; @@ -604,7 +704,8 @@ mmc2_8bit_pins: mmc2_8bit { allwinner,pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", - "PC13", "PC14", "PC15"; + "PC13", "PC14", "PC15", + "PC16"; allwinner,function = "mmc2"; allwinner,drive = <SUN4I_PINCTRL_30_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; @@ -752,14 +853,83 @@ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; }; + apbs_rst: reset@080014b0 { + reg = <0x080014b0 0x4>; + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; + + nmi_intc: interrupt-controller@080015a0 { + compatible = "allwinner,sun9i-a80-nmi"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x080015a0 0xc>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + }; + + r_ir: ir@08002000 { + compatible = "allwinner,sun5i-a13-ir"; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&r_ir_pins>; + clocks = <&apbs_gates 1>, <&r_ir_clk>; + clock-names = "apb", "ir"; + resets = <&apbs_rst 1>; + reg = <0x08002000 0x40>; + status = "disabled"; + }; + r_uart: serial@08002800 { compatible = "snps,dw-apb-uart"; reg = <0x08002800 0x400>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&osc24M>; + clocks = <&apbs_gates 4>; + resets = <&apbs_rst 4>; status = "disabled"; }; + + r_pio: pinctrl@08002c00 { + compatible = "allwinner,sun9i-a80-r-pinctrl"; + reg = <0x08002c00 0x400>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apbs_gates 0>; + resets = <&apbs_rst 0>; + gpio-controller; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #gpio-cells = <3>; + + r_ir_pins: r_ir { + allwinner,pins = "PL6"; + allwinner,function = "s_cir_rx"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + r_rsb_pins: r_rsb { + allwinner,pins = "PN0", "PN1"; + allwinner,function = "s_rsb"; + allwinner,drive = <SUN4I_PINCTRL_20_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; + }; + + r_rsb: i2c@08003400 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x08003400 0x400>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apbs_gates 3>; + clock-frequency = <3000000>; + resets = <&apbs_rst 3>; + pinctrl-names = "default"; + pinctrl-0 = <&r_rsb_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; diff --git a/arch/arm/dts/sun4i-a10-inet97fv2.dts b/arch/arm/dts/sunxi-itead-core-common.dtsi similarity index 80% copy from arch/arm/dts/sun4i-a10-inet97fv2.dts copy to arch/arm/dts/sunxi-itead-core-common.dtsi index 6c927a8..2565d51 100644 --- a/arch/arm/dts/sun4i-a10-inet97fv2.dts +++ b/arch/arm/dts/sunxi-itead-core-common.dtsi @@ -1,7 +1,5 @@ /* - * Copyright 2014 Open Source Support GmbH - * - * David Lanzend�rfer <david.lanzendoerfer(a)o2s.ch> + * Copyright 2015 - Marcus Cooper <codekipper(a)gmail.com> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -42,16 +40,9 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/dts-v1/; -#include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> - / { - model = "INet-97F Rev 02"; - compatible = "primux,inet97fv2", "allwinner,sun4i-a10"; - aliases { serial0 = &uart0; }; @@ -61,6 +52,10 @@ }; }; +&cpu0 { + cpu-supply = <&reg_dcdc2>; +}; + &ehci0 { status = "okay"; }; @@ -75,22 +70,13 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; -&mmc0 { +&i2c1 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; - vmmc-supply = <&reg_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ - cd-inverted; + pinctrl-0 = <&i2c1_pins_a>; status = "okay"; }; @@ -102,6 +88,33 @@ status = "okay"; }; +#include "axp209.dtsi" + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +&reg_ldo1 { + regulator-name = "vdd-rtc"; +}; + +&reg_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + &reg_usb1_vbus { status = "okay"; }; diff --git a/arch/arm/dts/sunxi-q8-common.dtsi b/arch/arm/dts/sunxi-q8-common.dtsi index 17b26ff..b824146 100644 --- a/arch/arm/dts/sunxi-q8-common.dtsi +++ b/arch/arm/dts/sunxi-q8-common.dtsi @@ -75,3 +75,9 @@ voltage = <400000>; }; }; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>; + status = "okay"; +}; -- 2.7.2

3 4

[U-Boot] Please pull : u-boot-video/master
by Anatolij Gustschin 15 Mar '16

15 Mar '16

Hi Tom, The following changes since commit df61a74e6845ec9bdcdd48d2aff5e9c2c6debeaa: Prepare v2016.03 (2016-03-14 10:20:21 -0400) are available in the git repository at: git://git.denx.de/u-boot-video.git master for you to fetch changes up to 00b1d2d3178747c113dd8f939cf3e2d449bfaf54: imx: mx6: hdmi: handle overflow condition (2016-03-14 22:53:45 +0100) ---------------------------------------------------------------- Jacob Chen (6): dm: video: Add a operation to display uclass rockchip: Add a binding file for rk3288 video rockchip: video: Add a display driver for rockchip LVDS rockchip: dts: Add LVDS support rockchip: video: Add LVDS support in vop driver doc: dt-bindings: Describe rockchip LVDS interface Peng Fan (3): video: ipu: avoid overflow issue imx: mx6: correct IPU clock imx: mx6: hdmi: handle overflow condition arch/arm/cpu/armv7/mx6/soc.c | 13 +- arch/arm/dts/rk3288.dtsi | 47 +++- arch/arm/include/asm/arch-rockchip/lvds_rk3288.h | 97 +++++++++ arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + doc/device-tree-bindings/video/rockchip-lvds.txt | 77 +++++++ drivers/video/display-uclass.c | 3 + drivers/video/ipu_common.c | 73 +++++-- drivers/video/rockchip/Makefile | 2 +- drivers/video/rockchip/rk_lvds.c | 254 ++++++++++++++++++++++ drivers/video/rockchip/rk_vop.c | 16 +- include/configs/mx6sabre_common.h | 6 +- include/display.h | 11 +- include/dt-bindings/video/rk3288.h | 11 + 13 files changed, 585 insertions(+), 26 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/lvds_rk3288.h create mode 100644 doc/device-tree-bindings/video/rockchip-lvds.txt create mode 100644 drivers/video/rockchip/rk_lvds.c create mode 100644 include/dt-bindings/video/rk3288.h Please pull. Thanks! Anatolij

2 1

[U-Boot] [PATCH] arm64: define _image_binary_end to fix SPL_OF_CONTROL
by Masahiro Yamada 15 Mar '16

15 Mar '16

To make SPL_OF_CONTROL work on ARM64 SoCs, _image_binary_end must be defined in the linker script. LD spl/u-boot-spl lib/built-in.o: In function `fdtdec_setup': lib/fdtdec.c:1186: undefined reference to `_image_binary_end' lib/fdtdec.c:1186: undefined reference to `_image_binary_end' make[1]: *** [spl/u-boot-spl] Error 1 make: *** [spl/u-boot-spl] Error 2 Note: CONFIG_SPL_SEPARATE_BSS must be defined as well on ARM64 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- arch/arm/cpu/armv8/u-boot-spl.lds | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds b/arch/arm/cpu/armv8/u-boot-spl.lds index 4df339c..cc427c3 100644 --- a/arch/arm/cpu/armv8/u-boot-spl.lds +++ b/arch/arm/cpu/armv8/u-boot-spl.lds @@ -54,6 +54,8 @@ SECTIONS *(.__end) } >.sram + _image_binary_end = .; + .bss_start : { . = ALIGN(8); KEEP(*(.__bss_start)); -- 1.9.1

2 2

[U-Boot] [PATCH] ARM: DRA72-evm: Update mux and VIRTUAL/MANUAL mode timings
by Lokesh Vutla 15 Mar '16

15 Mar '16

All the mux configurations needs to be done as part of the IODelay sequence to avoid glitch. Adding all the mux configuration, MANUAL/VIRTUAL mode configuration as needed for DRA72-evm. Also update the mux for SD card detect on DRA74-evm. Signed-off-by: Kishon Vijay Abraham I <kishon(a)ti.com> Signed-off-by: Vignesh R <vigneshr(a)ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- board/ti/dra7xx/evm.c | 8 +- board/ti/dra7xx/mux_data.h | 314 ++++++++++++++++++++++++++------------------- 2 files changed, 188 insertions(+), 134 deletions(-) diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 4c6dfa0..97174c8 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -353,10 +353,10 @@ void recalibrate_iodelay(void) switch (omap_revision()) { case DRA722_ES1_0: - pads = core_padconf_array_essential; - npads = ARRAY_SIZE(core_padconf_array_essential); - iodelay = iodelay_cfg_array; - niodelays = ARRAY_SIZE(iodelay_cfg_array); + pads = dra72x_core_padconf_array; + npads = ARRAY_SIZE(dra72x_core_padconf_array); + iodelay = dra72_iodelay_cfg_array; + niodelays = ARRAY_SIZE(dra72_iodelay_cfg_array); break; case DRA752_ES1_0: case DRA752_ES1_1: diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index bec3b55..6db11a2 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -12,134 +12,180 @@ #include <asm/arch/mux_dra7xx.h> -const struct pad_conf_entry core_padconf_array_essential[] = { - {MMC1_CLK, (IEN | PTU | PDIS | M0)}, /* MMC1_CLK */ - {MMC1_CMD, (IEN | PTU | PDIS | M0)}, /* MMC1_CMD */ - {MMC1_DAT0, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT0 */ - {MMC1_DAT1, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT1 */ - {MMC1_DAT2, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT2 */ - {MMC1_DAT3, (IEN | PTU | PDIS | M0)}, /* MMC1_DAT3 */ - {MMC1_SDCD, (FSC | IEN | PTU | PDIS | M0)}, /* MMC1_SDCD */ - {MMC1_SDWP, (FSC | IEN | PTD | PEN | M14)}, /* MMC1_SDWP */ -#if defined(CONFIG_NOR) - /* NOR only pin-mux */ - {GPMC_A0 , M0 | IDIS | PDIS}, /* nor.GPMC_A[0 ] */ - {GPMC_A1 , M0 | IDIS | PDIS}, /* nor.GPMC_A[1 ] */ - {GPMC_A2 , M0 | IDIS | PDIS}, /* nor.GPMC_A[2 ] */ - {GPMC_A3 , M0 | IDIS | PDIS}, /* nor.GPMC_A[3 ] */ - {GPMC_A4 , M0 | IDIS | PDIS}, /* nor.GPMC_A[4 ] */ - {GPMC_A5 , M0 | IDIS | PDIS}, /* nor.GPMC_A[5 ] */ - {GPMC_A6 , M0 | IDIS | PDIS}, /* nor.GPMC_A[6 ] */ - {GPMC_A7 , M0 | IDIS | PDIS}, /* nor.GPMC_A[7 ] */ - {GPMC_A8 , M0 | IDIS | PDIS}, /* nor.GPMC_A[8 ] */ - {GPMC_A9 , M0 | IDIS | PDIS}, /* nor.GPMC_A[9 ] */ - {GPMC_A10 , M0 | IDIS | PDIS}, /* nor.GPMC_A[10] */ - {GPMC_A11 , M0 | IDIS | PDIS}, /* nor.GPMC_A[11] */ - {GPMC_A12 , M0 | IDIS | PDIS}, /* nor.GPMC_A[12] */ - {GPMC_A13 , M0 | IDIS | PDIS}, /* nor.GPMC_A[13] */ - {GPMC_A14 , M0 | IDIS | PDIS}, /* nor.GPMC_A[14] */ - {GPMC_A15 , M0 | IDIS | PDIS}, /* nor.GPMC_A[15] */ - {GPMC_A16 , M0 | IDIS | PDIS}, /* nor.GPMC_A[16] */ - {GPMC_A17 , M0 | IDIS | PDIS}, /* nor.GPMC_A[17] */ - {GPMC_A18 , M0 | IDIS | PDIS}, /* nor.GPMC_A[18] */ - {GPMC_A19 , M0 | IDIS | PDIS}, /* nor.GPMC_A[19] */ - {GPMC_A20 , M0 | IDIS | PDIS}, /* nor.GPMC_A[20] */ - {GPMC_A21 , M0 | IDIS | PDIS}, /* nor.GPMC_A[21] */ - {GPMC_A22 , M0 | IDIS | PDIS}, /* nor.GPMC_A[22] */ - {GPMC_A23 , M0 | IDIS | PDIS}, /* nor.GPMC_A[23] */ - {GPMC_A24 , M0 | IDIS | PDIS}, /* nor.GPMC_A[24] */ - {GPMC_A25 , M0 | IDIS | PDIS}, /* nor.GPMC_A[25] */ - {GPMC_A26 , M0 | IDIS | PDIS}, /* nor.GPMC_A[26] */ -#else - /* eMMC pinmux */ - {GPMC_A19, (IEN | PTU | PDIS | M1)}, /* mmc2_dat4 */ - {GPMC_A20, (IEN | PTU | PDIS | M1)}, /* mmc2_dat5 */ - {GPMC_A21, (IEN | PTU | PDIS | M1)}, /* mmc2_dat6 */ - {GPMC_A22, (IEN | PTU | PDIS | M1)}, /* mmc2_dat7 */ - {GPMC_A23, (IEN | PTU | PDIS | M1)}, /* mmc2_clk */ - {GPMC_A24, (IEN | PTU | PDIS | M1)}, /* mmc2_dat0 */ - {GPMC_A25, (IEN | PTU | PDIS | M1)}, /* mmc2_dat1 */ - {GPMC_A26, (IEN | PTU | PDIS | M1)}, /* mmc2_dat2 */ - {GPMC_A27, (IEN | PTU | PDIS | M1)}, /* mmc2_dat3 */ - {GPMC_CS1, (IEN | PTU | PDIS | M1)}, /* mmm2_cmd */ -#endif -#if (CONFIG_CONS_INDEX == 1) - {UART1_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_RXD */ - {UART1_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_TXD */ - {UART1_CTSN, (IEN | PTU | PDIS | M3)}, /* UART1_CTSN */ - {UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */ -#elif (CONFIG_CONS_INDEX == 3) - {UART3_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_RXD */ - {UART3_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_TXD */ -#endif - {I2C1_SDA, (IEN | PTU | PDIS | M0)}, /* I2C1_SDA */ - {I2C1_SCL, (IEN | PTU | PDIS | M0)}, /* I2C1_SCL */ - {MDIO_MCLK, (PTU | PEN | M0)}, /* MDIO_MCLK */ - {MDIO_D, (IEN | PTU | PEN | M0)}, /* MDIO_D */ - {RGMII0_TXC, (PIN_OUTPUT | MANUAL_MODE | M0) }, - {RGMII0_TXCTL, (PIN_OUTPUT | MANUAL_MODE | M0) }, - {RGMII0_TXD3, (PIN_OUTPUT | MANUAL_MODE | M0) }, - {RGMII0_TXD2, (PIN_OUTPUT | MANUAL_MODE | M0) }, - {RGMII0_TXD1, (PIN_OUTPUT | MANUAL_MODE | M0) }, - {RGMII0_TXD0, (PIN_OUTPUT | MANUAL_MODE | M0) }, - {RGMII0_RXC, (PIN_INPUT | MANUAL_MODE | M0) }, - {RGMII0_RXCTL, (PIN_INPUT | MANUAL_MODE | M0) }, - {RGMII0_RXD3, (PIN_INPUT | MANUAL_MODE | M0) }, - {RGMII0_RXD2, (PIN_INPUT | MANUAL_MODE | M0) }, - {RGMII0_RXD1, (PIN_INPUT | MANUAL_MODE | M0) }, - {RGMII0_RXD0, (PIN_INPUT | MANUAL_MODE | M0) }, - {VIN2A_D12, (PIN_OUTPUT | MANUAL_MODE | M3) }, - {VIN2A_D13, (PIN_OUTPUT | MANUAL_MODE | M3) }, - {VIN2A_D14, (PIN_OUTPUT | MANUAL_MODE | M3) }, - {VIN2A_D15, (PIN_OUTPUT | MANUAL_MODE | M3) }, - {VIN2A_D16, (PIN_OUTPUT | MANUAL_MODE | M3) }, - {VIN2A_D17, (PIN_OUTPUT | MANUAL_MODE | M3) }, - {VIN2A_D18, (PIN_INPUT | MANUAL_MODE | M3)}, - {VIN2A_D19, (PIN_INPUT | MANUAL_MODE | M3)}, - {VIN2A_D20, (PIN_INPUT | MANUAL_MODE | M3)}, - {VIN2A_D21, (PIN_INPUT | MANUAL_MODE | M3)}, - {VIN2A_D22, (PIN_INPUT | MANUAL_MODE | M3)}, - {VIN2A_D23, (PIN_INPUT | MANUAL_MODE | M3)}, -#if defined(CONFIG_NAND) || defined(CONFIG_NOR) - /* NAND / NOR pin-mux */ - {GPMC_AD0 , M0 | IEN | PDIS}, /* GPMC_AD0 */ - {GPMC_AD1 , M0 | IEN | PDIS}, /* GPMC_AD1 */ - {GPMC_AD2 , M0 | IEN | PDIS}, /* GPMC_AD2 */ - {GPMC_AD3 , M0 | IEN | PDIS}, /* GPMC_AD3 */ - {GPMC_AD4 , M0 | IEN | PDIS}, /* GPMC_AD4 */ - {GPMC_AD5 , M0 | IEN | PDIS}, /* GPMC_AD5 */ - {GPMC_AD6 , M0 | IEN | PDIS}, /* GPMC_AD6 */ - {GPMC_AD7 , M0 | IEN | PDIS}, /* GPMC_AD7 */ - {GPMC_AD8 , M0 | IEN | PDIS}, /* GPMC_AD8 */ - {GPMC_AD9 , M0 | IEN | PDIS}, /* GPMC_AD9 */ - {GPMC_AD10, M0 | IEN | PDIS}, /* GPMC_AD10 */ - {GPMC_AD11, M0 | IEN | PDIS}, /* GPMC_AD11 */ - {GPMC_AD12, M0 | IEN | PDIS}, /* GPMC_AD12 */ - {GPMC_AD13, M0 | IEN | PDIS}, /* GPMC_AD13 */ - {GPMC_AD14, M0 | IEN | PDIS}, /* GPMC_AD14 */ - {GPMC_AD15, M0 | IEN | PDIS}, /* GPMC_AD15 */ - {GPMC_CS0, M0 | IDIS | PEN | PTU}, /* GPMC chip-select */ - {GPMC_ADVN_ALE, M0 | IDIS | PEN | PTD}, /* GPMC Addr latch */ - {GPMC_OEN_REN, M0 | IDIS | PEN | PTU}, /* GPMC Read enable */ - {GPMC_WEN, M0 | IDIS | PEN | PTU}, /* GPMC Write enable_n */ - {GPMC_BEN0, M0 | IDIS | PEN | PTD}, /* GPMC Byte/Column En */ - {GPMC_WAIT0, M0 | IEN | PEN | PTU}, /* GPMC Wait/Ready */ - /* GPMC_WPN (Write Protect) is controlled by DIP Switch SW10(12) */ -#else - /* QSPI pin-mux */ - {GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */ - {GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */ - {GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */ - {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[0] */ - {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[1] */ - {GPMC_A18, (M1)}, /* QSPI1_SCLK */ - {GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */ - {GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */ - {GPMC_CS2, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS0 */ - {GPMC_CS3, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS1*/ -#endif /* CONFIG_NAND || CONFIG_NOR */ - {USB2_DRVVBUS, (M0 | IEN | FSC) }, - {SPI1_CS1, (PEN | IDIS | M14) }, +const struct pad_conf_entry dra72x_core_padconf_array[] = { + {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */ + {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */ + {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */ + {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */ + {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */ + {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */ + {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */ + {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */ + {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */ + {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */ + {GPMC_AD10, (M3 | PIN_INPUT)}, /* gpmc_ad10.vout3_d10 */ + {GPMC_AD11, (M3 | PIN_INPUT)}, /* gpmc_ad11.vout3_d11 */ + {GPMC_AD12, (M3 | PIN_INPUT)}, /* gpmc_ad12.vout3_d12 */ + {GPMC_AD13, (M3 | PIN_INPUT)}, /* gpmc_ad13.vout3_d13 */ + {GPMC_AD14, (M3 | PIN_INPUT)}, /* gpmc_ad14.vout3_d14 */ + {GPMC_AD15, (M3 | PIN_INPUT)}, /* gpmc_ad15.vout3_d15 */ + {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 */ + {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */ + {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a2.vout3_d18 */ + {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a3.vout3_d19 */ + {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a4.vout3_d20 */ + {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a5.vout3_d21 */ + {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a6.vout3_d22 */ + {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a7.vout3_d23 */ + {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a8.vout3_hsync */ + {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */ + {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */ + {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */ + {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ + {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ + {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ + {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ + {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ + {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ + {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ + {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ + {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ + {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ + {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ + {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ + {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ + {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ + {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ + {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ + {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ + {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */ + {VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_clk0.vin2a_clk0 */ + {VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_hsync0.vin2a_hsync0 */ + {VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_vsync0.vin2a_vsync0 */ + {VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d0.vin2a_d0 */ + {VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d1.vin2a_d1 */ + {VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d2.vin2a_d2 */ + {VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d3.vin2a_d3 */ + {VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d4.vin2a_d4 */ + {VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d5.vin2a_d5 */ + {VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d6.vin2a_d6 */ + {VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d7.vin2a_d7 */ + {VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d8.vin2a_d8 */ + {VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d9.vin2a_d9 */ + {VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d10.vin2a_d10 */ + {VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d11.vin2a_d11 */ + {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ + {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ + {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */ + {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ + {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ + {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ + {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ + {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ + {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ + {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ + {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ + {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ + {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ + {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ + {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ + {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ + {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ + {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ + {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ + {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ + {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ + {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ + {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ + {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ + {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ + {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ + {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ + {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ + {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ + {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ + {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ + {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ + {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ + {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ + {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ + {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ + {RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ + {RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ + {RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ + {RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ + {RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ + {RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ + {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d0.rgmii1_txc */ + {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d1.rgmii1_txctl */ + {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d2.rgmii1_txd3 */ + {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d3.rgmii1_txd2 */ + {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d4.rgmii1_txd1 */ + {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d5.rgmii1_txd0 */ + {VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d6.rgmii1_rxc */ + {VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d7.rgmii1_rxctl */ + {VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d8.rgmii1_rxd3 */ + {VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d9.rgmii1_rxd2 */ + {VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d10.rgmii1_rxd1 */ + {VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d11.rgmii1_rxd0 */ + {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ + {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ + {GPIO6_14, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_14.i2c3_sda */ + {GPIO6_15, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_15.i2c3_scl */ + {GPIO6_16, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ + {XREF_CLK1, (M5 | PIN_OUTPUT)}, /* xref_clk1.atl_clk1 */ + {XREF_CLK2, (M5 | PIN_OUTPUT)}, /* xref_clk2.atl_clk2 */ + {MCASP1_AXR0, (M10 | PIN_INPUT_SLEW)}, /* mcasp1_axr0.i2c5_sda */ + {MCASP1_AXR1, (M10 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.i2c5_scl */ + {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ + {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ + {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ + {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ + {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ + {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ + {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ + {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */ + {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ + {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ + {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.mcasp2_aclkr */ + {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ + {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ + {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ + {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */ + {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ + {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ + {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ + {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ + {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ + {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ + {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ + {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */ + {GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ + {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */ + {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */ + {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */ + {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)}, /* spi1_cs0.spi1_cs0 */ + {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ + {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ + {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ + {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */ + {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */ + {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */ + {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.uart3_rtsn */ + {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ + {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */ + {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ + {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ + {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_ctsn.mmc4_clk */ + {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_rtsn.mmc4_cmd */ + {UART2_RXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rxd.mmc4_dat0 */ + {UART2_TXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_txd.mmc4_dat1 */ + {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.mmc4_dat2 */ + {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.mmc4_dat3 */ + {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */ + {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */ + {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */ + {WAKEUP3, (M1 | PULL_ENA | PULL_UP)}, /* Wakeup3.sys_nirq1 */ }; const struct pad_conf_entry early_padconf[] = { @@ -155,7 +201,7 @@ const struct pad_conf_entry early_padconf[] = { }; #ifdef CONFIG_IODELAY_RECALIBRATION -const struct iodelay_cfg_entry iodelay_cfg_array[] = { +const struct iodelay_cfg_entry dra72_iodelay_cfg_array[] = { {0x6F0, 359, 0}, /* RGMMI0_RXC_IN */ {0x6FC, 129, 1896}, /* RGMMI0_RXCTL_IN */ {0x708, 80, 1391}, /* RGMMI0_RXD0_IN */ @@ -181,6 +227,14 @@ const struct iodelay_cfg_entry iodelay_cfg_array[] = { {0xA94, 1260, 0}, /* CFG_VIN2A_D15_OUT */ {0xAA0, 1400, 0}, /* CFG_VIN2A_D16_OUT */ {0xAAC, 1290, 0}, /* CFG_VIN2A_D17_OUT */ + {0x144, 0, 0}, /* CFG_GPMC_A13_IN */ + {0x150, 2062, 2277}, /* CFG_GPMC_A14_IN */ + {0x15C, 1960, 2289}, /* CFG_GPMC_A15_IN */ + {0x168, 2058, 2386}, /* CFG_GPMC_A16_IN */ + {0x170, 0, 0 }, /* CFG_GPMC_A16_OUT */ + {0x174, 2062, 2350}, /* CFG_GPMC_A17_IN */ + {0x188, 0, 0}, /* CFG_GPMC_A18_OUT */ + {0x374, 121, 0}, /* CFG_GPMC_CS2_OUT */ }; #endif @@ -345,7 +399,7 @@ const struct pad_conf_entry dra74x_core_padconf_array[] = { {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ - {MMC1_SDCD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.mmc1_sdcd */ + {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */ {GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */ -- 2.1.4

2 3

[U-Boot] [PATCH v4 0/4] usb: Reduce USB scanning time
by Stefan Roese 15 Mar '16

15 Mar '16

My current x86 platform (Bay Trail, not in mainline yet) has a quite complex USB infrastructure with many USB hubs. Here the USB scan takes an incredible huge amount of time: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 28.415 seconds This is of course not acceptable on platforms, where USB needs to get scanned at every bootup. As this increases the bootup time of this device by nearly 30 seconds! This patch series greatly reduces the USB scanning time. This is done by multiple means: - Remove or reduce delays and timeouts - Remove a 2nd reset of the USB hubs - Change USB port timeout handling and introduce quasi parallel USB port scanning As a result, the USB scanning time is greatly reduced: starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 9 USB Device(s) found time: 1.822 seconds As you can see, the time is reduced from 28.4 to 1.8 seconds! Please find more details to the changes in the patch description. Testing and comments welcome! Thanks, Stefan Changes in v4: - Minor rewording / fixes of the commit text - Add Acked-by / Tested-by from Hans and Stephen - Minor rewording / fixes of the commit text - Add Acked-by from Hans - Moved check for query_delay into usb_scan_port() as suggested by Hans - Correct list handling (drop INIT_LIST_HEAD) - Added some missing free() calls - Changed connect_timeout calculation as suggested by Stephen - Moved usb_scan_list to other globals to be cleaned up in a later patch - Added timeout check for non-functional ports (usb_get_port_status return error - Reverted if logic in loop to remove an indentation level - Moved debug() output - Removed unnecessary if when already connected - Added Hans's Acked-by - Added Stephen's Tested-by - Minor rewording / fixes of the commit text Changes in v3: - Changed small timeout from 10ms to 20ms as this results in a much faster USB scanning time (10ms too small and 20ms enough in many cases) - Introduced scanning list containing all USB devices of one USB controller that need to get scanned - Don't delay in usb_hub_power_on(). Instead skip querying these devices until the delay time is reached. Changes in v2: - Add Acked-by / Tested-by from Hans and Stephen - Make this change unconditional - Add Acked-by / Tested-by from Hans and Stephen - Make this change unconditional - Add Tested-by from Stephen - Remove static USB port configuration patch (for now) Stefan Roese (4): usb: legacy_hub_port_reset(): Speedup hub reset handling usb: Remove 200 ms delay in usb_hub_port_connect_change() usb: Don't reset the USB hub a 2nd time usb: Change power-on / scanning timeout handling common/usb.c | 13 +-- common/usb_hub.c | 305 +++++++++++++++++++++++++++++++++++++------------------ include/usb.h | 3 + 3 files changed, 212 insertions(+), 109 deletions(-) -- 2.7.3

2 7

[U-Boot] [PATCH v2 0/6] ARM: DRA7: Add support for RevH evm
by Lokesh Vutla 15 Mar '16

15 Mar '16

DRA74-evm RevH and later versions uses 4GB DDR and populates this info in EEPROM. This series reads EEPROM and populates emif settings for 4GB ddr. If eeprom is not available or evm revision is < H, then it fall backs to default emif settings. This series depends on the ti common eeprom driver series posted recently. https://www.mail-archive.com/u-boot%40lists.denx.de/msg204549.html Tested on DRA7 RevH: http://pastebin.ubuntu.com/15291175/ DRA7 RevG: http://pastebin.ubuntu.com/15291197/ Changes since v1: - Swapped patch 4 and 5 inorder to maintain bisectability. Lokesh Vutla (6): ti: common: dra7: Add standard access for board description EEPROM ARM: DRA7: Enable EEPROM support ARM: DRA7: Move emif settings to board specific files ARM: DRA7: configs: Prepare for detecting memory > 2GB ARM: DRA7: EMIF: Add 4GB DDR settings ARM: DRA7-evm: Update memory info in banks arch/arm/cpu/armv7/omap5/Kconfig | 1 + arch/arm/cpu/armv7/omap5/sdram.c | 149 +-------------------- board/ti/common/board_detect.c | 64 +++++++++ board/ti/common/board_detect.h | 56 ++++++++ board/ti/dra7xx/Kconfig | 3 + board/ti/dra7xx/evm.c | 279 ++++++++++++++++++++++++++++++++++++++- include/configs/dra7xx_evm.h | 9 ++ 7 files changed, 410 insertions(+), 151 deletions(-) -- 2.1.4

2 12

[U-Boot] [PATCH v2] ARM: AM57xx: Update EMIF registers
by Lokesh Vutla 15 Mar '16

15 Mar '16

There are certain EMIF timing failures seen on the some x15 boards. Updating the EMIF settings to get rid of these timing failures. Reviewed-by: Tom Rini <trini(a)konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- Changes since v1: - Added Reviewed-by - Updated sdram config 2 register. board/ti/am57xx/board.c | 136 +++++++++++++++++++++++------------------------- 1 file changed, 65 insertions(+), 71 deletions(-) diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index d712ab0..9a8ee00 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -64,22 +64,22 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = { .sdram_config_init = 0x61851b32, .sdram_config = 0x61851b32, - .sdram_config2 = 0x00000000, + .sdram_config2 = 0x08000000, .ref_ctrl = 0x000040F1, .ref_ctrl_final = 0x00001035, - .sdram_tim1 = 0xceef266b, - .sdram_tim2 = 0x328f7fda, - .sdram_tim3 = 0x027f88a8, + .sdram_tim1 = 0xcccf36ab, + .sdram_tim2 = 0x308f7fda, + .sdram_tim3 = 0x409f88a8, .read_idle_ctrl = 0x00050000, - .zq_config = 0x0007190b, + .zq_config = 0x5007190b, .temp_alert_config = 0x00000000, .emif_ddr_phy_ctlr_1_init = 0x0024400b, .emif_ddr_phy_ctlr_1 = 0x0e24400b, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, - .emif_ddr_ext_phy_ctrl_2 = 0x00740074, - .emif_ddr_ext_phy_ctrl_3 = 0x00780078, - .emif_ddr_ext_phy_ctrl_4 = 0x007c007c, - .emif_ddr_ext_phy_ctrl_5 = 0x007b007b, + .emif_ddr_ext_phy_ctrl_2 = 0x00910091, + .emif_ddr_ext_phy_ctrl_3 = 0x00950095, + .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, + .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, .emif_rd_wr_lvl_rmp_win = 0x00000000, .emif_rd_wr_lvl_rmp_ctl = 0x80000000, .emif_rd_wr_lvl_ctl = 0x00000000, @@ -89,39 +89,35 @@ static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = { /* Ext phy ctrl regs 1-35 */ static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = { 0x10040100, - 0x00740074, - 0x00780078, - 0x007c007c, - 0x007b007b, - 0x00800080, - 0x00360036, + 0x00910091, + 0x00950095, + 0x009B009B, + 0x009E009E, + 0x00980098, 0x00340034, - 0x00360036, 0x00350035, - 0x00350035, - - 0x01ff01ff, - 0x01ff01ff, - 0x01ff01ff, - 0x01ff01ff, - 0x01ff01ff, - - 0x00430043, - 0x003e003e, - 0x004a004a, - 0x00470047, - 0x00400040, - + 0x00340034, + 0x00310031, + 0x00340034, + 0x007F007F, + 0x007F007F, + 0x007F007F, + 0x007F007F, + 0x007F007F, + 0x00480048, + 0x004A004A, + 0x00520052, + 0x00550055, + 0x00500050, 0x00000000, 0x00600020, 0x40011080, 0x08102040, - - 0x00400040, - 0x00400040, - 0x00400040, - 0x00400040, - 0x00400040, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, 0x0, 0x0, 0x0, @@ -132,22 +128,22 @@ static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = { static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = { .sdram_config_init = 0x61851b32, .sdram_config = 0x61851b32, - .sdram_config2 = 0x00000000, + .sdram_config2 = 0x08000000, .ref_ctrl = 0x000040F1, .ref_ctrl_final = 0x00001035, - .sdram_tim1 = 0xceef266b, - .sdram_tim2 = 0x328f7fda, - .sdram_tim3 = 0x027f88a8, + .sdram_tim1 = 0xcccf36ab, + .sdram_tim2 = 0x308f7fda, + .sdram_tim3 = 0x409f88a8, .read_idle_ctrl = 0x00050000, - .zq_config = 0x0007190b, + .zq_config = 0x5007190b, .temp_alert_config = 0x00000000, .emif_ddr_phy_ctlr_1_init = 0x0024400b, .emif_ddr_phy_ctlr_1 = 0x0e24400b, .emif_ddr_ext_phy_ctrl_1 = 0x10040100, - .emif_ddr_ext_phy_ctrl_2 = 0x00820082, - .emif_ddr_ext_phy_ctrl_3 = 0x008b008b, - .emif_ddr_ext_phy_ctrl_4 = 0x00800080, - .emif_ddr_ext_phy_ctrl_5 = 0x007e007e, + .emif_ddr_ext_phy_ctrl_2 = 0x00910091, + .emif_ddr_ext_phy_ctrl_3 = 0x00950095, + .emif_ddr_ext_phy_ctrl_4 = 0x009b009b, + .emif_ddr_ext_phy_ctrl_5 = 0x009e009e, .emif_rd_wr_lvl_rmp_win = 0x00000000, .emif_rd_wr_lvl_rmp_ctl = 0x80000000, .emif_rd_wr_lvl_ctl = 0x00000000, @@ -156,37 +152,35 @@ static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = { static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = { 0x10040100, - 0x00820082, - 0x008b008b, - 0x00800080, - 0x007e007e, - 0x00800080, - 0x00370037, - 0x00390039, - 0x00360036, - 0x00370037, + 0x00910091, + 0x00950095, + 0x009B009B, + 0x009E009E, + 0x00980098, + 0x00340034, 0x00350035, - 0x01ff01ff, - 0x01ff01ff, - 0x01ff01ff, - 0x01ff01ff, - 0x01ff01ff, - 0x00540054, - 0x00540054, - 0x004e004e, - 0x004c004c, - 0x00400040, - + 0x00340034, + 0x00310031, + 0x00340034, + 0x007F007F, + 0x007F007F, + 0x007F007F, + 0x007F007F, + 0x007F007F, + 0x00480048, + 0x004A004A, + 0x00520052, + 0x00550055, + 0x00500050, 0x00000000, 0x00600020, 0x40011080, 0x08102040, - - 0x00400040, - 0x00400040, - 0x00400040, - 0x00400040, - 0x00400040, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, 0x0, 0x0, 0x0, -- 2.1.4

2 1

[U-Boot] [PATCH V6] ARM: Various: Future-proof serial platdata
by Adam Ford 15 Mar '16

15 Mar '16

A few boards still use ns16550_platdata structures, but assume the structure is going to be in a specific order. By explicitly naming each entry, this should also help 'future-proof' in the event the structure changes. Tested on the Logic PD Torpedo + Wireless. I only changed a handful of devices that used the same syntax as the Logic board. Appologies if I missed one or stepped on toes. Thanks to Derald Woods and Alexander Graf. Signed-off-by: Adam Ford <aford173(a)gmail.com> V6: Add fix to arch/arm/cpu/armv7/am33xx/board.c V5: Add fix to arch/arm/cpu/arm926ejs/lpc32xx/devices.c V4: Fix subject heading V3: Remove reg_offset out in all the structs. It was reverted out, and and if it did exist, it would get initialized to 0 by default. V2: I hastily copy-pasted the boards without looking at the UART number. This addresses 3 boards that use UART3 and not UART1. --- arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 8 ++++---- arch/arm/cpu/armv7/am33xx/board.c | 12 ++++++------ board/isee/igep00x0/igep00x0.c | 6 +++--- board/logicpd/omap3som/omap3logic.c | 6 +++--- board/logicpd/zoom1/zoom1.c | 6 +++--- board/overo/overo.c | 6 +++--- board/quipos/cairo/cairo.c | 6 +++--- board/ti/beagle/beagle.c | 6 +++--- board/timll/devkit8000/devkit8000.c | 6 +++--- 9 files changed, 31 insertions(+), 31 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c index b6db23e..399b07c 100644 --- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c +++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c @@ -45,10 +45,10 @@ void lpc32xx_uart_init(unsigned int uart_id) #if !CONFIG_IS_ENABLED(OF_CONTROL) static const struct ns16550_platdata lpc32xx_uart[] = { - { UART3_BASE, 2, CONFIG_SYS_NS16550_CLK }, - { UART4_BASE, 2, CONFIG_SYS_NS16550_CLK }, - { UART5_BASE, 2, CONFIG_SYS_NS16550_CLK }, - { UART6_BASE, 2, CONFIG_SYS_NS16550_CLK }, + { .base = UART3_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, + { .base = UART4_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, + { .base = UART5_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, + { .base = UART6_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, }; #if defined(CONFIG_LPC32XX_HSUART) diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index e8d5be3..a99cbf9 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -40,14 +40,14 @@ DECLARE_GLOBAL_DATA_PTR; #if !CONFIG_IS_ENABLED(OF_CONTROL) static const struct ns16550_platdata am33xx_serial[] = { - { CONFIG_SYS_NS16550_COM1, 2, CONFIG_SYS_NS16550_CLK }, + { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, # ifdef CONFIG_SYS_NS16550_COM2 - { CONFIG_SYS_NS16550_COM2, 2, CONFIG_SYS_NS16550_CLK }, + { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, # ifdef CONFIG_SYS_NS16550_COM3 - { CONFIG_SYS_NS16550_COM3, 2, CONFIG_SYS_NS16550_CLK }, - { CONFIG_SYS_NS16550_COM4, 2, CONFIG_SYS_NS16550_CLK }, - { CONFIG_SYS_NS16550_COM5, 2, CONFIG_SYS_NS16550_CLK }, - { CONFIG_SYS_NS16550_COM6, 2, CONFIG_SYS_NS16550_CLK }, + { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, + { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, + { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, + { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, # endif # endif }; diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c index e2fce50..d1a6a6f 100644 --- a/board/isee/igep00x0/igep00x0.c +++ b/board/isee/igep00x0/igep00x0.c @@ -34,9 +34,9 @@ static const u32 gpmc_lan_config[] = { #endif static const struct ns16550_platdata igep_serial = { - OMAP34XX_UART3, - 2, - V_NS16550_CLK + .base = OMAP34XX_UART3, + .reg_shift = 2, + .clock = V_NS16550_CLK }; U_BOOT_DEVICE(igep_uart) = { diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c index 668f684..51d2987 100644 --- a/board/logicpd/omap3som/omap3logic.c +++ b/board/logicpd/omap3som/omap3logic.c @@ -47,9 +47,9 @@ DECLARE_GLOBAL_DATA_PTR; */ static const struct ns16550_platdata omap3logic_serial = { - OMAP34XX_UART1, - 2, - V_NS16550_CLK + .base = OMAP34XX_UART1, + .reg_shift = 2, + .clock = V_NS16550_CLK }; U_BOOT_DEVICE(omap3logic_uart) = { diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c index 4040114..982619c 100644 --- a/board/logicpd/zoom1/zoom1.c +++ b/board/logicpd/zoom1/zoom1.c @@ -44,9 +44,9 @@ static const u32 gpmc_lab_enet[] = { }; static const struct ns16550_platdata zoom1_serial = { - OMAP34XX_UART3, - 2, - V_NS16550_CLK + .base = OMAP34XX_UART3, + .reg_shift = 2, + .clock = V_NS16550_CLK }; U_BOOT_DEVICE(zoom1_uart) = { diff --git a/board/overo/overo.c b/board/overo/overo.c index a38b959..40f13e5 100644 --- a/board/overo/overo.c +++ b/board/overo/overo.c @@ -68,9 +68,9 @@ static struct { } expansion_config = {0x0}; static const struct ns16550_platdata overo_serial = { - OMAP34XX_UART3, - 2, - V_NS16550_CLK + .base = OMAP34XX_UART3, + .reg_shift = 2, + .clock = V_NS16550_CLK }; U_BOOT_DEVICE(overo_uart) = { diff --git a/board/quipos/cairo/cairo.c b/board/quipos/cairo/cairo.c index 21793e8..77e4482 100644 --- a/board/quipos/cairo/cairo.c +++ b/board/quipos/cairo/cairo.c @@ -91,9 +91,9 @@ void get_board_mem_timings(struct board_sdrc_timings *timings) #endif static const struct ns16550_platdata cairo_serial = { - OMAP34XX_UART2, - 2, - V_NS16550_CLK + .base = OMAP34XX_UART2, + .reg_shift = 2, + .clock = V_NS16550_CLK }; U_BOOT_DEVICE(cairo_uart) = { diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index ff317ef..0ed4f52 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -73,9 +73,9 @@ static struct { } expansion_config; static const struct ns16550_platdata beagle_serial = { - OMAP34XX_UART3, - 2, - V_NS16550_CLK + .base = OMAP34XX_UART3, + .reg_shift = 2, + .clock = V_NS16550_CLK }; U_BOOT_DEVICE(beagle_uart) = { diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c index 1a447c7..965252f 100644 --- a/board/timll/devkit8000/devkit8000.c +++ b/board/timll/devkit8000/devkit8000.c @@ -46,9 +46,9 @@ static u32 gpmc_net_config[GPMC_MAX_REG] = { }; static const struct ns16550_platdata devkit8000_serial = { - OMAP34XX_UART3, - 2, - V_NS16550_CLK + .base = OMAP34XX_UART3, + .reg_shift = 2, + .clock = V_NS16550_CLK }; U_BOOT_DEVICE(devkit8000_uart) = { -- 1.9.1

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[U-Boot] [PATCH] ARM: OMAP4+: Allow arch specfic code to use early DM
by Lokesh Vutla 15 Mar '16

15 Mar '16

Early system initialization is being done before initf_dm is being called in U-Boot. Then system will fail to boot if any of the DM enabled driver is being called in this system initialization code. So, rearrange the code a bit so that DM enabled drivers can be called during early system initialization. Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- - tested dt and non-dt boot on DRA72 and DRA74 evm. arch/arm/cpu/armv7/omap-common/hwinit-common.c | 30 ++++++++++++++++++-------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index 9e9376d..99634fd 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -107,21 +107,26 @@ void __weak do_board_detect(void) { } -/* - * Routine: s_init - * Description: Does early system init of watchdog, muxing, andclocks +void s_init(void) +{ +} + +/** + * early_system_init - Does Early system initialization. + * + * Does early system init of watchdog, muxing, andclocks * Watchdog disable is done always. For the rest what gets done - * depends on the boot mode in which this function is executed - * 1. s_init of SPL running from SRAM - * 2. s_init of U-Boot running from FLASH - * 3. s_init of U-Boot loaded to SDRAM by SPL - * 4. s_init of U-Boot loaded to SDRAM by ROM code using the + * depends on the boot mode in which this function is executed when + * 1. SPL running from SRAM + * 2. U-Boot running from FLASH + * 3. U-Boot loaded to SDRAM by SPL + * 4. U-Boot loaded to SDRAM by ROM code using the * Configuration Header feature * Please have a look at the respective functions to see what gets * done in each of these cases * This function is called with SRAM stack. */ -void s_init(void) +void early_system_init(void) { init_omap_revision(); hw_data_init(); @@ -145,6 +150,7 @@ void s_init(void) #ifdef CONFIG_SPL_BUILD void board_init_f(ulong dummy) { + early_system_init(); #ifdef CONFIG_BOARD_EARLY_INIT_F board_early_init_f(); #endif @@ -153,6 +159,12 @@ void board_init_f(ulong dummy) } #endif +int arch_cpu_init_dm(void) +{ + early_system_init(); + return 0; +} + /* * Routine: wait_for_command_complete * Description: Wait for posting to finish on watchdog -- 2.1.4

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