March 2016 - U-Boot

[U-Boot] [PATCH 0/4] ARM: DRA7: emif: Miscellaneous bug fixes
by Lokesh Vutla 15 Mar '16

15 Mar '16

This series fixes miscellaneous bugs for the emif driver. Lokesh Vutla (4): ARM: DRA7: emif: Fix updating of refresh ctrl shadow ARM: DRA7: emif: Fix DDR init sequence during warm reset ARM: DRA7: emif: Check for enable bits before updating leveling output ARM: DRA7: emif: Enable interleaving for higher address space arch/arm/cpu/armv7/omap-common/emif-common.c | 50 ++++++++++++++++++---------- arch/arm/cpu/armv7/omap5/sdram.c | 34 ++++++++++++++----- arch/arm/include/asm/emif.h | 9 +++++ 3 files changed, 67 insertions(+), 26 deletions(-) -- 2.1.4

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[U-Boot] [PATCH] dm: omap_timer: Fix conversion of address to a pointer
by Lokesh Vutla 15 Mar '16

15 Mar '16

OMAP timer driver directly typecasts fdt_addr_t to a pointer. This is not strictly correct, as it gives a build warning when fdt_addr_t is u64. So, use map_physmem for a proper typecasts. This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address instead of a pointer for the uart base") Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- drivers/timer/omap-timer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c index 3bb38c5..7422e0a 100644 --- a/drivers/timer/omap-timer.c +++ b/drivers/timer/omap-timer.c @@ -79,7 +79,8 @@ static int omap_timer_ofdata_to_platdata(struct udevice *dev) { struct omap_timer_priv *priv = dev_get_priv(dev); - priv->regs = (struct omap_gptimer_regs *)dev_get_addr(dev); + priv->regs = map_physmem(dev_get_addr(dev), + sizeof(struct omap_gptimer_regs), MAP_NOCACHE); return 0; } -- 2.1.4

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[U-Boot] [PATCH V2 0/6] ARM: keystone2: Miscellaneous fixes
by Nishanth Menon 15 Mar '16

15 Mar '16

Hi, Please find various fixes for DDR, DSP and speed grade operations w.r.t Keystone devices Based on master 52dd704bf8ed Merge branch 'master' of http://git.denx.de/u-boot-sunxi Changes in V2: - updates to patch #5 (review comments) - picked up reviewed by V1: http://marc.info/?l=u-boot&m=145641557719622&w=2 Lokesh Vutla (2): ARM: keystone2: Allow for board specific speed definitions ARM: keystone2: K2G: Add support for different arm/device speeds Suman Anna (2): ARM: keystone2: Use macro for DSP GEM power domain ARM: keystone2: K2G: power-off DSP during boot Vitaly Andrianov (2): ARM: keystone2: use SPD info to configure K2HK and K2E DDR3 ARM: keystone2: use detected ddr3a size arch/arm/mach-keystone/Makefile | 2 + arch/arm/mach-keystone/clock.c | 19 +- arch/arm/mach-keystone/ddr3_spd.c | 463 +++++++++++++++++++++ arch/arm/mach-keystone/include/mach/clock-k2g.h | 4 +- arch/arm/mach-keystone/include/mach/clock.h | 8 +- arch/arm/mach-keystone/include/mach/ddr3.h | 9 + arch/arm/mach-keystone/include/mach/hardware-k2g.h | 7 +- arch/arm/mach-keystone/include/mach/hardware-k2l.h | 7 + arch/arm/mach-keystone/include/mach/hardware.h | 1 + arch/arm/mach-keystone/keystone.c | 2 +- board/ti/ks2_evm/Makefile | 4 +- board/ti/ks2_evm/board.c | 4 +- board/ti/ks2_evm/board_k2e.c | 2 +- board/ti/ks2_evm/board_k2g.c | 50 ++- board/ti/ks2_evm/board_k2hk.c | 4 +- board/ti/ks2_evm/board_k2l.c | 4 +- board/ti/ks2_evm/ddr3_cfg.c | 159 +------ board/ti/ks2_evm/ddr3_cfg.h | 11 +- board/ti/ks2_evm/ddr3_k2e.c | 51 +-- board/ti/ks2_evm/ddr3_k2hk.c | 97 ++--- include/configs/k2e_evm.h | 2 + include/configs/k2hk_evm.h | 2 + 22 files changed, 625 insertions(+), 287 deletions(-) create mode 100644 arch/arm/mach-keystone/ddr3_spd.c -- 2.7.0

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[U-Boot] [PATCH v2 1/2] flash: add device ID for Microchip PIC32 internal flash.
by Purna Chandra Mandal 15 Mar '16

15 Mar '16

Microchip PIC32 has internal parallel flash (non-CFI compliant). These flash devices do not support any identifier command so no standard IDs. Added unique IDs to seperate these flash devices from others supported by U-Boot. Signed-off-by: Purna Chandra Mandal <purna.mandal(a)microchip.com> --- Changes in v2: None include/flash.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/flash.h b/include/flash.h index f53ace7..c9aacd5 100644 --- a/include/flash.h +++ b/include/flash.h @@ -400,6 +400,9 @@ extern flash_info_t *flash_get_info(ulong base); #define FLASH_STM800DT 0x00D7 /* STM M29W800DT (1M = 64K x 16, top) */ #define FLASH_STM800DB 0x005B /* STM M29W800DB (1M = 64K x 16, bottom)*/ +#define FLASH_MCHP100T 0x0060 /* MCHP internal (1M = 64K x 16) */ +#define FLASH_MCHP100B 0x0061 /* MCHP internal (1M = 64K x 16) */ + #define FLASH_28F400_T 0x0062 /* MT 28F400B3 ID ( 4M = 256K x 16 ) */ #define FLASH_28F400_B 0x0063 /* MT 28F400B3 ID ( 4M = 256K x 16 ) */ @@ -486,7 +489,7 @@ extern flash_info_t *flash_get_info(ulong base); #define FLASH_MAN_SHARP 0x00500000 #define FLASH_MAN_ATM 0x00600000 #define FLASH_MAN_CFI 0x01000000 - +#define FLASH_MAN_MCHP 0x02000000 /* Microchip Technology */ #define FLASH_TYPEMASK 0x0000FFFF /* extract FLASH type information */ #define FLASH_VENDMASK 0xFFFF0000 /* extract FLASH vendor information */ -- 1.8.3.1

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[U-Boot] [PATCH 1/3] lib/crc16.c: Coding-style cleanup
by Stefan Roese 15 Mar '16

15 Mar '16

lib/crc16.c is changed to match the common U-Boot coding-style. Signed-off-by: Stefan Roese <sr(a)denx.de> --- lib/crc16.c | 81 ++++++++++++++++++++++++++++++------------------------------- 1 file changed, 40 insertions(+), 41 deletions(-) diff --git a/lib/crc16.c b/lib/crc16.c index c63fde9..57e46f8 100644 --- a/lib/crc16.c +++ b/lib/crc16.c @@ -27,49 +27,48 @@ /* Table of CRC constants - implements x^16+x^12+x^5+1 */ static const uint16_t crc16_tab[] = { - 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, - 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, - 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, - 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, - 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, - 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, - 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, - 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, - 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, - 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, - 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, - 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, - 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, - 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, - 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, - 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, - 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, - 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, - 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, - 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, - 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, - 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, - 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, - 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, - 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, - 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, - 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, - 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, - 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, - 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, - 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, - 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0, + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, + 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, + 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, + 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, + 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, + 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, + 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, + 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, + 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, + 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, + 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, + 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, + 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, + 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, + 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, + 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, + 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, + 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, + 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, + 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, + 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, + 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, + 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, + 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, + 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, + 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, + 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, + 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, + 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, + 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0, }; -uint16_t -cyg_crc16(unsigned char *buf, int len) +uint16_t cyg_crc16(unsigned char *buf, int len) { - int i; - uint16_t cksum; + int i; + uint16_t cksum; - cksum = 0; - for (i = 0; i < len; i++) { - cksum = crc16_tab[((cksum>>8) ^ *buf++) & 0xFF] ^ (cksum << 8); - } - return cksum; + cksum = 0; + for (i = 0; i < len; i++) + cksum = crc16_tab[((cksum>>8) ^ *buf++) & 0xff] ^ (cksum << 8); + + return cksum; } -- 2.7.2

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[U-Boot] [PATCH v6 0/2] Enable FIT image to be loaded beyond 32-bit space
by York Sun 15 Mar '16

15 Mar '16

Originally the set was trying to fix compiling warnings on 32-bit host by converting ulong to phys_addr_t for image address handling. But it used a lot of casting and was ugly. Another approach was taken by ignoring 32-bit hosts and only support this feature on 64-bit capable hosts. This patchset is tested by compiling for selected powerpc, arm, armv8 and sandbox target. It is verified on selected platforms, including p1021rdb (e500v2) p4080ds (e500mc) t4240qds (e6500) ls1021aqds (armv7) ls2080ardb (armv8) with 32- and 64-git address images Changes in v6: Drop patches which convert ulong to phys_addr_t Revert to use original ulong Revert back to use original "ulong" instead of "phys_addr_t" Abort getting image addresses if address is too long for "ulong" Changes in v5: New patch split from fixing load and entry address patch Split the common function into another patch. Revise commit subject. Update commit message as suggested by Simon. Updated cover letter with testing report. Changes in v4: Separate ulong to phys_addr_t change to another patch. Changes in v3: Define PRIpa for host and target in common/image-fit.c so printf works properly for 32-, 64-bit targets and host tools. Changes in v2: Make a common function for both load and entry addresses. Simplify calculation of addresses in a similar way as fdtdec_get_number() fdtdec_get_number() is not used, or too many files need to be included and/or twisted for host tool Continue to use %08llx for print format for load and entry addresses because %pa does not always work for host tool (mkimage) York Sun (2): common: image-fit: Use a common function to get address common: image-fit: Fix load and entry addresses in FIT image common/image-fit.c | 54 ++++++++++++++++++++++++++++++---------------------- 1 file changed, 31 insertions(+), 23 deletions(-) -- 1.7.9.5

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[U-Boot] [PATCH] arm: Add support for LEGO MINDSTORMS EV3
by David Lechner 15 Mar '16

15 Mar '16

This is based on the davinci da850evm. It can boot from either the on-board 16MB flash or from a microSD card. It also reads board information from an I2C EEPROM. The EV3 itself initally boots from write-protected EEPROM, so no u-boot SPL is needed. Signed-off-by: David Lechner <david(a)lechnology.com> --- arch/arm/mach-davinci/Kconfig | 4 + arch/arm/mach-davinci/da850_pinmux.c | 10 + arch/arm/mach-davinci/include/mach/hardware.h | 1 + board/lego/ev3/Kconfig | 12 ++ board/lego/ev3/MAINTAINERS | 6 + board/lego/ev3/Makefile | 10 + board/lego/ev3/README | 32 ++++ board/lego/ev3/legoev3.c | 176 ++++++++++++++++++ configs/legoev3_defconfig | 12 ++ include/configs/legoev3.h | 255 ++++++++++++++++++++++++++ 10 files changed, 518 insertions(+) create mode 100644 board/lego/ev3/Kconfig create mode 100644 board/lego/ev3/MAINTAINERS create mode 100644 board/lego/ev3/Makefile create mode 100644 board/lego/ev3/README create mode 100644 board/lego/ev3/legoev3.c create mode 100644 configs/legoev3_defconfig create mode 100644 include/configs/legoev3.h diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index a8d3e2f..5d1c5c5 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -22,6 +22,9 @@ config TARGET_OMAPL138_LCDK config TARGET_CALIMAIN bool "Calimain board" +config TARGET_LEGOEV3 + bool "LEGO MINDSTORMS EV3" + endchoice config SYS_SOC @@ -31,5 +34,6 @@ source "board/Barix/ipam390/Kconfig" source "board/davinci/da8xxevm/Kconfig" source "board/davinci/ea20/Kconfig" source "board/omicron/calimain/Kconfig" +source "board/lego/ev3/Kconfig" endif diff --git a/arch/arm/mach-davinci/da850_pinmux.c b/arch/arm/mach-davinci/da850_pinmux.c index 6105f63..758109e 100644 --- a/arch/arm/mach-davinci/da850_pinmux.c +++ b/arch/arm/mach-davinci/da850_pinmux.c @@ -12,6 +12,16 @@ #include <asm/arch/pinmux_defs.h> /* SPI pin muxer settings */ +const struct pinmux_config spi0_pins_base[] = { + { pinmux(3), 1, 0 }, /* SPI0_CLK */ + { pinmux(3), 1, 2 }, /* SPI0_SOMI */ + { pinmux(3), 1, 3 }, /* SPI0_SIMO */ +}; + +const struct pinmux_config spi0_pins_scs0[] = { + { pinmux(4), 1, 1 }, /* SPI0_SCS[0] */ +}; + const struct pinmux_config spi1_pins_base[] = { { pinmux(5), 1, 2 }, /* SPI1_CLK */ { pinmux(5), 1, 4 }, /* SPI1_SOMI */ diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h index a4eb0bd..2a0360a 100644 --- a/arch/arm/mach-davinci/include/mach/hardware.h +++ b/arch/arm/mach-davinci/include/mach/hardware.h @@ -503,6 +503,7 @@ struct davinci_syscfg_regs { #define DAVINCI_SYSCFG_SUSPSRC_SPI0 (1 << 21) #define DAVINCI_SYSCFG_SUSPSRC_SPI1 (1 << 22) #define DAVINCI_SYSCFG_SUSPSRC_UART0 (1 << 18) +#define DAVINCI_SYSCFG_SUSPSRC_UART1 (1 << 19) #define DAVINCI_SYSCFG_SUSPSRC_UART2 (1 << 20) #define DAVINCI_SYSCFG_SUSPSRC_TIMER0 (1 << 27) diff --git a/board/lego/ev3/Kconfig b/board/lego/ev3/Kconfig new file mode 100644 index 0000000..14b3f0c --- /dev/null +++ b/board/lego/ev3/Kconfig @@ -0,0 +1,12 @@ +if TARGET_LEGOEV3 + +config SYS_BOARD + default "ev3" + +config SYS_VENDOR + default "lego" + +config SYS_CONFIG_NAME + default "legoev3" + +endif diff --git a/board/lego/ev3/MAINTAINERS b/board/lego/ev3/MAINTAINERS new file mode 100644 index 0000000..11b3261 --- /dev/null +++ b/board/lego/ev3/MAINTAINERS @@ -0,0 +1,6 @@ +LEGOEV3 BOARD +M: David Lechner <david(a)lechnology.com> +S: Maintained +F: board/lego/ev3/ +F: include/configs/legoev3.h +F: configs/legoev3_defconfig diff --git a/board/lego/ev3/Makefile b/board/lego/ev3/Makefile new file mode 100644 index 0000000..f3e717a --- /dev/null +++ b/board/lego/ev3/Makefile @@ -0,0 +1,10 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += legoev3.o diff --git a/board/lego/ev3/README b/board/lego/ev3/README new file mode 100644 index 0000000..1a50ca9 --- /dev/null +++ b/board/lego/ev3/README @@ -0,0 +1,32 @@ +Summary +======= + +LEGO MINDSTORMS EV3 is a toy robot produced by the LEGO Group. It is based +on the davinci da850 evm. The EV3 has a 16MB spi flash and a SDHC microSD card +reader. + +Booting +======= + +The EV3 contains a bootloader in EEPROM that loads u-boot.bin from address 0x0 +of the spi flash memory. Using the default configuration, u-boot will check to +see if there is a boot.scr file on the first FAT partition of the mmc. If there +is, it will run the script and boot the kernel from the uImage file also in +the FAT partition. Otherwise, it will load a kernel and rootfs from the flash. +The kernel must be stored at address 0x50000 on the flash and have a maximum +size of 3MiB. The rootfs must be a squasfs image and stored at 0x350000 in the +flash and have a maximum size of 9.3MiB. The flash starting at 0xCB0000 is +reserved for user data. + +Writing image to flash +====================== + +The EEPROM contains a program for uploading an image file to the flash memory. +The program is started by holding down the right button on the EV3 when powering +it on. You can also `run fwupdateboot` in the u-boot shell to reboot into this +mode. The image can then be uploaded using the official LEGO MINDSTORMS EV3 +software or a 3rd party program capable of uploading a firmware file. + +If you are booting from the microSD card, it is enough to just write uboot.bin +to the flash. If you are not using a microSD card, you will need to create an +image file using the layout described above. diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c new file mode 100644 index 0000000..a791b97 --- /dev/null +++ b/board/lego/ev3/legoev3.c @@ -0,0 +1,176 @@ +/* + * Copyright (C) 2016 David Lechner <david(a)lechnology.com> + * + * Based on da850evm.c + * + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * + * Based on da830evm.c. Original Copyrights follow: + * + * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson(a)gefanuc.com> + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <i2c.h> +#include <net.h> +#include <netdev.h> +#include <spi.h> +#include <spi_flash.h> +#include <asm/arch/hardware.h> +#include <asm/arch/pinmux_defs.h> +#include <asm/io.h> +#include <asm/arch/davinci_misc.h> +#include <asm/errno.h> +#include <hwconfig.h> + +#ifdef CONFIG_DAVINCI_MMC +#include <mmc.h> +#include <asm/arch/sdmmc_defs.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +u8 board_rev; + +#define EEPROM_I2C_ADDR 0x50 +#define EEPROM_REV_OFFSET 0x3F00 +#define EEPROM_MAC_OFFSET 0x3F06 + +#ifdef CONFIG_DAVINCI_MMC +static struct davinci_mmc mmc_sd0 = { + .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, + .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ + .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, + .version = MMC_CTLR_VERSION_2, +}; + +int board_mmc_init(bd_t *bis) +{ + mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); + + /* Add slot-0 to mmc subsystem */ + return davinci_mmc_init(bis, &mmc_sd0); +} +#endif + +const struct pinmux_resource pinmuxes[] = { + PINMUX_ITEM(spi0_pins_base), + PINMUX_ITEM(spi0_pins_scs0), + PINMUX_ITEM(uart1_pins_txrx), + PINMUX_ITEM(i2c0_pins), + PINMUX_ITEM(mmc0_pins), +}; + +const int pinmuxes_size = ARRAY_SIZE(pinmuxes); + +const struct lpsc_resource lpsc[] = { + { DAVINCI_LPSC_SPI0 }, /* Serial Flash */ + { DAVINCI_LPSC_UART1 }, /* console */ + { DAVINCI_LPSC_MMC_SD }, +}; + +const int lpsc_size = ARRAY_SIZE(lpsc); + +u32 get_board_rev(void) +{ + u8 buf[2]; + + if (!board_rev) { + if (i2c_read(EEPROM_I2C_ADDR, EEPROM_REV_OFFSET, 2, buf, 2)) { + printf("\nBoard revision read failed!\n"); + } else { + /* + * Board rev 3 has MAC address at EEPROM_REV_OFFSET. + * Other revisions have checksum at EEPROM_REV_OFFSET+1 + * to detect this. + */ + if ((buf[0] ^ buf[1]) == 0xFF) + board_rev = buf[0]; + else + board_rev = 3; + } + } + + return board_rev; +} + +/* + * The Bluetooth MAC address serves as the board serial number. + */ +void get_board_serial(struct tag_serialnr *serialnr) +{ + u32 offset; + u8 buf[6]; + + if (!board_rev) + board_rev = get_board_rev(); + + /* Board rev 3 has MAC address where rev should be */ + offset = (board_rev == 3) ? EEPROM_REV_OFFSET : EEPROM_MAC_OFFSET; + + if (i2c_read(EEPROM_I2C_ADDR, offset, 2, buf, 6)) { + printf("\nBoard serial read failed!\n"); + } else { + u8 *nr; + + nr = (u8 *)&serialnr->low; + nr[0] = buf[5]; + nr[1] = buf[4]; + nr[2] = buf[3]; + nr[3] = buf[2]; + nr = (u8 *)&serialnr->high; + nr[0] = buf[1]; + nr[1] = buf[0]; + nr[2] = 0; + nr[3] = 0; + } +} + +int board_early_init_f(void) +{ + /* + * Power on required peripherals + * ARM does not have access by default to PSC0 and PSC1 + * assuming here that the DSP bootloader has set the IOPU + * such that PSC access is available to ARM + */ + if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) + return 1; + + return 0; +} + +int board_init(void) +{ +#ifndef CONFIG_USE_IRQ + irq_init(); +#endif + + /* arch number of the board */ + /* LEGO didn't register for a unique number and uses da850evm */ + gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* setup the SUSPSRC for ARM to control emulation suspend */ + writel(readl(&davinci_syscfg_regs->suspsrc) & + ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | + DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | + DAVINCI_SYSCFG_SUSPSRC_UART1), + &davinci_syscfg_regs->suspsrc); + + /* configure pinmux settings */ + if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) + return 1; + + /* enable the console UART */ + writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | + DAVINCI_UART_PWREMU_MGMT_UTRST), + &davinci_uart1_ctrl_regs->pwremu_mgmt); + + return 0; +} diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig new file mode 100644 index 0000000..d838baa --- /dev/null +++ b/configs/legoev3_defconfig @@ -0,0 +1,12 @@ +CONFIG_ARM=y +CONFIG_ARCH_DAVINCI=y +CONFIG_TARGET_LEGOEV3=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n" +CONFIG_AUTOBOOT_STOP_STR="l" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SYS_NS16550=y diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h new file mode 100644 index 0000000..79fa3c4 --- /dev/null +++ b/include/configs/legoev3.h @@ -0,0 +1,255 @@ +/* + * Copyright (C) 2016 David Lechner <david(a)lechnology.com> + * + * Based on da850evm.h + * + * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * + * Based on davinci_dvevm.h. Original Copyrights follow: + * + * Copyright (C) 2007 Sergey Kubushyn <ksi(a)koi8.net> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * SoC Configuration + */ +#define CONFIG_MACH_DAVINCI_DA850_EVM +#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ +#define CONFIG_SOC_DA850 /* TI DA850 SoC */ +#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH +#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) +#define CONFIG_SYS_OSCIN_FREQ 24000000 +#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE +#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CONFIG_SYS_DA850_PLL_INIT +#define CONFIG_SYS_DA850_DDR_INIT + +#define CONFIG_SYS_TEXT_BASE 0xc1080000 + + +/* + * Memory Info + */ +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ +#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ +#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ +#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ + +/* memtest start addr */ +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) + +/* memtest will be run on 16MB */ +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) + +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ + +#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ + DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ + DAVINCI_SYSCFG_SUSPSRC_SPI0 | \ + DAVINCI_SYSCFG_SUSPSRC_UART1 | \ + DAVINCI_SYSCFG_SUSPSRC_EMAC | \ + DAVINCI_SYSCFG_SUSPSRC_I2C) + +/* + * PLL configuration + */ +#define CONFIG_SYS_DV_CLKMODE 0 +#define CONFIG_SYS_DA850_PLL0_POSTDIV 1 +#define CONFIG_SYS_DA850_PLL0_PLLDIV1 0x8000 +#define CONFIG_SYS_DA850_PLL0_PLLDIV2 0x8001 +#define CONFIG_SYS_DA850_PLL0_PLLDIV3 0x8002 +#define CONFIG_SYS_DA850_PLL0_PLLDIV4 0x8003 +#define CONFIG_SYS_DA850_PLL0_PLLDIV5 0x8002 +#define CONFIG_SYS_DA850_PLL0_PLLDIV6 CONFIG_SYS_DA850_PLL0_PLLDIV1 +#define CONFIG_SYS_DA850_PLL0_PLLDIV7 0x8005 + +#define CONFIG_SYS_DA850_PLL1_POSTDIV 1 +#define CONFIG_SYS_DA850_PLL1_PLLDIV1 0x8000 +#define CONFIG_SYS_DA850_PLL1_PLLDIV2 0x8001 +#define CONFIG_SYS_DA850_PLL1_PLLDIV3 0x8002 + +#define CONFIG_SYS_DA850_PLL0_PLLM 24 +#define CONFIG_SYS_DA850_PLL1_PLLM 21 + +/* + * DDR2 memory configuration + */ +#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ + DV_DDR_PHY_EXT_STRBEN | \ + (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT)) + +#define CONFIG_SYS_DA850_DDR2_SDBCR ( \ + (1 << DV_DDR_SDCR_MSDRAMEN_SHIFT) | \ + (1 << DV_DDR_SDCR_DDREN_SHIFT) | \ + (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \ + (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) | \ + (0x3 << DV_DDR_SDCR_CL_SHIFT) | \ + (0x2 << DV_DDR_SDCR_IBANK_SHIFT) | \ + (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT)) + +/* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */ +#define CONFIG_SYS_DA850_DDR2_SDBCR2 0 + +#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \ + (14 << DV_DDR_SDTMR1_RFC_SHIFT) | \ + (2 << DV_DDR_SDTMR1_RP_SHIFT) | \ + (2 << DV_DDR_SDTMR1_RCD_SHIFT) | \ + (1 << DV_DDR_SDTMR1_WR_SHIFT) | \ + (5 << DV_DDR_SDTMR1_RAS_SHIFT) | \ + (8 << DV_DDR_SDTMR1_RC_SHIFT) | \ + (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \ + (0 << DV_DDR_SDTMR1_WTR_SHIFT)) + +#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \ + (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \ + (0 << DV_DDR_SDTMR2_XP_SHIFT) | \ + (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \ + (17 << DV_DDR_SDTMR2_XSNR_SHIFT) | \ + (199 << DV_DDR_SDTMR2_XSRD_SHIFT) | \ + (0 << DV_DDR_SDTMR2_RTP_SHIFT) | \ + (0 << DV_DDR_SDTMR2_CKE_SHIFT)) + +#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000494 +#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30 + +/* + * Serial Driver info + */ +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART1_BASE /* Base address of UART1 */ +#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ + +#define CONFIG_SPI +#define CONFIG_CMD_SF +#define CONFIG_DAVINCI_SPI +#define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE +#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) +#define CONFIG_SF_DEFAULT_SPEED 50000000 +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED + +/* + * I2C Configuration + */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_DAVINCI +#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000 +#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ + +/* + * U-Boot general configuration + */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOOTFILE "uImage" /* Boot file name */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ +#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC +#define CONFIG_OF_LIBFDT + +/* + * Linux Information + */ +#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) +#define CONFIG_HWCONFIG /* enable hwconfig */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SERIAL_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_SETUP_INITRD_TAG +#define CONFIG_BOOTDELAY 0 +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_BOOTCOMMAND \ + "if mmc rescan; then " \ + "if run loadbootscr; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcargs; " \ + "run mmcboot; " \ + "else " \ + "run flashargs; " \ + "run flashboot; " \ + "fi; " \ + "fi; " \ + "else " \ + "run flashargs; " \ + "run flashboot; " \ + "fi" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hostname=EV3\0" \ + "memsize=64M\0" \ + "filesyssize=10M\0" \ + "verify=n\0" \ + "console=ttyS1,115200n8\0" \ + "bootscraddr=0xC0600000\0" \ + "loadaddr=0xC0007FC0\0" \ + "filesysaddr=0xC1180000\0" \ + "fwupdateboot=mw 0xFFFF1FFC 0x5555AAAA; reset\0" \ + "mmcargs=setenv bootargs mem=${memsize} console=${console} root=/dev/mmcblk0p2 rw rootwait lpj=747520\0" \ + "mmcboot=bootm ${loadaddr}\0" \ + "flashargs=setenv bootargs mem=${memsize} initrd=${filesysaddr},${filesyssize} root=/dev/ram0 rw rootfstype=squashfs console=${console} lpj=747520\0" \ + "flashboot=sf probe 0; sf read ${loadaddr} 0x50000 0x300000; sf read ${filesysaddr} 0x350000 0x960000; bootm ${loadaddr}\0" \ + "loadimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \ + "bootscript=source ${bootscraddr}\0" \ + +/* + * U-Boot commands + */ +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVES + +#ifdef CONFIG_CMD_BDI +#define CONFIG_CLOCKS +#endif + +#define CONFIG_CMD_SPI + +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_SYS_NO_FLASH +#define CONFIG_ENV_SIZE (16 << 10) + +/* SD/MMC configuration */ +#define CONFIG_MMC +#define CONFIG_DAVINCI_MMC_SD1 +#define CONFIG_GENERIC_MMC +#define CONFIG_DAVINCI_MMC + +/* + * Enable MMC commands only when + * MMC support is present + */ +#ifdef CONFIG_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT3 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_MMC +#endif + +/* additions for new relocation code, must added to all boards */ +#define CONFIG_SYS_SDRAM_BASE 0xc0000000 + +#define CONFIG_SYS_INIT_SP_ADDR 0x80010000 + +#endif /* __CONFIG_H */ -- 1.9.1

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[U-Boot] [PATCH V2 0/6] ARM: keystone: K2G: Add support for PMMC remoteproc load
by Nishanth Menon 15 Mar '16

15 Mar '16

Hi, Here is the series for supporting TI's PMMC - a Power Management co-processor in TI's K2G SoC. TI's SoC architecture requires the microcontroller for power management functionality which is excersized by various operating systems running on ARM, DSP and other compute engines in a centralized manner. Changes in V2: - Updated remoteproc driver to work with device tree - config env variable updates Series based on: master 52dd704bf8ed Merge branch 'master' of http://git.denx.de/u-boot-sunxi Test log: http://pastebin.ubuntu.com/15200102/ Nishanth Menon (6): ARM: keystone2: psc: redo doc in kernel-doc format ARM: keystone2: psc-defs: use adequate () for macros ARM: keystone2: psc: introduce function to hold and release module in reset. remoteproc: Add support for TI power processor ARM: dts: k2g: Add support for PMMC configs: k2g_evm: Add TI power processor support arch/arm/dts/k2g.dtsi | 7 + arch/arm/mach-keystone/include/mach/psc_defs.h | 10 +- arch/arm/mach-keystone/psc.c | 200 +++++++++++++++++++------ configs/k2g_evm_defconfig | 2 + drivers/remoteproc/Kconfig | 10 ++ drivers/remoteproc/Makefile | 1 + drivers/remoteproc/ti_power_proc.c | 180 ++++++++++++++++++++++ include/configs/k2g_evm.h | 7 + include/configs/ti_armv7_keystone2.h | 14 ++ 9 files changed, 384 insertions(+), 47 deletions(-) create mode 100644 drivers/remoteproc/ti_power_proc.c -- 2.7.0

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[U-Boot] [PATCH] ARM: keystone2: Get rid of unused clock files
by Nishanth Menon 15 Mar '16

15 Mar '16

With commit fe772ebd285b ("ARM: keystone2: Use common definition for clk_get_rate"), we have centralized the clock code into a common clock logic and the redundant files, unfortunately remained... Clean that up. Signed-off-by: Nishanth Menon <nm(a)ti.com> --- arch/arm/mach-keystone/clock-k2e.c | 95 -------------------------------- arch/arm/mach-keystone/clock-k2hk.c | 105 ------------------------------------ arch/arm/mach-keystone/clock-k2l.c | 99 ---------------------------------- 3 files changed, 299 deletions(-) delete mode 100644 arch/arm/mach-keystone/clock-k2e.c delete mode 100644 arch/arm/mach-keystone/clock-k2hk.c delete mode 100644 arch/arm/mach-keystone/clock-k2l.c diff --git a/arch/arm/mach-keystone/clock-k2e.c b/arch/arm/mach-keystone/clock-k2e.c deleted file mode 100644 index 7d163a4b1ab9..000000000000 --- a/arch/arm/mach-keystone/clock-k2e.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - * Keystone2: get clk rate for K2E - * - * (C) Copyright 2012-2014 - * Texas Instruments Incorporated, <www.ti.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/arch/clock.h> -#include <asm/arch/clock_defs.h> - -/** - * pll_freq_get - get pll frequency - * Fout = Fref * NF(mult) / NR(prediv) / OD - * @pll: pll identifier - */ -static unsigned long pll_freq_get(int pll) -{ - unsigned long mult = 1, prediv = 1, output_div = 2; - unsigned long ret; - u32 tmp, reg; - - if (pll == CORE_PLL) { - ret = external_clk[sys_clk]; - if (pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN) { - /* PLL mode */ - tmp = __raw_readl(KS2_MAINPLLCTL0); - prediv = (tmp & PLL_DIV_MASK) + 1; - mult = (((tmp & PLLM_MULT_HI_SMASK) >> 6) | - (pllctl_reg_read(pll, mult) & - PLLM_MULT_LO_MASK)) + 1; - output_div = ((pllctl_reg_read(pll, secctl) >> - PLL_CLKOD_SHIFT) & PLL_CLKOD_MASK) + 1; - - ret = ret / prediv / output_div * mult; - } - } else { - switch (pll) { - case PASS_PLL: - ret = external_clk[pa_clk]; - reg = KS2_PASSPLLCTL0; - break; - case DDR3_PLL: - ret = external_clk[ddr3a_clk]; - reg = KS2_DDR3APLLCTL0; - break; - default: - return 0; - } - - tmp = __raw_readl(reg); - - if (!(tmp & PLLCTL_BYPASS)) { - /* Bypass disabled */ - prediv = (tmp & PLL_DIV_MASK) + 1; - mult = ((tmp >> PLL_MULT_SHIFT) & PLL_MULT_MASK) + 1; - output_div = ((tmp >> PLL_CLKOD_SHIFT) & - PLL_CLKOD_MASK) + 1; - ret = ((ret / prediv) * mult) / output_div; - } - } - - return ret; -} - -unsigned long clk_get_rate(unsigned int clk) -{ - switch (clk) { - case core_pll_clk: return pll_freq_get(CORE_PLL); - case pass_pll_clk: return pll_freq_get(PASS_PLL); - case ddr3_pll_clk: return pll_freq_get(DDR3_PLL); - case sys_clk0_1_clk: - case sys_clk0_clk: return pll_freq_get(CORE_PLL) / pll0div_read(1); - case sys_clk1_clk: return pll_freq_get(CORE_PLL) / pll0div_read(2); - case sys_clk2_clk: return pll_freq_get(CORE_PLL) / pll0div_read(3); - case sys_clk3_clk: return pll_freq_get(CORE_PLL) / pll0div_read(4); - case sys_clk0_2_clk: return clk_get_rate(sys_clk0_clk) / 2; - case sys_clk0_3_clk: return clk_get_rate(sys_clk0_clk) / 3; - case sys_clk0_4_clk: return clk_get_rate(sys_clk0_clk) / 4; - case sys_clk0_6_clk: return clk_get_rate(sys_clk0_clk) / 6; - case sys_clk0_8_clk: return clk_get_rate(sys_clk0_clk) / 8; - case sys_clk0_12_clk: return clk_get_rate(sys_clk0_clk) / 12; - case sys_clk0_24_clk: return clk_get_rate(sys_clk0_clk) / 24; - case sys_clk1_3_clk: return clk_get_rate(sys_clk1_clk) / 3; - case sys_clk1_4_clk: return clk_get_rate(sys_clk1_clk) / 4; - case sys_clk1_6_clk: return clk_get_rate(sys_clk1_clk) / 6; - case sys_clk1_12_clk: return clk_get_rate(sys_clk1_clk) / 12; - default: - break; - } - - return 0; -} diff --git a/arch/arm/mach-keystone/clock-k2hk.c b/arch/arm/mach-keystone/clock-k2hk.c deleted file mode 100644 index 2e368910bf05..000000000000 --- a/arch/arm/mach-keystone/clock-k2hk.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Keystone2: get clk rate for K2HK - * - * (C) Copyright 2012-2014 - * Texas Instruments Incorporated, <www.ti.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/arch/clock.h> -#include <asm/arch/clock_defs.h> - -/** - * pll_freq_get - get pll frequency - * Fout = Fref * NF(mult) / NR(prediv) / OD - * @pll: pll identifier - */ -static unsigned long pll_freq_get(int pll) -{ - unsigned long mult = 1, prediv = 1, output_div = 2; - unsigned long ret; - u32 tmp, reg; - - if (pll == CORE_PLL) { - ret = external_clk[sys_clk]; - if (pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN) { - /* PLL mode */ - tmp = __raw_readl(KS2_MAINPLLCTL0); - prediv = (tmp & PLL_DIV_MASK) + 1; - mult = (((tmp & PLLM_MULT_HI_SMASK) >> 6) | - (pllctl_reg_read(pll, mult) & - PLLM_MULT_LO_MASK)) + 1; - output_div = ((pllctl_reg_read(pll, secctl) >> - PLL_CLKOD_SHIFT) & PLL_CLKOD_MASK) + 1; - - ret = ret / prediv / output_div * mult; - } - } else { - switch (pll) { - case PASS_PLL: - ret = external_clk[pa_clk]; - reg = KS2_PASSPLLCTL0; - break; - case TETRIS_PLL: - ret = external_clk[tetris_clk]; - reg = KS2_ARMPLLCTL0; - break; - case DDR3A_PLL: - ret = external_clk[ddr3a_clk]; - reg = KS2_DDR3APLLCTL0; - break; - case DDR3B_PLL: - ret = external_clk[ddr3b_clk]; - reg = KS2_DDR3BPLLCTL0; - break; - default: - return 0; - } - - tmp = __raw_readl(reg); - - if (!(tmp & PLLCTL_BYPASS)) { - /* Bypass disabled */ - prediv = (tmp & PLL_DIV_MASK) + 1; - mult = ((tmp >> PLL_MULT_SHIFT) & PLL_MULT_MASK) + 1; - output_div = ((tmp >> PLL_CLKOD_SHIFT) & - PLL_CLKOD_MASK) + 1; - ret = ((ret / prediv) * mult) / output_div; - } - } - - return ret; -} - -unsigned long clk_get_rate(unsigned int clk) -{ - switch (clk) { - case core_pll_clk: return pll_freq_get(CORE_PLL); - case pass_pll_clk: return pll_freq_get(PASS_PLL); - case tetris_pll_clk: return pll_freq_get(TETRIS_PLL); - case ddr3a_pll_clk: return pll_freq_get(DDR3A_PLL); - case ddr3b_pll_clk: return pll_freq_get(DDR3B_PLL); - case sys_clk0_1_clk: - case sys_clk0_clk: return pll_freq_get(CORE_PLL) / pll0div_read(1); - case sys_clk1_clk: return pll_freq_get(CORE_PLL) / pll0div_read(2); - case sys_clk2_clk: return pll_freq_get(CORE_PLL) / pll0div_read(3); - case sys_clk3_clk: return pll_freq_get(CORE_PLL) / pll0div_read(4); - case sys_clk0_2_clk: return clk_get_rate(sys_clk0_clk) / 2; - case sys_clk0_3_clk: return clk_get_rate(sys_clk0_clk) / 3; - case sys_clk0_4_clk: return clk_get_rate(sys_clk0_clk) / 4; - case sys_clk0_6_clk: return clk_get_rate(sys_clk0_clk) / 6; - case sys_clk0_8_clk: return clk_get_rate(sys_clk0_clk) / 8; - case sys_clk0_12_clk: return clk_get_rate(sys_clk0_clk) / 12; - case sys_clk0_24_clk: return clk_get_rate(sys_clk0_clk) / 24; - case sys_clk1_3_clk: return clk_get_rate(sys_clk1_clk) / 3; - case sys_clk1_4_clk: return clk_get_rate(sys_clk1_clk) / 4; - case sys_clk1_6_clk: return clk_get_rate(sys_clk1_clk) / 6; - case sys_clk1_12_clk: return clk_get_rate(sys_clk1_clk) / 12; - default: - break; - } - - return 0; -} diff --git a/arch/arm/mach-keystone/clock-k2l.c b/arch/arm/mach-keystone/clock-k2l.c deleted file mode 100644 index 00040591925a..000000000000 --- a/arch/arm/mach-keystone/clock-k2l.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Keystone2: get clk rate for K2L - * - * (C) Copyright 2012-2014 - * Texas Instruments Incorporated, <www.ti.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/arch/clock.h> -#include <asm/arch/clock_defs.h> - -/** - * pll_freq_get - get pll frequency - * Fout = Fref * NF(mult) / NR(prediv) / OD - * @pll: pll identifier - */ -static unsigned long pll_freq_get(int pll) -{ - unsigned long mult = 1, prediv = 1, output_div = 2; - unsigned long ret; - u32 tmp, reg; - - if (pll == CORE_PLL) { - ret = external_clk[sys_clk]; - if (pllctl_reg_read(pll, ctl) & PLLCTL_PLLEN) { - /* PLL mode */ - tmp = __raw_readl(KS2_MAINPLLCTL0); - prediv = (tmp & PLL_DIV_MASK) + 1; - mult = (((tmp & PLLM_MULT_HI_SMASK) >> 6) | - (pllctl_reg_read(pll, mult) & - PLLM_MULT_LO_MASK)) + 1; - output_div = ((pllctl_reg_read(pll, secctl) >> - PLL_CLKOD_SHIFT) & PLL_CLKOD_MASK) + 1; - - ret = ret / prediv / output_div * mult; - } - } else { - switch (pll) { - case PASS_PLL: - ret = external_clk[pa_clk]; - reg = KS2_PASSPLLCTL0; - break; - case TETRIS_PLL: - ret = external_clk[tetris_clk]; - reg = KS2_ARMPLLCTL0; - break; - case DDR3_PLL: - ret = external_clk[ddr3a_clk]; - reg = KS2_DDR3APLLCTL0; - break; - default: - return 0; - } - - tmp = __raw_readl(reg); - if (!(tmp & PLLCTL_BYPASS)) { - /* Bypass disabled */ - prediv = (tmp & PLL_DIV_MASK) + 1; - mult = ((tmp >> PLL_MULT_SHIFT) & PLL_MULT_MASK) + 1; - output_div = ((tmp >> PLL_CLKOD_SHIFT) & - PLL_CLKOD_MASK) + 1; - ret = ((ret / prediv) * mult) / output_div; - } - } - - return ret; -} - -unsigned long clk_get_rate(unsigned int clk) -{ - switch (clk) { - case core_pll_clk: return pll_freq_get(CORE_PLL); - case pass_pll_clk: return pll_freq_get(PASS_PLL); - case tetris_pll_clk: return pll_freq_get(TETRIS_PLL); - case ddr3_pll_clk: return pll_freq_get(DDR3_PLL); - case sys_clk0_1_clk: - case sys_clk0_clk: return pll_freq_get(CORE_PLL) / pll0div_read(1); - case sys_clk1_clk: return pll_freq_get(CORE_PLL) / pll0div_read(2); - case sys_clk2_clk: return pll_freq_get(CORE_PLL) / pll0div_read(3); - case sys_clk3_clk: return pll_freq_get(CORE_PLL) / pll0div_read(4); - case sys_clk0_2_clk: return clk_get_rate(sys_clk0_clk) / 2; - case sys_clk0_3_clk: return clk_get_rate(sys_clk0_clk) / 3; - case sys_clk0_4_clk: return clk_get_rate(sys_clk0_clk) / 4; - case sys_clk0_6_clk: return clk_get_rate(sys_clk0_clk) / 6; - case sys_clk0_8_clk: return clk_get_rate(sys_clk0_clk) / 8; - case sys_clk0_12_clk: return clk_get_rate(sys_clk0_clk) / 12; - case sys_clk0_24_clk: return clk_get_rate(sys_clk0_clk) / 24; - case sys_clk1_3_clk: return clk_get_rate(sys_clk1_clk) / 3; - case sys_clk1_4_clk: return clk_get_rate(sys_clk1_clk) / 4; - case sys_clk1_6_clk: return clk_get_rate(sys_clk1_clk) / 6; - case sys_clk1_12_clk: return clk_get_rate(sys_clk1_clk) / 12; - default: - break; - } - - return 0; -} -- 2.7.0

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[U-Boot] [PATCH V5 0/7] ARM: omap-common: Add board detection support for TI EVMs
by Steve Kipisz 15 Mar '16

15 Mar '16

Several TI EVMs have onboard EEPROM that contain board description information. The onboard EEPROM on Beaglebone, Beaglebone Black, AM335x EVM, AM43x EVM, AM57xx EVM, Beagleboard-x15 all share the same format. This series of patches introduces code which is generic among these platforms. The boards can use the data for any operations they might choose. V5 of the series now updates the v4 series to ensure that latest u-boot platform support including BBG is supported as well. This also setsup easier introduction of DRA7-evm variant of eeproms as well. Testing: AM335x: BeagleBone-Green: http://pastebin.ubuntu.com/15183845/ BeagleBone-Black: http://pastebin.ubuntu.com/15183885/ AM335x-SK: http://pastebin.ubuntu.com/15188966/ AM437x: AM437x-GPEVM: http://pastebin.ubuntu.com/15188896/ AM437x-SK: http://pastebin.ubuntu.com/15188940/ Am57xx: AM57xx-gpevm: http://pastebin.ubuntu.com/15188997/ baseline: master 595af9db2422 Merge branch 'master' of git://www.denx.de/git/u-boot-imx Lokesh Vutla (1): ARM: omap-common: Add standard access for board description EEPROM Nishanth Menon (2): ti: AM335x: Use generic EEPROM detection logic ti: AM437x: Use generic EEPROM detection logic Steve Kipisz (4): ARM: OMAP4/5: Centralize early clock initialization ARM: OMAP4/5: Centralize gpi2c_init ARM: OMAP4/5: Add generic board detection hook board: ti: AM57xx: Add detection logic for AM57xx-evm arch/arm/Kconfig | 2 + arch/arm/cpu/armv7/omap-common/clocks-common.c | 21 +- arch/arm/cpu/armv7/omap-common/hwinit-common.c | 14 +- arch/arm/cpu/armv7/omap5/Kconfig | 1 + arch/arm/include/asm/arch-omap4/sys_proto.h | 4 +- arch/arm/include/asm/arch-omap5/sys_proto.h | 4 +- arch/arm/include/asm/omap_common.h | 7 +- board/ti/am335x/Kconfig | 2 + board/ti/am335x/board.c | 115 ++++------- board/ti/am335x/board.h | 49 ++--- board/ti/am335x/mux.c | 13 +- board/ti/am43xx/Kconfig | 2 + board/ti/am43xx/board.c | 87 +++------ board/ti/am43xx/board.h | 37 +--- board/ti/am43xx/mux.c | 1 + board/ti/am57xx/Kconfig | 2 + board/ti/am57xx/board.c | 70 ++++++- board/ti/common/Kconfig | 5 + board/ti/common/Makefile | 6 + board/ti/common/board_detect.c | 254 +++++++++++++++++++++++++ board/ti/common/board_detect.h | 140 ++++++++++++++ include/configs/am57xx_evm.h | 4 + include/configs/ti_omap5_common.h | 2 + 23 files changed, 623 insertions(+), 219 deletions(-) create mode 100644 board/ti/common/Kconfig create mode 100644 board/ti/common/Makefile create mode 100644 board/ti/common/board_detect.c create mode 100644 board/ti/common/board_detect.h -- 2.7.0

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