March 2015 - U-Boot

[U-Boot] [PATCH] cmd_sf: Fix problem with "sf update" and unaligned length
by Stefan Roese 22 Apr '15

22 Apr '15

On SoCFPGA, using "sf update" with an non-4byte aligned length leads to a hangup (and reboot via watchdog). This is because of the unaligned access in the cadence QSPI driver which is hard to prevent since the data is written into a 4-byte wide FIFO. This patch fixes this problem by changing the behavior of the last sector write (not sector aligned). The new code is even simpler and copies the source data into the temp buffer and now uses the temp buffer to write the complete sector. So only one SPI sector write is used now instead of 2 in the old version. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Gerlando Falauto <gerlando.falauto(a)keymile.com> Cc: Valentin Longchamp <valentin.longchamp(a)keymile.com> Cc: Holger Brunck <holger.brunck(a)keymile.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki(a)gmail.com> --- common/cmd_sf.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/common/cmd_sf.c b/common/cmd_sf.c index 5c788e9..dd82290 100644 --- a/common/cmd_sf.c +++ b/common/cmd_sf.c @@ -163,6 +163,8 @@ static int do_spi_flash_probe(int argc, char * const argv[]) static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, size_t len, const char *buf, char *cmp_buf, size_t *skipped) { + char *ptr = (char *)buf; + debug("offset=%#x, sector_size=%#x, len=%#zx\n", offset, flash->sector_size, len); /* Read the entire sector so to allow for rewriting */ @@ -178,16 +180,14 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, /* Erase the entire sector */ if (spi_flash_erase(flash, offset, flash->sector_size)) return "erase"; - /* Write the initial part of the block from the source */ - if (spi_flash_write(flash, offset, len, buf)) - return "write"; - /* If it's a partial sector, rewrite the existing part */ + /* If it's a partial sector, copy the data into the temp-buffer */ if (len != flash->sector_size) { - /* Rewrite the original data to the end of the sector */ - if (spi_flash_write(flash, offset + len, - flash->sector_size - len, &cmp_buf[len])) - return "write"; + memcpy(cmp_buf, buf, len); + ptr = cmp_buf; } + /* Write one complete sector */ + if (spi_flash_write(flash, offset, flash->sector_size, ptr)) + return "write"; return NULL; } -- 2.2.1

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[U-Boot] [PATCH v3 0/9] sf: Update flash params for supported read commands and sector size
by Bin Meng 22 Apr '15

22 Apr '15

This series update SPI flash supported read commands per datasheet in the flash params table, and change flash sector size to 4KiB as long as flash supports sector erase (20h) command, to ensure 'sf erase offset +len' work on 4KiB boundary instead of 64KiB when given SECT_4K. Changes in v3: - Rebase with Jagan's patch series @ http://patchwork.ozlabs.org/patch/419154/ Bin Meng (9): sf: Update SST flash params sf: Update Atmel flash params sf: Update EON flash params sf: Update GigaDevice flash params sf: Update Macronix flash params sf: Update Spansion flash params sf: Update Micron flash params sf: Update Winbond flash params sf: Give proper spacing between flash table params drivers/mtd/spi/sf_internal.h | 5 ++ drivers/mtd/spi/sf_params.c | 185 ++++++++++++++++++++++-------------------- drivers/mtd/spi/sf_probe.c | 4 + 3 files changed, 104 insertions(+), 90 deletions(-) -- 1.8.2.1

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[U-Boot] [PATCH] net/phy: Add support for realtek RTL8211F
by Shengzhou Liu 22 Apr '15

22 Apr '15

RTL8211F has different registers from RTL8211E. This patch adds support for RTL8211F PHY which can be found on Freescale's T1023 RDB board. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)freescale.com> --- drivers/net/phy/realtek.c | 84 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index a3ace68..fbb46f9 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -21,6 +21,17 @@ #define MIIM_RTL8211x_PHYSTAT_SPDDONE 0x0800 #define MIIM_RTL8211x_PHYSTAT_LINK 0x0400 +/* RTL8211F PHY Status Register */ +#define MIIM_RTL8211F_PHY_STATUS 0x1a +#define MIIM_RTL8211F_AUTONEG_ENABLE 0x1000 +#define MIIM_RTL8211F_PHYSTAT_SPEED 0x0030 +#define MIIM_RTL8211F_PHYSTAT_GBIT 0x0020 +#define MIIM_RTL8211F_PHYSTAT_100 0x0010 +#define MIIM_RTL8211F_PHYSTAT_DUPLEX 0x0008 +#define MIIM_RTL8211F_PHYSTAT_SPDDONE 0x0800 +#define MIIM_RTL8211F_PHYSTAT_LINK 0x0004 + +#define MIIM_RTL8211F_PAGE_SELECT 0x1f /* RealTek RTL8211x */ static int rtl8211x_config(struct phy_device *phydev) @@ -89,6 +100,58 @@ static int rtl8211x_parse_status(struct phy_device *phydev) return 0; } +static int rtl8211f_parse_status(struct phy_device *phydev) +{ + unsigned int speed; + unsigned int mii_reg; + int i = 0; + + phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT, 0xa43); + mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PHY_STATUS); + + phydev->link = 1; + while (!(mii_reg & MIIM_RTL8211F_PHYSTAT_LINK)) { + if (i > PHY_AUTONEGOTIATE_TIMEOUT) { + puts(" TIMEOUT !\n"); + phydev->link = 0; + break; + } + + if ((i++ % 1000) == 0) + putc('.'); + udelay(1000); + mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, + MIIM_RTL8211F_PHY_STATUS); + } + + if (mii_reg & MIIM_RTL8211F_PHYSTAT_DUPLEX) + phydev->duplex = DUPLEX_FULL; + else + phydev->duplex = DUPLEX_HALF; + + speed = (mii_reg & MIIM_RTL8211F_PHYSTAT_SPEED); + + switch (speed) { + case MIIM_RTL8211F_PHYSTAT_GBIT: + phydev->speed = SPEED_1000; + break; + case MIIM_RTL8211F_PHYSTAT_100: + phydev->speed = SPEED_100; + break; + default: + phydev->speed = SPEED_10; + } + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { + /* enable TXDLY */ + phy_write(phydev, MDIO_DEVAD_NONE, + MIIM_RTL8211F_PAGE_SELECT, 0xd08); + phy_write(phydev, MDIO_DEVAD_NONE, 0x11, 0x109); + } + + return 0; +} + static int rtl8211x_startup(struct phy_device *phydev) { /* Read the Status (2x to make sure link is right) */ @@ -98,6 +161,15 @@ static int rtl8211x_startup(struct phy_device *phydev) return 0; } +static int rtl8211f_startup(struct phy_device *phydev) +{ + /* Read the Status (2x to make sure link is right) */ + genphy_update_link(phydev); + rtl8211f_parse_status(phydev); + + return 0; +} + /* Support for RTL8211B PHY */ static struct phy_driver RTL8211B_driver = { .name = "RealTek RTL8211B", @@ -131,10 +203,22 @@ static struct phy_driver RTL8211DN_driver = { .shutdown = &genphy_shutdown, }; +/* Support for RTL8211F PHY */ +static struct phy_driver RTL8211F_driver = { + .name = "RealTek RTL8211F", + .uid = 0x1cc916, + .mask = 0xffffff, + .features = PHY_GBIT_FEATURES, + .config = &rtl8211x_config, + .startup = &rtl8211f_startup, + .shutdown = &genphy_shutdown, +}; + int phy_realtek_init(void) { phy_register(&RTL8211B_driver); phy_register(&RTL8211E_driver); + phy_register(&RTL8211F_driver); phy_register(&RTL8211DN_driver); return 0; -- 2.1.0.27.g96db324

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[U-Boot] spi and block bits
by Michael Walle 21 Apr '15

21 Apr '15

Hi there, I stumbled across a situation where the SPI flash on my board was write protected and i could not unlock it in the bootloader. This is especially unfortunate because the recovery mechanism relies on the bootloader to be able to erase the environment. So any ideas how to fix this? I didn't see any code which unlocks the sectors yet. We could add a lock/unlock function to the spi system, then call unlock in the beginning of saveenv() and lock at the end of saveenv(). Eg. lockbits = read_status() & LOCK_BITS spi_unlock_all() saveenv() spi_lock(lockbits) Also this should be exposed to the CLI somehow. "sf lock/unlock"? -michael

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[U-Boot] [PATCH 0/4] dm: rpi: Move Raspberry Pi to use driver model
by Simon Glass 21 Apr '15

21 Apr '15

This series adds driver model support to the GPIO and serial drivers used by Raspberry Pi, and moves Raspberry Pi over to driver model. This requires adding driver model support to the pl01x serial driver, and replacing the bcm2835 GPIO driver with a driver model version (since there are no longer clients that don't use driver model). See u-boot-dm.git branch rpi-working for the tree this is based on. Simon Glass (4): dm: rpi: Convert GPIO driver to driver model dm: serial: Tidy up the pl01x driver dm: serial: Support driver model in pl01x driver dm: rpi: Move serial to driver model arch/arm/include/asm/arch-bcm2835/gpio.h | 9 + board/raspberrypi/rpi_b/rpi_b.c | 23 ++ drivers/gpio/bcm2835_gpio.c | 180 ++++++++-- drivers/serial/Makefile | 5 +- drivers/serial/serial_pl01x.c | 373 +++++++++++++-------- .../{serial_pl01x.h => serial_pl01x_internal.h} | 0 include/configs/rpi_b.h | 11 +- include/serial_pl01x.h | 27 ++ 8 files changed, 462 insertions(+), 166 deletions(-) rename drivers/serial/{serial_pl01x.h => serial_pl01x_internal.h} (100%) create mode 100644 include/serial_pl01x.h -- 2.1.0.rc2.206.gedb03e5

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[U-Boot] [PATCH 0/4] ARM: zynq: move sources to mach-zynq
by Masahiro Yamada 21 Apr '15

21 Apr '15

Masahiro Yamada (4): ARM: zynq: pass "-mfpu=neon" only to lowlevel_init.S ARM: zynq: move SoC sources to mach-zynq ARM: zynq: move SoC headers to mach-zynq/include/mach ARM: zynq: rename CONFIG_ZYNQ to CONFIG_ARCH_ZYNQ arch/arm/Kconfig | 4 ++-- arch/arm/Makefile | 1 + arch/arm/cpu/armv7/Makefile | 1 - arch/arm/cpu/armv7/zynq/config.mk | 7 ------- arch/arm/dts/Makefile | 2 +- arch/arm/{cpu/armv7/zynq => mach-zynq}/Kconfig | 2 +- arch/arm/{cpu/armv7/zynq => mach-zynq}/Makefile | 1 + arch/arm/{cpu/armv7/zynq => mach-zynq}/clk.c | 0 arch/arm/{cpu/armv7/zynq => mach-zynq}/cpu.c | 0 arch/arm/{cpu/armv7/zynq => mach-zynq}/ddrc.c | 0 arch/arm/{include/asm/arch-zynq => mach-zynq/include/mach}/clk.h | 0 arch/arm/{include/asm/arch-zynq => mach-zynq/include/mach}/gpio.h | 0 .../{include/asm/arch-zynq => mach-zynq/include/mach}/hardware.h | 0 .../{include/asm/arch-zynq => mach-zynq/include/mach}/sys_proto.h | 0 arch/arm/{cpu/armv7/zynq => mach-zynq}/lowlevel_init.S | 0 arch/arm/{cpu/armv7/zynq => mach-zynq}/slcr.c | 0 arch/arm/{cpu/armv7/zynq => mach-zynq}/spl.c | 0 arch/arm/{cpu/armv7/zynq => mach-zynq}/timer.c | 0 arch/arm/{cpu/armv7/zynq => mach-zynq}/u-boot-spl.lds | 0 arch/arm/{cpu/armv7/zynq => mach-zynq}/u-boot.lds | 0 configs/zynq_microzed_defconfig | 2 +- configs/zynq_zc70x_defconfig | 2 +- configs/zynq_zc770_xm010_defconfig | 2 +- configs/zynq_zc770_xm012_defconfig | 2 +- configs/zynq_zc770_xm013_defconfig | 2 +- configs/zynq_zed_defconfig | 2 +- configs/zynq_zybo_defconfig | 2 +- include/configs/zynq-common.h | 4 ++-- 28 files changed, 15 insertions(+), 21 deletions(-) delete mode 100644 arch/arm/cpu/armv7/zynq/config.mk rename arch/arm/{cpu/armv7/zynq => mach-zynq}/Kconfig (98%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/Makefile (90%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/clk.c (100%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/cpu.c (100%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/ddrc.c (100%) rename arch/arm/{include/asm/arch-zynq => mach-zynq/include/mach}/clk.h (100%) rename arch/arm/{include/asm/arch-zynq => mach-zynq/include/mach}/gpio.h (100%) rename arch/arm/{include/asm/arch-zynq => mach-zynq/include/mach}/hardware.h (100%) rename arch/arm/{include/asm/arch-zynq => mach-zynq/include/mach}/sys_proto.h (100%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/lowlevel_init.S (100%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/slcr.c (100%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/spl.c (100%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/timer.c (100%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/u-boot-spl.lds (100%) rename arch/arm/{cpu/armv7/zynq => mach-zynq}/u-boot.lds (100%) -- 1.9.1

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[U-Boot] [PATCH v2] powerpc/t2080rdb: update ddr to support 1866MT/s
by Shengzhou Liu 20 Apr '15

20 Apr '15

Support SODIMM D3XP12081XL10AA 1866MT/s on T2080RDB. Enable CONFIG_CMD_MEMTEST as well. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)freescale.com> --- v2: refined commit description. board/freescale/t208xrdb/ddr.h | 4 ++-- include/configs/T208xRDB.h | 5 +++++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/board/freescale/t208xrdb/ddr.h b/board/freescale/t208xrdb/ddr.h index b6d4062..08cbb60 100644 --- a/board/freescale/t208xrdb/ddr.h +++ b/board/freescale/t208xrdb/ddr.h @@ -32,12 +32,12 @@ static const struct board_specific_parameters udimm0[] = { {2, 1500, 2, 5, 6, 0x07070809, 0x0a0b0b09}, {2, 1600, 2, 5, 8, 0x0808070b, 0x0c0d0e0a}, {2, 1700, 2, 4, 7, 0x080a0a0c, 0x0c0d0e0a}, - {2, 1900, 2, 5, 9, 0x0a0b0c0e, 0x0f10120c}, + {2, 1900, 0, 5, 7, 0x0808080c, 0x0b0c0c09}, {1, 1200, 2, 5, 7, 0x0808090a, 0x0b0c0c0a}, {1, 1500, 2, 5, 6, 0x07070809, 0x0a0b0b09}, {1, 1600, 2, 5, 8, 0x0808070b, 0x0c0d0e0a}, {1, 1700, 2, 4, 7, 0x080a0a0c, 0x0c0d0e0a}, - {1, 1900, 2, 5, 9, 0x0a0b0c0e, 0x0f10120c}, + {1, 1900, 0, 5, 7, 0x0808080c, 0x0b0c0c09}, {} }; diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 81bc51c..73b8d88 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -140,6 +140,11 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00400000 +#define CONFIG_SYS_ALT_MEMTEST + #ifndef CONFIG_SYS_NO_FLASH #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI -- 2.1.0.27.g96db324

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[U-Boot] [PATCH] T4240RDB: Enable CONFIG_SYS_CORTINA_FW_IN_NOR config
by Chunhe Lan 20 Apr '15

20 Apr '15

Now cortina driver uses macro CONFIG_SYS_CORTINA_FW_IN_NOR to define that firmware of cortina driver is stored in the nor flash. Signed-off-by: Chunhe Lan <Chunhe.Lan(a)freescale.com> --- include/configs/T4240RDB.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index b644a6c..36fbaff 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -639,6 +639,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PHYLIB_10G #define CONFIG_PHY_VITESSE #define CONFIG_PHY_CORTINA +#define CONFIG_SYS_CORTINA_FW_IN_NOR #define CONFIG_CORTINA_FW_ADDR 0xefe00000 #define CONFIG_CORTINA_FW_LENGTH 0x40000 #define CONFIG_PHY_TERANETICS -- 1.7.6.5

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[U-Boot] [PATCH] board/t208xrdb: VID support
by ying.zhang＠freescale.com 20 Apr '15

20 Apr '15

From: Ying Zhang <b40530(a)freescale.com> The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. Signed-off-by: Ying Zhang <b40530(a)freescale.com> --- board/freescale/t208xrdb/t208xrdb.c | 7 +++++++ include/configs/T208xRDB.h | 11 +++++++++++ 2 files changed, 18 insertions(+) diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c index 341453b..ad393df 100644 --- a/board/freescale/t208xrdb/t208xrdb.c +++ b/board/freescale/t208xrdb/t208xrdb.c @@ -19,6 +19,7 @@ #include <fm_eth.h> #include "t208xrdb.h" #include "cpld.h" +#include "../common/vid.h" DECLARE_GLOBAL_DATA_PTR; @@ -85,6 +86,12 @@ int board_early_init_r(void) setup_portals(); #endif + /* + * Adjust core voltage according to voltage ID + * This function changes I2C mux to channel 2. + */ + if (adjust_vdd(0)) + printf("Warning: Adjusting core voltage failed.\n"); return 0; } diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index db6b42e..2e48fc8 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -449,6 +449,17 @@ unsigned long get_board_ddr_clk(void); #define I2C_MUX_PCA_ADDR_SEC2 0x76 /* I2C bus multiplexer,secondary 2 */ #define I2C_MUX_CH_DEFAULT 0x8 +#define I2C_MUX_CH_VOL_MONITOR 0xa + +#define CONFIG_VID_FLS_ENV "t208xrdb_vdd_mv" +#ifndef CONFIG_SPL_BUILD +#define CONFIG_VID +#endif +#define CONFIG_VOL_MONITOR_IR36021_SET +#define CONFIG_VOL_MONITOR_IR36021_READ +/* The lowest and highest voltage allowed for T208xRDB */ +#define VDD_MV_MIN 819 +#define VDD_MV_MAX 1212 /* * RapidIO -- 1.8.4.1

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[U-Boot] [PATCH] powerpc/t2080: enable erratum_a007186 for t2080 rev1.1
by Shengzhou Liu 20 Apr '15

20 Apr '15

T2080 rev1.1 also needs erratum a007186. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)freescale.com> --- arch/powerpc/include/asm/fsl_errata.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/fsl_errata.h b/arch/powerpc/include/asm/fsl_errata.h index 61c6d70..4861e3bf 100644 --- a/arch/powerpc/include/asm/fsl_errata.h +++ b/arch/powerpc/include/asm/fsl_errata.h @@ -45,7 +45,7 @@ static inline bool has_erratum_a007186(void) return IS_SVR_REV(svr, 2, 0); case SVR_T2081: case SVR_T2080: - return IS_SVR_REV(svr, 1, 0); + return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1); } return false; -- 2.1.0.27.g96db324

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