March 2015 - U-Boot

[U-Boot] Zynq Zybo booting with mainline U-Boot
by Simon Glass 15 Apr '15

15 Apr '15

Hi, I have one of boards and would like to get mainline U-Boot booting on it. I have followed the instructions for creating a BOOT.BIN file comprised of: - boot.elf - .bit file - u-boot.elf and putting it on a a micro-SD card. This works OK with the diligent master branch from github. I can boot normally. However this is 2013.10. Mainline U-Boot uses device tree so presumably the elf file does not work. I expect we need to use u-boot-dtb.bin. However since this is not an elf file I'm not sure how to build the image using the 'Create Zynq Boot Image' tool. I don't see any instructions in REAME.zynq about how to create an SD card. Any pointers please? Regards, Simon

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[U-Boot] Is patchwork down?
by Simon Glass 15 Apr '15

15 Apr '15

Hi, I don't see mailing list patches appearing as normal on patchwork. Regards, Simon

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[U-Boot] [PATCH v2 2/2] arm: ls102xa: Enable regulation of outstanding read transactions for slave interface S2
by Alison Wang 14 Apr '15

14 Apr '15

This patch will enable regulation of outstanding read transactions for slave interface S2 for silicon VER1.0. Signed-off-by: Alison Wang <alison.wang(a)freescale.com> --- Changes in v2: - Modify the subject and commit to describe accurately arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 ++ board/freescale/ls1021aqds/ls1021aqds.c | 7 +++++++ board/freescale/ls1021atwr/ls1021atwr.c | 7 +++++++ 3 files changed, 16 insertions(+) diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index a8122c1..1766f88 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -499,6 +499,8 @@ struct ccsr_ddr { #define CCI400_SHAORD_NON_SHAREABLE 0x00000002 #define CCI400_DVM_MESSAGE_REQ_EN 0x00000002 #define CCI400_SNOOP_REQ_EN 0x00000001 +#define CCI400_REGULATION_READ_EN 0x00000008 +#define CCI400_INT_MAX_OUT_TRANS 0x01000000 /* CCI-400 registers */ struct ccsr_cci400 { diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 69a5671..b7d1c90 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -225,6 +225,13 @@ int board_early_init_f(void) */ out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + /* + * To fix interleaving issue on VER1.0, regulation of + * outstanding read transactions for slave interface S2 + * is enabled + */ + out_le32(&cci->slave[2].qos_ctrl, CCI400_REGULATION_READ_EN); + out_le32(&cci->slave[2].max_ot, CCI400_INT_MAX_OUT_TRANS); /* Workaround for the issue that DDR could not respond to * barrier transaction which is generated by executing DSB/ISB diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index a9c87f2..bba3073 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -309,6 +309,13 @@ int board_early_init_f(void) */ out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); + /* + * To fix interleaving issue on VER1.0, regulation of + * outstanding read transactions for slave interface S2 + * is enabled + */ + out_le32(&cci->slave[2].qos_ctrl, CCI400_REGULATION_READ_EN); + out_le32(&cci->slave[2].max_ot, CCI400_INT_MAX_OUT_TRANS); } return 0; -- 2.1.0.27.g96db324

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[U-Boot] [PATCH 1/2][v6] powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041
by Aneesh Bansal 14 Apr '15

14 Apr '15

Secure Boot Target is added for NAND for P3041. Changes: In PowerPC, the core begins execution from address 0xFFFFFFFC. In case of secure boot, this default address maps to Boot ROM. The Boot ROM code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF. In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is configured as SRAM. U-Boot binary will be located on this SRAM at location 0xBFF40000 with entry point as 0xBFFFFFFC. Signed-off-by: Ruchika Gupta <ruchika.gupta(a)freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal(a)freescale.com> --- Changes in v6: Changed the version in Patchset. Makefile | 4 ++++ arch/powerpc/cpu/mpc85xx/cpu_init.c | 17 +++++++++++++++++ board/freescale/common/p_corenet/tlb.c | 19 +++++++++++++++++-- board/freescale/corenet_ds/MAINTAINERS | 5 +++++ configs/P3041DS_NAND_SECURE_BOOT_defconfig | 4 ++++ include/configs/corenet_ds.h | 21 +++++++++++++++++++++ 6 files changed, 68 insertions(+), 2 deletions(-) create mode 100644 configs/P3041DS_NAND_SECURE_BOOT_defconfig diff --git a/Makefile b/Makefile index bd4abab..acfaa23 100644 --- a/Makefile +++ b/Makefile @@ -719,8 +719,12 @@ ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin ifeq ($(CONFIG_SPL_FSL_PBL),y) ALL-$(CONFIG_RAMBOOT_PBL) += u-boot-with-spl-pbl.bin else +ifneq ($(CONFIG_SECURE_BOOT), y) +# For Secure Boot The Image needs to be signed and Header must also +# be included. So The image has to be built explicitly ALL-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl endif +endif ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 4cf8853..1f520fe 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -843,6 +843,23 @@ int cpu_init_r(void) setup_mp(); #endif +#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) && \ + defined(CONFIG_SECURE_BOOT) + /* Disable the TLB Created for L3 and create the TLB required for + * PCIE which was not created earlier. + */ + int tlb_index; + tlb_index = find_tlb_idx((void *)CONFIG_BPTR_VIRT_ADDR, 1); + if (tlb_index != -1) { + disable_tlb(tlb_index); + + set_tlb(1, CONFIG_SECBOOT_TLB_VIRT_ADDR, + CONFIG_SECBOOT_TLB_PHYS_ADDR, + CONFIG_SECBOOT_TLB_PERM, CONFIG_SECBOOT_TLB_ATTR, + 0, tlb_index, CONFIG_SECBOOT_TLB_PAGESZ, 1); + } +#endif + #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC13 { if (SVR_MAJ(svr) < 3) { diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c index 8148e46..dcadba1 100644 --- a/board/freescale/common/p_corenet/tlb.c +++ b/board/freescale/common/p_corenet/tlb.c @@ -42,7 +42,9 @@ struct fsl_e_tlb_entry tlb_table[] = { /* TLB 1 */ /* *I*** - Covers boot page */ -#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) + /* In Case of Secure RAM Boot L3 address is defined at 0xbff00000 */ +#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) && \ + !defined(CONFIG_SECURE_BOOT) /* * *I*G - L3SRAM. When L3 is used as 1M SRAM, the address of the * SRAM is at 0xfff00000, it covered the 0xfffff000. @@ -76,11 +78,24 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, 0, 2, BOOKE_PAGESZ_256M, 1), +#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) && \ + defined(CONFIG_SECURE_BOOT) + /* In case of Secure Boot, L3 is used as 1M SRAM + * and the address of the SRAM is at 0xbff00000. + * The PCIE TLB entry conflicts with the above entry. + * So, the entry for PCIE is not created at this point of time. + * It will be created later on in cpu_init_r() + * when U-Boot has relocated to DDR + */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L3_ADDR, CONFIG_SYS_INIT_L3_ADDR, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 3, BOOKE_PAGESZ_1M, 1), +#else /* *I*G* - PCI */ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS, MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 3, BOOKE_PAGESZ_1G, 1), - +#endif /* *I*G* - PCI */ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT + 0x40000000, CONFIG_SYS_PCIE1_MEM_PHYS + 0x40000000, diff --git a/board/freescale/corenet_ds/MAINTAINERS b/board/freescale/corenet_ds/MAINTAINERS index 745847c..6855446 100644 --- a/board/freescale/corenet_ds/MAINTAINERS +++ b/board/freescale/corenet_ds/MAINTAINERS @@ -28,3 +28,8 @@ F: configs/P5040DS_NAND_defconfig F: configs/P5040DS_SDCARD_defconfig F: configs/P5040DS_SPIFLASH_defconfig F: configs/P5040DS_SECURE_BOOT_defconfig + +CORENET_DS_SECURE_BOOT BOARD +M: Aneesh Bansal <aneesh.bansal(a)freescale.com> +S: Maintained +F: configs/P3041DS_NAND_SECURE_BOOT_defconfig diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig new file mode 100644 index 0000000..e810b1c --- /dev/null +++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xBFF40000" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_P3041DS=y diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 225ffdd..4d09133 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -16,6 +16,26 @@ #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_RAMBOOT_PBL +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS 0xbffffffc +#define CONFIG_BPTR_VIRT_ADDR 0xbffff000 + +/* In case of Secure Boot, L3 is used as 1M SRAM + * and the address of the SRAM is at 0xbff00000. + * The PCIE TLB entry conflicts with L3 TLB entry. + * The creation of PCIE TLB entry will be delayed + * till the time L3 entry is not required. + */ +#define CONFIG_SECBOOT_TLB_VIRT_ADDR CONFIG_SYS_PCIE1_MEM_VIRT +#define CONFIG_SECBOOT_TLB_PHYS_ADDR CONFIG_SYS_PCIE1_MEM_PHYS +#define CONFIG_SECBOOT_TLB_PERM MAS3_SW|MAS3_SR +#define CONFIG_SECBOOT_TLB_ATTR MAS2_I|MAS2_G +#define CONFIG_SECBOOT_TLB_PAGESZ BOOKE_PAGESZ_1G +#ifdef CONFIG_NAND +#define CONFIG_RAMBOOT_NAND +#endif +#else #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg @@ -29,6 +49,7 @@ #define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p5040ds.cfg #endif #endif +#endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ -- 1.8.1.4

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[U-Boot] [PATCH] arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILD
by Albert ARIBAUD 13 Apr '15

13 Apr '15

When building a THumb-1-only target with CONFIG_SYS_THUMB_BUILD, some files fail to build, most of the time because they include mcr instructions, which only exist for Thumb-2. Thos patch introduces a Kconfig option CONFIG_THUMB2 and uses it to select between Thumb-2 and ARM mode for the aforementioned files. This code has been build-tested and run-tested on ED Mini V2, both with U-Boot and SPL. Signed-off-by: Albert ARIBAUD <albert.u.boot(a)aribaud.net> --- arch/arm/Kconfig | 4 ++++ arch/arm/cpu/arm926ejs/Makefile | 11 +++++++++++ arch/arm/cpu/arm926ejs/orion5x/Makefile | 10 ++++++++++ arch/arm/lib/Makefile | 11 +++++++++++ examples/standalone/Makefile | 10 ++++++++++ include/configs/edminiv2.h | 2 ++ 6 files changed, 48 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5eb1d03..264af8b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -10,6 +10,9 @@ config ARM64 config HAS_VBAR bool +config HAS_THUMB2 + bool + config CPU_ARM720T bool @@ -32,6 +35,7 @@ config CPU_ARM1176 config CPU_V7 bool select HAS_VBAR + select HAS_THUMB2 config CPU_PXA bool diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index adcea9f..721b478 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -28,3 +28,14 @@ obj-$(CONFIG_ORION5X) += orion5x/ obj-$(CONFIG_PANTHEON) += pantheon/ obj-$(if $(filter spear,$(SOC)),y) += spear/ obj-$(CONFIG_ARCH_VERSATILE) += versatile/ + +# some files can only build in ARM or THUMB2, not THUMB1 + +ifdef CONFIG_SYS_THUMB_BUILD +ifndef CONFIG_HAS_THUMB2 + +CFLAGS_cpu.o := -marm +CFLAGS_cache.o := -marm + +endif +endif diff --git a/arch/arm/cpu/arm926ejs/orion5x/Makefile b/arch/arm/cpu/arm926ejs/orion5x/Makefile index 546ebcb..33dcad4 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/Makefile +++ b/arch/arm/cpu/arm926ejs/orion5x/Makefile @@ -16,3 +16,13 @@ obj-y += timer.o ifndef CONFIG_SKIP_LOWLEVEL_INIT obj-y += lowlevel_init.o endif + +# some files can only build in ARM or THUMB2, not THUMB1 + +ifdef CONFIG_SYS_THUMB_BUILD +ifndef CONFIG_HAS_THUMB2 + +CFLAGS_cpu.o := -marm + +endif +endif diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index d74e4b8..4916f30 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -54,3 +54,14 @@ obj-$(CONFIG_DEBUG_LL) += debug.o ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS))) extra-y += eabi_compat.o endif + +# some files can only build in ARM or THUMB2, not THUMB1 + +ifdef CONFIG_SYS_THUMB_BUILD +ifndef CONFIG_HAS_THUMB2 + +CFLAGS_cache.o := -marm +CFLAGS_cache-cp15.o := -marm + +endif +endif diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index 0863a8c..5a6ae00 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -73,3 +73,13 @@ $(obj)/%.srec: $(obj)/% FORCE $(obj)/%.bin: OBJCOPYFLAGS := -O binary $(obj)/%.bin: $(obj)/% FORCE $(call if_changed,objcopy) + +# some files can only build in ARM or THUMB2, not THUMB1 + +ifdef CONFIG_SYS_THUMB_BUILD +ifndef CONFIG_HAS_THUMB2 + +CFLAGS_stubs.o := -marm + +endif +endif diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 70a698a..f07b0d9 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -12,6 +12,8 @@ #ifndef _CONFIG_EDMINIV2_H #define _CONFIG_EDMINIV2_H +#define CONFIG_SYS_THUMB_BUILD + /* * Version number information */ -- 2.1.0

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[U-Boot] [PATCH v2] ARM: move -march=* and -mtune= options to arch/arm/Makefile
by Masahiro Yamada 11 Apr '15

11 Apr '15

My main motivations for this commit are: [1] Follow the arch/arm/Makefile style of Linux Kernel [2] Maintain compiler options systematically Currently, we give -march=* and -mtune=* options inconsistently: Only some of the CPUs pass -march=* and -mtune=* options. By collecting such options into the single place arch/arm/Makefile we can tell which options are missing at a glance. [3] Prepare for deprecating arch/*/cpu/*/config.mk Note: This commit just moves the compiler options so as not to change the behavior at all. It does not care about the correctness of the given options. Fox example, "-march=armv5te" might be better than "-march=armv4" for ARM946EJS, but it is beyond the scope this commit. Also, filling the missing -march=* and -tune=* is left to follow-up patches. Signed-off-by: Masahiro Yamada <yamada.m(a)jp.panasonic.com> Acked-by: Marek Vasut <marex(a)denx.de> Acked-by: Stefan Roese <sr(a)denx.de> --- Changes in v2: - Rebased onto u-boot-arm/master (commit 419fa9ae) arch/arm/Makefile | 32 ++++++++++++++++++++++++++++++++ arch/arm/cpu/arm1136/config.mk | 9 --------- arch/arm/cpu/arm1176/config.mk | 9 --------- arch/arm/cpu/arm720t/config.mk | 9 --------- arch/arm/cpu/arm920t/config.mk | 8 -------- arch/arm/cpu/arm926ejs/config.mk | 8 -------- arch/arm/cpu/arm946es/config.mk | 8 -------- arch/arm/cpu/armv7/config.mk | 5 ----- arch/arm/cpu/armv8/config.mk | 2 -- arch/arm/cpu/pxa/config.mk | 2 -- arch/arm/cpu/sa1100/config.mk | 9 --------- 11 files changed, 32 insertions(+), 69 deletions(-) delete mode 100644 arch/arm/cpu/arm1136/config.mk delete mode 100644 arch/arm/cpu/arm1176/config.mk delete mode 100644 arch/arm/cpu/arm720t/config.mk delete mode 100644 arch/arm/cpu/arm920t/config.mk delete mode 100644 arch/arm/cpu/arm926ejs/config.mk delete mode 100644 arch/arm/cpu/arm946es/config.mk delete mode 100644 arch/arm/cpu/sa1100/config.mk diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 878ae26..275c817 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -2,6 +2,38 @@ # SPDX-License-Identifier: GPL-2.0+ # +# This selects which instruction set is used. +arch-$(CONFIG_CPU_ARM720T) =-march=armv4 +arch-$(CONFIG_CPU_ARM920T) =-march=armv4 +arch-$(CONFIG_CPU_ARM926EJS) =-march=armv5te +arch-$(CONFIG_CPU_ARM946ES) =-march=armv4 +arch-$(CONFIG_CPU_SA1100) =-march=armv4 +arch-$(CONFIG_CPU_PXA) = +arch-$(CONFIG_CPU_ARM1136) =-march=armv5 +arch-$(CONFIG_CPU_ARM1176) =-march=armv5t +arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, -march=armv5) +arch-$(CONFIG_ARM64) =-march=armv8-a + +# Evaluate arch cc-option calls now +arch-y := $(arch-y) + +# This selects how we optimise for the processor. +tune-$(CONFIG_CPU_ARM720T) =-mtune=arm7tdmi +tune-$(CONFIG_CPU_ARM920T) = +tune-$(CONFIG_CPU_ARM926EJS) = +tune-$(CONFIG_CPU_ARM946ES) = +tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100 +tune-$(CONFIG_CPU_PXA) =-mcpu=xscale +tune-$(CONFIG_CPU_ARM1136) = +tune-$(CONFIG_CPU_ARM1176) = +tune-$(CONFIG_CPU_V7) = +tune-$(CONFIG_ARM64) = + +# Evaluate tune cc-option calls now +tune-y := $(tune-y) + +PLATFORM_CPPFLAGS += $(arch-y) $(tune-y) + # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_AT91) += at91 diff --git a/arch/arm/cpu/arm1136/config.mk b/arch/arm/cpu/arm1136/config.mk deleted file mode 100644 index a82c6ce..0000000 --- a/arch/arm/cpu/arm1136/config.mk +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Make ARMv5 to allow more compilers to work, even though its v6. -PLATFORM_CPPFLAGS += -march=armv5 diff --git a/arch/arm/cpu/arm1176/config.mk b/arch/arm/cpu/arm1176/config.mk deleted file mode 100644 index 5dc2ebb..0000000 --- a/arch/arm/cpu/arm1176/config.mk +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -# Make ARMv5 to allow more compilers to work, even though its v6. -PLATFORM_CPPFLAGS += -march=armv5t diff --git a/arch/arm/cpu/arm720t/config.mk b/arch/arm/cpu/arm720t/config.mk deleted file mode 100644 index 772fb41..0000000 --- a/arch/arm/cpu/arm720t/config.mk +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2002 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger(a)sysgo.de> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi diff --git a/arch/arm/cpu/arm920t/config.mk b/arch/arm/cpu/arm920t/config.mk deleted file mode 100644 index 799afff..0000000 --- a/arch/arm/cpu/arm920t/config.mk +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -PLATFORM_CPPFLAGS += -march=armv4 diff --git a/arch/arm/cpu/arm926ejs/config.mk b/arch/arm/cpu/arm926ejs/config.mk deleted file mode 100644 index bdb3da1..0000000 --- a/arch/arm/cpu/arm926ejs/config.mk +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -PLATFORM_CPPFLAGS += -march=armv5te diff --git a/arch/arm/cpu/arm946es/config.mk b/arch/arm/cpu/arm946es/config.mk deleted file mode 100644 index 438668d..0000000 --- a/arch/arm/cpu/arm946es/config.mk +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, <garyj(a)denx.de> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -PLATFORM_CPPFLAGS += -march=armv4 diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk index 6c82c3b..63591d4 100644 --- a/arch/arm/cpu/armv7/config.mk +++ b/arch/arm/cpu/armv7/config.mk @@ -5,11 +5,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -# If armv7-a is not supported by GCC fall-back to armv5, which is -# supported by more tool-chains -PF_CPPFLAGS_ARMV7 := $(call cc-option, -march=armv7-a, -march=armv5) -PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV7) - # On supported platforms we set the bit which causes us to trap on unaligned # memory access. This is the opposite of what the compiler expects to be # the default so we must pass in -mno-unaligned-access so that it is aware diff --git a/arch/arm/cpu/armv8/config.mk b/arch/arm/cpu/armv8/config.mk index f5b9559..6850258 100644 --- a/arch/arm/cpu/armv8/config.mk +++ b/arch/arm/cpu/armv8/config.mk @@ -6,7 +6,5 @@ # PLATFORM_RELFLAGS += -fno-common -ffixed-x18 -PF_CPPFLAGS_ARMV8 := $(call cc-option, -march=armv8-a) PF_NO_UNALIGNED := $(call cc-option, -mstrict-align) -PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV8) PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED) diff --git a/arch/arm/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk index 525f5d3..7fb5316 100644 --- a/arch/arm/cpu/pxa/config.mk +++ b/arch/arm/cpu/pxa/config.mk @@ -6,8 +6,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_CPPFLAGS += -mcpu=xscale - # # !WARNING! # The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from diff --git a/arch/arm/cpu/sa1100/config.mk b/arch/arm/cpu/sa1100/config.mk deleted file mode 100644 index 3afa685..0000000 --- a/arch/arm/cpu/sa1100/config.mk +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2002 -# Sysgo Real-Time Solutions, GmbH <www.elinos.com> -# Marius Groeger <mgroeger(a)sysgo.de> -# -# SPDX-License-Identifier: GPL-2.0+ -# - -PLATFORM_CPPFLAGS += -march=armv4 -mtune=strongarm1100 -- 1.9.1

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[U-Boot] please pull u-boot-arc master
by Alexey Brodkin 10 Apr '15

10 Apr '15

Dear Tom, The following changes since commit b188067f39627d977bb1db67c8456e9aaab90743: arm: vf610: fix boot from SD-card (2015-01-09 10:27:51 -0500) are available in the git repository at: git://git.denx.de/u-boot-arc.git for you to fetch changes up to 4c8c485ad9249e1ca1822474954b78799ca937e9: arc: introduce "mdbtrick" target (2015-01-09 23:59:54 +0300) ---------------------------------------------------------------- Alexey Brodkin (1): arc: introduce "mdbtrick" target arch/arc/Makefile | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- Best regards, Alexey

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[U-Boot] u-boot: OpenRD Ultimate fails to build
by Vagrant Cascadian 10 Apr '15

10 Apr '15

It seems that OpenRD Ultimate with u-boot 2015.04-rc3 and newer no longer builds from source, both in Debian and with mainline git. It appears to have overgrown the size limits set for it: OBJCOPY u-boot.srec OBJCOPY u-boot.bin u-boot.bin exceeds file size limit: limit: 393216 bytes actual: 407068 bytes excess: 13852 bytes Makefile:834: recipe for target 'u-boot.bin' failed make: *** [u-boot.bin] Error 1 Full build log: https://buildd.debian.org/status/fetch.php?pkg=u-boot&arch=armel&ver=2015.0… If you've got an openrd_ultimate and want to ensure it keeps working in Debian (and obviously mainline)... please let me know! live well, vagrant

4 8

[U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix
by Jan Kiszka 10 Apr '15

10 Apr '15

Changes in v4: - rebased over master - implemented psci_get_cpu_id as weak function - implemented psci_disable/enable_smp as weak functions - adjusted register interface of psci_get_cpu_stack_top This version (+ the non-cached memory init fix) can also be found at https://github.com/siemens/u-boot/tree/jetson-tk1-v5. Jan CC: Ian Campbell <ijc(a)hellion.org.uk> CC: Marc Zyngier <marc.zyngier(a)arm.com> Ian Campbell (3): tegra124: Add more registers to struct mc_ctlr jetson-tk1: Add PSCI configuration options and reserve secure code tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 Jan Kiszka (11): sun7i: Remove duplicate call to psci_arch_init ARM: Factor out common psci_get_cpu_id ARM: Factor out reusable psci_cpu_off_common ARM: Factor out reusable psci_cpu_entry ARM: Factor out reusable psci_get_cpu_stack_top ARM: Put target PC for PSCI CPU_ON on per-CPU stack virt-dt: Allow reservation of secure region when in a RAM carveout tegra: Make tegra_powergate_power_on public tegra: Add ap_pm_init hook tegra124: Add PSCI support for Tegra124 tegra: Set CNTFRQ for secondary CPUs arch/arm/cpu/armv7/psci.S | 121 ++++++++++++++++++++++++++++ arch/arm/cpu/armv7/sunxi/psci.S | 112 ++++--------------------- arch/arm/cpu/armv7/virt-dt.c | 29 +++++++ arch/arm/cpu/armv7/virt-v7.c | 5 ++ arch/arm/include/asm/arch-tegra/ap.h | 5 ++ arch/arm/include/asm/arch-tegra/powergate.h | 1 + arch/arm/include/asm/arch-tegra124/flow.h | 6 ++ arch/arm/include/asm/arch-tegra124/mc.h | 35 +++++++- arch/arm/include/asm/armv7.h | 1 + arch/arm/include/asm/system.h | 1 + arch/arm/lib/bootm-fdt.c | 5 ++ arch/arm/mach-tegra/Makefile | 4 + arch/arm/mach-tegra/ap.c | 15 ++++ arch/arm/mach-tegra/powergate.c | 2 +- arch/arm/mach-tegra/psci.S | 114 ++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra124/Kconfig | 2 + arch/arm/mach-tegra/tegra124/Makefile | 4 + arch/arm/mach-tegra/tegra124/ap.c | 55 +++++++++++++ board/nvidia/common/board.c | 4 + include/configs/jetson-tk1.h | 5 ++ 20 files changed, 428 insertions(+), 98 deletions(-) create mode 100644 arch/arm/mach-tegra/psci.S create mode 100644 arch/arm/mach-tegra/tegra124/ap.c -- 2.1.4

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[U-Boot] [PATCH v4 0/9] ARM: remove non-generic boards
by Masahiro Yamada 09 Apr '15

09 Apr '15

Based on Tom's announce mail (http://lists.denx.de/pipermail/u-boot/2015-February/203606.html), let's start removing non-generic ARM boards. No conversion patches have been posted for these boards. Changes in v4: - Rebase on commit 4641429695 Changes in v3: - Do not remove devkit3250 because Vladimir has post a patch to convert it into Generic Board. Changes in v2: - Do not remove armada100 boards because Ajay will send a patch to convert them. Masahiro Yamada (9): ARM: remove mx31ads board support ARM: mx31: remove imx31_phycore board ARM: remove jadecpu board support ARM: remove zmx25 board support ARM: remove dkb board support ARM: remove cm4008 and cm41xx board support ARM: remove a320evb board support ARM: remove tnetv107x board support ARM: davinci: remove hawkboard support arch/arm/Kconfig | 45 -- arch/arm/cpu/arm1176/Makefile | 1 - arch/arm/cpu/arm1176/start.S | 22 - arch/arm/cpu/arm1176/tnetv107x/Makefile | 6 - arch/arm/cpu/arm1176/tnetv107x/aemif.c | 78 ---- arch/arm/cpu/arm1176/tnetv107x/clock.c | 432 ------------------ arch/arm/cpu/arm1176/tnetv107x/init.c | 22 - arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S | 10 - arch/arm/cpu/arm1176/tnetv107x/mux.c | 319 ------------- arch/arm/cpu/arm1176/tnetv107x/timer.c | 93 ---- arch/arm/cpu/arm920t/Makefile | 2 - arch/arm/cpu/arm920t/a320/Makefile | 9 - arch/arm/cpu/arm920t/a320/reset.S | 10 - arch/arm/cpu/arm920t/a320/timer.c | 118 ----- arch/arm/cpu/arm920t/ks8695/Makefile | 9 - arch/arm/cpu/arm920t/ks8695/lowlevel_init.S | 189 -------- arch/arm/cpu/arm920t/ks8695/timer.c | 77 ---- arch/arm/cpu/arm926ejs/Makefile | 2 - arch/arm/cpu/arm926ejs/mb86r0x/Makefile | 8 - arch/arm/cpu/arm926ejs/mb86r0x/clock.c | 27 -- arch/arm/cpu/arm926ejs/mb86r0x/reset.c | 24 - arch/arm/cpu/arm926ejs/mb86r0x/timer.c | 115 ----- arch/arm/cpu/arm926ejs/pantheon/Makefile | 9 - arch/arm/cpu/arm926ejs/pantheon/cpu.c | 85 ---- arch/arm/cpu/arm926ejs/pantheon/dram.c | 117 ----- arch/arm/cpu/arm926ejs/pantheon/timer.c | 201 --------- arch/arm/include/asm/arch-a320/a320.h | 22 - arch/arm/include/asm/arch-ks8695/platform.h | 294 ------------ arch/arm/include/asm/arch-mb86r0x/hardware.h | 15 - arch/arm/include/asm/arch-mb86r0x/mb86r0x.h | 599 ------------------------- arch/arm/include/asm/arch-pantheon/config.h | 53 --- arch/arm/include/asm/arch-pantheon/cpu.h | 77 ---- arch/arm/include/asm/arch-pantheon/gpio.h | 0 arch/arm/include/asm/arch-pantheon/mfp.h | 39 -- arch/arm/include/asm/arch-pantheon/pantheon.h | 38 -- arch/arm/include/asm/arch-tnetv107x/clock.h | 53 --- arch/arm/include/asm/arch-tnetv107x/hardware.h | 160 ------- arch/arm/include/asm/arch-tnetv107x/mux.h | 291 ------------ arch/arm/lib/asm-offsets.c | 46 -- arch/arm/mach-davinci/Kconfig | 4 - board/Marvell/dkb/Kconfig | 15 - board/Marvell/dkb/MAINTAINERS | 6 - board/Marvell/dkb/Makefile | 9 - board/Marvell/dkb/dkb.c | 85 ---- board/cm4008/Kconfig | 12 - board/cm4008/MAINTAINERS | 6 - board/cm4008/Makefile | 8 - board/cm4008/cm4008.c | 88 ---- board/cm4008/config.mk | 1 - board/cm4008/flash.c | 395 ---------------- board/cm41xx/Kconfig | 12 - board/cm41xx/MAINTAINERS | 6 - board/cm41xx/Makefile | 8 - board/cm41xx/cm41xx.c | 88 ---- board/cm41xx/config.mk | 1 - board/cm41xx/flash.c | 395 ---------------- board/davinci/da8xxevm/Kconfig | 13 - board/davinci/da8xxevm/MAINTAINERS | 8 - board/davinci/da8xxevm/Makefile | 1 - board/davinci/da8xxevm/README.hawkboard | 92 ---- board/davinci/da8xxevm/hawkboard-ais-nand.cfg | 4 - board/davinci/da8xxevm/hawkboard.c | 120 ----- board/davinci/da8xxevm/u-boot-spl-hawk.lds | 69 --- board/faraday/a320evb/Kconfig | 15 - board/faraday/a320evb/MAINTAINERS | 6 - board/faraday/a320evb/Makefile | 9 - board/faraday/a320evb/a320evb.c | 59 --- board/faraday/a320evb/lowlevel_init.S | 106 ----- board/freescale/mx31ads/Kconfig | 15 - board/freescale/mx31ads/MAINTAINERS | 6 - board/freescale/mx31ads/Makefile | 8 - board/freescale/mx31ads/lowlevel_init.S | 268 ----------- board/freescale/mx31ads/mx31ads.c | 114 ----- board/freescale/mx31ads/u-boot.lds | 110 ----- board/imx31_phycore/Kconfig | 12 - board/imx31_phycore/MAINTAINERS | 11 - board/imx31_phycore/Makefile | 9 - board/imx31_phycore/imx31_phycore.c | 153 ------- board/imx31_phycore/lowlevel_init.S | 88 ---- board/syteco/jadecpu/Kconfig | 15 - board/syteco/jadecpu/MAINTAINERS | 6 - board/syteco/jadecpu/Makefile | 13 - board/syteco/jadecpu/jadecpu.c | 160 ------- board/syteco/jadecpu/lowlevel_init.S | 249 ---------- board/syteco/zmx25/Kconfig | 15 - board/syteco/zmx25/MAINTAINERS | 6 - board/syteco/zmx25/Makefile | 9 - board/syteco/zmx25/lowlevel_init.S | 97 ---- board/syteco/zmx25/zmx25.c | 174 ------- board/ti/tnetv107xevm/Kconfig | 15 - board/ti/tnetv107xevm/MAINTAINERS | 6 - board/ti/tnetv107xevm/Makefile | 5 - board/ti/tnetv107xevm/config.mk | 5 - board/ti/tnetv107xevm/sdb_board.c | 134 ------ configs/a320evb_defconfig | 2 - configs/cm4008_defconfig | 2 - configs/cm41xx_defconfig | 2 - configs/dkb_defconfig | 2 - configs/hawkboard_defconfig | 4 - configs/hawkboard_uart_defconfig | 5 - configs/imx31_phycore_defconfig | 2 - configs/imx31_phycore_eet_defconfig | 3 - configs/jadecpu_defconfig | 2 - configs/mx31ads_defconfig | 2 - configs/tnetv107x_evm_defconfig | 2 - configs/zmx25_defconfig | 2 - doc/README.scrapyard | 44 +- drivers/net/Makefile | 1 - drivers/net/ks8695eth.c | 229 ---------- drivers/serial/Makefile | 1 - drivers/serial/serial.c | 2 - drivers/serial/serial_ks8695.c | 121 ----- drivers/video/Makefile | 1 - drivers/video/mb86r0xgdc.c | 168 ------- drivers/watchdog/Makefile | 1 - drivers/watchdog/tnetv107x_wdt.c | 165 ------- include/configs/a320evb.h | 211 --------- include/configs/cm4008.h | 104 ----- include/configs/cm41xx.h | 104 ----- include/configs/dkb.h | 51 --- include/configs/hawkboard.h | 220 --------- include/configs/imx31_phycore.h | 202 --------- include/configs/jadecpu.h | 273 ----------- include/configs/mx31ads.h | 188 -------- include/configs/tnetv107x_evm.h | 139 ------ include/configs/zmx25.h | 162 ------- include/netdev.h | 1 - include/serial.h | 3 +- 128 files changed, 28 insertions(+), 9454 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/Makefile delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/aemif.c delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/clock.c delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/init.c delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/lowlevel_init.S delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/mux.c delete mode 100644 arch/arm/cpu/arm1176/tnetv107x/timer.c delete mode 100644 arch/arm/cpu/arm920t/a320/Makefile delete mode 100644 arch/arm/cpu/arm920t/a320/reset.S delete mode 100644 arch/arm/cpu/arm920t/a320/timer.c delete mode 100644 arch/arm/cpu/arm920t/ks8695/Makefile delete mode 100644 arch/arm/cpu/arm920t/ks8695/lowlevel_init.S delete mode 100644 arch/arm/cpu/arm920t/ks8695/timer.c delete mode 100644 arch/arm/cpu/arm926ejs/mb86r0x/Makefile delete mode 100644 arch/arm/cpu/arm926ejs/mb86r0x/clock.c delete mode 100644 arch/arm/cpu/arm926ejs/mb86r0x/reset.c delete mode 100644 arch/arm/cpu/arm926ejs/mb86r0x/timer.c delete mode 100644 arch/arm/cpu/arm926ejs/pantheon/Makefile delete mode 100644 arch/arm/cpu/arm926ejs/pantheon/cpu.c delete mode 100644 arch/arm/cpu/arm926ejs/pantheon/dram.c delete mode 100644 arch/arm/cpu/arm926ejs/pantheon/timer.c delete mode 100644 arch/arm/include/asm/arch-a320/a320.h delete mode 100644 arch/arm/include/asm/arch-ks8695/platform.h delete mode 100644 arch/arm/include/asm/arch-mb86r0x/hardware.h delete mode 100644 arch/arm/include/asm/arch-mb86r0x/mb86r0x.h delete mode 100644 arch/arm/include/asm/arch-pantheon/config.h delete mode 100644 arch/arm/include/asm/arch-pantheon/cpu.h delete mode 100644 arch/arm/include/asm/arch-pantheon/gpio.h delete mode 100644 arch/arm/include/asm/arch-pantheon/mfp.h delete mode 100644 arch/arm/include/asm/arch-pantheon/pantheon.h delete mode 100644 arch/arm/include/asm/arch-tnetv107x/clock.h delete mode 100644 arch/arm/include/asm/arch-tnetv107x/hardware.h delete mode 100644 arch/arm/include/asm/arch-tnetv107x/mux.h delete mode 100644 board/Marvell/dkb/Kconfig delete mode 100644 board/Marvell/dkb/MAINTAINERS delete mode 100644 board/Marvell/dkb/Makefile delete mode 100644 board/Marvell/dkb/dkb.c delete mode 100644 board/cm4008/Kconfig delete mode 100644 board/cm4008/MAINTAINERS delete mode 100644 board/cm4008/Makefile delete mode 100644 board/cm4008/cm4008.c delete mode 100644 board/cm4008/config.mk delete mode 100644 board/cm4008/flash.c delete mode 100644 board/cm41xx/Kconfig delete mode 100644 board/cm41xx/MAINTAINERS delete mode 100644 board/cm41xx/Makefile delete mode 100644 board/cm41xx/cm41xx.c delete mode 100644 board/cm41xx/config.mk delete mode 100644 board/cm41xx/flash.c delete mode 100644 board/davinci/da8xxevm/README.hawkboard delete mode 100644 board/davinci/da8xxevm/hawkboard-ais-nand.cfg delete mode 100644 board/davinci/da8xxevm/hawkboard.c delete mode 100644 board/davinci/da8xxevm/u-boot-spl-hawk.lds delete mode 100644 board/faraday/a320evb/Kconfig delete mode 100644 board/faraday/a320evb/MAINTAINERS delete mode 100644 board/faraday/a320evb/Makefile delete mode 100644 board/faraday/a320evb/a320evb.c delete mode 100644 board/faraday/a320evb/lowlevel_init.S delete mode 100644 board/freescale/mx31ads/Kconfig delete mode 100644 board/freescale/mx31ads/MAINTAINERS delete mode 100644 board/freescale/mx31ads/Makefile delete mode 100644 board/freescale/mx31ads/lowlevel_init.S delete mode 100644 board/freescale/mx31ads/mx31ads.c delete mode 100644 board/freescale/mx31ads/u-boot.lds delete mode 100644 board/imx31_phycore/Kconfig delete mode 100644 board/imx31_phycore/MAINTAINERS delete mode 100644 board/imx31_phycore/Makefile delete mode 100644 board/imx31_phycore/imx31_phycore.c delete mode 100644 board/imx31_phycore/lowlevel_init.S delete mode 100644 board/syteco/jadecpu/Kconfig delete mode 100644 board/syteco/jadecpu/MAINTAINERS delete mode 100644 board/syteco/jadecpu/Makefile delete mode 100644 board/syteco/jadecpu/jadecpu.c delete mode 100644 board/syteco/jadecpu/lowlevel_init.S delete mode 100644 board/syteco/zmx25/Kconfig delete mode 100644 board/syteco/zmx25/MAINTAINERS delete mode 100644 board/syteco/zmx25/Makefile delete mode 100644 board/syteco/zmx25/lowlevel_init.S delete mode 100644 board/syteco/zmx25/zmx25.c delete mode 100644 board/ti/tnetv107xevm/Kconfig delete mode 100644 board/ti/tnetv107xevm/MAINTAINERS delete mode 100644 board/ti/tnetv107xevm/Makefile delete mode 100644 board/ti/tnetv107xevm/config.mk delete mode 100644 board/ti/tnetv107xevm/sdb_board.c delete mode 100644 configs/a320evb_defconfig delete mode 100644 configs/cm4008_defconfig delete mode 100644 configs/cm41xx_defconfig delete mode 100644 configs/dkb_defconfig delete mode 100644 configs/hawkboard_defconfig delete mode 100644 configs/hawkboard_uart_defconfig delete mode 100644 configs/imx31_phycore_defconfig delete mode 100644 configs/imx31_phycore_eet_defconfig delete mode 100644 configs/jadecpu_defconfig delete mode 100644 configs/mx31ads_defconfig delete mode 100644 configs/tnetv107x_evm_defconfig delete mode 100644 configs/zmx25_defconfig delete mode 100644 drivers/net/ks8695eth.c delete mode 100644 drivers/serial/serial_ks8695.c delete mode 100644 drivers/video/mb86r0xgdc.c delete mode 100644 drivers/watchdog/tnetv107x_wdt.c delete mode 100644 include/configs/a320evb.h delete mode 100644 include/configs/cm4008.h delete mode 100644 include/configs/cm41xx.h delete mode 100644 include/configs/dkb.h delete mode 100644 include/configs/hawkboard.h delete mode 100644 include/configs/imx31_phycore.h delete mode 100644 include/configs/jadecpu.h delete mode 100644 include/configs/mx31ads.h delete mode 100644 include/configs/tnetv107x_evm.h delete mode 100644 include/configs/zmx25.h -- 1.9.1

4 18