March 2013 - U-Boot

[U-Boot] [PATCH] Fix bitmap offsets for non 8-bit LCDs
by Andre Renaud 29 Mar '13

29 Mar '13

Currently bitmap logos don't interpret the X coordinate correctly if the bpp is anything other than 8. Signed-off-by: Andre Renaud <andre(a)bluewatersys.com> --- common/lcd.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/common/lcd.c b/common/lcd.c index 66d4f94..ee47712 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -589,15 +589,16 @@ void bitmap_plot(int x, int y) immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; cpm8xx_t *cp = &(immr->im_cpm); #endif + unsigned bpix = NBITS(panel_info.vl_bpix); debug("Logo: width %d height %d colors %d cmap %d\n", BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS, ARRAY_SIZE(bmp_logo_palette)); bmap = &bmp_logo_bitmap[0]; - fb = (uchar *)(lcd_base + y * lcd_line_length + x); + fb = (uchar *)(lcd_base + y * lcd_line_length + x * bpix / 8); - if (NBITS(panel_info.vl_bpix) < 12) { + if (bpix < 12) { /* Leave room for default color map * default case: generic system with no cmap (most likely 16bpp) * cmap was set to the source palette, so no change is done. @@ -648,7 +649,7 @@ void bitmap_plot(int x, int y) } else { /* true color mode */ u16 col16; - fb16 = (ushort *)(lcd_base + y * lcd_line_length + x); + fb16 = (ushort *)fb; for (i = 0; i < BMP_LOGO_HEIGHT; ++i) { for (j = 0; j < BMP_LOGO_WIDTH; j++) { col16 = bmp_logo_palette[(bmap[j]-16)]; -- 1.7.9.5

2 1

[U-Boot] [PATCH 00/10] common.lcd: remove globals and cleanup
by Jeroen Hofstee 29 Mar '13

29 Mar '13

As mentioned in http://lists.denx.de/pipermail/u-boot/2013-January/143459.html there does not seem to be a good reason why the frame buffer driver provide the variables for the lcd internal logic. So lets just remove it. If there is any good reason for a framebuffer driver to "call up" it should do so by a function call and not change the lcd its internal state (and there is actually none doing so at the moment). This patchset first removes unused drivers and places drivers useing common/lcd.c in drivers/video. Then removes the unneeded globals and thereafter finishes with some cleanups. This patch goes after http://patchwork.ozlabs.org/patch/209692/ "common/lcd.c: cleanup use of global variables" Jeroen Hofstee (10): lcd, amba: remove this frame buffer driver since it is not used lcd, tegra: remove unused cursor functions lcd, mpc8xx: move the mpc8xx frame buffer driver to drivers/video lcd, pxafb: move the pxafb to drivers/video common/lcd.c: cleanup use of global variables common/lcd.c: remove global lcd_base common/lcd: cosmetic: clean up a bit lcd, fb: cleanup, remove prototypes already in lcd.h and unused code api/api_display: use the getters for console size info common/lcd.c: move the macro's to the c file api/api_display.c | 4 +- arch/arm/cpu/pxa/Makefile | 1 - arch/arm/cpu/pxa/pxafb.c | 650 -------------------------------------- arch/powerpc/cpu/mpc8xx/Makefile | 1 - arch/powerpc/cpu/mpc8xx/lcd.c | 618 ------------------------------------ board/mcc200/lcd.c | 21 +- common/lcd.c | 117 ++++--- drivers/video/Makefile | 3 +- drivers/video/amba.c | 77 ----- drivers/video/atmel_hlcdfb.c | 8 - drivers/video/atmel_lcdfb.c | 8 - drivers/video/exynos_fb.c | 14 +- drivers/video/mpc8xx_lcd.c | 564 +++++++++++++++++++++++++++++++++ drivers/video/pxa_lcd.c | 609 +++++++++++++++++++++++++++++++++++ drivers/video/tegra.c | 64 +--- include/configs/R360MPI.h | 1 + include/configs/RBC823.h | 1 + include/configs/RPXlite_DW.h | 1 + include/configs/RRvision.h | 4 +- include/configs/TQM823L.h | 1 + include/configs/TQM823M.h | 1 + include/configs/lubbock.h | 1 + include/configs/lwmon.h | 1 + include/configs/palmld.h | 1 + include/configs/palmtc.h | 1 + include/configs/pxa255_idp.h | 1 + include/configs/svm_sc8xx.h | 1 + include/configs/v37.h | 1 + include/configs/zipitz2.h | 1 + include/lcd.h | 71 +---- 30 files changed, 1280 insertions(+), 1567 deletions(-) delete mode 100644 arch/arm/cpu/pxa/pxafb.c delete mode 100644 arch/powerpc/cpu/mpc8xx/lcd.c delete mode 100644 drivers/video/amba.c create mode 100644 drivers/video/mpc8xx_lcd.c create mode 100644 drivers/video/pxa_lcd.c -- 1.7.9.5

8 32

[U-Boot] global variables from comon/lcd.c
by Jeroen Hofstee 29 Mar '13

29 Mar '13

Hi, While looking at the common/lcd.c I fail to understand why it declares and uses global variables like lcd_color_fg, lcd_color_color_bg, lcd_base and relies on the drivers / boards to provide them, leading to code duplication. It also provides getters / setters for some of these variables. To me it seems more logical to have these variables in lcd.c itself. This construction has been around since at least 2004 though, so I tend to think I am missing something. Does someone know the reason why these variables are not part of lcd.c itself? Regards, Jeroen

4 9

[U-Boot] [ARM] Status for upcoming v2013.04
by Albert ARIBAUD 29 Mar '13

29 Mar '13

Hello all, I have gone through my todo list on Patchwork and I think I have processed all patches and applied all the ones posted within the merge window or that are bug fixes for v2013.04 and for which no changes requests are pending. However, I may have missed some, so as usual, do mail To: me and Cc: the list for any patch(es) you think I forgot to take in before the upcoming release. Amicalement, -- Albert.

1 0

[U-Boot] [PATCH 5/8] Add TI816X cpu definitions
by TENART Antoine 29 Mar '13

29 Mar '13

--- arch/arm/include/asm/arch-am33xx/cpu.h | 4 + arch/arm/include/asm/arch-am33xx/cpu_ti816x.h | 269 +++++++++++++++++++++++++ arch/arm/include/asm/emif.h | 4 + 3 files changed, 277 insertions(+) create mode 100644 arch/arm/include/asm/arch-am33xx/cpu_ti816x.h diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 13c0667..34b3aa9 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -25,6 +25,10 @@ #include <asm/arch/hardware.h> +#if defined(CONFIG_TI816X) +#include <asm/arch/cpu_ti816x.h> +#endif + #define BIT(x) (1 << x) #define CL_BIT(x) (0 << x) diff --git a/arch/arm/include/asm/arch-am33xx/cpu_ti816x.h b/arch/arm/include/asm/arch-am33xx/cpu_ti816x.h new file mode 100644 index 0000000..b4a13a8 --- /dev/null +++ b/arch/arm/include/asm/arch-am33xx/cpu_ti816x.h @@ -0,0 +1,269 @@ +/* + * cpu_ti816x.h + * + * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> + * Antoine Tenart, <atenart(a)adeneo-embedded.com> + * + * Based on TI-PSP-04.00.02.14 : + * + * (C) Copyright 2006 + * Texas Instruments, <www.ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef _TI816X_CPU_H +#define _TI816X_CPU_H + +#include <asm/arch/hardware.h> + +/* Timer registers */ +#define TIMER_TCLR 0x38 /* Timer control register */ +#define TIMER_TCRR 0x3C /* Timer counter register */ +#define TIMER_TLDR 0x40 /* Timer load value register*/ + +/* Control */ +#define CONTROL_STATUS (CTRL_BASE + 0x40) + +/* device type */ +#define DEVICE_MASK (BIT(8) | BIT(9) | BIT(10)) +#define TST_DEVICE 0x0 +#define EMU_DEVICE 0x1 +#define HS_DEVICE 0x2 +#define GP_DEVICE 0x3 + +/* This gives the buswidth of the booting device */ +#define SYSBOOT_BW_POS (16) +#define SYSBOOT_BW_MASK (BIT(SYSBOOT_BW_POS)) + +/* Reset control */ +#define PRM_DEVICE_RSTCTRL (PRCM_BASE + 0x00A0) + +/* TI816X specific bits for PRM_DEVICE module */ +#define GLOBAL_RST_COLD BIT(1) + +/* PLL related registers */ +#define MAINPLL_CTRL (CTRL_BASE + 0x0400) +#define MAINPLL_PWD (CTRL_BASE + 0x0404) +#define MAINPLL_FREQ1 (CTRL_BASE + 0x0408) +#define MAINPLL_DIV1 (CTRL_BASE + 0x040C) +#define MAINPLL_FREQ2 (CTRL_BASE + 0x0410) +#define MAINPLL_DIV2 (CTRL_BASE + 0x0414) +#define MAINPLL_FREQ3 (CTRL_BASE + 0x0418) +#define MAINPLL_DIV3 (CTRL_BASE + 0x041C) +#define MAINPLL_FREQ4 (CTRL_BASE + 0x0420) +#define MAINPLL_DIV4 (CTRL_BASE + 0x0424) +#define MAINPLL_FREQ5 (CTRL_BASE + 0x0428) +#define MAINPLL_DIV5 (CTRL_BASE + 0x042C) +#define MAINPLL_DIV6 (CTRL_BASE + 0x0434) +#define MAINPLL_DIV7 (CTRL_BASE + 0x043C) + +#define DDRPLL_CTRL (CTRL_BASE + 0x0440) +#define DDRPLL_PWD (CTRL_BASE + 0x0444) +#define DDRPLL_DIV1 (CTRL_BASE + 0x044C) +#define DDRPLL_FREQ2 (CTRL_BASE + 0x0450) +#define DDRPLL_DIV2 (CTRL_BASE + 0x0454) +#define DDRPLL_FREQ3 (CTRL_BASE + 0x0458) +#define DDRPLL_DIV3 (CTRL_BASE + 0x045C) +#define DDRPLL_FREQ4 (CTRL_BASE + 0x0460) +#define DDRPLL_DIV4 (CTRL_BASE + 0x0464) +#define DDRPLL_FREQ5 (CTRL_BASE + 0x0468) +#define DDRPLL_DIV5 (CTRL_BASE + 0x046C) + +#define DDR_RCD (CTRL_BASE + 0x070C) + +#define VIDEOPLL_CTRL (CTRL_BASE + 0x0470) +#define VIDEOPLL_PWD (CTRL_BASE + 0x0474) +#define VIDEOPLL_FREQ1 (CTRL_BASE + 0x0478) +#define VIDEOPLL_DIV1 (CTRL_BASE + 0x047C) +#define VIDEOPLL_FREQ2 (CTRL_BASE + 0x0480) +#define VIDEOPLL_DIV2 (CTRL_BASE + 0x0484) +#define VIDEOPLL_FREQ3 (CTRL_BASE + 0x0488) +#define VIDEOPLL_DIV3 (CTRL_BASE + 0x048C) + +#define AUDIOPLL_CTRL (CTRL_BASE + 0x04A0) +#define AUDIOPLL_PWD (CTRL_BASE + 0x04A4) +#define AUDIOPLL_FREQ2 (CTRL_BASE + 0x04B0) +#define AUDIOPLL_DIV2 (CTRL_BASE + 0x04B4) +#define AUDIOPLL_FREQ3 (CTRL_BASE + 0x04B8) +#define AUDIOPLL_DIV3 (CTRL_BASE + 0x04BC) +#define AUDIOPLL_FREQ4 (CTRL_BASE + 0x04C0) +#define AUDIOPLL_DIV4 (CTRL_BASE + 0x04C4) +#define AUDIOPLL_FREQ5 (CTRL_BASE + 0x04C8) +#define AUDIOPLL_DIV5 (CTRL_BASE + 0x04CC) + +/* PRCM */ +#define CM_DPLL_OFFSET (PRCM_BASE + 0x0300) + +#ifdef CONFIG_TI816X +#define CM_TIMER1_CLKSEL (CM_DPLL_OFFSET + 0x90) + +/* Timers */ +#define CM_ALWON_TIMER_0_CLKCTRL (PRCM_BASE + 0x156C) +#define CM_ALWON_TIMER_1_CLKCTRL (PRCM_BASE + 0x1570) +#define CM_ALWON_TIMER_2_CLKCTRL (PRCM_BASE + 0x1574) +#define CM_ALWON_TIMER_3_CLKCTRL (PRCM_BASE + 0x1578) +#define CM_ALWON_TIMER_4_CLKCTRL (PRCM_BASE + 0x157C) +#define CM_ALWON_TIMER_5_CLKCTRL (PRCM_BASE + 0x1580) +#define CM_ALWON_TIMER_6_CLKCTRL (PRCM_BASE + 0x1584) +#define CM_ALWON_TIMER_7_CLKCTRL (PRCM_BASE + 0x1588) +#endif + +#define CM_ALWON_WDTIMER_CLKCTRL (PRCM_BASE + 0x158C) +#define CM_ALWON_SPI_CLKCTRL (PRCM_BASE + 0x1590) +#define CM_ALWON_CONTROL_CLKCTRL (PRCM_BASE + 0x15C4) + +#define CM_ALWON_L3_SLOW_CLKSTCTRL (PRCM_BASE + 0x1400) + +#ifdef CONFIG_TI816X +#define CM_ALWON_CUST_EFUSE_CLKCTRL (PRCM_BASE + 0x1628) +#endif + +#define CM_ALWON_GPIO_0_CLKCTRL (PRCM_BASE + 0x155c) +#define CM_ALWON_GPIO_0_OPTFCLKEN_DBCLK (PRCM_BASE + 0x155c) + +#define CM_ALWON_GPIO_1_CLKCTRL (PRCM_BASE + 0x1560) +/* Ethernet */ +#define CM_ETHERNET_CLKSTCTRL (PRCM_BASE + 0x1404) +#define CM_ALWON_ETHERNET_0_CLKCTRL (PRCM_BASE + 0x15D4) +#define CM_ALWON_ETHERNET_1_CLKCTRL (PRCM_BASE + 0x15D8) + +/* UARTs */ +#define CM_ALWON_UART_0_CLKCTRL (PRCM_BASE + 0x1550) +#define CM_ALWON_UART_1_CLKCTRL (PRCM_BASE + 0x1554) +#define CM_ALWON_UART_2_CLKCTRL (PRCM_BASE + 0x1558) + +/* I2C */ +/* Note: In ti814x I2C0 and I2C2 have common clk control */ +#define CM_ALWON_I2C_0_CLKCTRL (PRCM_BASE + 0x1564) + +/* HSMMC */ +#ifdef CONFIG_TI816X +#define CM_ALWON_HSMMC_CLKCTRL (PRCM_BASE + 0x15B0) +#endif + +/* UART registers */ +#define UART_SYSCFG (DEFAULT_UART_BASE + 0x54) +#define UART_SYSSTS (DEFAULT_UART_BASE + 0x58) +#define UART_LCR (DEFAULT_UART_BASE + 0x0C) +#define UART_EFR (DEFAULT_UART_BASE + 0x08) +#define UART_MCR (DEFAULT_UART_BASE + 0x10) +#define UART_SCR (DEFAULT_UART_BASE + 0x40) +#define UART_TCR (DEFAULT_UART_BASE + 0x18) +#define UART_FCR (DEFAULT_UART_BASE + 0x08) +#define UART_DLL (DEFAULT_UART_BASE + 0x00) +#define UART_DLH (DEFAULT_UART_BASE + 0x04) +#define UART_MDR (DEFAULT_UART_BASE + 0x20) + +/*DMM & EMIF4 MMR Declaration*/ +#define DMM_LISA_MAP__0 (DMM_BASE + 0x40) +#define DMM_LISA_MAP__1 (DMM_BASE + 0x44) +#define DMM_LISA_MAP__2 (DMM_BASE + 0x48) +#define DMM_LISA_MAP__3 (DMM_BASE + 0x4C) +#define DMM_PAT_BASE_ADDR (DMM_BASE + 0x460) + +#define EMIF4_0_SDRAM_ZQCR (EMIF4_0_CFG_BASE + 0xC8) +#define EMIF4_0_SDRAM_CONFIG (EMIF4_0_CFG_BASE + 0x08) +#define EMIF4_0_SDRAM_CONFIG2 (EMIF4_0_CFG_BASE + 0x0C) +#define EMIF4_0_SDRAM_REF_CTRL (EMIF4_0_CFG_BASE + 0x10) +#define EMIF4_0_SDRAM_REF_CTRL_SHADOW (EMIF4_0_CFG_BASE + 0x14) +#define EMIF4_0_SDRAM_TIM_1 (EMIF4_0_CFG_BASE + 0x18) +#define EMIF4_0_SDRAM_TIM_1_SHADOW (EMIF4_0_CFG_BASE + 0x1C) +#define EMIF4_0_SDRAM_TIM_2 (EMIF4_0_CFG_BASE + 0x20) +#define EMIF4_0_SDRAM_TIM_2_SHADOW (EMIF4_0_CFG_BASE + 0x24) +#define EMIF4_0_SDRAM_TIM_3 (EMIF4_0_CFG_BASE + 0x28) +#define EMIF4_0_SDRAM_TIM_3_SHADOW (EMIF4_0_CFG_BASE + 0x2C) +#define EMIF4_0_DDR_PHY_CTRL_1 (EMIF4_0_CFG_BASE + 0xE4) +#define EMIF4_0_DDR_PHY_CTRL_1_SHADOW (EMIF4_0_CFG_BASE + 0xE8) +#define EMIF4_0_IODFT_TLGC (EMIF4_0_CFG_BASE + 0x60) + +#define EMIF4_1_SDRAM_ZQCR (EMIF4_1_CFG_BASE + 0xC8) +#define EMIF4_1_SDRAM_CONFIG (EMIF4_1_CFG_BASE + 0x08) +#define EMIF4_1_SDRAM_CONFIG2 (EMIF4_1_CFG_BASE + 0x0C) +#define EMIF4_1_SDRAM_REF_CTRL (EMIF4_1_CFG_BASE + 0x10) +#define EMIF4_1_SDRAM_REF_CTRL_SHADOW (EMIF4_1_CFG_BASE + 0x14) +#define EMIF4_1_SDRAM_TIM_1 (EMIF4_1_CFG_BASE + 0x18) +#define EMIF4_1_SDRAM_TIM_1_SHADOW (EMIF4_1_CFG_BASE + 0x1C) +#define EMIF4_1_SDRAM_TIM_2 (EMIF4_1_CFG_BASE + 0x20) +#define EMIF4_1_SDRAM_TIM_2_SHADOW (EMIF4_1_CFG_BASE + 0x24) +#define EMIF4_1_SDRAM_TIM_3 (EMIF4_1_CFG_BASE + 0x28) +#define EMIF4_1_SDRAM_TIM_3_SHADOW (EMIF4_1_CFG_BASE + 0x2C) +#define EMIF4_1_DDR_PHY_CTRL_1 (EMIF4_1_CFG_BASE + 0xE4) +#define EMIF4_1_DDR_PHY_CTRL_1_SHADOW (EMIF4_1_CFG_BASE + 0xE8) +#define EMIF4_1_IODFT_TLGC (EMIF4_1_CFG_BASE + 0x60) + +/*EMIF4 PRCM Defintion*/ +#define CM_DEFAULT_L3_FAST_CLKSTCTRL (PRCM_BASE + 0x0508) +#define CM_DEFAULT_EMIF_0_CLKCTRL (PRCM_BASE + 0x0520) +#define CM_DEFAULT_EMIF_1_CLKCTRL (PRCM_BASE + 0x0524) +#define CM_DEFAULT_DMM_CLKCTRL (PRCM_BASE + 0x0528) +#define CM_DEFAULT_FW_CLKCTRL (PRCM_BASE + 0x052C) + +/* Smartreflex Registers */ +#define TI816X_SMRT_SCALE_ADDR (CTRL_BASE + 0x06A0) +#define TI816X_SMRT_OPP_SVT_ADDR (CTRL_BASE + 0x06A8) +#define TI816X_SMRT_OPP_HVT_ADDR (CTRL_BASE + 0x06AC) + + +/* ALWON PRCM */ +#define CM_ALWON_OCMC_0_CLKSTCTRL (PRCM_BASE + 0x1414) +#define CM_ALWON_OCMC_0_CLKCTRL (PRCM_BASE + 0x15B4) +#define CM_ALWON_OCMC_1_CLKSTCTRL (PRCM_BASE + 0x1418) +#define CM_ALWON_OCMC_1_CLKCTRL (PRCM_BASE + 0x15B8) + +#define CM_ALWON_GPMC_CLKCTRL (PRCM_BASE + 0x15D0) + +/* OCMC */ +#define SRAM0_SIZE (0x40000) +#define SRAM_GPMC_STACK_SIZE (0x40) + +/* GPMC related */ +#define GPMC_CONFIG_CS0 (0x60) +#define GPMC_CONFIG_CS0_BAS (GPMC_BASE + GPMC_CONFIG_CS0) +#define GPMC_CONFIG1 (0x00) +#define GPMC_CONFIG2 (0x04) +#define GPMC_CONFIG3 (0x08) +#define GPMC_CONFIG4 (0x0C) +#define GPMC_CONFIG5 (0x10) +#define GPMC_CONFIG6 (0x14) +#define GPMC_CONFIG7 (0x18) + +/* WDT related */ +#define WDT_WDSC (WDT_BASE + 0x010) +#define WDT_WDST (WDT_BASE + 0x014) +#define WDT_WISR (WDT_BASE + 0x018) +#define WDT_WIER (WDT_BASE + 0x01C) +#define WDT_WWER (WDT_BASE + 0x020) +#define WDT_WCLR (WDT_BASE + 0x024) +#define WDT_WCRR (WDT_BASE + 0x028) +#define WDT_WLDR (WDT_BASE + 0x02C) +#define WDT_WTGR (WDT_BASE + 0x030) +#define WDT_WWPS (WDT_BASE + 0x034) +#define WDT_WDLY (WDT_BASE + 0x044) +#define WDT_WSPR (WDT_BASE + 0x048) +#define WDT_WIRQEOI (WDT_BASE + 0x050) +#define WDT_WIRQSTATRAW (WDT_BASE + 0x054) +#define WDT_WIRQSTAT (WDT_BASE + 0x058) +#define WDT_WIRQENSET (WDT_BASE + 0x05C) +#define WDT_WIRQENCLR (WDT_BASE + 0x060) + +#define WDT_UNFREEZE (CTRL_BASE + 0x100) + +#endif /* _TI816X_CPU_H */ diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index ed251ec..a7b938c 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -521,7 +521,11 @@ #define SDRAM_CONFIG_EXT_RD_LVL_4_SAMPLES 0x000001A7 /* DMM */ +#if defined(CONFIG_TI816X) +#define DMM_BASE 0x4E000000 +#else #define DMM_BASE 0x4E000040 +#endif /* Memory Adapter */ #define MA_BASE 0x482AF040 -- 1.7.10.4

2 2

[U-Boot] [PATCH 2/8] Add TI816X mux definitions.
by TENART Antoine 29 Mar '13

29 Mar '13

--- arch/arm/include/asm/arch-am33xx/mux.h | 2 + arch/arm/include/asm/arch-am33xx/mux_ti816x.h | 363 +++++++++++++++++++++++++ 2 files changed, 365 insertions(+) create mode 100644 arch/arm/include/asm/arch-am33xx/mux_ti816x.h diff --git a/arch/arm/include/asm/arch-am33xx/mux.h b/arch/arm/include/asm/arch-am33xx/mux.h index 1c6b65f..4caa4d8 100644 --- a/arch/arm/include/asm/arch-am33xx/mux.h +++ b/arch/arm/include/asm/arch-am33xx/mux.h @@ -23,6 +23,8 @@ #include <asm/arch/mux_am33xx.h> #elif defined(CONFIG_TI814X) #include <asm/arch/mux_ti814x.h> +#elif defined(CONFIG_TI816X) +#include <asm/arch/mux_ti816x.h> #endif struct module_pin_mux { diff --git a/arch/arm/include/asm/arch-am33xx/mux_ti816x.h b/arch/arm/include/asm/arch-am33xx/mux_ti816x.h new file mode 100644 index 0000000..0fcd49e --- /dev/null +++ b/arch/arm/include/asm/arch-am33xx/mux_ti816x.h @@ -0,0 +1,363 @@ +/* + * mux_ti816x.h + * + * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> + * Antoine Tenart, <atenart(a)adeneo-embedded.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _MUX_TI816X_H_ +#define _MUX_TI816X_H_ + +#include <common.h> +#include <asm/io.h> + +#define MUX_CFG(value, offset) \ + __raw_writel(value, (CTRL_BASE + offset)); + +#define PULLDOWN_EN (0x0 << 4) /* Pull Down Selection */ +#define PULLUP_EN (0x1 << 4) /* Pull Up Selection */ +#define PULLUDEN (0x0 << 3) /* Pull up enabled */ +#define PULLUDDIS (0x1 << 3) /* Pull up disabled */ +#define MODE(val) val /* used for Readability */ + + +/* + * PAD CONTROL OFFSETS + * Field names corresponds to the pad signal name + */ +struct pad_signals { + int pincntl1; + int pincntl2; + int pincntl3; + int pincntl4; + int pincntl5; + int pincntl6; + int pincntl7; + int pincntl8; + int pincntl9; + int pincntl10; + int pincntl11; + int pincntl12; + int pincntl13; + int pincntl14; + int pincntl15; + int pincntl16; + int pincntl17; + int pincntl18; + int pincntl19; + int pincntl20; + int pincntl21; + int pincntl22; + int pincntl23; + int pincntl24; + int pincntl25; + int pincntl26; + int pincntl27; + int pincntl28; + int pincntl29; + int pincntl30; + int pincntl31; + int pincntl32; + int pincntl33; + int pincntl34; + int pincntl35; + int pincntl36; + int pincntl37; + int pincntl38; + int pincntl39; + int pincntl40; + int pincntl41; + int pincntl42; + int pincntl43; + int pincntl44; + int pincntl45; + int pincntl46; + int pincntl47; + int pincntl48; + int pincntl49; + int pincntl50; + int pincntl51; + int pincntl52; + int pincntl53; + int pincntl54; + int pincntl55; + int pincntl56; + int pincntl57; + int pincntl58; + int pincntl59; + int pincntl60; + int pincntl61; + int pincntl62; + int pincntl63; + int pincntl64; + int pincntl65; + int pincntl66; + int pincntl67; + int pincntl68; + int pincntl69; + int pincntl70; + int pincntl71; + int pincntl72; + int pincntl73; + int pincntl74; + int pincntl75; + int pincntl76; + int pincntl77; + int pincntl78; + int pincntl79; + int pincntl80; + int pincntl81; + int pincntl82; + int pincntl83; + int pincntl84; + int pincntl85; + int pincntl86; + int pincntl87; + int pincntl88; + int pincntl89; + int pincntl90; + int pincntl91; + int pincntl92; + int pincntl93; + int pincntl94; + int pincntl95; + int pincntl96; + int pincntl97; + int pincntl98; + int pincntl99; + int pincntl100; + int pincntl101; + int pincntl102; + int pincntl103; + int pincntl104; + int pincntl105; + int pincntl106; + int pincntl107; + int pincntl108; + int pincntl109; + int pincntl110; + int pincntl111; + int pincntl112; + int pincntl113; + int pincntl114; + int pincntl115; + int pincntl116; + int pincntl117; + int pincntl118; + int pincntl119; + int pincntl120; + int pincntl121; + int pincntl122; + int pincntl123; + int pincntl124; + int pincntl125; + int pincntl126; + int pincntl127; + int pincntl128; + int pincntl129; + int pincntl130; + int pincntl131; + int pincntl132; + int pincntl133; + int pincntl134; + int pincntl135; + int pincntl136; + int pincntl137; + int pincntl138; + int pincntl139; + int pincntl140; + int pincntl141; + int pincntl142; + int pincntl143; + int pincntl144; + int pincntl145; + int pincntl146; + int pincntl147; + int pincntl148; + int pincntl149; + int pincntl150; + int pincntl151; + int pincntl152; + int pincntl153; + int pincntl154; + int pincntl155; + int pincntl156; + int pincntl157; + int pincntl158; + int pincntl159; + int pincntl160; + int pincntl161; + int pincntl162; + int pincntl163; + int pincntl164; + int pincntl165; + int pincntl166; + int pincntl167; + int pincntl168; + int pincntl169; + int pincntl170; + int pincntl171; + int pincntl172; + int pincntl173; + int pincntl174; + int pincntl175; + int pincntl176; + int pincntl177; + int pincntl178; + int pincntl179; + int pincntl180; + int pincntl181; + int pincntl182; + int pincntl183; + int pincntl184; + int pincntl185; + int pincntl186; + int pincntl187; + int pincntl188; + int pincntl189; + int pincntl190; + int pincntl191; + int pincntl192; + int pincntl193; + int pincntl194; + int pincntl195; + int pincntl196; + int pincntl197; + int pincntl198; + int pincntl199; + int pincntl200; + int pincntl201; + int pincntl202; + int pincntl203; + int pincntl204; + int pincntl205; + int pincntl206; + int pincntl207; + int pincntl208; + int pincntl209; + int pincntl210; + int pincntl211; + int pincntl212; + int pincntl213; + int pincntl214; + int pincntl215; + int pincntl216; + int pincntl217; + int pincntl218; + int pincntl219; + int pincntl220; + int pincntl221; + int pincntl222; + int pincntl223; + int pincntl224; + int pincntl225; + int pincntl226; + int pincntl227; + int pincntl228; + int pincntl229; + int pincntl230; + int pincntl231; + int pincntl232; + int pincntl233; + int pincntl234; + int pincntl235; + int pincntl236; + int pincntl237; + int pincntl238; + int pincntl239; + int pincntl240; + int pincntl241; + int pincntl242; + int pincntl243; + int pincntl244; + int pincntl245; + int pincntl246; + int pincntl247; + int pincntl248; + int pincntl249; + int pincntl250; + int pincntl251; + int pincntl252; + int pincntl253; + int pincntl254; + int pincntl255; + int pincntl256; + int pincntl257; + int pincntl258; + int pincntl259; + int pincntl260; + int pincntl261; + int pincntl262; + int pincntl263; + int pincntl264; + int pincntl265; + int pincntl266; + int pincntl267; + int pincntl268; + int pincntl269; + int pincntl270; + int pincntl271; + int pincntl272; + int pincntl273; + int pincntl274; + int pincntl275; + int pincntl276; + int pincntl277; + int pincntl278; + int pincntl279; + int pincntl280; + int pincntl281; + int pincntl282; + int pincntl283; + int pincntl284; + int pincntl285; + int pincntl286; + int pincntl287; + int pincntl288; + int pincntl289; + int pincntl290; + int pincntl291; + int pincntl292; + int pincntl293; + int pincntl294; + int pincntl295; + int pincntl296; + int pincntl297; + int pincntl298; + int pincntl299; + int pincntl300; + int pincntl301; + int pincntl302; + int pincntl303; + int pincntl304; + int pincntl305; + int pincntl306; + int pincntl307; + int pincntl308; + int pincntl309; + int pincntl310; + int pincntl311; + int pincntl312; + int pincntl313; + int pincntl314; + int pincntl315; + int pincntl316; + int pincntl317; + int pincntl318; + int pincntl319; + int pincntl320; + int pincntl321; + int pincntl322; + int pincntl323; +}; + +#endif /* endif _MUX_TI816X_H_ */ -- 1.7.10.4

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[U-Boot] get linker variable error.
by jinxin16897123 29 Mar '13

29 Mar '13

hi there , I'm a newbie to U-boot, the following picture is the disassembly of u-boot: I'm using u-boot 2013.01 . when clear bss section, the __bss_start and __bss_end__ was wrong, it was zero. but in the map file , the __bss_start & __bss_end__ was right . could you help me ? Thanks. -- Aking Best regards

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[U-Boot] [PATCH 0/2] ANSI terminal Bootmenu
by Pali Rohár 29 Mar '13

29 Mar '13

This patch series adds ANSI terminal Bootmenu command. It use generic menu code for creating menu structures, but use own functions for drawing menu on ANSI terminal. First patch modify generic menu code for using other functions for printing and choosing menu entry, second patch is bootmenu command itself. Pali Rohár (2): menu: Added support to use user defined functions New command bootmenu: ANSI terminal Boot Menu support board/ait/cam_enc_4xx/cam_enc_4xx.c | 5 +- common/Makefile | 1 + common/cmd_bootmenu.c | 446 +++++++++++++++++++++++++++++++++++ common/cmd_pxe.c | 3 +- common/menu.c | 43 ++-- doc/README.bootmenu | 61 +++++ include/common.h | 20 ++ include/config_cmd_all.h | 1 + include/menu.h | 6 +- 9 files changed, 566 insertions(+), 20 deletions(-) create mode 100644 common/cmd_bootmenu.c create mode 100644 doc/README.bootmenu -- 1.7.9.5

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[U-Boot] [PATCH 0/2] arm: at91: enable mmc support for at91sam9g20ek
by Josh Wu 29 Mar '13

29 Mar '13

This patch series enable mmc command support for at91sam9g20ek board. It also support save environment in mmc card. Josh Wu (2): arm: at91: enable mci support for at91sam9g20ek. arm: at91: add at91sam9g20ek_mmc_config, which can save environment in mmc card arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c | 4 +++ board/atmel/at91sam9260ek/at91sam9260ek.c | 10 ++++++ boards.cfg | 1 + include/configs/at91sam9260ek.h | 34 +++++++++++++++++++-- 4 files changed, 46 insertions(+), 3 deletions(-) -- 1.7.9.5

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[U-Boot] [PATCH] Exynos: clock: Fix a bug in PLL lock check condition
by Akshay Saraswat 29 Mar '13

29 Mar '13

The condition for testing of PLL getting locked was incorrect. Rectify this error in this patch. Reported-by: Alexei Fedorov <alexie.fedorov(a)arm.com> Signed-off-by: Hatim Ali <hatim.rv(a)samsung.com> Signed-off-by: Akshay Saraswat <akshay.s(a)samsung.com> --- board/samsung/smdk5250/clock_init.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/board/samsung/smdk5250/clock_init.c b/board/samsung/smdk5250/clock_init.c index c009ae5..baa3042 100644 --- a/board/samsung/smdk5250/clock_init.c +++ b/board/samsung/smdk5250/clock_init.c @@ -494,35 +494,35 @@ void system_clock_init() val = set_pll(arm_clk_ratio->apll_mdiv, arm_clk_ratio->apll_pdiv, arm_clk_ratio->apll_sdiv); writel(val, &clk->apll_con0); - while (readl(&clk->apll_con0) & APLL_CON0_LOCKED) + while ((readl(&clk->apll_con0) & APLL_CON0_LOCKED) == 0) ; /* Set MPLL */ writel(MPLL_CON1_VAL, &clk->mpll_con1); val = set_pll(mem->mpll_mdiv, mem->mpll_pdiv, mem->mpll_sdiv); writel(val, &clk->mpll_con0); - while (readl(&clk->mpll_con0) & MPLL_CON0_LOCKED) + while ((readl(&clk->mpll_con0) & MPLL_CON0_LOCKED) == 0) ; /* Set BPLL */ writel(BPLL_CON1_VAL, &clk->bpll_con1); val = set_pll(mem->bpll_mdiv, mem->bpll_pdiv, mem->bpll_sdiv); writel(val, &clk->bpll_con0); - while (readl(&clk->bpll_con0) & BPLL_CON0_LOCKED) + while ((readl(&clk->bpll_con0) & BPLL_CON0_LOCKED) == 0) ; /* Set CPLL */ writel(CPLL_CON1_VAL, &clk->cpll_con1); val = set_pll(mem->cpll_mdiv, mem->cpll_pdiv, mem->cpll_sdiv); writel(val, &clk->cpll_con0); - while (readl(&clk->cpll_con0) & CPLL_CON0_LOCKED) + while ((readl(&clk->cpll_con0) & CPLL_CON0_LOCKED) == 0) ; /* Set GPLL */ writel(GPLL_CON1_VAL, &clk->gpll_con1); val = set_pll(mem->gpll_mdiv, mem->gpll_pdiv, mem->gpll_sdiv); writel(val, &clk->gpll_con0); - while (readl(&clk->gpll_con0) & GPLL_CON0_LOCKED) + while ((readl(&clk->gpll_con0) & GPLL_CON0_LOCKED) == 0) ; /* Set EPLL */ @@ -530,7 +530,7 @@ void system_clock_init() writel(EPLL_CON1_VAL, &clk->epll_con1); val = set_pll(mem->epll_mdiv, mem->epll_pdiv, mem->epll_sdiv); writel(val, &clk->epll_con0); - while (readl(&clk->epll_con0) & EPLL_CON0_LOCKED) + while ((readl(&clk->epll_con0) & EPLL_CON0_LOCKED) == 0) ; /* Set VPLL */ @@ -538,7 +538,7 @@ void system_clock_init() writel(VPLL_CON1_VAL, &clk->vpll_con1); val = set_pll(mem->vpll_mdiv, mem->vpll_pdiv, mem->vpll_sdiv); writel(val, &clk->vpll_con0); - while (readl(&clk->vpll_con0) & VPLL_CON0_LOCKED) + while ((readl(&clk->vpll_con0) & VPLL_CON0_LOCKED) == 0) ; writel(CLK_SRC_CORE0_VAL, &clk->src_core0); -- 1.8.0

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