March 2013 - U-Boot

[U-Boot] Splash Screen Enable in (u-boot-2009.08.tar.gz) U-boot source code.
by nandakumar.ramaswamy＠pricoltech.com 28 Mar '13

28 Mar '13

Hello, I would like to enable & view the splash screen in U-Boot source (u-boot-2009.08.tar.gz) code. Please help me to come-out from this task. Thanks & Regards, Nandakumar R. Disclaimer: This e-mail, and any files transmitted with it are "Pricol Technologies Confidential" and intended solely for the use of the individual or entity to whom it is addressed. Any copying, dissemination, disclosure or use of its contents is prohibited. If you have received this e-mail in error, please discard the message and notify us at itsupport(a)pricoltech.com directly. E-mail communication is not guaranteed to be secure, error or virus-free. They are capable of interception, corruption and delays. Anyone communicating with us via e-mail accepts the risks of e-mail communications and their consequences.

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[U-Boot] [PATCH] ARM: bcm2835: fix get_timer() to return mS
by Stephen Warren 28 Mar '13

28 Mar '13

Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer driver to conform to this. Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- arch/arm/cpu/arm1176/bcm2835/timer.c | 13 +++++++++---- include/configs/rpi_b.h | 2 +- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/arm1176/bcm2835/timer.c b/arch/arm/cpu/arm1176/bcm2835/timer.c index d232d7e..f550020 100644 --- a/arch/arm/cpu/arm1176/bcm2835/timer.c +++ b/arch/arm/cpu/arm1176/bcm2835/timer.c @@ -23,12 +23,17 @@ int timer_init(void) return 0; } -ulong get_timer(ulong base) +ulong get_timer_us(void) { struct bcm2835_timer_regs *regs = (struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR; - return readl(&regs->clo) - base; + return readl(&regs->clo); +} + +ulong get_timer(ulong base) +{ + return (get_timer_us() / 1000) - base; } unsigned long long get_ticks(void) @@ -46,10 +51,10 @@ void __udelay(unsigned long usec) ulong endtime; signed long diff; - endtime = get_timer(0) + usec; + endtime = get_timer_us() + usec; do { - ulong now = get_timer(0); + ulong now = get_timer_us(); diff = endtime - now; } while (diff >= 0); } diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h index 3d55d36..c18b35b 100644 --- a/include/configs/rpi_b.h +++ b/include/configs/rpi_b.h @@ -31,7 +31,7 @@ #define CONFIG_MACH_TYPE MACH_TYPE_BCM2708 /* Timer */ -#define CONFIG_SYS_HZ 1000000 +#define CONFIG_SYS_HZ 1000 /* Memory layout */ #define CONFIG_NR_DRAM_BANKS 1 -- 1.7.10.4

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Re: [U-Boot] [PATCH 4/9 v2] Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4
by Akshay Saraswat 28 Mar '13

28 Mar '13

Minkyu, Thanks for comments. Please find my reply below the comment. >On 28/02/13 19:59, Akshay Saraswat wrote: >> The pwm_config function in the exynos pwm driver divides by its period >> period parameter. A function was calling pwm_config with a 0ns period and a >> 0ns duty cycle. That doesn't actually make any sense physically, and results >> in a divide by zero in the driver. This change changes the paremters to be a > >typo. >paremters -> parameter > >> 100000ns period and duty cycle. >> >> Test with command "sf probe 1:0; time sf read 40008000 0 1000". >> Try with different numbers of bytes and see that sane values are obtained >> Build and boot U-boot with this patch, backlight works properly. >> >> Signed-off-by: Gabe Black <gabeblack(a)google.com> >> Signed-off-by: Akshay Saraswat <akshay.s(a)samsung.com> >> Acked-by: Simon Glass <sjg(a)chromium.org> >> --- >> Changes since v1: >> - Added "Acked-by: Simon Glass". >> >> arch/arm/cpu/armv7/s5p-common/timer.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c >> index de61405..6a0fa58 100644 >> --- a/arch/arm/cpu/armv7/s5p-common/timer.c >> +++ b/arch/arm/cpu/armv7/s5p-common/timer.c >> @@ -58,7 +58,7 @@ int timer_init(void) >> { >> /* PWM Timer 4 */ >> pwm_init(4, MUX_DIV_4, 0); >> - pwm_config(4, 0, 0); >> + pwm_config(4, 100000, 100000); > >0 is a numerator. >I think.. it doesn't matter. In file pwm.c line 98 we are doing: frequency = NS_IN_SEC / period_ns; what we are passing in this call are the values of duty_ns and period_ns. So, there are places where divide by zero may occur. I think we should keep it to be on a safer side. > >> pwm_enable(4); >> >> /* Use this as the current monotonic time in us */ >> > >Thanks, >Minkyu Kang. > Regards, Akshay Saraswat

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Re: [U-Boot] [PATCH 3/9 v2] Exynos: pwm: Fix two bugs in the exynos pwm configuration code
by Akshay Saraswat 28 Mar '13

28 Mar '13

Hi Minkyu, Thanks for your comments. >Dear Akshay, > >On 28/02/13 19:59, Akshay Saraswat wrote: >> First, the "div" value was being used incorrectly to compute the frequency of >> the PWM timer. The value passed in is a constant which reflects the value >> that would be found in a configuration register, 0 to 4. That should >> correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was >> being used instead. >> >> @@ -167,20 +167,24 @@ int pwm_init(int pwm_id, int div, int invert) >> val |= (div & 0xf) << MUX_DIV_SHIFT(pwm_id); >> writel(val, &pwm->tcfg1); >> >> - timer_rate_hz = get_pwm_clk() / ((prescaler + 1) * >> - (div + 1)); >> + if (pwm_id == 4) { >> + /* >> + * TODO(sjg): Use this as a countdown timer for now. We count >> + * down from the maximum value to 0, then reset. >> + */ >> + ticks_per_period = -1UL; >> + } else { >> + const unsigned long pwm_hz = 1000; >> + unsigned long timer_rate_hz = get_pwm_clk() / >> + ((prescaler + 1) * (1 << div)); > >good catch. thanks. > >> >> - timer_rate_hz = timer_rate_hz / CONFIG_SYS_HZ; >> + ticks_per_period = timer_rate_hz / pwm_hz; > >why don't you use CONFIG_SYS_HZ? >pwm_hz seems to constant. CONFIG_SYS_HZ may change with boards and as per needs. But requirement here is for a constant value 1000 for all calculations which should remain 1000 only. That's why using pwm_hz and not CONFIG_SYS_HZ. > >> + } >> >> /* set count value */ >> offset = pwm_id * 3; >> >> - /* >> - * TODO(sjg): Use this as a countdown timer for now. We count down >> - * from the maximum value to 0, then reset. >> - */ >> - timer_rate_hz = -1; >> - writel(timer_rate_hz, &pwm->tcntb0 + offset); >> + writel(ticks_per_period, &pwm->tcntb0 + offset); >> >> val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id)); >> if (invert && (pwm_id < 4)) >> > >Thanks, >Minkyu Kang. > Regards, Akshay Saraswat

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Re: [U-Boot] [PATCH 1/9 v2] Exynos: Change get_timer() to work correctly
by Akshay Saraswat 28 Mar '13

28 Mar '13

Thanks for your comments. Please find the reply corresponding to comments below. >Dear Akshay, > >On 28/02/13 19:59, Akshay Saraswat wrote: >> At present get_timer() does not return sane values. It should count up >> smoothly in milliscond intervals. >> >> diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c b/arch/arm/cpu/armv7/s5p-common/pwm.c >> index 44d7bc3..3147f59 100644 >> --- a/arch/arm/cpu/armv7/s5p-common/pwm.c >> +++ b/arch/arm/cpu/armv7/s5p-common/pwm.c >> @@ -174,6 +174,12 @@ int pwm_init(int pwm_id, int div, int invert) >> >> /* set count value */ >> offset = pwm_id * 3; >> + >> + /* >> + * TODO(sjg): Use this as a countdown timer for now. We count down >> + * from the maximum value to 0, then reset. >> + */ >> + timer_rate_hz = -1; > >is it workaround? Yes, this is a part of workaround to get appropriate ticks. > >> writel(timer_rate_hz, &pwm->tcntb0 + offset); >> >> val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id)); >> diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c >> index e78c716..c48a297 100644 >> --- a/arch/arm/cpu/armv7/s5p-common/timer.c >> +++ b/arch/arm/cpu/armv7/s5p-common/timer.c >> @@ -39,13 +39,33 @@ static inline struct s5p_timer *s5p_get_base_timer(void) >> return (struct s5p_timer *)samsung_get_base_timer(); >> } >> >> +/** >> + * Read the countdown timer. >> + * >> + * This operates at 1MHz and counts downwards. It will wrap about every >> + * hour (2^32 microseconds). >> + * >> + * @return current value of timer >> + */ >> +static unsigned long timer_get_us_down(void) >> +{ >> + struct s5p_timer *const timer = s5p_get_base_timer(); >> + >> + return readl(&timer->tcnto4); >> +} >> + >> int timer_init(void) >> { >> /* PWM Timer 4 */ >> - pwm_init(4, MUX_DIV_2, 0); >> + pwm_init(4, MUX_DIV_4, 0); > >There are special reason to change the div value? >Please let me know. We wish to count down at 1MHz, providing a resolution of 1us. This becomes possible with MUX_DIV_4 for timer 4, since, exynos 5250 manual says that for 4-bit divider settings at 1/4 (PCLK = 66 MHz ), we get 66637.07 seconds interval. > >> /* delay x useconds */ >> void __udelay(unsigned long usec) >> { >> - struct s5p_timer *const timer = s5p_get_base_timer(); >> - unsigned long tmo, tmp, count_value; >> - >> - count_value = readl(&timer->tcntb4); >> - >> - if (usec >= 1000) { >> - /* >> - * if "big" number, spread normalization >> - * to seconds >> - * 1. start to normalize for usec to ticks per sec >> - * 2. find number of "ticks" to wait to achieve target >> - * 3. finish normalize. >> - */ >> - tmo = usec / 1000; >> - tmo *= (CONFIG_SYS_HZ * count_value); >> - tmo /= 1000; >> - } else { >> - /* else small number, don't kill it prior to HZ multiply */ >> - tmo = usec * CONFIG_SYS_HZ * count_value; >> - tmo /= (1000 * 1000); >> - } >> - >> - /* get current timestamp */ >> - tmp = get_current_tick(); >> - >> - /* if setting this fordward will roll time stamp */ >> - /* reset "advancing" timestamp to 0, set lastinc value */ >> - /* else, set advancing stamp wake up time */ >> - if ((tmo + tmp + 1) < tmp) >> - reset_timer_masked(); >> - else >> - tmo += tmp; >> - >> - /* loop till event */ >> - while (get_current_tick() < tmo) >> - ; /* nop */ >> + unsigned long count_value; >> + >> + count_value = timer_get_us_down(); >> + while ((int)(count_value - timer_get_us_down()) < (int)usec) > >why convert to int? To avoid side effects of compiler optimizations. > >> + ; >> } >> >> void reset_timer_masked(void) >> @@ -109,30 +109,6 @@ void reset_timer_masked(void) >> gd->arch.tbl = 0; >> } >> >> -unsigned long get_timer_masked(void) >> -{ >> - struct s5p_timer *const timer = s5p_get_base_timer(); >> - unsigned long count_value = readl(&timer->tcntb4); >> - >> - return get_current_tick() / count_value; >> -} >> * This function is derived from PowerPC code (read timebase as long long). >> * On ARM it just returns the timer value. >> > >Thanks, >Minkyu Kang. Regards, Akshay Saraswat

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[U-Boot] [PATCH] armv7: do not relocate _start twice
by Vincent Stehlé 28 Mar '13

28 Mar '13

The _start symbol is already relocated, so do not add the relocation the second time in c_runtime_cpu_setup. This fixes e.g. the abort exception handling path, which ended in double fault due to bad address in VBAR. Signed-off-by: Vincent Stehlé <v-stehle(a)ti.com> Reported-by: Lubomir Popov <lpopov(a)mm-sol.com> --- Hello, Here is a fix for a bug reported by Lubomir. He noticed that exceptions were not handled correctly anymore. This can be seen with e.g. the 'dhcp' command on some OMAP platforms. Looking at the code, I would says the fix applies to all armv7 platforms except Tegra but I did only test on OMAP5. On this platform at least the abort is now handled: OMAP5430 EVM # dhcp data abort MAYBE you should read doc/README.arm-unaligned-accesses pc : [<fef9bd78>] lr : [<fefa1790>] sp : feef9dc4 ip : fefed0f8 fp : 00000000 r10: 00000001 r9 : 00000001 r8 : feef9f48 r7 : feef9fe0 r6 : 00000000 r5 : 00000000 r4 : 00000014 r3 : 00000000 r2 : 00000002 r1 : 00000014 r0 : fefed0f4 Flags: Nzcv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... It would be appreciated if folks could verify on other ARMv7 platforms, when running from flash for example (where relocation may differ?) arch/arm/cpu/armv7/start.S | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 6b59529d..d06b35f 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -254,7 +254,6 @@ ENTRY(c_runtime_cpu_setup) #if !defined(CONFIG_TEGRA) /* Set vector address in CP15 VBAR register */ ldr r0, =_start - add r0, r0, r9 mcr p15, 0, r0, c12, c0, 0 @Set VBAR #endif /* !Tegra */ -- 1.7.10.4

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[U-Boot] [PATCH 0/2] ARM: mmu: Set domain permissions to client access
by R Sricharan 28 Mar '13

28 Mar '13

Currently for ARM based cpu's, mmu pagetable attributes are set with manager permissions for all 4GB address space. Because of this the 'execute never (XN)' permission is never checked on read sensitive regions which results in speculative aborts. This series changes the domain permissions of the full 4GB space to client access for OMAP socs. This avoids all the speculative aborts that are currently seen on OMAP5 secure devices. Tested on OMAP5 SDP (HS) soc. This series depends on [1] the patch sent by <Vincent Stehle <v-stehle(a)ti.com> [1] http://www.mail-archive.com/u-boot@lists.denx.de/msg102709.html R Sricharan (2): ARM: mmu: Introduce weak dram_bank_setup function ARM: mmu: Set domain permissions to client access arch/arm/cpu/armv7/cache_v7.c | 3 ++ arch/arm/cpu/armv7/omap-common/hwinit-common.c | 35 ++++++++++++++++++++++++ arch/arm/include/asm/cache.h | 1 + arch/arm/include/asm/system.h | 14 ++++++++++ arch/arm/lib/cache-cp15.c | 13 ++++++++- 5 files changed, 65 insertions(+), 1 deletion(-) -- 1.7.9.5

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[U-Boot] [PATCH 0/9 v2] Fix and Re-organise PWM Timer
by Akshay Saraswat 28 Mar '13

28 Mar '13

This patch set tries to fix few bugs in timer and re-organises PWM clock code. Changes since v1: - Patch-1: Added "Acked-by: Simon Glass". - Patch-2: Added "Acked-by: Simon Glass". - Patch-3: Added "Acked-by: Simon Glass". - Patch-4: Added "Acked-by: Simon Glass". - Patch-5: Added "Acked-by: Simon Glass". - Patch-6: None. - Patch-7: Fixed few nits. - Patch-8: Added "Acked-by: Simon Glass". - Patch-9: Restored get_pwm_clk call in case of non-exynos5 cpu. Akshay Saraswat (9): Exynos: Change get_timer() to work correctly Exynos: Add timer_get_us function Exynos: pwm: Fix two bugs in the exynos pwm configuration code Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4 Exynos: Tidy up the pwm_config function in the exynos pwm driver Exynos: Add peripherial id for pwm Exynos: clock: Add generic api to get the clk freq Exynos: clock: Correct pwm source clk selection Exynos: pwm: Use generic api to get pwm clk freq arch/arm/cpu/armv7/exynos/clock.c | 138 ++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/s5p-common/pwm.c | 57 +++++++----- arch/arm/cpu/armv7/s5p-common/timer.c | 117 ++++++++++++------------- arch/arm/include/asm/arch-exynos/clk.h | 17 ++++ arch/arm/include/asm/arch-exynos/periph.h | 5 ++ board/samsung/smdk5250/setup.h | 2 +- 6 files changed, 249 insertions(+), 87 deletions(-) -- 1.8.0

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[U-Boot] [PATCH] arm:trats: change auto-booting to boot kernel with separate device tree blob
by Arek Wlodarczyk 28 Mar '13

28 Mar '13

From: Arkadiusz Wlodarczyk <a.wlodarczyk(a)samsung.com> Signed-off-by: Arkadiusz Wlodarczyk <a.wlodarczyk(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> Tested-by: Arkadiusz Wlodarczyk <a.wlodarczyk(a)samsung.com> Cc: Minkyu Kang <mk7.kang(a)samsung.com> --- Changes: Modify autoboot scripts that are included in environment variables of default environment in order to load device tree to memory prior to booting and to pass device tree address to mboot command. Switch on dft library, that is necessary for mboot command to pass the device tree address in memory to kernel. Added device tree file entry in DFU items table in order to facilitate uploading the device tree blob file on a target. --- include/configs/trats.h | 16 ++++++++++++---- 1 files changed, 12 insertions(+), 4 deletions(-) diff --git a/include/configs/trats.h b/include/configs/trats.h index 63745ac..d82a7ba 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -146,7 +146,8 @@ #define CONFIG_DFU_ALT \ "u-boot mmc 80 400;" \ - "uImage ext4 0 2\0" \ + "uImage ext4 0 2;" \ + "exynos4210-trats.dtb ext4 0 2\0" #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_CONSOLE_INFO_QUIET @@ -154,7 +155,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootk=" \ - "run loaduimage; bootm 0x40007FC0\0" \ + "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ "updatemmc=" \ "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ "mmc boot 0 1 1 0\0" \ @@ -177,7 +178,7 @@ "mmcboot=" \ "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ - "run loaduimage; bootm 0x40007FC0\0" \ + "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ "boottrace=setenv opts initcall_debug; run bootcmd\0" \ "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ @@ -188,6 +189,7 @@ "nfsroot=/nfsroot/arm\0" \ "bootblock=" CONFIG_BOOTBLOCK "\0" \ "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ + "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} ${fdtfile}\0" \ "mmcdev=0\0" \ "mmcbootpart=2\0" \ "mmcrootpart=5\0" \ @@ -211,7 +213,10 @@ " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ "setenv spl_imgsize;" \ "setenv spl_imgaddr;" \ - "setenv spl_addr_tmp;\0" + "setenv spl_addr_tmp;\0" \ + "fdtaddr=40800000\0" \ + "fdtfile=exynos4210-trats.dtb\0" + /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ @@ -316,4 +321,7 @@ #define CONFIG_VIDEO_BMP_GZIP #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12)) +/* Pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 + #endif /* __CONFIG_H */ -- 1.7.1

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[U-Boot] unaligned access in part_efi.c
by Marc Dietrich 27 Mar '13

27 Mar '13

Hi, access to part->start_sect in pmbr_part_valid() (form disk/part_efi.c) and propably other positions/fields causes an unaligned access on ARM (tegra in my case) and a uboot crash. This was introduced by commit fae2bf22 [1] which changed le32_to_int (which is a byte access) to le32_to_cpu (which is a 32bit access). I'm not sure how to fix this as I'm not very familar with this kind of problems. Any help? Thanks! Marc [1] gpt: The leXX_to_int() calls replaced with ones defined at <compiler.h>

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