October 2013 - U-Boot

[U-Boot] [PATCH 1/3] sf: add missing Atmel at25df321 spi flash support
by Bo Shen 10 Oct '13

10 Oct '13

As the spi flash transfer to multiple parts, it is forgot to add Atmel AT25DF321 spi flash support, which broken several Atmel EK boards which this chip. So, add it Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- drivers/mtd/spi/sf_probe.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 4251b1b..6e19d79 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -46,6 +46,7 @@ static const struct spi_flash_params spi_flash_params_table[] = { {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K}, {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K}, {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K}, + {"AT25DF321", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_EON /* EON */ {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0}, -- 1.7.9.5

4 7

[U-Boot] [PATCH] spi: Add GPL-2.0+ SPDX-License-Identifier for missing ones
by Jagannadha Sutradharudu Teki 10 Oct '13

10 Oct '13

Added GPL-2.0+ SPDX-License-Identifier for missed spi source files. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- drivers/spi/sh_spi.c | 14 +------------- drivers/spi/tegra20_slink.c | 20 +++----------------- include/spi_flash.h | 7 +------ 3 files changed, 5 insertions(+), 36 deletions(-) diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c index 744afe3..07c80bb 100644 --- a/drivers/spi/sh_spi.c +++ b/drivers/spi/sh_spi.c @@ -3,19 +3,7 @@ * * Copyright (C) 2011-2012 Renesas Solutions Corp. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c index 664de6e..697cae0 100644 --- a/drivers/spi/tegra20_slink.c +++ b/drivers/spi/tegra20_slink.c @@ -1,24 +1,10 @@ /* * NVIDIA Tegra SPI-SLINK controller * - * Copyright (c) 2010-2013 NVIDIA Corporation + * Copyright (c) 2010-2013 + * NVIDIA Corporation <www.nvidia.com> * - * See file CREDITS for list of people who contributed to this - * project. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/include/spi_flash.h b/include/spi_flash.h index 1ff5af4..b961213 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -4,12 +4,7 @@ * Copyright (C) 2008 Atmel Corporation * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _SPI_FLASH_H_ -- 1.8.3

3 2

[U-Boot] [PATCH 2/2] spi: Add GPL-2.0+ SPDX-License-Identifier for missing ones
by Jagannadha Sutradharudu Teki 10 Oct '13

10 Oct '13

Added GPL-2.0+ SPDX-License-Identifier for missed spi source files. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki(a)gmail.com> Signed-off-by: Tom Warren <twarren.nvidia(a)gmail.com> --- drivers/spi/altera_spi.c | 2 +- drivers/spi/bfin_spi.c | 2 +- drivers/spi/bfin_spi6xx.c | 13 +------------ drivers/spi/fdt_spi.c | 20 +++----------------- drivers/spi/oc_tiny_spi.c | 2 +- drivers/spi/sh_spi.c | 14 +------------- drivers/spi/sh_spi.h | 14 +------------- drivers/spi/tegra114_spi.c | 20 +++----------------- drivers/spi/tegra20_slink.c | 20 +++----------------- drivers/spi/xilinx_spi.c | 2 +- drivers/spi/xilinx_spi.h | 2 +- include/spi_flash.h | 7 +------ 12 files changed, 18 insertions(+), 100 deletions(-) diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c index b53607a..5accbb5 100644 --- a/drivers/spi/altera_spi.c +++ b/drivers/spi/altera_spi.c @@ -5,7 +5,7 @@ * Copyright (c) 2005-2008 Analog Devices Inc. * Copyright (C) 2010 Thomas Chou <thomas(a)wytron.com.tw> * - * Licensed under the GPL-2 or later. + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> #include <asm/io.h> diff --git a/drivers/spi/bfin_spi.c b/drivers/spi/bfin_spi.c index f7192c2..bb88f30 100644 --- a/drivers/spi/bfin_spi.c +++ b/drivers/spi/bfin_spi.c @@ -3,7 +3,7 @@ * * Copyright (c) 2005-2010 Analog Devices Inc. * - * Licensed under the GPL-2 or later. + * SPDX-License-Identifier: GPL-2.0+ */ /*#define DEBUG*/ diff --git a/drivers/spi/bfin_spi6xx.c b/drivers/spi/bfin_spi6xx.c index c25c4a9..859a870 100644 --- a/drivers/spi/bfin_spi6xx.c +++ b/drivers/spi/bfin_spi6xx.c @@ -3,18 +3,7 @@ * * Copyright (c) 2011 Analog Devices Inc. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/spi/fdt_spi.c b/drivers/spi/fdt_spi.c index 58f139a..170df02 100644 --- a/drivers/spi/fdt_spi.c +++ b/drivers/spi/fdt_spi.c @@ -1,24 +1,10 @@ /* * Common fdt based SPI driver front end * - * Copyright (c) 2013 NVIDIA Corporation + * Copyright (c) 2013 + * NVIDIA Corporation <www.nvidia.com> * - * See file CREDITS for list of people who contributed to this - * project. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/spi/oc_tiny_spi.c b/drivers/spi/oc_tiny_spi.c index 6f7b1ed..4de5d00 100644 --- a/drivers/spi/oc_tiny_spi.c +++ b/drivers/spi/oc_tiny_spi.c @@ -7,7 +7,7 @@ * Copyright (c) 2005-2008 Analog Devices Inc. * Copyright (C) 2010 Thomas Chou <thomas(a)wytron.com.tw> * - * Licensed under the GPL-2 or later. + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c index 744afe3..07c80bb 100644 --- a/drivers/spi/sh_spi.c +++ b/drivers/spi/sh_spi.c @@ -3,19 +3,7 @@ * * Copyright (C) 2011-2012 Renesas Solutions Corp. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/spi/sh_spi.h b/drivers/spi/sh_spi.h index 96b4b68..c106a71 100644 --- a/drivers/spi/sh_spi.h +++ b/drivers/spi/sh_spi.h @@ -3,19 +3,7 @@ * * Copyright (C) 2011 Renesas Solutions Corp. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __SH_SPI_H__ diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c index 4d2af48..d6e18de 100644 --- a/drivers/spi/tegra114_spi.c +++ b/drivers/spi/tegra114_spi.c @@ -1,24 +1,10 @@ /* * NVIDIA Tegra SPI controller (T114 and later) * - * Copyright (c) 2010-2013 NVIDIA Corporation + * Copyright (c) 2010-2013 + * NVIDIA Corporation <www.nvidia.com> * - * See file CREDITS for list of people who contributed to this - * project. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c index 664de6e..697cae0 100644 --- a/drivers/spi/tegra20_slink.c +++ b/drivers/spi/tegra20_slink.c @@ -1,24 +1,10 @@ /* * NVIDIA Tegra SPI-SLINK controller * - * Copyright (c) 2010-2013 NVIDIA Corporation + * Copyright (c) 2010-2013 + * NVIDIA Corporation <www.nvidia.com> * - * See file CREDITS for list of people who contributed to this - * project. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c index a82b056..5ac0184 100644 --- a/drivers/spi/xilinx_spi.c +++ b/drivers/spi/xilinx_spi.c @@ -9,7 +9,7 @@ * Copyright (c) 2010 Graeme Smecher <graeme.smecher(a)mail.mcgill.ca> * Copyright (c) 2012 Stephan Linz <linz(a)li-pro.net> * - * Licensed under the GPL-2 or later. + * SPDX-License-Identifier: GPL-2.0+ * * [0]: http://www.xilinx.com/support/documentation * diff --git a/drivers/spi/xilinx_spi.h b/drivers/spi/xilinx_spi.h index 69d0b94..ce7d82c 100644 --- a/drivers/spi/xilinx_spi.h +++ b/drivers/spi/xilinx_spi.h @@ -9,7 +9,7 @@ * Copyright (c) 2010 Graeme Smecher <graeme.smecher(a)mail.mcgill.ca> * Copyright (c) 2012 Stephan Linz <linz(a)li-pro.net> * - * Licensed under the GPL-2 or later. + * SPDX-License-Identifier: GPL-2.0+ * * [0]: http://www.xilinx.com/support/documentation * diff --git a/include/spi_flash.h b/include/spi_flash.h index 1ff5af4..b961213 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -4,12 +4,7 @@ * Copyright (C) 2008 Atmel Corporation * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _SPI_FLASH_H_ -- 1.8.3

2 1

[U-Boot] [PATCH 1/2] sf: Add GPL-2.0+ SPDX-License-Identifier for missing ones
by Jagannadha Sutradharudu Teki 10 Oct '13

10 Oct '13

Added GPL-2.0+ SPDX-License-Identifier for missed sf source files. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki(a)gmail.com> Signed-off-by: Bo Shen <voice.shen(a)atmel.com> --- common/cmd_sf.c | 3 ++- drivers/mtd/spi/sf.c | 2 +- drivers/mtd/spi/sf_internal.h | 2 +- drivers/mtd/spi/sf_ops.c | 2 +- drivers/mtd/spi/sf_probe.c | 2 +- 5 files changed, 6 insertions(+), 5 deletions(-) diff --git a/common/cmd_sf.c b/common/cmd_sf.c index 3f60979..3994b06 100644 --- a/common/cmd_sf.c +++ b/common/cmd_sf.c @@ -2,7 +2,8 @@ * Command for accessing SPI flash. * * Copyright (C) 2008 Atmel Corporation - * Licensed under the GPL-2 or later. + * + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/mtd/spi/sf.c b/drivers/mtd/spi/sf.c index ddbdda0..d5e175c 100644 --- a/drivers/mtd/spi/sf.c +++ b/drivers/mtd/spi/sf.c @@ -4,7 +4,7 @@ * Copyright (C) 2008 Atmel Corporation * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik * - * Licensed under the GPL-2 or later. + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index ad044ee..732ddf8 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -4,7 +4,7 @@ * Copyright (C) 2008 Atmel Corporation * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. * - * Licensed under the GPL-2 or later. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _SF_INTERNAL_H_ diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index dde6231..108665f 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -5,7 +5,7 @@ * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. * - * Licensed under the GPL-2 or later. + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 9bb5a5f..633a6eb 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -5,7 +5,7 @@ * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. * - * Licensed under the GPL-2 or later. + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> -- 1.8.3

1 0

[U-Boot] [PATCH 2/2] sf: Minor cleanups.
by Jagannadha Sutradharudu Teki 10 Oct '13

10 Oct '13

- Add comments. - Renamed few macros. - Add tabs. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- drivers/mtd/spi/sf_internal.h | 6 +++--- drivers/mtd/spi/sf_ops.c | 2 +- drivers/mtd/spi/sf_probe.c | 5 +++-- include/spi.h | 14 +++++++------- 4 files changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 12d02f9..ad044ee 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -7,8 +7,8 @@ * Licensed under the GPL-2 or later. */ -#ifndef _SPI_FLASH_INTERNAL_H_ -#define _SPI_FLASH_INTERNAL_H_ +#ifndef _SF_INTERNAL_H_ +#define _SF_INTERNAL_H_ #define SPI_FLASH_16MB_BOUN 0x1000000 @@ -139,4 +139,4 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, size_t len, void *data); -#endif /* _SPI_FLASH_INTERNAL_H_ */ +#endif /* _SF_INTERNAL_H_ */ diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 1003038..dde6231 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -292,7 +292,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, return ret; } #endif - remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset); + remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1)) - offset; if (len < remain_len) read_len = len; else diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 4251b1b..9bb5a5f 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR; * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) * @ext_jedec: Device ext_jedec ID * @sector_size: Sector size of this device - * @nr_sectors: No.of sectors on this device + * @nr_sectors: No.of sectors on this device * @flags: Importent param, for flash specific behaviour */ struct spi_flash_params { @@ -139,7 +139,7 @@ static const struct spi_flash_params spi_flash_params_table[] = { #endif /* * Note: - * Below paired flash devices has similar spi_flash_params params. + * Below paired flash devices has similar spi_flash params. * (S25FL129P_64K, S25FL128S_64K) * (W25Q80BL, W25Q80BV) * (W25Q16CL, W25Q16DV) @@ -188,6 +188,7 @@ static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi, } memset(flash, '\0', sizeof(*flash)); + /* Assign spi data */ flash->spi = spi; flash->name = params->name; flash->memory_map = spi->memory_map; diff --git a/include/spi.h b/include/spi.h index 5164d43..ad9248b 100644 --- a/include/spi.h +++ b/include/spi.h @@ -1,4 +1,6 @@ /* + * Common SPI Interface: Controller-specific definitions + * * (C) Copyright 2001 * Gerald Van Baren, Custom IDEAS, vanbaren(a)cideas.com. * @@ -8,8 +10,6 @@ #ifndef _SPI_H_ #define _SPI_H_ -/* Controller-specific definitions: */ - /* SPI mode flags */ #define SPI_CPHA 0x01 /* clock phase */ #define SPI_CPOL 0x02 /* clock polarity */ @@ -241,11 +241,11 @@ static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte) * This calls spi_setup_slave() with the correct bus number. Call * spi_free_slave() to free it later. * - * @param blob Device tree blob - * @param node SPI peripheral node to use - * @param cs Chip select to use - * @param max_hz Maximum SCK rate in Hz (0 for default) - * @param mode Clock polarity, clock phase and other parameters + * @param blob: Device tree blob + * @param node: SPI peripheral node to use + * @param cs: Chip select to use + * @param max_hz: Maximum SCK rate in Hz (0 for default) + * @param mode: Clock polarity, clock phase and other parameters * @return pointer to new spi_slave structure */ struct spi_slave *spi_setup_slave_fdt(const void *blob, int node, -- 1.8.3

1 0

[U-Boot] [PATCH 1/2] sf_ops: Unify bank_sel calculation code
by Jagannadha Sutradharudu Teki 10 Oct '13

10 Oct '13

Unified the bank_sel calculation code for erase and write ops. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- drivers/mtd/spi/sf_ops.c | 36 ++++++++++++++++++++---------------- 1 file changed, 20 insertions(+), 16 deletions(-) diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 2396e22..1003038 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -59,6 +59,22 @@ static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel) return 0; } + +static int spi_flash_bank(struct spi_flash *flash, u32 offset) +{ + u8 bank_sel; + int ret; + + bank_sel = offset / SPI_FLASH_16MB_BOUN; + + ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); + if (ret) { + debug("SF: fail to set bank%d\n", bank_sel); + return ret; + } + + return 0; +} #endif int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) @@ -162,15 +178,9 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) cmd[0] = flash->erase_cmd; while (len) { #ifdef CONFIG_SPI_FLASH_BAR - u8 bank_sel; - - bank_sel = offset / SPI_FLASH_16MB_BOUN; - - ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); - if (ret) { - debug("SF: fail to set bank%d\n", bank_sel); + ret = spi_flash_bank(flash, offset); + if (ret < 0) return ret; - } #endif spi_flash_addr(offset, cmd); @@ -203,15 +213,9 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, cmd[0] = CMD_PAGE_PROGRAM; for (actual = 0; actual < len; actual += chunk_len) { #ifdef CONFIG_SPI_FLASH_BAR - u8 bank_sel; - - bank_sel = offset / SPI_FLASH_16MB_BOUN; - - ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); - if (ret) { - debug("SF: fail to set bank%d\n", bank_sel); + ret = spi_flash_bank(flash, offset); + if (ret < 0) return ret; - } #endif byte_addr = offset % page_size; chunk_len = min(len - actual, page_size - byte_addr); -- 1.8.3

1 0

[U-Boot] [PATCH 1/2] buildman: don't fail --list-toolchains when toolchains fail
by Stephen Warren 10 Oct '13

10 Oct '13

From: Stephen Warren <swarren(a)nvidia.com> When a toolchain invocation fails, an exception is thrown but not caught which then aborts the entire toolchain detection process. To solve this, request that exceptions not be thrown, since the toolchain init code already error-checks the command result. This solves e.g.: - found '/usr/bin/winegcc' Traceback (most recent call last): ... Exception: Error running '/usr/bin/winegcc --version' Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- tools/buildman/toolchain.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py index a292338..7effb88 100644 --- a/tools/buildman/toolchain.py +++ b/tools/buildman/toolchain.py @@ -39,7 +39,7 @@ class Toolchain: # As a basic sanity check, run the C compiler with --version cmd = [fname, '--version'] if test: - result = command.RunPipe([cmd], capture=True, env=env) + result = command.RunPipe([cmd], capture=True, env=env, raise_on_error=False) self.ok = result.return_code == 0 if verbose: print 'Tool chain test: ', -- 1.8.1.5

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[U-Boot] [PATCH 00/10 V5] EXYNOS5420: Add SMDK5420 board support
by Rajeshwari S Shinde 10 Oct '13

10 Oct '13

This patch adds basic board support for SMDK5420 board. These patches are tested for booting fine on EVT1 SMDK5420. Changes in V2: - Corrected a compilation issue for SMDK5420. Changes in V3: - Add patch to support variable size SPL support - Add patch to disable SMU for eMMC. Changes in V4: - Added check for MAX77686 pmic compilation. - Added correct calculation of gpio based addresses. - Rebased on the latest u-boot code. - Removed patches for UART and TZPC changes as they were not needed. - Added flag to disable SMU for eMMC. Changes in V5: - Moved functions board_mmc_init and board_eth_init to common/board.c in case of device tree support. Rajeshwari S Shinde (10): EXYNOS5: Create a common board file Exynos5420: Add base addresses for 5420 Exynos5420: Add clock initialization for 5420 Exynos5420: Add DDR3 initialization for 5420 Exynos5420: Add support for 5420 in pinmux and gpio Exynos5420: Add base patch for SMDK5420 DTS: Add dts support for SMDK5420 Config: Add initial config for SMDK5420 SPL: EXYNOS: Prepare for variable size SPL support DWMMC: SMDK5420: Disable SMU for eMMC arch/arm/cpu/armv7/exynos/clock.c | 270 ++++++++- arch/arm/cpu/armv7/exynos/clock_init.h | 17 + arch/arm/cpu/armv7/exynos/clock_init_exynos5.c | 352 +++++++++++- arch/arm/cpu/armv7/exynos/dmc_common.c | 10 +- arch/arm/cpu/armv7/exynos/dmc_init_ddr3.c | 421 +++++++++++++- arch/arm/cpu/armv7/exynos/exynos5_setup.h | 740 +++++++++++++++++++------ arch/arm/cpu/armv7/exynos/pinmux.c | 245 +++++++- arch/arm/dts/exynos5.dtsi | 213 +++++++ arch/arm/dts/exynos5250.dtsi | 177 +----- arch/arm/dts/exynos5420.dtsi | 74 +++ arch/arm/include/asm/arch-exynos/board.h | 17 + arch/arm/include/asm/arch-exynos/clk.h | 1 + arch/arm/include/asm/arch-exynos/clock.h | 494 +++++++++++++++++ arch/arm/include/asm/arch-exynos/cpu.h | 52 +- arch/arm/include/asm/arch-exynos/dmc.h | 121 ++-- arch/arm/include/asm/arch-exynos/gpio.h | 143 ++++- arch/arm/include/asm/arch-exynos/periph.h | 3 + board/samsung/common/Makefile | 4 + board/samsung/common/board.c | 407 ++++++++++++++ board/samsung/dts/exynos5420-smdk5420.dts | 172 ++++++ board/samsung/smdk5250/exynos5-dt.c | 361 +----------- board/samsung/smdk5250/smdk5250.c | 182 +----- board/samsung/smdk5420/Makefile | 34 ++ board/samsung/smdk5420/smdk5420.c | 159 ++++++ board/samsung/smdk5420/smdk5420_spl.c | 52 ++ boards.cfg | 1 + drivers/mmc/dw_mmc.c | 10 + drivers/mmc/exynos_dw_mmc.c | 3 + include/configs/exynos5-dt.h | 302 ++++++++++ include/configs/exynos5250-dt.h | 317 +---------- include/configs/smdk5420.h | 56 ++ include/dwmmc.h | 15 + spl/Makefile | 7 +- tools/Makefile | 2 + tools/mkexynosspl.c | 167 ++++-- 35 files changed, 4272 insertions(+), 1329 deletions(-) create mode 100644 arch/arm/dts/exynos5.dtsi create mode 100644 arch/arm/dts/exynos5420.dtsi create mode 100644 arch/arm/include/asm/arch-exynos/board.h create mode 100644 board/samsung/common/board.c create mode 100644 board/samsung/dts/exynos5420-smdk5420.dts create mode 100644 board/samsung/smdk5420/Makefile create mode 100644 board/samsung/smdk5420/smdk5420.c create mode 100644 board/samsung/smdk5420/smdk5420_spl.c create mode 100644 include/configs/exynos5-dt.h create mode 100644 include/configs/smdk5420.h -- 1.7.12.4

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[U-Boot] [PATCH] ARM: mxs: Setup stack in JTAG mode
by Marek Vasut 10 Oct '13

10 Oct '13

In case the MX23/MX28 is switched into JTAG mode via the BootMode select switches, the BootROM bypasses the CPU core registers initialization. This in turn means that the Stack Pointer (SP) register is not set as it is in every other mode of operation, but instead is only zeroed out. To prevent U-Boot SPL from crashing in this obscure JTAG mode, configure the SP to point at the CONFIG_SYS_INIT_SP_ADDR if the SP is zeroed out. Note that in case the SP is already configured, we must preserve that exact SP value and must not modify it. This is important since in every other mode but the JTAG mode, the SPL returns into the BootROM and BootROM in turn loads U-Boot itself. If the SP were to be corrupted, the BootROM won't be able to continue it's operation after returned from SPL and the system would crash. Finally, add the JTAG mode switch identifier, so it's not recognised as Unknown mode. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)freescale.com> Cc: Otavio Salvador <otavio(a)ossystems.com.br> --- arch/arm/cpu/arm926ejs/mxs/start.S | 9 +++++++++ arch/arm/include/asm/arch-mxs/sys_proto.h | 2 ++ 2 files changed, 11 insertions(+) diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S index 3e454ae..5de2bad 100644 --- a/arch/arm/cpu/arm926ejs/mxs/start.S +++ b/arch/arm/cpu/arm926ejs/mxs/start.S @@ -150,6 +150,15 @@ IRQ_STACK_START_IN: _reset: /* + * If the CPU is configured in "Wait JTAG connection mode", the stack + * pointer is not configured and is zero. This will cause crash when + * trying to push data onto stack right below here. Load the SP and make + * it point to the end of OCRAM if the SP is zero. + */ + cmp sp, #0x00000000 + ldreq sp, =CONFIG_SYS_INIT_SP_ADDR + + /* * Store all registers on old stack pointer, this will allow us later to * return to the BootROM and let the BootROM load U-Boot into RAM. * diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h index 43c7dd6..09dfc90 100644 --- a/arch/arm/include/asm/arch-mxs/sys_proto.h +++ b/arch/arm/include/asm/arch-mxs/sys_proto.h @@ -46,6 +46,7 @@ static const struct mxs_pair mxs_boot_modes[] = { { 0x02, 0x1f, "SSP SPI #1, master, NOR" }, { 0x03, 0x1f, "SSP SPI #2, master, NOR" }, { 0x04, 0x1f, "NAND" }, + { 0x06, 0x1f, "JTAG" }, { 0x08, 0x1f, "SSP SPI #3, master, EEPROM" }, { 0x09, 0x1f, "SSP SD/MMC #0" }, { 0x0a, 0x1f, "SSP SD/MMC #1" }, @@ -60,6 +61,7 @@ static const struct mxs_pair mxs_boot_modes[] = { { 0x13, 0x1f, "SSP SPI #3, master, 1V8 NOR" }, { 0x04, 0x1f, "NAND, 3V3" }, { 0x14, 0x1f, "NAND, 1V8" }, + { 0x06, 0x1f, "JTAG" }, { 0x08, 0x1f, "SSP SPI #3, master, 3V3 EEPROM" }, { 0x18, 0x1f, "SSP SPI #3, master, 1V8 EEPROM" }, { 0x09, 0x1f, "SSP SD/MMC #0, 3V3" }, -- 1.8.4.rc3

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[U-Boot] [PATCH] ARM: mxs: Add PPC-AG BG0900 board
by Marek Vasut 10 Oct '13

10 Oct '13

This board supports FEC Ethernet, SPI NOR and NAND flash. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Christoph Baumann <c.baumann(a)ppc-ag.de> --- board/ppcag/bg0900/Makefile | 31 ++++++++++ board/ppcag/bg0900/bg0900.c | 86 ++++++++++++++++++++++++++ board/ppcag/bg0900/spl_boot.c | 140 ++++++++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/bg0900.h | 97 +++++++++++++++++++++++++++++ 5 files changed, 355 insertions(+) create mode 100644 board/ppcag/bg0900/Makefile create mode 100644 board/ppcag/bg0900/bg0900.c create mode 100644 board/ppcag/bg0900/spl_boot.c create mode 100644 include/configs/bg0900.h diff --git a/board/ppcag/bg0900/Makefile b/board/ppcag/bg0900/Makefile new file mode 100644 index 0000000..e17c0a5 --- /dev/null +++ b/board/ppcag/bg0900/Makefile @@ -0,0 +1,31 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +ifndef CONFIG_SPL_BUILD +COBJS := bg0900.o +else +COBJS := spl_boot.o +endif + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/ppcag/bg0900/bg0900.c b/board/ppcag/bg0900/bg0900.c new file mode 100644 index 0000000..14d84a4 --- /dev/null +++ b/board/ppcag/bg0900/bg0900.c @@ -0,0 +1,86 @@ +/* + * PPC-AG BG0900 board + * + * Copyright (C) 2013 Marek Vasut <marex(a)denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux-mx28.h> +#include <asm/arch/clock.h> +#include <asm/arch/sys_proto.h> +#include <linux/mii.h> +#include <miiphy.h> +#include <netdev.h> +#include <errno.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Functions + */ +int board_early_init_f(void) +{ + /* IO0 clock at 480MHz */ + mxs_set_ioclk(MXC_IOCLK0, 480000); + /* IO1 clock at 480MHz */ + mxs_set_ioclk(MXC_IOCLK1, 480000); + + /* SSP2 clock at 160MHz */ + mxs_set_sspclk(MXC_SSPCLK2, 160000, 0); + + return 0; +} + +int dram_init(void) +{ + return mxs_dram_init(); +} + +int board_init(void) +{ + /* Adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; + struct eth_device *dev; + int ret; + + ret = cpu_eth_init(bis); + + /* BG0900 uses ENET_CLK PAD to drive FEC clock */ + writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN, + &clkctrl_regs->hw_clkctrl_enet); + + /* Reset FEC PHYs */ + gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0); + udelay(200); + gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1); + + ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE); + if (ret) { + puts("FEC MXS: Unable to init FEC0\n"); + return ret; + } + + dev = eth_get_dev_by_name("FEC0"); + if (!dev) { + puts("FEC MXS: Unable to get FEC0 device entry\n"); + return -EINVAL; + } + + return ret; +} + +#endif diff --git a/board/ppcag/bg0900/spl_boot.c b/board/ppcag/bg0900/spl_boot.c new file mode 100644 index 0000000..2616e1f --- /dev/null +++ b/board/ppcag/bg0900/spl_boot.c @@ -0,0 +1,140 @@ +/* + * PPC-AG BG0900 Boot setup + * + * Copyright (C) 2013 Marek Vasut <marex(a)denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <config.h> +#include <asm/io.h> +#include <asm/arch/iomux-mx28.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> + +#define MUX_CONFIG_GPMI (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) +#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) +#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL) +#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) + +const iomux_cfg_t iomux_setup[] = { + /* DUART */ + MX28_PAD_PWM0__DUART_RX, + MX28_PAD_PWM1__DUART_TX, + + /* GPMI NAND */ + MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_RDN__GPMI_RDN | + (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP), + MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_GPMI, + MX28_PAD_GPMI_RESETN__GPMI_RESETN | MUX_CONFIG_GPMI, + + /* FEC0 */ + MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET, + MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET, + MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET, + MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET, + MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET, + MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET, + MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET, + MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET, + MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET, + + /* FEC0 Reset */ + MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), + + /* EMI */ + MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI, + MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI, + MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI, + + MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI, + MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI, + MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI, + MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI, + MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI, + MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI, + MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI, + MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI, + + /* SPI2 (for SPI flash) */ + MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2, + MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2, + MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2, + MX28_PAD_SSP2_SS0__SSP2_D3 | + (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP), +}; + +void mxs_adjust_memory_params(uint32_t *dram_vals) +{ + dram_vals[0x98 / 4] = 0x04005003; + dram_vals[0x9c / 4] = 0x090000c8; + + dram_vals[0xa8 / 4] = 0x0036b009; + dram_vals[0xac / 4] = 0x03270612; + + dram_vals[0xb0 / 4] = 0x02020202; + dram_vals[0xb4 / 4] = 0x00c80029; + + dram_vals[0xc0 / 4] = 0x00011900; + + dram_vals[0x12c / 4] = 0x07400300; + dram_vals[0x130 / 4] = 0x07400300; + dram_vals[0x2c4 / 4] = 0x02030303; +} + +void board_init_ll(const uint32_t arg, const uint32_t *resptr) +{ + mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup)); +} diff --git a/boards.cfg b/boards.cfg index 80846c9..2c3ea79 100644 --- a/boards.cfg +++ b/boards.cfg @@ -207,6 +207,7 @@ Active arm arm926ejs mxs freescale mx28evk Active arm arm926ejs mxs freescale mx28evk mx28evk_auart_console mx28evk:MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_MMC Fabio Estevam <fabio.estevam(a)freescale.com> Active arm arm926ejs mxs freescale mx28evk mx28evk_nand mx28evk:ENV_IS_IN_NAND Fabio Estevam <fabio.estevam(a)freescale.com> Active arm arm926ejs mxs olimex mx23_olinuxino mx23_olinuxino mx23_olinuxino Marek Vasut <marek.vasut(a)gmail.com> +Active arm arm926ejs mxs ppcag bg0900 bg0900 bg0900 Marek Vasut <marex(a)denx.de> Active arm arm926ejs mxs sandisk sansa_fuze_plus sansa_fuze_plus - Marek Vasut <marek.vasut(a)gmail.com> Active arm arm926ejs mxs schulercontrol sc_sps_1 sc_sps_1 - Marek Vasut <marek.vasut(a)gmail.com> Active arm arm926ejs nomadik st nhk8815 nhk8815 - Nomadik Linux Team <STN_WMM_nomadik_linux(a)list.st.com>:Alessandro Rubini <rubini(a)unipv.it> diff --git a/include/configs/bg0900.h b/include/configs/bg0900.h new file mode 100644 index 0000000..507d972 --- /dev/null +++ b/include/configs/bg0900.h @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2013 Marek Vasut <marex(a)denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIGS_BG0900_H__ +#define __CONFIGS_BG0900_H__ + +/* System configurations */ +#define CONFIG_MX28 /* i.MX28 SoC */ + +/* U-Boot Commands */ +#define CONFIG_SYS_NO_FLASH +#include <config_cmd_default.h> +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DOS_PARTITION + +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_GPIO +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS +#define CONFIG_CMD_NET +#define CONFIG_CMD_NFS +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_SETEXPR +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI + +/* Memory configuration */ +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x40000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +/* Environment */ +#define CONFIG_ENV_SIZE (16 * 1024) +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_IS_NOWHERE + +/* FEC Ethernet on SoC */ +#ifdef CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_NET_MULTI +#endif + +/* SPI */ +#ifdef CONFIG_CMD_SPI +#define CONFIG_DEFAULT_SPI_BUS 2 +#define CONFIG_DEFAULT_SPI_CS 0 +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 + +/* SPI FLASH */ +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SF_DEFAULT_BUS 2 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 40000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 + +#define CONFIG_ENV_SPI_BUS 2 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 40000000 +#define CONFIG_ENV_SPI_MODE SPI_MODE_0 +#endif + +#endif + +/* Boot Linux */ +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTARGS "console=ttyAMA0,115200" +#define CONFIG_BOOTCOMMAND "bootm" +#define CONFIG_LOADADDR 0x42000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* Extra Environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "update_spi_firmware_filename=u-boot.sb\0" \ + "update_spi_firmware_maxsz=0x80000\0" \ + "update_spi_firmware=" /* Update the SPI flash firmware */ \ + "if sf probe 2:0 ; then " \ + "if tftp ${update_spi_firmware_filename} ; then " \ + "sf erase 0x0 +${filesize} ; " \ + "sf write ${loadaddr} 0x0 ${filesize} ; " \ + "fi ; " \ + "fi\0" + +/* The rest of the configuration is shared */ +#include <configs/mxs.h> + +#endif /* __CONFIGS_BG0900_H__ */ -- 1.8.4.rc3

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