November 2012 - U-Boot

[U-Boot] [PATCH] nand: Extending the nand_ecclayout struct based on Linux 3.5
by Charles Hardin 16 Nov '12

16 Nov '12

NANDs with large page sizes are getting oob ares of 218 and 224 so the eccpos field needs to support these larger areas since BCH ECC correction with 24-bit over 1024 bytes will use 168 bytes of the oob for ECC and is required for current MLC NAND parts circa 2012. Signed-off-by: Charles Hardin <ckhardin(a)exablox.com> diff --git a/include/linux/mtd/mtd-abi.h b/include/linux/mtd/mtd-abi.h index 1e7a18f..c321d6b 100644 --- a/include/linux/mtd/mtd-abi.h +++ b/include/linux/mtd/mtd-abi.h @@ -116,16 +116,17 @@ struct nand_oobfree { uint32_t length; }; -#define MTD_MAX_OOBFREE_ENTRIES 8 +#define MTD_MAX_OOBFREE_ENTRIES_LARGE 32 +#define MTD_MAX_ECCPOS_ENTRIES_LARGE 448 /* * ECC layout control structure. Exported to userspace for * diagnosis and to allow creation of raw images */ struct nand_ecclayout { uint32_t eccbytes; - uint32_t eccpos[128]; + uint32_t eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE]; uint32_t oobavail; - struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES]; + struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE]; }; /**

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[U-Boot] [PATCH 1/2] ubi: Only read the actual size of the VID header
by Joe Hershberger 16 Nov '12

16 Nov '12

If sub-page reads are supported, this will save reading unneeded data Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- drivers/mtd/ubi/io.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c index 8423894..23660e3 100644 --- a/drivers/mtd/ubi/io.c +++ b/drivers/mtd/ubi/io.c @@ -916,7 +916,7 @@ int ubi_io_read_vid_hdr(struct ubi_device *ubi, int pnum, p = (char *)vid_hdr - ubi->vid_hdr_shift; err = ubi_io_read(ubi, p, pnum, ubi->vid_hdr_aloffset, - ubi->vid_hdr_alsize); + UBI_VID_HDR_SIZE); if (err) { if (err != UBI_IO_BITFLIPS && err != -EBADMSG) return err; -- 1.7.11.5

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[U-Boot] [PATCH] driver/mtd:IFC NAND:Initialise internal SRAM before any write
by Prabhakar Kushwaha 16 Nov '12

16 Nov '12

IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for SRAM i.e. "byte select" is not supported. Hence Read Modify Write is implemented in IFC for any "system side write" into sram buffer. Reading an uninitialized memory results in ECC Error from sram wrapper. Hence we must initialize/prefill SRAM buffer by any data before writing anything in SRAM from system side. To initialize SRAM user can use "READID" NAND command with read bytes equal to SRAM size. It will be a one time activity post boot Signed-off-by: Prabhakar Kushwaha <prabhakar(a)freescale.com> --- Based upon git://git.denx.de/u-boot.git (branch master) This patchs depends upon following patch http://patchwork.ozlabs.org/patch/178332/ drivers/mtd/nand/fsl_ifc_nand.c | 62 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 61 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index a518526..140fdc7 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -30,6 +30,7 @@ #include <asm/errno.h> #include <asm/fsl_ifc.h> +#define FSL_IFC_V1_1_0 0x01010000 #define MAX_BANKS 4 #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */ @@ -738,11 +739,66 @@ static void fsl_ifc_select_chip(struct mtd_info *mtd, int chip) { } +static void fsl_ifc_sram_init() +{ + struct fsl_ifc *ifc = ifc_ctrl->regs; + uint32_t cs = 0, csor = 0, csor_8k = 0, csor_ext = 0; + long long end_tick; + + cs = ifc_ctrl->cs_nand >> IFC_NAND_CSEL_SHIFT; + + /* Save CSOR and CSOR_ext */ + csor = in_be32(&ifc_ctrl->regs->csor_cs[cs].csor); + csor_ext = in_be32(&ifc_ctrl->regs->csor_cs[cs].csor_ext); + + /* chage PageSize 8K and SpareSize 1K*/ + csor_8k = (csor & ~(CSOR_NAND_PGS_MASK)) | 0x0018C000; + out_be32(&ifc_ctrl->regs->csor_cs[cs].csor, csor_8k); + out_be32(&ifc_ctrl->regs->csor_cs[cs].csor_ext, 0x0000400); + + /* READID */ + out_be32(&ifc->ifc_nand.nand_fir0, + (IFC_FIR_OP_CMD0 << IFC_NAND_FIR0_OP0_SHIFT) | + (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) | + (IFC_FIR_OP_RB << IFC_NAND_FIR0_OP2_SHIFT)); + out_be32(&ifc->ifc_nand.nand_fcr0, + NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT); + out_be32(&ifc->ifc_nand.row3, 0x0); + + out_be32(&ifc->ifc_nand.nand_fbcr, 0x0); + + /* Program ROW0/COL0 */ + out_be32(&ifc->ifc_nand.row0, 0x0); + out_be32(&ifc->ifc_nand.col0, 0x0); + + /* set the chip select for NAND Transaction */ + out_be32(&ifc->ifc_nand.nand_csel, ifc_ctrl->cs_nand); + + /* start read seq */ + out_be32(&ifc->ifc_nand.nandseq_strt, IFC_NAND_SEQ_STRT_FIR_STRT); + + /* wait for NAND Machine complete flag or timeout */ + end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks(); + + while (end_tick > get_ticks()) { + ifc_ctrl->status = in_be32(&ifc->ifc_nand.nand_evter_stat); + + if (ifc_ctrl->status & IFC_NAND_EVTER_STAT_OPC) + break; + } + + out_be32(&ifc->ifc_nand.nand_evter_stat, ifc_ctrl->status); + + /* Restore CSOR and CSOR_ext */ + out_be32(&ifc_ctrl->regs->csor_cs[cs].csor, csor); + out_be32(&ifc_ctrl->regs->csor_cs[cs].csor_ext, csor_ext); +} + int board_nand_init(struct nand_chip *nand) { struct fsl_ifc_mtd *priv; struct nand_ecclayout *layout; - uint32_t cspr = 0, csor = 0; + uint32_t cspr = 0, csor = 0, ver = 0; if (!ifc_ctrl) { fsl_ifc_ctrl_init(); @@ -860,5 +916,9 @@ int board_nand_init(struct nand_chip *nand) nand->ecc.mode = NAND_ECC_SOFT; } + ver = in_be32(&ifc_ctrl->regs->ifc_rev); + if (ver == FSL_IFC_V1_1_0) + fsl_ifc_sram_init(); + return 0; } -- 1.7.9.5

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[U-Boot] [PATCH] cosmetic: Reference nand monitor commands in U-Boot README
by Karl O. Pinc 15 Nov '12

15 Nov '12

Signed-off-by: Karl O. Pinc <kop(a)meme.com> --- README | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/README b/README index fb9d904..6bb5992 100644 --- a/README +++ b/README @@ -3725,6 +3725,7 @@ saveenv - save environment variables to persistent storage protect - enable or disable FLASH write protection erase - erase FLASH memory flinfo - print FLASH memory information +nand - NAND memory operations (see doc/README.nand) bdinfo - print Board Info structure iminfo - print header information for application image coninfo - print console devices and informations -- 1.7.2.5

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[U-Boot] [PATCH V2 1/4] Replace CONFIG_MMC_BOUNCE_BUFFER with CONFIG_BOUNCE_BUFFER in configs
by Stephen Warren 15 Nov '12

15 Nov '12

From: Stephen Warren <swarren(a)nvidia.com> Commits 6dc71c8 "MMC: MXS: Toggle the generic bounce buffer on the boards" and 49a627f "MMC: Remove the MMC bounce buffer" replaced CONFIG_MMC_BOUNCE_BUFFER with CONFIG_BOUNCE_BUFFER, but missed converting a few boards over to the new option. Fix this. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- v2: New patch. --- include/configs/mx6qarm2.h | 2 +- include/configs/mx6qsabre_common.h | 2 +- include/configs/mx6qsabrelite.h | 2 +- include/configs/sc_sps_1.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 23562a8..28a3deb 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -50,7 +50,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index bfb9cd4..a5c93d0 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -45,7 +45,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index b56d7ca..a28d5a5 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -72,7 +72,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h index f5dc393..cb99d58 100644 --- a/include/configs/sc_sps_1.h +++ b/include/configs/sc_sps_1.h @@ -140,7 +140,7 @@ #ifdef CONFIG_CMD_MMC #define CONFIG_APBH_DMA #define CONFIG_MMC -#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_BOUNCE_BUFFER #define CONFIG_GENERIC_MMC #define CONFIG_MXS_MMC #endif -- 1.7.0.4

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[U-Boot] ★ Rodolfo Romão te mandou uma mensagem.
by Badoo 15 Nov '12

15 Nov '12

Rodolfo Romão te mandou uma mensagem. Só você pode ver o conteúdo desta mensagem e quem a enviou. Você pode deletar a qualquer momento. Para responder basta clicar no link: http://us1.badoo.com/01133556825/in/76H5DfWwTsg/?lang_id=61&m=63&mid=50a550… Mais algumas pessoas na área que estão no Badoo Abelzinho (Brasília, Brasil) Liziany (Brasília, Brasil) Gersiana (Brasília, Brasil) http://us1.badoo.com/01133556825/in/76H5DfWwTsg/?lang_id=61&m=63&mid=50a550… Se os links desta mensagem não funcionaram, copie e cole-os na barra de endereços de seu navegador. E-mail enviado como parte do sistema de mensagens do Rodolfo Romão. Se recebeu este e-mail por engano, por favor, simplesmente ignore-o. Em breve a mensagem será removida do sistema. Divirta-se! A Equipe Badoo Este email foi enviado por Badoo Trading Limited (endereço postal abaixo). http://us1.badoo.com/impersonation.phtml?lang_id=61&email=u-boot%40lists.de… Badoo Trading Limited é uma empresa registrada na Inglaterra e País de Gales com CRN 7540255 e firma registrada em Media Village, 131 - 151 Great Titchfield Street, Londres, W1W 5BB.

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[U-Boot] [PATCH] Fix handling of some broken test expressions
by Domenico Andreoli 15 Nov '12

15 Nov '12

Observed incorrect bahavior (some debug traces are enabled): U-Boot# test = yes test(3): '=' 'yes': returns 0 U-Boot# test yes = test(3): 'yes' '=': returns 0 This means that any "if test" with such broken expressions (maybe due to an empty variable) in incorrectly evaluated as true. Signed-off-by: Domenico Andreoli <cavokz(a)gmail.com> --- common/cmd_test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cmd_test.c b/common/cmd_test.c index d4ec186..dedda30 100644 --- a/common/cmd_test.c +++ b/common/cmd_test.c @@ -64,7 +64,7 @@ static int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) adv = 3; if (left < adv) { - expr = 1; + expr = 0; break; } -- 1.7.10.4

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[U-Boot] [PATCH] usb: r8a6659: Fix build by missing of parenthesis
by Nobuhiro Iwamatsu 15 Nov '12

15 Nov '12

By commit c7e3b2b5, this was chanded to support multiple controllers. But this has missing of parenthesis. This commit fix it. ----- r8a66597-hcd.c: In function ‘usb_lowlevel_init’: r8a66597-hcd.c:911:52: error: expected declaration specifiers before ‘)’ token r8a66597-hcd.c:935:1: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or‘__attribute__’ before ‘{’ token r8a66597-hcd.c:939:1: error: expected ‘{’ at end of input ----- Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> CC: Lucas Stach <dev(a)lynxeye.de> --- drivers/usb/host/r8a66597-hcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index 2a4e7ff..aefcf66 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -908,7 +908,7 @@ int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, return 0; } -int usb_lowlevel_init(int index, void **controller)) +int usb_lowlevel_init(int index, void **controller) { struct r8a66597 *r8a66597 = &gr8a66597; -- 1.7.10.4

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[U-Boot] [PATCH 2/2] usb: r8a66597: Switched from variable to only macro
by Nobuhiro Iwamatsu 15 Nov '12

15 Nov '12

Some variables are initialized with a value defined by macro. This was changed to use the macro directly. And the variable not to use deleted it. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/usb/host/r8a66597-hcd.c | 15 +++++---------- 1 files changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index ab1b8d0..f5a7e30 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -31,9 +31,6 @@ #endif static const char hcd_name[] = "r8a66597_hcd"; -static unsigned short clock = CONFIG_R8A66597_XTAL; -static unsigned short vif = CONFIG_R8A66597_LDRV; -static unsigned short endian = CONFIG_R8A66597_ENDIAN; static struct r8a66597 gr8a66597; static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport) @@ -96,7 +93,7 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) } } while ((tmp & USBE) != USBE); r8a66597_bclr(r8a66597, USBE, SYSCFG0); - r8a66597_mdfy(r8a66597, clock, XTAL, SYSCFG0); + r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0); i = 0; r8a66597_bset(r8a66597, XCKE, SYSCFG0); @@ -162,7 +159,7 @@ static int enable_controller(struct r8a66597 *r8a66597) if (ret < 0) return ret; - r8a66597_bset(r8a66597, vif & LDRV, PINCFG); + r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG); r8a66597_bset(r8a66597, USBE, SYSCFG0); r8a66597_bset(r8a66597, INTL, SOFCFG); @@ -170,9 +167,9 @@ static int enable_controller(struct r8a66597 *r8a66597) r8a66597_write(r8a66597, 0, INTENB1); r8a66597_write(r8a66597, 0, INTENB2); - r8a66597_bset(r8a66597, endian & BIGEND, CFIFOSEL); - r8a66597_bset(r8a66597, endian & BIGEND, D0FIFOSEL); - r8a66597_bset(r8a66597, endian & BIGEND, D1FIFOSEL); + r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, CFIFOSEL); + r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D0FIFOSEL); + r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D1FIFOSEL); r8a66597_bset(r8a66597, TRNENSEL, SOFCFG); for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) @@ -673,7 +670,6 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe, int stat = 0; __u16 bmRType_bReq; __u16 wValue; - __u16 wIndex; __u16 wLength; unsigned char data[32]; @@ -686,7 +682,6 @@ static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe, bmRType_bReq = cmd->requesttype | (cmd->request << 8); wValue = cpu_to_le16 (cmd->value); - wIndex = cpu_to_le16 (cmd->index); wLength = cpu_to_le16 (cmd->length); switch (bmRType_bReq) { -- 1.7.9.1

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[U-Boot] U-Boot 2012.10 - pxa270 CPU Unknown / no turbo
by Andreas Puls 15 Nov '12

15 Nov '12

Hi together, i've got another problem with latest stable U-Boot-2012.10 and a Toradex Colibri PXA270 V2.4 Uboot dosen't regonized the CPU Revision u-boot summary screen: U-Boot 2012.10 (Nov 12 2012 - 14:22:12) CPU: Marvell PXA27x rev. Unknown first lines of dmesg: [ 0.000000] CPU: XScale-PXA270 [69054118] revision 8 (ARMv5TE), cr=0000397f [ 0.000000] CPU: VIVT data cache, VIVT instruction cache [ 0.000000] Machine: Toradex Colibri PXA270 [ 0.000000] Memory policy: ECC disabled, Data cache writeback [ 0.000000] Run Mode clock: 208.00MHz (*16) [ 0.000000] Turbo Mode clock: 520.00MHz (*2.5, inactive) [ 0.000000] Memory clock: 104.00MHz (/2) [ 0.000000] System bus clock: 104.00MHz $ cat /proc/cpuinfo Processor : XScale-PXA270 rev 8 (v5l) BogoMIPS : 207.66 Features : swp half thumb fastmult edsp iwmmxt CPU implementer : 0x69 CPU architecture: 5TE CPU variant : 0x0 CPU part : 0x411 CPU revision : 8 Hardware : Toradex Colibri PXA270 Revision : 0000 Serial : 0000000000000000 With an old uboot from a third party vendor its working fine and the boot time is about half with the latest stable u-boot. U-Boot 2010.06-dirty CPU speed: 520000kHz; RCSR 00000001 first lines of dmesg: [ 0.000000] CPU: XScale-PXA270 [69054118] revision 8 (ARMv5TE), cr=0000397f [ 0.000000] CPU: VIVT data cache, VIVT instruction cache [ 0.000000] Machine: Toradex Colibri PXA270 [ 0.000000] Memory policy: ECC disabled, Data cache writeback [ 0.000000] Run Mode clock: 208.00MHz (*16) [ 0.000000] Turbo Mode clock: 520.00MHz (*2.5, active) [ 0.000000] Memory clock: 208.00MHz (/2) [ 0.000000] System bus clock: 208.00MHz $ cat /proc/cpuinfo Processor : XScale-PXA270 rev 8 (v5l) BogoMIPS : 519.37 Features : swp half thumb fastmult edsp iwmmxt CPU implementer : 0x69 CPU architecture: 5TE CPU variant : 0x0 CPU part : 0x411 CPU revision : 8 Hardware : Toradex Colibri PXA270 Revision : 0000 Serial : 00003600602d1400 Uboot-2012.10 was compiled with stock files and no modification. Kind regards Andreas

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