August 2010 - U-Boot

[U-Boot] [PATCH 2/2] ARMV7: S5P: rename from s5pc1xx to s5p
by Minkyu Kang 19 Aug '10

19 Aug '10

Because of these are common files around s5p Socs, rename from s5pc1xx to s5p. And getting cpu_id is SoC specific, so move to SoC's header file. Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- arch/arm/cpu/armv7/s5p-common/cpu_info.c | 11 +++++------ arch/arm/cpu/armv7/s5p-common/timer.c | 16 ++++++++-------- arch/arm/cpu/armv7/s5pc1xx/clock.c | 2 +- arch/arm/include/asm/arch-s5pc1xx/clk.h | 2 +- arch/arm/include/asm/arch-s5pc1xx/cpu.h | 9 +++++++-- arch/arm/include/asm/arch-s5pc1xx/pwm.h | 8 ++++---- 6 files changed, 26 insertions(+), 22 deletions(-) diff --git a/arch/arm/cpu/armv7/s5p-common/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c index 454175c..9c2fcc6 100644 --- a/arch/arm/cpu/armv7/s5p-common/cpu_info.c +++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c @@ -25,15 +25,14 @@ #include <asm/arch/clk.h> /* Default is s5pc100 */ -unsigned int s5pc1xx_cpu_id = 0xC100; +unsigned int s5p_cpu_id = 0xC100; #ifdef CONFIG_ARCH_CPU_INIT int arch_cpu_init(void) { - s5pc1xx_cpu_id = readl(samsung_get_base_pro_id()); - s5pc1xx_cpu_id = 0xC000 | ((s5pc1xx_cpu_id & 0x00FFF000) >> 12); + s5p_set_cpu_id(readl(samsung_get_base_pro_id())); - s5pc1xx_clock_init(); + s5p_clock_init(); return 0; } @@ -41,7 +40,7 @@ int arch_cpu_init(void) u32 get_device_type(void) { - return s5pc1xx_cpu_id; + return s5p_cpu_id; } #ifdef CONFIG_DISPLAY_CPUINFO @@ -50,7 +49,7 @@ int print_cpuinfo(void) char buf[32]; printf("CPU:\tS5P%X@%sMHz\n", - s5pc1xx_cpu_id, strmhz(buf, get_arm_clk())); + s5p_cpu_id, strmhz(buf, get_arm_clk())); return 0; } diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 6487c0f..1f1c7ff 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -44,14 +44,14 @@ static unsigned long long timestamp; /* Monotonic incrementing timer */ static unsigned long lastdec; /* Last decremneter snapshot */ /* macro to read the 16 bit timer */ -static inline struct s5pc1xx_timer *s5pc1xx_get_base_timer(void) +static inline struct s5p_timer *s5p_get_base_timer(void) { - return (struct s5pc1xx_timer *)samsung_get_base_timer(); + return (struct s5p_timer *)samsung_get_base_timer(); } int timer_init(void) { - struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); + struct s5p_timer *const timer = s5p_get_base_timer(); u32 val; /* @@ -80,13 +80,13 @@ int timer_init(void) lastdec = count_value; val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) | - S5PC1XX_TCON4_AUTO_RELOAD; + TCON4_AUTO_RELOAD; /* auto reload & manual update */ - writel(val | S5PC1XX_TCON4_UPDATE, &timer->tcon); + writel(val | TCON4_UPDATE, &timer->tcon); /* start PWM timer 4 */ - writel(val | S5PC1XX_TCON4_START, &timer->tcon); + writel(val | TCON4_START, &timer->tcon); timestamp = 0; @@ -151,7 +151,7 @@ void __udelay(unsigned long usec) void reset_timer_masked(void) { - struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); + struct s5p_timer *const timer = s5p_get_base_timer(); /* reset time */ lastdec = readl(&timer->tcnto4); @@ -160,7 +160,7 @@ void reset_timer_masked(void) unsigned long get_timer_masked(void) { - struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); + struct s5p_timer *const timer = s5p_get_base_timer(); unsigned long now = readl(&timer->tcnto4); if (lastdec >= now) diff --git a/arch/arm/cpu/armv7/s5pc1xx/clock.c b/arch/arm/cpu/armv7/s5pc1xx/clock.c index 67af84a..c9b5485 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/clock.c +++ b/arch/arm/cpu/armv7/s5pc1xx/clock.c @@ -297,7 +297,7 @@ static unsigned long s5pc100_get_pclk(void) return get_pclkd1(); } -void s5pc1xx_clock_init(void) +void s5p_clock_init(void) { if (cpu_is_s5pc110()) { get_pll_clk = s5pc110_get_pll_clk; diff --git a/arch/arm/include/asm/arch-s5pc1xx/clk.h b/arch/arm/include/asm/arch-s5pc1xx/clk.h index 3e59abe..c25e17a 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/clk.h +++ b/arch/arm/include/asm/arch-s5pc1xx/clk.h @@ -29,7 +29,7 @@ #define HPLL 3 #define VPLL 4 -void s5pc1xx_clock_init(void); +void s5p_clock_init(void); extern unsigned long (*get_pll_clk)(int pllreg); extern unsigned long (*get_arm_clk)(void); diff --git a/arch/arm/include/asm/arch-s5pc1xx/cpu.h b/arch/arm/include/asm/arch-s5pc1xx/cpu.h index bcb8f5c..f0dac0f 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/cpu.h +++ b/arch/arm/include/asm/arch-s5pc1xx/cpu.h @@ -58,12 +58,17 @@ #ifndef __ASSEMBLY__ /* CPU detection macros */ -extern unsigned int s5pc1xx_cpu_id; +extern unsigned int s5p_cpu_id; + +static inline void s5p_set_cpu_id(unsigned int id) +{ + s5p_cpu_id = 0xC000 | ((id & 0x00FFF000) >> 12); +} #define IS_SAMSUNG_TYPE(type, id) \ static inline int cpu_is_##type(void) \ { \ - return s5pc1xx_cpu_id == id ? 1 : 0; \ + return s5p_cpu_id == id ? 1 : 0; \ } IS_SAMSUNG_TYPE(s5pc100, 0xc100) diff --git a/arch/arm/include/asm/arch-s5pc1xx/pwm.h b/arch/arm/include/asm/arch-s5pc1xx/pwm.h index 518f6ae..0369968 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/pwm.h +++ b/arch/arm/include/asm/arch-s5pc1xx/pwm.h @@ -23,14 +23,14 @@ #define __ASM_ARM_ARCH_PWM_H_ /* Interval mode(Auto Reload) of PWM Timer 4 */ -#define S5PC1XX_TCON4_AUTO_RELOAD (1 << 22) +#define TCON4_AUTO_RELOAD (1 << 22) /* Update TCNTB4 */ -#define S5PC1XX_TCON4_UPDATE (1 << 21) +#define TCON4_UPDATE (1 << 21) /* start bit of PWM Timer 4 */ -#define S5PC1XX_TCON4_START (1 << 20) +#define TCON4_START (1 << 20) #ifndef __ASSEMBLY__ -struct s5pc1xx_timer { +struct s5p_timer { unsigned int tcfg0; unsigned int tcfg1; unsigned int tcon; -- 1.7.0.4

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[U-Boot] [PATCH 1/2] ARMV7: S5P: make s5p-common for sharing the code between s5pc1xx and s5pc2xx
by Minkyu Kang 19 Aug '10

19 Aug '10

This patch adds basic support for s5pc210. s5p-common will be used by all of s5p SoCs. Signed-off-by: Minkyu Kang <mk7.kang(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> --- Makefile | 7 + arch/arm/cpu/armv7/s5p-common/Makefile | 46 +++++++ arch/arm/cpu/armv7/s5p-common/cpu_info.c | 57 +++++++++ arch/arm/cpu/armv7/s5p-common/timer.c | 192 ++++++++++++++++++++++++++++++ arch/arm/cpu/armv7/s5pc1xx/Makefile | 2 - arch/arm/cpu/armv7/s5pc1xx/cpu_info.c | 57 --------- arch/arm/cpu/armv7/s5pc1xx/timer.c | 192 ------------------------------ 7 files changed, 302 insertions(+), 251 deletions(-) create mode 100644 arch/arm/cpu/armv7/s5p-common/Makefile create mode 100644 arch/arm/cpu/armv7/s5p-common/cpu_info.c create mode 100644 arch/arm/cpu/armv7/s5p-common/timer.c delete mode 100644 arch/arm/cpu/armv7/s5pc1xx/cpu_info.c delete mode 100644 arch/arm/cpu/armv7/s5pc1xx/timer.c diff --git a/Makefile b/Makefile index 9cea069..47f4e7d 100644 --- a/Makefile +++ b/Makefile @@ -253,6 +253,13 @@ ifeq ($(SOC),omap4) LIBS += $(CPUDIR)/omap-common/libomap-common.a endif +ifeq ($(SOC),s5pc1xx) +LIBS += $(CPUDIR)/s5p-common/libs5p-common.a +endif +ifeq ($(SOC),s5pc2xx) +LIBS += $(CPUDIR)/s5p-common/libs5p-common.a +endif + LIBS := $(addprefix $(obj),$(LIBS)) .PHONY : $(LIBS) $(TIMESTAMP_FILE) $(VERSION_FILE) diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile new file mode 100644 index 0000000..37371f6 --- /dev/null +++ b/arch/arm/cpu/armv7/s5p-common/Makefile @@ -0,0 +1,46 @@ +# +# Copyright (C) 2009 Samsung Electronics +# Minkyu Kang <mk7.kang(a)samsung.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)libs5p-common.a + +COBJS-y += cpu_info.o +COBJS-y += timer.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/armv7/s5p-common/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c new file mode 100644 index 0000000..454175c --- /dev/null +++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2009 Samsung Electronics + * Minkyu Kang <mk7.kang(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <asm/io.h> +#include <asm/arch/clk.h> + +/* Default is s5pc100 */ +unsigned int s5pc1xx_cpu_id = 0xC100; + +#ifdef CONFIG_ARCH_CPU_INIT +int arch_cpu_init(void) +{ + s5pc1xx_cpu_id = readl(samsung_get_base_pro_id()); + s5pc1xx_cpu_id = 0xC000 | ((s5pc1xx_cpu_id & 0x00FFF000) >> 12); + + s5pc1xx_clock_init(); + + return 0; +} +#endif + +u32 get_device_type(void) +{ + return s5pc1xx_cpu_id; +} + +#ifdef CONFIG_DISPLAY_CPUINFO +int print_cpuinfo(void) +{ + char buf[32]; + + printf("CPU:\tS5P%X@%sMHz\n", + s5pc1xx_cpu_id, strmhz(buf, get_arm_clk())); + + return 0; +} +#endif diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c new file mode 100644 index 0000000..6487c0f --- /dev/null +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -0,0 +1,192 @@ +/* + * Copyright (C) 2009 Samsung Electronics + * Heungjun Kim <riverful.kim(a)samsung.com> + * Inki Dae <inki.dae(a)samsung.com> + * Minkyu Kang <mk7.kang(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/pwm.h> +#include <asm/arch/clk.h> + +#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */ +#define MUX_DIV_2 1 /* 1/2 period */ +#define MUX_DIV_4 2 /* 1/4 period */ +#define MUX_DIV_8 3 /* 1/8 period */ +#define MUX_DIV_16 4 /* 1/16 period */ +#define MUX4_DIV_SHIFT 16 + +#define TCON_TIMER4_SHIFT 20 + +static unsigned long count_value; + +/* Internal tick units */ +static unsigned long long timestamp; /* Monotonic incrementing timer */ +static unsigned long lastdec; /* Last decremneter snapshot */ + +/* macro to read the 16 bit timer */ +static inline struct s5pc1xx_timer *s5pc1xx_get_base_timer(void) +{ + return (struct s5pc1xx_timer *)samsung_get_base_timer(); +} + +int timer_init(void) +{ + struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); + u32 val; + + /* + * @ PWM Timer 4 + * Timer Freq(HZ) = + * PCLK / { (prescaler_value + 1) * (divider_value) } + */ + + /* set prescaler : 16 */ + /* set divider : 2 */ + writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0); + writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1); + + if (count_value == 0) { + /* reset initial value */ + /* count_value = 2085937.5(HZ) (per 1 sec)*/ + count_value = get_pclk() / ((PRESCALER_1 + 1) * + (MUX_DIV_2 + 1)); + + /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ + count_value = count_value / 100; + } + + /* set count value */ + writel(count_value, &timer->tcntb4); + lastdec = count_value; + + val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) | + S5PC1XX_TCON4_AUTO_RELOAD; + + /* auto reload & manual update */ + writel(val | S5PC1XX_TCON4_UPDATE, &timer->tcon); + + /* start PWM timer 4 */ + writel(val | S5PC1XX_TCON4_START, &timer->tcon); + + timestamp = 0; + + return 0; +} + +/* + * timer without interrupts + */ +void reset_timer(void) +{ + reset_timer_masked(); +} + +unsigned long get_timer(unsigned long base) +{ + return get_timer_masked() - base; +} + +void set_timer(unsigned long t) +{ + timestamp = t; +} + +/* delay x useconds */ +void __udelay(unsigned long usec) +{ + unsigned long tmo, tmp; + + if (usec >= 1000) { + /* + * if "big" number, spread normalization + * to seconds + * 1. start to normalize for usec to ticks per sec + * 2. find number of "ticks" to wait to achieve target + * 3. finish normalize. + */ + tmo = usec / 1000; + tmo *= (CONFIG_SYS_HZ * count_value / 10); + tmo /= 1000; + } else { + /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CONFIG_SYS_HZ * count_value / 10; + tmo /= (1000 * 1000); + } + + /* get current timestamp */ + tmp = get_timer(0); + + /* if setting this fordward will roll time stamp */ + /* reset "advancing" timestamp to 0, set lastdec value */ + /* else, set advancing stamp wake up time */ + if ((tmo + tmp + 1) < tmp) + reset_timer_masked(); + else + tmo += tmp; + + /* loop till event */ + while (get_timer_masked() < tmo) + ; /* nop */ +} + +void reset_timer_masked(void) +{ + struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); + + /* reset time */ + lastdec = readl(&timer->tcnto4); + timestamp = 0; +} + +unsigned long get_timer_masked(void) +{ + struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); + unsigned long now = readl(&timer->tcnto4); + + if (lastdec >= now) + timestamp += lastdec - now; + else + timestamp += lastdec + count_value - now; + + lastdec = now; + + return timestamp; +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +unsigned long get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} diff --git a/arch/arm/cpu/armv7/s5pc1xx/Makefile b/arch/arm/cpu/armv7/s5pc1xx/Makefile index 3785593..263945f 100644 --- a/arch/arm/cpu/armv7/s5pc1xx/Makefile +++ b/arch/arm/cpu/armv7/s5pc1xx/Makefile @@ -32,9 +32,7 @@ SOBJS = cache.o SOBJS += reset.o COBJS += clock.o -COBJS += cpu_info.o COBJS += sromc.o -COBJS += timer.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/arch/arm/cpu/armv7/s5pc1xx/cpu_info.c b/arch/arm/cpu/armv7/s5pc1xx/cpu_info.c deleted file mode 100644 index 454175c..0000000 --- a/arch/arm/cpu/armv7/s5pc1xx/cpu_info.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright (C) 2009 Samsung Electronics - * Minkyu Kang <mk7.kang(a)samsung.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#include <common.h> -#include <asm/io.h> -#include <asm/arch/clk.h> - -/* Default is s5pc100 */ -unsigned int s5pc1xx_cpu_id = 0xC100; - -#ifdef CONFIG_ARCH_CPU_INIT -int arch_cpu_init(void) -{ - s5pc1xx_cpu_id = readl(samsung_get_base_pro_id()); - s5pc1xx_cpu_id = 0xC000 | ((s5pc1xx_cpu_id & 0x00FFF000) >> 12); - - s5pc1xx_clock_init(); - - return 0; -} -#endif - -u32 get_device_type(void) -{ - return s5pc1xx_cpu_id; -} - -#ifdef CONFIG_DISPLAY_CPUINFO -int print_cpuinfo(void) -{ - char buf[32]; - - printf("CPU:\tS5P%X@%sMHz\n", - s5pc1xx_cpu_id, strmhz(buf, get_arm_clk())); - - return 0; -} -#endif diff --git a/arch/arm/cpu/armv7/s5pc1xx/timer.c b/arch/arm/cpu/armv7/s5pc1xx/timer.c deleted file mode 100644 index 6487c0f..0000000 --- a/arch/arm/cpu/armv7/s5pc1xx/timer.c +++ /dev/null @@ -1,192 +0,0 @@ -/* - * Copyright (C) 2009 Samsung Electronics - * Heungjun Kim <riverful.kim(a)samsung.com> - * Inki Dae <inki.dae(a)samsung.com> - * Minkyu Kang <mk7.kang(a)samsung.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/io.h> -#include <asm/arch/pwm.h> -#include <asm/arch/clk.h> - -#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */ -#define MUX_DIV_2 1 /* 1/2 period */ -#define MUX_DIV_4 2 /* 1/4 period */ -#define MUX_DIV_8 3 /* 1/8 period */ -#define MUX_DIV_16 4 /* 1/16 period */ -#define MUX4_DIV_SHIFT 16 - -#define TCON_TIMER4_SHIFT 20 - -static unsigned long count_value; - -/* Internal tick units */ -static unsigned long long timestamp; /* Monotonic incrementing timer */ -static unsigned long lastdec; /* Last decremneter snapshot */ - -/* macro to read the 16 bit timer */ -static inline struct s5pc1xx_timer *s5pc1xx_get_base_timer(void) -{ - return (struct s5pc1xx_timer *)samsung_get_base_timer(); -} - -int timer_init(void) -{ - struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); - u32 val; - - /* - * @ PWM Timer 4 - * Timer Freq(HZ) = - * PCLK / { (prescaler_value + 1) * (divider_value) } - */ - - /* set prescaler : 16 */ - /* set divider : 2 */ - writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0); - writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1); - - if (count_value == 0) { - /* reset initial value */ - /* count_value = 2085937.5(HZ) (per 1 sec)*/ - count_value = get_pclk() / ((PRESCALER_1 + 1) * - (MUX_DIV_2 + 1)); - - /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ - count_value = count_value / 100; - } - - /* set count value */ - writel(count_value, &timer->tcntb4); - lastdec = count_value; - - val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) | - S5PC1XX_TCON4_AUTO_RELOAD; - - /* auto reload & manual update */ - writel(val | S5PC1XX_TCON4_UPDATE, &timer->tcon); - - /* start PWM timer 4 */ - writel(val | S5PC1XX_TCON4_START, &timer->tcon); - - timestamp = 0; - - return 0; -} - -/* - * timer without interrupts - */ -void reset_timer(void) -{ - reset_timer_masked(); -} - -unsigned long get_timer(unsigned long base) -{ - return get_timer_masked() - base; -} - -void set_timer(unsigned long t) -{ - timestamp = t; -} - -/* delay x useconds */ -void __udelay(unsigned long usec) -{ - unsigned long tmo, tmp; - - if (usec >= 1000) { - /* - * if "big" number, spread normalization - * to seconds - * 1. start to normalize for usec to ticks per sec - * 2. find number of "ticks" to wait to achieve target - * 3. finish normalize. - */ - tmo = usec / 1000; - tmo *= (CONFIG_SYS_HZ * count_value / 10); - tmo /= 1000; - } else { - /* else small number, don't kill it prior to HZ multiply */ - tmo = usec * CONFIG_SYS_HZ * count_value / 10; - tmo /= (1000 * 1000); - } - - /* get current timestamp */ - tmp = get_timer(0); - - /* if setting this fordward will roll time stamp */ - /* reset "advancing" timestamp to 0, set lastdec value */ - /* else, set advancing stamp wake up time */ - if ((tmo + tmp + 1) < tmp) - reset_timer_masked(); - else - tmo += tmp; - - /* loop till event */ - while (get_timer_masked() < tmo) - ; /* nop */ -} - -void reset_timer_masked(void) -{ - struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); - - /* reset time */ - lastdec = readl(&timer->tcnto4); - timestamp = 0; -} - -unsigned long get_timer_masked(void) -{ - struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer(); - unsigned long now = readl(&timer->tcnto4); - - if (lastdec >= now) - timestamp += lastdec - now; - else - timestamp += lastdec + count_value - now; - - lastdec = now; - - return timestamp; -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* - * This function is derived from PowerPC code (timebase clock frequency). - * On ARM it returns the number of timer ticks per second. - */ -unsigned long get_tbclk(void) -{ - return CONFIG_SYS_HZ; -} -- 1.7.0.4

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[U-Boot] [PATCH 3/3] omap2: i2c: remove redundant header definitions
by Nishanth Menon 19 Aug '10

19 Aug '10

Remove the register offset and common defines which are already present in drivers/i2c/omap24xx.h. All of these defines carry the same value even. Cc: Steve Sakoman <steve(a)sakoman.com> Cc: Heiko <hs(a)denx.de> Cc: Sandeep Paulraj <s-paulraj(a)ti.com> Cc: Wolfang Denk <wd(a)denx.de> Signed-off-by: Nishanth Menon <nm(a)ti.com> --- arch/arm/include/asm/arch-omap24xx/i2c.h | 106 ------------------------------ 1 files changed, 0 insertions(+), 106 deletions(-) diff --git a/arch/arm/include/asm/arch-omap24xx/i2c.h b/arch/arm/include/asm/arch-omap24xx/i2c.h index 418a432..6f64519 100644 --- a/arch/arm/include/asm/arch-omap24xx/i2c.h +++ b/arch/arm/include/asm/arch-omap24xx/i2c.h @@ -65,110 +65,4 @@ struct i2c { #define I2C_BUS_MAX 2 -/* I2C masks */ - -/* I2C Interrupt Enable Register (I2C_IE): */ -#define I2C_IE_GC_IE (1 << 5) -#define I2C_IE_XRDY_IE (1 << 4) /* Transmit data ready interrupt enable */ -#define I2C_IE_RRDY_IE (1 << 3) /* Receive data ready interrupt enable */ -#define I2C_IE_ARDY_IE (1 << 2) /* Register access ready interrupt enable */ -#define I2C_IE_NACK_IE (1 << 1) /* No acknowledgment interrupt enable */ -#define I2C_IE_AL_IE (1 << 0) /* Arbitration lost interrupt enable */ - -/* I2C Status Register (I2C_STAT): */ - -#define I2C_STAT_SBD (1 << 15) /* Single byte data */ -#define I2C_STAT_BB (1 << 12) /* Bus busy */ -#define I2C_STAT_ROVR (1 << 11) /* Receive overrun */ -#define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */ -#define I2C_STAT_AAS (1 << 9) /* Address as slave */ -#define I2C_STAT_GC (1 << 5) -#define I2C_STAT_XRDY (1 << 4) /* Transmit data ready */ -#define I2C_STAT_RRDY (1 << 3) /* Receive data ready */ -#define I2C_STAT_ARDY (1 << 2) /* Register access ready */ -#define I2C_STAT_NACK (1 << 1) /* No acknowledgment interrupt enable */ -#define I2C_STAT_AL (1 << 0) /* Arbitration lost interrupt enable */ - - -/* I2C Interrupt Code Register (I2C_INTCODE): */ - -#define I2C_INTCODE_MASK 7 -#define I2C_INTCODE_NONE 0 -#define I2C_INTCODE_AL 1 /* Arbitration lost */ -#define I2C_INTCODE_NAK 2 /* No acknowledgement/general call */ -#define I2C_INTCODE_ARDY 3 /* Register access ready */ -#define I2C_INTCODE_RRDY 4 /* Rcv data ready */ -#define I2C_INTCODE_XRDY 5 /* Xmit data ready */ - -/* I2C Buffer Configuration Register (I2C_BUF): */ - -#define I2C_BUF_RDMA_EN (1 << 15) /* Receive DMA channel enable */ -#define I2C_BUF_XDMA_EN (1 << 7) /* Transmit DMA channel enable */ - -/* I2C Configuration Register (I2C_CON): */ - -#define I2C_CON_EN (1 << 15) /* I2C module enable */ -#define I2C_CON_BE (1 << 14) /* Big endian mode */ -#define I2C_CON_STB (1 << 11) /* Start byte mode (master mode only) */ -#define I2C_CON_MST (1 << 10) /* Master/slave mode */ -#define I2C_CON_TRX (1 << 9) /* Transmitter/receiver mode (master mode only) */ -#define I2C_CON_XA (1 << 8) /* Expand address */ -#define I2C_CON_STP (1 << 1) /* Stop condition (master mode only) */ -#define I2C_CON_STT (1 << 0) /* Start condition (master mode only) */ - -/* I2C System Test Register (I2C_SYSTEST): */ - -#define I2C_SYSTEST_ST_EN (1 << 15) /* System test enable */ -#define I2C_SYSTEST_FREE (1 << 14) /* Free running mode (on breakpoint) */ -#define I2C_SYSTEST_TMODE_MASK (3 << 12) /* Test mode select */ -#define I2C_SYSTEST_TMODE_SHIFT (12) /* Test mode select */ -#define I2C_SYSTEST_SCL_I (1 << 3) /* SCL line sense input value */ -#define I2C_SYSTEST_SCL_O (1 << 2) /* SCL line drive output value */ -#define I2C_SYSTEST_SDA_I (1 << 1) /* SDA line sense input value */ -#define I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive output value */ - -/* These values were copied from omap3, include/asm-arm/arch-omap3/i2c.h. */ -#define OMAP_I2C_STANDARD 100000 -#define OMAP_I2C_FAST_MODE 400000 -#define OMAP_I2C_HIGH_SPEED 3400000 - -#define SYSTEM_CLOCK_12 12000000 -#define SYSTEM_CLOCK_13 13000000 -#define SYSTEM_CLOCK_192 19200000 -#define SYSTEM_CLOCK_96 96000000 - -#ifndef I2C_IP_CLK -#define I2C_IP_CLK SYSTEM_CLOCK_96 -#endif - -#ifndef I2C_INTERNAL_SAMPLING_CLK -#define I2C_INTERNAL_SAMPLING_CLK 19200000 -#endif - -/* These are the trim values for standard and fast speed */ -#ifndef I2C_FASTSPEED_SCLL_TRIM -#define I2C_FASTSPEED_SCLL_TRIM 6 -#endif -#ifndef I2C_FASTSPEED_SCLH_TRIM -#define I2C_FASTSPEED_SCLH_TRIM 6 -#endif - -/* These are the trim values for high speed */ -#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM -#define I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM -#endif -#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM -#define I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM -#endif -#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM -#define I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM -#endif -#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM -#define I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM -#endif - -#define I2C_PSC_MAX 0x0f -#define I2C_PSC_MIN 0x00 - - #endif -- 1.6.3.3

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[U-Boot] [PATCH 1/3] i2c: omap2+: change header guard to be generic
by Nishanth Menon 19 Aug '10

19 Aug '10

Make the header guard to be generic to stop conflicting with omap2 i2c header file arch/arm/include/asm/arch-omap24xx/i2c.h Cc: Steve Sakoman <steve(a)sakoman.com> Cc: Heiko <hs(a)denx.de> Cc: Sandeep Paulraj <s-paulraj(a)ti.com> Cc: Wolfang Denk <wd(a)denx.de> Signed-off-by: Nishanth Menon <nm(a)ti.com> --- drivers/i2c/omap24xx_i2c.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/omap24xx_i2c.h b/drivers/i2c/omap24xx_i2c.h index 650e33a..1f38c23 100644 --- a/drivers/i2c/omap24xx_i2c.h +++ b/drivers/i2c/omap24xx_i2c.h @@ -20,8 +20,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -#ifndef _OMAP24XX_I2C_H_ -#define _OMAP24XX_I2C_H_ +#ifndef _OMAP2PLUS_I2C_H_ +#define _OMAP2PLUS_I2C_H_ /* I2C masks */ -- 1.6.3.3

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[U-Boot] [PATCH 2/3] omap2: i2c: add syss offset
by Nishanth Menon 19 Aug '10

19 Aug '10

OMAP2420 ES2.3 trm defines syss register offset as 0x10. Add it. Cc: Steve Sakoman <steve(a)sakoman.com> Cc: Heiko <hs(a)denx.de> Cc: Sandeep Paulraj <s-paulraj(a)ti.com> Cc: Wolfang Denk <wd(a)denx.de> Signed-off-by: Nishanth Menon <nm(a)ti.com> --- arch/arm/include/asm/arch-omap24xx/i2c.h | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-omap24xx/i2c.h b/arch/arm/include/asm/arch-omap24xx/i2c.h index 19046aa..418a432 100644 --- a/arch/arm/include/asm/arch-omap24xx/i2c.h +++ b/arch/arm/include/asm/arch-omap24xx/i2c.h @@ -36,7 +36,9 @@ struct i2c { unsigned short stat; /* 0x08 */ unsigned short res3; unsigned short iv; /* 0x0C */ - unsigned short res4[3]; + unsigned short res4; + unsigned short syss; /* 0x10 */ + unsigned short res4p1; unsigned short buf; /* 0x14 */ unsigned short res5; unsigned short cnt; /* 0x18 */ -- 1.6.3.3

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[U-Boot] [PATCH] arch/arm/include/asm/arch-orion5x/cpu.h: fix incorrect comment
by Wolfgang Denk 19 Aug '10

19 Aug '10

The typo caused build issues like these: Configuring for edminiv2 board... In file included from /work/wd/tmp-arm/include2/asm/arch/orion5x.h:39, from cpu.c:32: /work/wd/tmp-arm/include2/asm/arch/cpu.h:79:1: warning: "/*" within comment In file included from /work/wd/tmp-arm/include2/asm/arch/orion5x.h:39, from dram.c:30: /work/wd/tmp-arm/include2/asm/arch/cpu.h:79:1: warning: "/*" within comment In file included from /work/wd/tmp-arm/include2/asm/arch/orion5x.h:39, from timer.c:28: /work/wd/tmp-arm/include2/asm/arch/cpu.h:79:1: warning: "/*" within comment In file included from /work/wd/tmp-arm/include2/asm/arch/orion5x.h:39, from mvsata_ide.c:29: /work/wd/tmp-arm/include2/asm/arch/cpu.h:79:1: warning: "/*" within comment In file included from /work/wd/tmp-arm/include2/asm/arch/orion5x.h:39, from mvgbe.c:42: /work/wd/tmp-arm/include2/asm/arch/cpu.h:79:1: warning: "/*" within comment In file included from /work/wd/tmp-arm/include2/asm/arch/orion5x.h:39, from serial.c:34: /work/wd/tmp-arm/include2/asm/arch/cpu.h:79:1: warning: "/*" within comment In file included from /work/wd/tmp-arm/include2/asm/arch/orion5x.h:39, from cmd_ide.c:50: /work/wd/tmp-arm/include2/asm/arch/cpu.h:79:1: warning: "/*" within comment In file included from /work/wd/tmp-arm/include2/asm/arch/orion5x.h:39, from edminiv2.c:29: /work/wd/tmp-arm/include2/asm/arch/cpu.h:79:1: warning: "/*" within comment Signed-off-by: Wolfgang Denk <wd(a)denx.de> --- arch/arm/include/asm/arch-orion5x/cpu.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-orion5x/cpu.h b/arch/arm/include/asm/arch-orion5x/cpu.h index 80717f8..6ce02a9 100644 --- a/arch/arm/include/asm/arch-orion5x/cpu.h +++ b/arch/arm/include/asm/arch-orion5x/cpu.h @@ -76,7 +76,7 @@ enum orion5x_cpu_attrib { /* * Device Address MAP BAR values -/* + * * All addresses and sizes not defined by board code * will be given default values here. */ -- 1.7.2.1

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[U-Boot] Commit d708395d breaks omap2420h4 board...
by Wolfgang Denk 19 Aug '10

19 Aug '10

Dear Steve, your commit d708395d "ARMV7: Modify i2c driver for more reliable operation on OMAP4" breaks building of the omap2420h4 board: omap24xx_i2c.c: In function 'i2c_init': omap24xx_i2c.c:117: error: 'struct i2c' has no member named 'syss' omap24xx_i2c.c:117: error: 'I2C_SYSS_RDONE' undeclared (first use in this function) omap24xx_i2c.c:117: error: (Each undeclared identifier is reported only once omap24xx_i2c.c:117: error: for each function it appears in.) make[1]: *** [/work/wd/tmp-arm/drivers/i2c/omap24xx_i2c.o] Error 1 Please fix. Thanks in advance. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Children are natural mimics who act like their parents despite every effort to teach them good manners.

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[U-Boot] Italienische Geselschaft sucht sichere Partner.
by wel014＠theia.denx.de 18 Aug '10

18 Aug '10

Hallo! Leider, konnte ich nicht bei Ihnen ich melden, weil ich ihre E-Mail-Adresse nicht finden konnte. Ich habe eine gute Nachricht fur Sie. Wir haben einen geeigneten Job in Deutschland fur Sie qusgesucht. Das ist ein Arbeit nach freier Zeitplan. Mindestlohn ist Euro 2.000. Ingesamt 3 bis 4 Bewerder in Deutschland gesucht. Weisen sie bitte jemanden von Ihre Freunden an, die die ernstes Geschaft machen wollen oder suchen nach zusatzlichen Einkommen. Das ist eine Arbeit in der Inmobilienzweig. Wir haben di Stelle analysiert and mochten Ihnen diese Stelle hinweisen, wenn Sie noch diese Arbeit brauchen. Der Arbeitgeber bietet ein sehr breites Richtungensbereich der Zusammenarbeit mit guten Perspektive fur Ihre Laufbahn. Wenn Sie wirklich sind eine smarte und kontaktfreudige Person, wie vorhin eingegeben wurde. Kauf / Verkauf von Luxusimmobilien und -gutern, Kauf / Verkauf von Immobilien in allen Erholungsorten der europaischer Lander, Handel mit beliebigen Gebrauchtwaren, Miete / Verkauf / Kauf von Gewerbeflachen in entwickelten Landern Europas, Ausgestaltung aller Grundstucks- und Vermogensgeschafte, Investitionen in Geschaftsprojekte. Das sind die Richtungen, in denen Sie sich betatigen, Kunden und gunstige Angebote suchen konnen. Wir haben ebenfalls dieses Unternehmen gepruft. Diese Firma hat gekannte Ruf in ganz Europa. Ihre Antwort wird erwartet. Wenn Sie interessiert sind. Schreiben Sie an die Adresse Sabbatini.Paola(a)Go.Dores.com Mitarbeiter der Kompanie "Europe Real Estate" kontaktieren Sie per E-mail und erzahlen uber die Details der Zusammenarbeit. Mit freundlichen Gruben,

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Re: [U-Boot] which protocol do I use to send S-record files when using the loads command ?
by Wolfgang Denk 18 Aug '10

18 Aug '10

Dear Jef, In message <226BC4AFA29FC24789DFD00DFF3084C2524247EE08(a)SAFEMAIL.safetran.railad.com> you wrote: > > Why did you not follow the description in the Manual? > > Did you mean: > http://www.denx.de/wiki/view/DULG/SystemSetup Yes. > I can't get Kermit for Windows to work with U-boot. Why not? Kermit works basicly everywhere. I've been using in since CPM times on virtually every platform I worked on (admitted, this does not include Windows). > TerraTerm and HyperTerminal work great for everything (binary transfers with loadb) > but just not for loads. I have no idea if they allow configuration of inter-character and/or inter-line delays; if they do, you can try to tweak these. > cu is not an option for us. Our customers use Windows. INstall an OS then. Install Linux. If needed under coLinux, or in a virtual machine. > In Terraterm, there is an option to set a delay for every character. > The least I seem to be able to do is 1ms/char, which makes it really slow, but it runs (it is running now, but it takes forever). Actually you need the delay mostly after the newline character, when U-Boot is programming the tranferred data to flash. > Has anyone ever successfully been able to use these tools for loads, that you know ? Sorry, I never use windows, and most people in my envrionment don't use it either. > -----Original Message----- > From: Wolfgang Denk [mailto:wd@denx.de] > Sent: Wednesday, August 18, 2010 10:32 AM > To: Mangelschots, Jef > Cc: u-boot(a)lists.denx.de No need for a full-quote here. Please don't. ... > Any files attached to this e-mail will have been checked with virus detecti> ... And *please* STOP attaching these stupid trailers. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de Always try to do things in chronological order; it's less confusing that way.

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[U-Boot] Please pull u-boot-cfi-flash/master (update)
by Stefan Roese 18 Aug '10

18 Aug '10

The following changes since commit 962ad59e25640e586e2bceabf67a628a27f8f508: env_nand: return error when no device is found (2010-08-13 13:32:42 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-cfi-flash.git master Kim Phillips (1): cfi_flash: flinfo: allow user interrupt in flash print info fn Philippe De Muyter (2): Fix printing & reading of 16-bit CFI device identifiers Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips. Stefan Roese (1): cfi_flash: Cleanup flash_print_info() drivers/mtd/cfi_flash.c | 95 +++++++++++++++++++++++++++++----------------- 1 files changed, 60 insertions(+), 35 deletions(-)

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