August 2009 - U-Boot

[U-Boot] mpc8315 DDR2 controller
by Marcos Cunha 31 Aug '09

31 Aug '09

Dears, I am using u-boot 1.2.0 for mpc8315e processor with BDI2000 debugger in a new design based on MPC8315ERDB. Our board has a different DDR2 and Flash memory. The flash memory works fine. The problem could be DDR2. We are using Samsung K4T1G164QE DDR2 Memory. I can read/write DDR2 memory with BDI2000, but I have problems when u-boot try to write the first information in DDR2 memory (lib_ppc/board.c line 493 => *s-- = 0). After that, the program does not work. There is a breakpoint in this line. After the breakpoint accours, I do a step command and I receive this message from gdb: Program received signal SIGSTOP, Stopped (signal). 0x00001200 in ?? () It could be a problem with DDR2 configuration registers? Thanks in advance, Marcos Cunha Electrical Enginner Instituto Atlântico www.atlantico.com.br

2 2

[U-Boot] Intel IQ31244
by Uladzislau Rezki 31 Aug '09

31 Aug '09

Hello list, I have Intel IQ31244 board that is based on XScale-IOP8032x Family processor. I want to use u-boot as embedded loader but it seems to me that this board is not supported by u-boot. So, my questions are: Is it possible to build u-boot for my device ? Has anyone had any experience with such device ? Thanks. -- Uladzislau Rezki

2 3

[U-Boot] [[PATCH]] add Matrix Vision specific dir for common code.
by Andre Schwarz 31 Aug '09

31 Aug '09

--- board/matrix_vision/common/Makefile | 54 ++++++++++++++ board/matrix_vision/common/mv_common.c | 125 ++++++++++++++++++++++++++++++++ board/matrix_vision/common/mv_common.h | 25 +++++++ 3 files changed, 204 insertions(+), 0 deletions(-) create mode 100644 board/matrix_vision/common/Makefile create mode 100644 board/matrix_vision/common/mv_common.c create mode 100644 board/matrix_vision/common/mv_common.h diff --git a/board/matrix_vision/common/Makefile b/board/matrix_vision/common/Makefile new file mode 100644 index 0000000..b496258 --- /dev/null +++ b/board/matrix_vision/common/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)board/$(VENDOR)/common) +endif + +LIB = $(obj)lib$(VENDOR).a + +COBJS-y = mv_common.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/matrix_vision/common/mv_common.c b/board/matrix_vision/common/mv_common.c new file mode 100644 index 0000000..284de16 --- /dev/null +++ b/board/matrix_vision/common/mv_common.c @@ -0,0 +1,125 @@ +/* + * (C) Copyright 2008 + * Andre Schwarz, Matrix Vision GmbH, andre.schwarz(a)matrix-vision.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <environment.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +static char* entries_to_keep[] = { + "serial#", "ethaddr", "eth1addr", "model_info", "sensor_cnt", + "fpgadatasize", "ddr_size", "use_dhcp", "use_static_ipaddr", + "static_ipaddr", "static_netmask", "static_gateway", + "syslog", "watchdog", "netboot", "evo8serialnumber" }; + +#define MV_MAX_ENV_ENTRY_LENGTH 64 +#define MV_KEEP_ENTRIES ARRAY_SIZE(entries_to_keep) + +void mv_reset_environment(void) +{ + int i; + char *s[MV_KEEP_ENTRIES]; + char entries[MV_KEEP_ENTRIES][MV_MAX_ENV_ENTRY_LENGTH]; + + printf("\n*** RESET ENVIRONMENT ***\n"); + + memset(entries, 0, MV_KEEP_ENTRIES * MV_MAX_ENV_ENTRY_LENGTH); + for (i = 0; i < MV_KEEP_ENTRIES; i++) { + s[i] = getenv(entries_to_keep[i]); + if (s[i]) { + printf("save '%s' : %s\n", entries_to_keep[i], s[i]); + strncpy(entries[i], s[i], MV_MAX_ENV_ENTRY_LENGTH); + } + } + + gd->env_valid = 0; + env_relocate(); + + for (i = 0; i < MV_KEEP_ENTRIES; i++) { + if (s[i]) { + printf("restore '%s' : %s\n", entries_to_keep[i], s[i]); + setenv(entries_to_keep[i], s[i]); + } + } + + saveenv(); +} + +int mv_load_fpga(void) +{ + int result; + size_t data_size = 0; + void *fpga_data = NULL; + char *datastr = getenv("fpgadata"); + char *sizestr = getenv("fpgadatasize"); + + if (getenv("skip_fpga")) { + printf("found 'skip_fpga' -> FPGA _not_ loaded !\n"); + return -1; + } + printf("loading FPGA\n"); + + if (datastr) + fpga_data = (void *)simple_strtoul(datastr, NULL, 16); + if (sizestr) + data_size = (size_t)simple_strtoul(sizestr, NULL, 16); + if (!data_size) { + printf("fpgadatasize invalid -> FPGA _not_ loaded !\n"); + return -1; + } + + result = fpga_load(0, fpga_data, data_size); + if (!result) + show_boot_progress(0); + + return result; +} + +u8 *dhcp_vendorex_prep(u8 *e) +{ + char *ptr; + + /* DHCP vendor-class-identifier = 60 */ + if ((ptr = getenv("dhcp_vendor-class-identifier"))) { + *e++ = 60; + *e++ = strlen(ptr); + while (*ptr) + *e++ = *ptr++; + } + /* DHCP_CLIENT_IDENTIFIER = 61 */ + if ((ptr = getenv("dhcp_client_id"))) { + *e++ = 61; + *e++ = strlen(ptr); + while (*ptr) + *e++ = *ptr++; + } + + return e; +} + +u8 *dhcp_vendorex_proc(u8 *popt) +{ + return NULL; +} diff --git a/board/matrix_vision/common/mv_common.h b/board/matrix_vision/common/mv_common.h new file mode 100644 index 0000000..046c038 --- /dev/null +++ b/board/matrix_vision/common/mv_common.h @@ -0,0 +1,25 @@ +/* + * Copyright 2008 Matrix Vision GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +extern int mv_load_fpga(void); +extern void mv_reset_environment(void); -- 1.6.0.4 MATRIX VISION GmbH, Talstrasse 16, DE-71570 Oppenweiler Registergericht: Amtsgericht Stuttgart, HRB 271090 Geschaeftsfuehrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner, Hans-Joachim Reich

2 1

[U-Boot] [GIT PULL] AVR32: NGW100 fix for 2009.08
by Haavard Skinnemoen 31 Aug '09

31 Aug '09

Hi Wolfgang, Please pull git://git.denx.de/u-boot-avr32.git master to receive the following fix for a fairly longstanding and annoying ATNGW100 bug. Haavard Skinnemoen (1): atngw100: Use virtual address in CONFIG_ENV_ADDR include/configs/atngw100.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

3 5

[U-Boot] [PATCH v6] use common code for Matrix Vision boards
by André Schwarz 31 Aug '09

31 Aug '09

clean up existing boards (mvBC-P/MPC5200 and mvBL-M7/MPC8343) by using common code. Signed-off-by: André Schwarz <andre.schwarz(a)matrix-vision.de> --- Wolfgang, hopefully this is the last try - I'm close to nervous breakdown. Applying the changes takes longer than actually doing them. Of course this is due to me, I know. Thanks for your patience, André board/matrix_vision/mvbc_p/mvbc_p.c | 97 +++++--------------------- board/matrix_vision/mvbc_p/mvbc_p.h | 2 +- board/matrix_vision/mvbc_p/mvbc_p_autoscript | 10 ++- board/matrix_vision/mvblm7/mvblm7.c | 54 ++++++-------- board/matrix_vision/mvblm7/mvblm7.h | 3 +- board/matrix_vision/mvblm7/pci.c | 35 ++-------- include/configs/MVBC_P.h | 2 +- include/configs/MVBLM7.h | 49 +++++-------- 8 files changed, 77 insertions(+), 175 deletions(-) diff --git a/board/matrix_vision/mvbc_p/mvbc_p.c b/board/matrix_vision/mvbc_p/mvbc_p.c index a300342..0cbe900 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p.c +++ b/board/matrix_vision/mvbc_p/mvbc_p.c @@ -39,6 +39,7 @@ #include <asm/io.h> #include "fpga.h" #include "mvbc_p.h" +#include "../common/mv_common.h" #define SDRAM_MODE 0x00CD0000 #define SDRAM_CONTROL 0x504F0000 @@ -134,23 +135,6 @@ void mvbc_init_gpio(void) printf("sint_gpioe : 0x%08x\n", gpio->sint_gpioe); } -void reset_environment(void) -{ - char *s, sernr[64]; - - printf("\n*** RESET ENVIRONMENT ***\n"); - memset(sernr, 0, sizeof(sernr)); - s = getenv("serial#"); - if (s) { - printf("found serial# : %s\n", s); - strncpy(sernr, s, 64); - } - gd->env_valid = 0; - env_relocate(); - if (s) - setenv("serial#", sernr); -} - int misc_init_r(void) { char *s = getenv("reset_env"); @@ -166,7 +150,7 @@ int misc_init_r(void) return 0; } printf(" === FACTORY RESET ===\n"); - reset_environment(); + mv_reset_environment(); saveenv(); return -1; @@ -206,19 +190,28 @@ void flash_afterinit(ulong size) void pci_mvbc_fixup_irq(struct pci_controller *hose, pci_dev_t dev) { unsigned char line = 0xff; + char *s = getenv("pci_latency"); u32 base; + u8 val = 0; + + if (s) + val = simple_strtoul(s, NULL, 16); if (PCI_BUS(dev) == 0) { switch (PCI_DEV (dev)) { case 0xa: /* FPGA */ line = 3; pci_hose_read_config_dword(hose, dev, PCI_BASE_ADDRESS_0, &base); - printf("found FPA - enable arbitration\n"); + printf("found FPGA - enable arbitration\n"); writel(0x03, (u32*)(base + 0x80c0)); writel(0xf0, (u32*)(base + 0x8080)); + if (val) + pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, val); break; case 0xb: /* LAN */ line = 2; + if (val) + pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, val); break; case 0x1a: break; @@ -234,85 +227,31 @@ struct pci_controller hose = { fixup_irq:pci_mvbc_fixup_irq }; -int mvbc_p_load_fpga(void) -{ - size_t data_size = 0; - void *fpga_data = NULL; - char *datastr = getenv("fpgadata"); - char *sizestr = getenv("fpgadatasize"); - - if (datastr) - fpga_data = (void *)simple_strtoul(datastr, NULL, 16); - if (sizestr) - data_size = (size_t)simple_strtoul(sizestr, NULL, 16); - - return fpga_load(0, fpga_data, data_size); -} - extern void pci_mpc5xxx_init(struct pci_controller *); void pci_init_board(void) { - char *s; - int load_fpga = 1; - mvbc_p_init_fpga(); - s = getenv("skip_fpga"); - if (s) { - printf("found 'skip_fpga' -> FPGA _not_ loaded !\n"); - load_fpga = 0; - } - if (load_fpga) { - printf("loading FPGA ... "); - mvbc_p_load_fpga(); - printf("done\n"); - } + mv_load_fpga(); pci_mpc5xxx_init(&hose); } -u8 *dhcp_vendorex_prep(u8 *e) -{ - char *ptr; - - /* DHCP vendor-class-identifier = 60 */ - if ((ptr = getenv("dhcp_vendor-class-identifier"))) { - *e++ = 60; - *e++ = strlen(ptr); - while (*ptr) - *e++ = *ptr++; - } - /* DHCP_CLIENT_IDENTIFIER = 61 */ - if ((ptr = getenv("dhcp_client_id"))) { - *e++ = 61; - *e++ = strlen(ptr); - while (*ptr) - *e++ = *ptr++; - } - - return e; -} - -u8 *dhcp_vendorex_proc (u8 *popt) -{ - return NULL; -} - void show_boot_progress(int val) { struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO; switch(val) { case 0: /* FPGA ok */ - setbits_be32(&gpio->simple_dvo, 0x80); + setbits_be32(&gpio->simple_dvo, LED_G0); break; - case 1: - setbits_be32(&gpio->simple_dvo, 0x40); + case 65: + setbits_be32(&gpio->simple_dvo, LED_G1); break; case 12: - setbits_be32(&gpio->simple_dvo, 0x20); + setbits_be32(&gpio->simple_dvo, LED_Y); break; case 15: - setbits_be32(&gpio->simple_dvo, 0x10); + setbits_be32(&gpio->simple_dvo, LED_R); break; default: break; diff --git a/board/matrix_vision/mvbc_p/mvbc_p.h b/board/matrix_vision/mvbc_p/mvbc_p.h index 3330798..be1542b 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p.h +++ b/board/matrix_vision/mvbc_p/mvbc_p.h @@ -23,7 +23,7 @@ #define SIMPLE_DDR (LED_G0 | LED_G1 | LED_Y | LED_R | \ FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI) #define SIMPLE_DVO (FPGA_CONFIG) -#define SIMPLE_ODE (FPGA_CONFIG) +#define SIMPLE_ODE (FPGA_CONFIG | LED_G0 | LED_G1 | LED_Y | LED_R) #define SIMPLE_GPIOEN (LED_G0 | LED_G1 | LED_Y | LED_R | \ FPGA_DIN | FPGA_CCLK | FPGA_CONF_DONE | FPGA_CONFIG |\ WD_WDI | COP_PRESENT) diff --git a/board/matrix_vision/mvbc_p/mvbc_p_autoscript b/board/matrix_vision/mvbc_p/mvbc_p_autoscript index 5cee6c5..1102354 100644 --- a/board/matrix_vision/mvbc_p/mvbc_p_autoscript +++ b/board/matrix_vision/mvbc_p/mvbc_p_autoscript @@ -5,7 +5,7 @@ setenv bootdtb bootm \${kernel_boot} \${mv_initrd_addr_ram} \${mv_dtb_addr_ram} setenv ramkernel setenv kernel_boot \${loadaddr} setenv flashkernel setenv kernel_boot \${mv_kernel_addr} setenv cpird cp \${mv_initrd_addr} \${mv_initrd_addr_ram} \${mv_initrd_length} -setenv bootfromflash run flashkernel cpird ramparam addcons e1000para bootdtb +setenv bootfromflash run flashkernel cpird ramparam addcons e1000para addprofile bootdtb setenv getdtb tftp \${mv_dtb_addr_ram} \${dtb_name} setenv cpdtb cp \${mv_dtb_addr} \${mv_dtb_addr_ram} 0x2000 setenv rundtb fdt addr \${mv_dtb_addr_ram}\;fdt boardsetup @@ -16,12 +16,16 @@ setenv addcons setenv bootargs \${bootargs} console=ttyPSC\${console_nr},\${baud else setenv addcons setenv bootargs \${bootargs} console=tty0 fi -setenv e1000para setenv bootargs \${bootargs} e1000.TxDescriptors=1500 e1000.SmartPowerDownEnable=1 +setenv e1000para setenv bootargs \${bootargs} e1000.TxDescriptors=256 e1000.SmartPowerDownEnable=1 setenv set_static_ip setenv ipaddr \${static_ipaddr} setenv set_static_nm setenv netmask \${static_netmask} setenv set_static_gw setenv gatewayip \${static_gateway} setenv set_ip setenv ip \${ipaddr}::\${gatewayip}:\${netmask} setenv ramparam setenv bootargs root=/dev/ram0 ro rootfstype=squashfs +if test ${oprofile} = yes; +then +setenv addprofile setenv bootargs \${bootargs} profile=\${profile} +fi if test ${autoscr_boot} != no; then if test ${netboot} = yes; @@ -31,7 +35,7 @@ then then echo "=== bootp succeeded -> netboot ===" run set_ip - run getdtb rundtb bootfromnet ramparam addcons e1000para bootdtb + run getdtb rundtb bootfromnet ramparam addcons e1000para addprofile bootdtb else echo "=== netboot failed ===" fi diff --git a/board/matrix_vision/mvblm7/mvblm7.c b/board/matrix_vision/mvblm7/mvblm7.c index 8fe5b4b..b58c1b9 100644 --- a/board/matrix_vision/mvblm7/mvblm7.c +++ b/board/matrix_vision/mvblm7/mvblm7.c @@ -42,8 +42,15 @@ int fixed_sdram(void) u32 msize = 0; u32 ddr_size; u32 ddr_size_log2; + char *s = getenv("ddr_size"); msize = CONFIG_SYS_DDR_SIZE; + if (s) { + u32 env_ddr_size = simple_strtoul(s, NULL, 10); + if (env_ddr_size == 512) + msize = 512; + } + for (ddr_size = msize << 20, ddr_size_log2 = 0; (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) { @@ -63,14 +70,19 @@ int fixed_sdram(void) im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG; im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2; im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE; + im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2; im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; - im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL; + im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL; - udelay(300); + asm("sync;isync"); + udelay(600); im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; - return CONFIG_SYS_DDR_SIZE; + asm("sync;isync"); + udelay(500); + + return msize; } phys_size_t initdram(int board_type) @@ -88,40 +100,22 @@ phys_size_t initdram(int board_type) return msize * 1024 * 1024; } -int checkboard(void) +int misc_init_r(void) { - puts("Board: Matrix Vision mvBlueLYNX-M7\n"); - - return 0; -} + char *s = getenv("reset_env"); -u8 *dhcp_vendorex_prep(u8 *e) -{ - char *ptr; - - /* DHCP vendor-class-identifier = 60 */ - ptr = getenv("dhcp_vendor-class-identifier"); - if (ptr) { - *e++ = 60; - *e++ = strlen(ptr); - while (*ptr) - *e++ = *ptr++; - } - /* DHCP_CLIENT_IDENTIFIER = 61 */ - ptr = getenv("dhcp_client_id"); - if (ptr) { - *e++ = 61; - *e++ = strlen(ptr); - while (*ptr) - *e++ = *ptr++; + if (s) { + mv_reset_environment(); } - return e; + return 0; } -u8 *dhcp_vendorex_proc(u8 *popt) +int checkboard(void) { - return NULL; + puts("Board: Matrix Vision mvBlueLYNX-M7\n"); + + return 0; } #ifdef CONFIG_HARD_SPI diff --git a/board/matrix_vision/mvblm7/mvblm7.h b/board/matrix_vision/mvblm7/mvblm7.h index 03e9f41..de9fec7 100644 --- a/board/matrix_vision/mvblm7/mvblm7.h +++ b/board/matrix_vision/mvblm7/mvblm7.h @@ -8,14 +8,13 @@ #define FPGA_DIN 0x20000000 #define FPGA_STATUS 0x10000000 #define FPGA_CONF_DONE 0x08000000 -#define MMC_CS 0x04000000 #define WD_WDI 0x00400000 #define WD_TS 0x00200000 #define MAN_RST 0x00100000 #define MV_GPIO_DAT (WD_TS) -#define MV_GPIO_OUT (FPGA_CONFIG|FPGA_DIN|FPGA_CCLK|WD_TS|WD_WDI|MMC_CS) +#define MV_GPIO_OUT (FPGA_CONFIG|FPGA_DIN|FPGA_CCLK|MVBLM7_MMC_CS) #define MV_GPIO_ODE (FPGA_CONFIG|MAN_RST) #endif diff --git a/board/matrix_vision/mvblm7/pci.c b/board/matrix_vision/mvblm7/pci.c index 4b74e6d..1cc524b 100644 --- a/board/matrix_vision/mvblm7/pci.c +++ b/board/matrix_vision/mvblm7/pci.c @@ -32,24 +32,10 @@ #include <fpga.h> #include "mvblm7.h" #include "fpga.h" +#include "../common/mv_common.h" DECLARE_GLOBAL_DATA_PTR; -int mvblm7_load_fpga(void) -{ - size_t data_size = 0; - void *fpga_data = NULL; - char *datastr = getenv("fpgadata"); - char *sizestr = getenv("fpgadatasize"); - - if (datastr) - fpga_data = (void *)simple_strtoul(datastr, NULL, 16); - if (sizestr) - data_size = (size_t)simple_strtoul(sizestr, NULL, 16); - - return fpga_load(0, fpga_data, data_size); -} - static struct pci_region pci_regions[] = { { bus_start: CONFIG_SYS_PCI1_MEM_BASE, @@ -73,10 +59,8 @@ static struct pci_region pci_regions[] = { void pci_init_board(void) { - char *s; int i; int warmboot; - int load_fpga; volatile immap_t *immr; volatile pcictrl83xx_t *pci_ctrl; volatile gpio83xx_t *gpio; @@ -84,32 +68,23 @@ void pci_init_board(void) volatile law83xx_t *pci_law; struct pci_region *reg[] = { pci_regions }; - load_fpga = 1; immr = (immap_t *) CONFIG_SYS_IMMR; clk = (clk83xx_t *) &immr->clk; pci_ctrl = immr->pci_ctrl; pci_law = immr->sysconf.pcilaw; gpio = (volatile gpio83xx_t *)&immr->gpio[0]; - s = getenv("skip_fpga"); - if (s) { - printf("found 'skip_fpga' -> FPGA _not_ loaded !\n"); - load_fpga = 0; - } - gpio->dat = MV_GPIO_DAT; gpio->odr = MV_GPIO_ODE; - if (load_fpga) - gpio->dir = MV_GPIO_OUT; - else - gpio->dir = MV_GPIO_OUT & ~(FPGA_DIN|FPGA_CCLK); + gpio->dir = MV_GPIO_OUT; printf("SICRH / SICRL : 0x%08x / 0x%08x\n", immr->sysconf.sicrh, immr->sysconf.sicrl); mvblm7_init_fpga(); - if (load_fpga) - mvblm7_load_fpga(); + mv_load_fpga(); + + gpio->dir = MV_GPIO_OUT & ~(FPGA_DIN|FPGA_CCLK); /* Enable PCI_CLK_OUTPUTs 0 and 1 with 1:1 clocking */ clk->occr = 0xc0000000; diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 867e8e0..0c228cb 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -67,7 +67,7 @@ #define MV_CI mvBlueCOUGAR-P #define MV_VCI mvBlueCOUGAR-P #define MV_FPGA_DATA 0xff860000 -#define MV_FPGA_SIZE 0x0003c886 +#define MV_FPGA_SIZE 0 #define MV_KERNEL_ADDR 0xffd00000 #define MV_INITRD_ADDR 0xff900000 #define MV_INITRD_LENGTH 0x00400000 diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index aa91805..80334bd 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -46,10 +46,9 @@ #define CONFIG_MPC8XXX_SPI #define CONFIG_HARD_SPI #define MVBLM7_MMC_CS 0x04000000 +#define CONFIG_MISC_INIT_R /* I2C */ -#undef CONFIG_SOFT_I2C - #define CONFIG_FSL_I2C #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_OFFSET 0x3000 @@ -61,44 +60,36 @@ /* * DDR Setup */ +#undef CONFIG_SPD_EEPROM + #define CONFIG_SYS_DDR_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE #define CONFIG_SYS_83XX_DDR_USES_CS0 1 #define CONFIG_SYS_MEMTEST_START (60<<20) #define CONFIG_SYS_MEMTEST_END (70<<20) +#define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ - DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 - -#define CONFIG_SYS_DDR_SIZE 256 +#define CONFIG_SYS_DDRCDR 0x22000001 +#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 -/* HC, 75Ohm, DDR-II, DRQ */ -#define CONFIG_SYS_DDRCDR 0x80000001 -/* EN, ODT_WR, 3BA, 14row, 10col */ -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014102 -#define CONFIG_SYS_DDR_CS1_CONFIG 0x0 -#define CONFIG_SYS_DDR_CS2_CONFIG 0x0 -#define CONFIG_SYS_DDR_CS3_CONFIG 0x0 +#define CONFIG_SYS_DDR_SIZE 512 -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f -#define CONFIG_SYS_DDR_CS1_BNDS 0x0 -#define CONFIG_SYS_DDR_CS2_BNDS 0x0 -#define CONFIG_SYS_DDR_CS3_BNDS 0x0 +#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202 -#define CONFIG_SYS_DDR_CLK_CNTL 0x02000000 +#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f -#define CONFIG_SYS_DDR_TIMING_0 0x00260802 -#define CONFIG_SYS_DDR_TIMING_1 0x2625b221 -#define CONFIG_SYS_DDR_TIMING_2 0x1f9820c7 -#define CONFIG_SYS_DDR_TIMING_3 0x00000000 +#define CONFIG_SYS_DDR_TIMING_0 0x00260802 +#define CONFIG_SYS_DDR_TIMING_1 0x3837c322 +#define CONFIG_SYS_DDR_TIMING_2 0x0f9848c6 +#define CONFIG_SYS_DDR_TIMING_3 0x00000000 -/* ~MEM_EN, SREN, DDR-II, 32_BE */ -#define CONFIG_SYS_DDR_SDRAM_CFG 0x43080000 +#define CONFIG_SYS_DDR_SDRAM_CFG 0x43080008 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 -#define CONFIG_SYS_DDR_INTERVAL 0x04060100 +#define CONFIG_SYS_DDR_INTERVAL 0x02000100 -#define CONFIG_SYS_DDR_MODE 0x078e0232 +#define CONFIG_SYS_DDR_MODE 0x04040242 +#define CONFIG_SYS_DDR_MODE2 0x00800000 /* Flash */ #define CONFIG_SYS_FLASH_CFI @@ -404,8 +395,8 @@ #define MV_CI mvBL-M7 #define MV_VCI mvBL-M7 -#define MV_FPGA_DATA 0xfff80000 -#define MV_FPGA_SIZE 0x00076ca2 +#define MV_FPGA_DATA 0xfff40000 +#define MV_FPGA_SIZE 0 #define MV_KERNEL_ADDR 0xff810000 #define MV_INITRD_ADDR 0xffb00000 #define MV_SOURCE_ADDR 0xff804000 @@ -452,7 +443,7 @@ "static_ipaddr=192.168.90.10\0" \ "static_netmask=255.255.255.0\0" \ "static_gateway=0.0.0.0\0" \ - "initrd_name=uInitrd.mvblm7-xenorfs\0" \ + "initrd_name=uInitrd.mvBL-M7-rfs\0" \ "zcip=no\0" \ "netboot=yes\0" \ "mvtest=Ff\0" \ MATRIX VISION GmbH, Talstrasse 16, DE-71570 Oppenweiler Registergericht: Amtsgericht Stuttgart, HRB 271090 Geschaeftsfuehrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner, Hans-Joachim Reich

3 4

[U-Boot] [RFC] - Relocating i386 Code - Permission to break orphan boards
by Graeme Russ 31 Aug '09

31 Aug '09

Hi Wolfgang, I have been playing around with gcc's -fpic and ld's -PIE and I think that I can get 'proper' relocation happening on the i386 port. I've get the basics down, and I've been looking at /lib_ppc/board.c for how the PPC relocation scheme works and would like to replicate it (i.e. board_init_f, board_init_r and relocate_code. Unfortunately this leaves two options: 1) Tangle the i386 port up in a heap of #ifdefs, or; 2) Do a clean re-write for the eNET and break the other i386 boards (sc520_cdp and sc520_spunk). The other two i386 boards are OLD and i have my doubts as to if they ever did work completely, and have really strong doubts as to them working now I would really like to just throw all the old code out and do it all cleanly, but not without strong support from the community. What are your thoughts? Regards, G

1 1

[U-Boot] [patch] bugfix CONFIG_SYS_CONSOLE_INFO_QUIET
by David Brownell 30 Aug '09

30 Aug '09

From: David Brownell <dbrownell(a)users.sourceforge.net> The "console: unify printing current devices" patch goofed: CONFIG_SYS_CONSOLE_INFO_QUIET is supposed to *REMOVE* boot time noise, not add it. Said patch changed the #ifndefs to #ifdef; this one restores them to the proper sense. Signed-off-by: David Brownell <dbrownell(a)users.sourceforge.net> --- common/console.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/common/console.c +++ b/common/console.c @@ -534,7 +534,7 @@ int console_init_f(void) void stdio_print_current_devices(void) { -#ifdef CONFIG_SYS_CONSOLE_INFO_QUIET +#ifndef CONFIG_SYS_CONSOLE_INFO_QUIET /* Print information */ puts("In: "); if (stdio_devices[stdin] == NULL) {

2 1

[U-Boot] Pull request - mpc85xx/next
by Kumar Gala 30 Aug '09

30 Aug '09

The following changes since commit 5928da0193d31f52f4a5b9f6ed3d3f0390ffd2c1: Wolfgang Denk (1): Merge branch 'next' of git://git.denx.de/u-boot-nand-flash into next are available in the git repository at: git://git.denx.de/u-boot-mpc85xx next Alex Dubov (1): stx: create common vendor/board hierarchy for STx boards Felix Radensky (1): 85xx: Fix memory test range on MPC8536DS Kumar Gala (11): pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init pci/fsl_pci_init: Use PCIe capability to determine if controller is PCIe pci/fsl_pci_init: Rework PCI ATMU setup to handle >4G of memory 85xx: Cleanup whitespace in mpc8536ds.c 85xx: Add a 36-bit physical configuration for MPC8536DS 85xx: Remove redudant PLATFORM_CPPFLAGS 86xx: Remove redudant PLATFORM_CPPFLAGS 85xx: Move to a common linker script 85xx: Init pci ethernet cards if we enable any on MPC8572DS 85xx: Removed BEDBUG support on P1_P2_RDB Mingkai Hu (1): 85xx: Add L2SRAM Register's macro definition Peter Tyser (2): 85xx: Remove unused CONFIG_CLEAR_LAW0 defines xes: Use proper IO access functions Poonam Aggrwal (10): 8xxx: Refactored common cpu specific code for 85xx/86xx into one file. 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx 85xx: Add support for P2020RDB board 85xx: Added P1020 Processor Support. 85xx: Added CONFIG_MAX_CPUS for P1020 85xx: P1020RDB Support Added 85xx: Added single core members of FSL P1xx/P2xx processors series 85xx: Added support for P1011RDB and P2010RDB driver/fsl_pci: Add fsl_pci_init_port function to initialize a PCI controller 85xx: Added PCIe support for P1 P2 RDB Timur Tabi (2): 85xx: Improve MPIC initialization fsl: simplify the "mac id" command, improve boot-time informational message MAINTAINERS | 4 + MAKEALL | 4 + Makefile | 33 +- board/atum8548/atum8548.c | 18 +- board/atum8548/config.mk | 4 - board/atum8548/u-boot.lds | 143 ----- board/freescale/common/sys_eeprom.c | 81 ++-- board/freescale/mpc8536ds/config.mk | 4 - board/freescale/mpc8536ds/mpc8536ds.c | 41 +-- board/freescale/mpc8536ds/u-boot.lds | 143 ----- board/freescale/mpc8540ads/config.mk | 4 - board/freescale/mpc8540ads/u-boot.lds | 146 ----- board/freescale/mpc8541cds/config.mk | 4 - board/freescale/mpc8541cds/u-boot.lds | 143 ----- board/freescale/mpc8544ds/config.mk | 4 - board/freescale/mpc8544ds/mpc8544ds.c | 25 +- board/freescale/mpc8544ds/u-boot.lds | 143 ----- board/freescale/mpc8548cds/config.mk | 4 - board/freescale/mpc8548cds/mpc8548cds.c | 13 +- board/freescale/mpc8548cds/u-boot.lds | 143 ----- board/freescale/mpc8555cds/config.mk | 4 - board/freescale/mpc8555cds/u-boot.lds | 143 ----- board/freescale/mpc8560ads/config.mk | 3 - board/freescale/mpc8560ads/u-boot.lds | 146 ----- board/freescale/mpc8568mds/config.mk | 4 - board/freescale/mpc8568mds/mpc8568mds.c | 12 +- board/freescale/mpc8568mds/u-boot.lds | 143 ----- board/freescale/mpc8569mds/config.mk | 4 - board/freescale/mpc8569mds/mpc8569mds.c | 7 +- board/freescale/mpc8569mds/u-boot.lds | 143 ----- board/freescale/mpc8572ds/config.mk | 4 - board/freescale/mpc8572ds/mpc8572ds.c | 22 +- board/freescale/mpc8572ds/u-boot.lds | 143 ----- board/freescale/mpc8610hpcd/config.mk | 3 - board/freescale/mpc8610hpcd/mpc8610hpcd.c | 21 +- board/freescale/mpc8641hpcn/config.mk | 3 - board/freescale/mpc8641hpcn/mpc8641hpcn.c | 12 +- board/{stxssa => freescale/p1_p2_rdb}/Makefile | 10 +- board/{stxxtc => freescale/p1_p2_rdb}/config.mk | 11 +- board/freescale/p1_p2_rdb/ddr.c | 243 +++++++++ board/freescale/p1_p2_rdb/law.c | 37 ++ board/freescale/p1_p2_rdb/p1_p2_rdb.c | 222 ++++++++ board/freescale/p1_p2_rdb/pci.c | 117 ++++ board/freescale/p1_p2_rdb/tlb.c | 83 +++ board/freescale/p2020ds/config.mk | 4 - board/freescale/p2020ds/p2020ds.c | 22 +- board/mpc8540eval/config.mk | 5 - board/mpc8540eval/u-boot.lds | 151 ------ board/pm854/config.mk | 4 - board/pm854/u-boot.lds | 146 ----- board/pm856/config.mk | 4 - board/pm856/u-boot.lds | 146 ----- board/sbc8548/config.mk | 4 - board/sbc8548/sbc8548.c | 17 +- board/sbc8548/u-boot.lds | 145 ----- board/sbc8560/config.mk | 3 - board/sbc8560/u-boot.lds | 151 ------ board/sbc8641d/config.mk | 3 - board/sbc8641d/sbc8641d.c | 13 +- board/socrates/u-boot.lds | 149 ------ board/{ => stx}/stxgp3/Makefile | 0 board/{ => stx}/stxgp3/config.mk | 3 - board/{ => stx}/stxgp3/ddr.c | 0 board/{ => stx}/stxgp3/flash.c | 0 board/{ => stx}/stxgp3/law.c | 0 board/{ => stx}/stxgp3/stxgp3.c | 0 board/{ => stx}/stxgp3/tlb.c | 0 board/{ => stx}/stxssa/Makefile | 0 board/{ => stx}/stxssa/config.mk | 3 - board/{ => stx}/stxssa/ddr.c | 0 board/{ => stx}/stxssa/law.c | 0 board/{ => stx}/stxssa/stxssa.c | 0 board/{ => stx}/stxssa/tlb.c | 0 board/{ => stx}/stxxtc/Makefile | 0 board/{ => stx}/stxxtc/config.mk | 0 board/{ => stx}/stxxtc/stxxtc.c | 0 board/{ => stx}/stxxtc/u-boot.lds | 0 board/{ => stx}/stxxtc/u-boot.lds.debug | 0 board/stxgp3/u-boot.lds | 153 ------ board/stxssa/u-boot.lds | 154 ------ board/tqc/tqm85xx/tqm85xx.c | 15 +- board/tqc/tqm85xx/u-boot.lds | 146 ----- board/xes/common/fsl_8xxx_clk.c | 6 +- board/xes/common/fsl_8xxx_pci.c | 72 +-- board/xes/xpedite5170/config.mk | 3 - board/xes/xpedite5200/config.mk | 3 - board/xes/xpedite5200/u-boot.lds | 143 ----- board/xes/xpedite5200/xpedite5200.c | 17 +- board/xes/xpedite5370/config.mk | 4 - board/xes/xpedite5370/u-boot.lds | 143 ----- board/xes/xpedite5370/xpedite5370.c | 8 +- common/cmd_mp.c | 6 +- cpu/mpc85xx/Makefile | 5 +- cpu/mpc85xx/config.mk | 6 +- cpu/mpc85xx/cpu.c | 91 +--- cpu/mpc85xx/cpu_init.c | 5 +- cpu/mpc85xx/interrupts.c | 12 +- cpu/mpc85xx/mp.c | 6 +- cpu/mpc85xx/release.S | 25 +- cpu/mpc85xx/speed.c | 4 +- .../freescale/p2020ds => cpu/mpc85xx}/u-boot.lds | 0 cpu/mpc86xx/config.mk | 3 +- cpu/mpc86xx/cpu.c | 40 +-- cpu/mpc86xx/cpu_init.c | 4 +- cpu/mpc8xxx/Makefile | 25 + cpu/mpc8xxx/cpu.c | 137 +++++ doc/README.p2020rdb | 145 +++++ drivers/misc/fsl_law.c | 3 +- drivers/pci/fsl_pci_init.c | 305 ++++++++--- include/asm-ppc/config.h | 7 + include/asm-ppc/fsl_pci.h | 29 +- include/asm-ppc/global_data.h | 3 +- include/asm-ppc/immap_85xx.h | 5 + include/asm-ppc/processor.h | 11 +- include/common.h | 2 + include/configs/ATUM8548.h | 1 - include/configs/MPC8536DS.h | 86 +++- include/configs/MPC8548CDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/MPC8610HPCD.h | 2 +- include/configs/MPC8641HPCN.h | 1 - include/configs/P1_P2_RDB.h | 561 ++++++++++++++++++++ include/configs/P2020DS.h | 1 - include/configs/XPEDITE5170.h | 1 - include/configs/XPEDITE5370.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8641d.h | 2 +- include/e500.h | 6 +- include/pci.h | 1 + lib_ppc/board.c | 3 + lib_ppc/bootm.c | 2 +- 131 files changed, 2180 insertions(+), 3854 deletions(-) delete mode 100644 board/atum8548/u-boot.lds delete mode 100644 board/freescale/mpc8536ds/u-boot.lds delete mode 100644 board/freescale/mpc8540ads/u-boot.lds delete mode 100644 board/freescale/mpc8541cds/u-boot.lds delete mode 100644 board/freescale/mpc8544ds/u-boot.lds delete mode 100644 board/freescale/mpc8548cds/u-boot.lds delete mode 100644 board/freescale/mpc8555cds/u-boot.lds delete mode 100644 board/freescale/mpc8560ads/u-boot.lds delete mode 100644 board/freescale/mpc8568mds/u-boot.lds delete mode 100644 board/freescale/mpc8569mds/u-boot.lds delete mode 100644 board/freescale/mpc8572ds/u-boot.lds copy board/{stxssa => freescale/p1_p2_rdb}/Makefile (85%) copy board/{stxxtc => freescale/p1_p2_rdb}/config.mk (80%) create mode 100644 board/freescale/p1_p2_rdb/ddr.c create mode 100644 board/freescale/p1_p2_rdb/law.c create mode 100644 board/freescale/p1_p2_rdb/p1_p2_rdb.c create mode 100644 board/freescale/p1_p2_rdb/pci.c create mode 100644 board/freescale/p1_p2_rdb/tlb.c delete mode 100644 board/mpc8540eval/u-boot.lds delete mode 100644 board/pm854/u-boot.lds delete mode 100644 board/pm856/u-boot.lds delete mode 100644 board/sbc8548/u-boot.lds delete mode 100644 board/sbc8560/u-boot.lds delete mode 100644 board/socrates/u-boot.lds rename board/{ => stx}/stxgp3/Makefile (100%) rename board/{ => stx}/stxgp3/config.mk (92%) rename board/{ => stx}/stxgp3/ddr.c (100%) rename board/{ => stx}/stxgp3/flash.c (100%) rename board/{ => stx}/stxgp3/law.c (100%) rename board/{ => stx}/stxgp3/stxgp3.c (100%) rename board/{ => stx}/stxgp3/tlb.c (100%) rename board/{ => stx}/stxssa/Makefile (100%) rename board/{ => stx}/stxssa/config.mk (93%) rename board/{ => stx}/stxssa/ddr.c (100%) rename board/{ => stx}/stxssa/law.c (100%) rename board/{ => stx}/stxssa/stxssa.c (100%) rename board/{ => stx}/stxssa/tlb.c (100%) rename board/{ => stx}/stxxtc/Makefile (100%) rename board/{ => stx}/stxxtc/config.mk (100%) rename board/{ => stx}/stxxtc/stxxtc.c (100%) rename board/{ => stx}/stxxtc/u-boot.lds (100%) rename board/{ => stx}/stxxtc/u-boot.lds.debug (100%) delete mode 100644 board/stxgp3/u-boot.lds delete mode 100644 board/stxssa/u-boot.lds delete mode 100644 board/tqc/tqm85xx/u-boot.lds delete mode 100644 board/xes/xpedite5200/u-boot.lds delete mode 100644 board/xes/xpedite5370/u-boot.lds rename {board/freescale/p2020ds => cpu/mpc85xx}/u-boot.lds (100%) create mode 100644 cpu/mpc8xxx/Makefile create mode 100644 cpu/mpc8xxx/cpu.c create mode 100644 doc/README.p2020rdb create mode 100644 include/configs/P1_P2_RDB.h

2 1

[U-Boot] post u-boot mail list
by 张果冻 30 Aug '09

30 Aug '09

According to the title.

1 0

[U-Boot] Question about Netconsole
by Jared Lewis 30 Aug '09

30 Aug '09

Hi All- I have been having troubles getting Netconsole to work on eTSEC2 of a MPC8548 chip. I was hoping that maybe someone here might be able to help me. I'm currently using U-Boot v2009.01. Using the bash script code located in the README.Netconsole file, I have been able to successfully transmit data from the 8548 to my host machine over netcat (using v0.7.1 on Fedora Core 11). I've tested that this path works consistently by only piping stdout to 'nc'. My problem comes when I try to send data from the host machine to the 8548 (piping stdin to 'nc'). It seems like the data is getting transmitted by Netconsole (verified using wireshark), but it isn't getting consistently received by U-Boot. I set the ET_DEBUG flag to 1 so that I could get extra debug information. On rare occasions I have seen that packets are getting received, but this is very rarely. I do know that the connection is OK. I am able to transfer files using tftp without any problems. On one occasion I was able to print out an environment variable (a small victory), but it happened randomly. Does anyone have any idea why this might be happening? Any help would be greatly appreciated. Regards, Jared

3 5