October 2007 - U-Boot

[U-Boot-Users] shituko
by Kajsa Mackay 17 Oct '07

17 Oct '07

como esta u-boot-users fuck foreplay, she'll want your enlarged piece in her! http://www.gtanji.com/ Kajsa Mackay

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[U-Boot-Users] [PATCH] Off-by-two bug when relocating GOT
by Vlad Lungu 17 Oct '07

17 Oct '07

The first two entries are skipped but the number of relocated entries is not adjusted; as a result, the first __u_boot_cmd_* structure is smashed and no commands can be issued. Signed-off-by: Vlad Lungu <vlad(a)comsys.ro> --- cpu/mips/start.S | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/cpu/mips/start.S b/cpu/mips/start.S index e91e213..1e5b302 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -349,6 +349,7 @@ in_ram: /* Now we want to update GOT. */ lw t3, -4(t0) /* t3 <-- num_got_entries */ + sub t3,2 /* If skipping two entries, adjust length*/ addi t4, gp, 8 /* Skipping first two entries. */ li t2, 2 1: -- 1.5.2.2

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[U-Boot-Users] [PATCH 2/2] changes for IDS8247 board support
by Sergej Stepanov 17 Oct '07

17 Oct '07

To get the IDS8247 board working following are done: - FCC2 is deactivated - FCC1 is activated - I2C is activated - CFI driver is activated - Adapted for use with LIBFDT Signed-off-by: Sergej Stepanov <Sergej.Stepanov(a)ids.de> -- diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index 19823a4..5539299 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -25,6 +25,12 @@ #include <ioports.h> #include <mpc8260.h> +#if defined(CONFIG_OF_LIBFDT) +#include <libfdt.h> +#include <libfdt_env.h> +#include <fdt_support.h> +#endif + DECLARE_GLOBAL_DATA_PTR; /* @@ -38,12 +44,12 @@ const iop_conf_t iop_conf_tab[4][32] = { /* Port A configuration */ { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 COL */ - /* PA30 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 CRS */ - /* PA29 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 TXER */ - /* PA28 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */ - /* PA27 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */ - /* PA26 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 RXER */ + /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 COL */ + /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 CRS */ + /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXER */ + /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */ + /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */ + /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */ /* PA25 */ { 0, 0, 0, 0, 1, 0 }, /* 8247_P0 */ #if defined(CONFIG_SOFT_I2C) /* PA24 */ { 1, 0, 0, 0, 1, 1 }, /* I2C_SDA2 */ @@ -53,14 +59,14 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PA23 */ { 0, 0, 0, 1, 0, 0 }, /* PA23 */ #endif /* PA22 */ { 0, 0, 0, 0, 1, 0 }, /* SMC2_DCD */ - /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */ - /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */ - /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */ - /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */ - /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */ - /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD1 */ - /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */ - /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */ + /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */ + /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */ + /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */ + /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */ + /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */ + /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD1 */ + /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */ + /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */ /* PA13 */ { 0, 0, 0, 1, 1, 0 }, /* SMC2_RTS */ /* PA12 */ { 0, 0, 0, 0, 1, 0 }, /* SMC2_CTS */ /* PA11 */ { 0, 0, 0, 1, 1, 0 }, /* SMC2_DTR */ @@ -79,20 +85,20 @@ const iop_conf_t iop_conf_tab[4][32] = { /* Port B configuration */ { /* conf ppar psor pdir podr pdat */ - /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ - /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ - /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ - /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ - /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ - /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ - /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ - /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ - /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ - /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ - /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ - /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ - /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ - /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ + /* PB31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ + /* PB30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ + /* PB29 */ { 0, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ + /* PB28 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ + /* PB27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ + /* PB26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ + /* PB25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ + /* PB24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ + /* PB23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ + /* PB22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ + /* PB21 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ + /* PB20 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ + /* PB19 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ + /* PB18 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */ /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */ /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* PB15 */ @@ -123,8 +129,8 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */ /* PC25 */ { 0, 1, 1, 0, 0, 0 }, /* SYNC_IN */ /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */ - /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */ - /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */ + /* PC23 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII TX_CLK */ + /* PC22 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RX_CLK */ /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */ /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */ /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */ @@ -180,7 +186,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ /* PD9 */ { 0, 0, 0, 0, 0, 0 }, /* PD9 */ /* PD8 */ { 0, 0, 0, 0, 0, 0 }, /* PD8 */ - /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* MII_MDIO */ + /* PD7 */ { 1, 0, 0, 1, 0, 1 }, /* MII_MDIO */ /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */ /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */ /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */ @@ -224,7 +230,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, * mapped by the controller. That means, that the initial mapping has * to be (at least) twice as large as the maximum expected size. */ - maxsize = (1 + (~orx | 0x7fff)) / 2; + maxsize = (1 + (~orx | 0x7fff))/* / 2*/; sdmr_ptr = &memctl->memc_psdmr; orx_ptr = &memctl->memc_or2; @@ -315,4 +321,39 @@ nand_init (void) printf ("%4lu MB\n", totlen >>20); } -#endif +#endif /* CFG_CMD_NAND */ + +#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +/* + * update "memory" property in the blob + */ +void ft_blob_update(void *blob, bd_t *bd) +{ + int ret, nodeoffset = 0; + ulong memory_data[2] = {0}; + + memory_data[0] = cpu_to_be32(bd->bi_memstart); + memory_data[1] = cpu_to_be32(bd->bi_memsize); + + nodeoffset = fdt_find_node_by_path (blob, "/memory"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, + sizeof(memory_data)); + if (ret < 0) + printf("ft_blob_update): cannot set /memory/reg " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /memory node " + "err:%s\n", fdt_strerror(nodeoffset)); + } +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup( blob, bd); + ft_blob_update(blob, bd); +} +#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index 85d2bb3..f985dbe 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -19,6 +19,15 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA + * + * For IDS8247 platform + * - FCC1 is activated + * - FCC2 is deactivated + * - I2C is activated + * - CFI driver is activated + * - adopted for using with CONFIG_OF_LIBFDT + * Sergej Stepanov, IDS GmbH, Germany, <Sergej.Stepanov(a)ids.de> + * */ /* @@ -120,6 +129,17 @@ #define CFG_NS16550_COM1 (CFG_UART_BASE + 0x8000) + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,8247@0" +#define OF_SOC "soc@f0000000" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc@f0000000/serial8250@e0008000" + + /* * select ethernet configuration * @@ -133,16 +153,18 @@ #undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */ #define CONFIG_ETHER_ON_FCC /* define if ether on FCC */ #undef CONFIG_ETHER_NONE /* define if ether on something else */ -#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */ +#define CONFIG_ETHER_INDEX 1 /* which SCC/FCC channel for ethernet */ +#define CONFIG_ETHER_ON_FCC1 +#define FCC_ENET /* - * - Rx-CLK is CLK13 - * - Tx-CLK is CLK14 + * - Rx-CLK is CLK10 + * - Tx-CLK is CLK9 * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CFG_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CFG_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +# define CFG_CMXFCR_VALUE (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK9) # define CFG_CPMFCR_RAMTYPE 0 # define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) @@ -166,6 +188,8 @@ #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_RTC_PCF8563 +#define CFG_I2C_RTC_ADDR 0x51 /* * Command line configuration. @@ -211,7 +235,10 @@ */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CFG_FLASH_BANKS_LIST { 0xFF800000 } +#define CFG_MAX_FLASH_BANKS_DETECT 1 /* What should the base address of the main FLASH be and how big is * it (in MBytes)? This must contain TEXT_BASE from board/ids8247/config.mk * The main FLASH is whichever is connected to *CS0. @@ -227,7 +254,7 @@ * FLASH organization */ #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ -#define CFG_MAX_FLASH_SECT 64 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ @@ -511,12 +538,12 @@ */ #define CFG_OR2 ((~(CFG_GLOBAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A10 |\ + ORxS_ROWST_PBI0_A9 |\ ORxS_NUMR_12) -#define CFG_PSDMR (PSDMR_SDAM_A13_IS_A5 |\ +#define CFG_PSDMR (PSDMR_SDAM_A14_IS_A5 |\ PSDMR_BSMA_A15_A17 |\ - PSDMR_SDA10_PBI0_A11 |\ + PSDMR_SDA10_PBI0_A10 |\ PSDMR_RFRC_5_CLK |\ PSDMR_PRETOACT_2W |\ PSDMR_ACTTORW_2W |\

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[U-Boot-Users] please, ignore patch for IDS8247
by Sergej Stepanov 17 Oct '07

17 Oct '07

Hallo, sorry and, please, ignore the previous patch for IDS8247. I had some bad strings... Regards Sergej. -- Sergej I. Stepanov IDS GmbH Nobelstr. 18, Zim. 2.1.05 D-76275 Ettlingen T +49 (0) 72 43/2 18-615 F +49 (0) 72 43/2 18-400 http://www.ids.de Email: Sergej.Stepanov(a)ids.de

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[U-Boot-Users] Home based jobs
by Online Careers 17 Oct '07

17 Oct '07

Dear recipient, The leading Hong Kong LCD company, ICG Technology, is once again beginning a global campaign of employing new staff in AUSTRALIA. Due to our exploding growth, we are further expanding our business to the North America. During our last employment campaign we successfully employed hundreds of Retail Representatives and Couriers. And now we are offering you one more opportunity to earn extra cash working with us At ICG, we value team players who are ready and willing to cope with many tasks. The nature of the work at ICG demands that you are self-motivated, proactive and genuinely interested in the kind of projects we handle. We expect loyalty, flexibility, a commitment to meet deadlines, and a professional attitude at all times.. We are looking for honest, responsible, hard-working people to operate with our company in your particular region. These openings are part-time positions with the opportunity to make AUD 500-2000 per month working 1-2 hours per day with us.. Please visit our web site ICG TECHNOLOGY for more details regarding these vacancies. Brought to you by SEEK and CareerONE.

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[U-Boot-Users] porting kernel driver to u-boot
by Mark T. 17 Oct '07

17 Oct '07

Good Evening, I am looking for some pointers on how to port Linux kernel drivers to u-Boot. Specifically, Diskonchip from Sandisk/m-systems. I can not find any instructions nor tips on where to start. I started looking at drivers for the same devices but this is very slow process. Any suggestions will be greatly appreciated. Thanks, Mark

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[U-Boot-Users] MAC Address setting as 00:00:00:00:00:00
by tomy 17 Oct '07

17 Oct '07

hi all, I am working on AT91SAM9260-EK board. Can anyone say me how to set the MAC address even if the ethernet cable is not connected?. What is happening is if the ethernet cable is disconnected during boot up, Mac address is setting as 00:00:00:00:00:00 in LINUX. So is there any way to solve this by making changes in U-Boot code?. Or any changes required in Linux ethernet Driver?. With Regards, Tomy Devasia

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[U-Boot-Users] [Patch] Make MPC8266ADS compile again
by runet＠innovsys.com 16 Oct '07

16 Oct '07

Make MPC8266ADS board compile again. Signed-off-by: Runet Torgersen <runet(a)innovsys.com> diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h index 14b041e..d392b98 100644 --- a/include/configs/MPC8266ADS.h +++ b/include/configs/MPC8266ADS.h @@ -168,6 +168,7 @@ #undef CONFIG_CMD_MFSL #undef CONFIG_CMD_MMC #undef CONFIG_CMD_NAND +#undef CONFIG_CMD_ONENAND #undef CONFIG_CMD_PCMCIA #undef CONFIG_CMD_REISER #undef CONFIG_CMD_SCSI @@ -177,6 +178,7 @@ #undef CONFIG_CMD_UNIVERSE #undef CONFIG_CMD_USB #undef CONFIG_CMD_XIMG +#undef CONFIG_CMD_AT91_SPIMUX /* Define a command string that is automatically executed when no character * is read on the console interface withing "Boot Delay" after reset.

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[U-Boot-Users] Removal of nonexistent R5200 board
by Zachary P. Landau 16 Oct '07

16 Oct '07

Hello, A while back I submitted patches for a board named R5200. This was a proprietary board done for a client. I'd read that u-boot still welcomes patches for boards that aren't available to the general public, and that's why I submitted it. But my question is a slight variation of that. The R5200 never went into production. It was redone with a different architecture, and so the board in u-boot won't used with any real hardware. Is it worth leaving the the code in u-boot as a reference for other people bringing up M5271 hardware, or should I submit a patch to remove it? My main worry is that becuase there won't be real hardware to test it on, the code will rot more and more as other parts of u-boot change. At some point it will stop even being useful as a reference. But I'd like to hear other opinions. -- Zachary P. Landau <kapheine(a)gmail.com>

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[U-Boot-Users] Custom MPC8347 Board can't access cache
by Sparks, Sam 16 Oct '07

16 Oct '07

Hello All, I am trying to bring up a custom MPC8347 board with source based off of 1.3-rc1, unfortunately, I am not making it to board_init_f. Using an abatron bdi, I've discovered the offending instruction is on cpu/mpc83xx/start.S:752 - 752 mtmsr r5 /* r5 is 0x3072 */ Has anyone else seen this issue? For reference, here are some configuration settings that may be of value: #define CFG_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */ #define CFG_INIT_RAM_END 0x1000 /* End of used area in RAM*/ #define CFG_IBAT2L (CFG_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE) #define CFG_IBAT2U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP) Does anyone have any insight? Thanks for the help, Sam Sparks

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