July 2006 - U-Boot

Re: [U-Boot-Users] [DNX#2006072142000019] [patch] Embedded Pla [...]
by U-Boot patch tracking system 21 Jul '06

21 Jul '06

Dear Mr. U. Boot, thank you for your contribution to the U-Boot project. Your e-mail was registered at our system under the ticket number [DNX#2006072142000019]. Your U-Boot support team Powered by OTRS (http://otrs.org/)

2 1

[U-Boot-Users] u-boot flash for yellowstone board with external programmer
by Andriy Korud 21 Jul '06

21 Jul '06

Hello, for some reason we need to replace flash chip on yellowstone board and program it with external programmer. The question is that for external programmer flash is visible as 0-64M, and I'm not sure where should I program 512k of u-boot? I assume that at the end of the chip (CPU is looking at the end, at 0xfffffffc),am I right? Also concerning endianness -as board has swapped data and address signals (flash_A0->cpu_A30, flash_D0->cpu_D15) I assume that image can be programmed "as is" - 16-bit word-by-word without any conversion? Please fix me if I'm wrong. Best regards, Andriy Korud

2 1

Re: [U-Boot-Users] [DNX#2006072142000037] [PATCH] part 2. Embe [...]
by U-Boot patch tracking system 21 Jul '06

21 Jul '06

Dear Mr. U. Boot, thank you for your contribution to the U-Boot project. Your e-mail was registered at our system under the ticket number [DNX#2006072142000037]. Your U-Boot support team Powered by OTRS (http://otrs.org/)

1 0

Re: [U-Boot-Users] [DNX#2006072142000037] [PATCH] part 2. Embedded PlanetBoards
by DENX Support System 21 Jul '06

21 Jul '06

Hello list, inside the automatic U-Boot patch tracking system a new ticket [DNX#2006072142000037] was created: <snip> > *CHANGELOG Added Support for Embedded Planet Boards EP852 EP866 and > EP85xxm. See respective board config file for original author > information. Merged from internal company port and QUICCstart kit into > the most recent u-boot git by J. Mann, Embedded Planet, 2006-JUL-27. > > (this is part 2 of 2 split in half for size reasons.) > > (the first attempt to send this e-mail resulted in a message too big > error. Sorry if you get two on acident) </snip> Your U-Boot support team

1 0

Re: [U-Boot-Users] [DNX#2006072142000028] [PATCH] part 1. Embe [...]
by U-Boot patch tracking system 21 Jul '06

21 Jul '06

Dear Mr. U. Boot, thank you for your contribution to the U-Boot project. Your e-mail was registered at our system under the ticket number [DNX#2006072142000028]. Your U-Boot support team Powered by OTRS (http://otrs.org/)

1 0

Re: [U-Boot-Users] [DNX#2006072142000028] [PATCH] part 1. Embedded PlanetBoards
by DENX Support System 21 Jul '06

21 Jul '06

Hello list, inside the automatic U-Boot patch tracking system a new ticket [DNX#2006072142000028] was created: <snip> > *CHANGELOG Added Support for Embedded Planet Boards EP852 EP866 and > EP85xxm. See respective board config file for original author > information. Merged from internal company port and QUICCstart kit into > the most recent u-boot git by J. Mann, Embedded Planet, 2006-JUL-27. > > (this is part 1 of 2 split in half for size reasons.) > > (the first attempt to send this e-mail resulted in a message too big > error. Sorry if you get two on acident) </snip> Your U-Boot support team

1 0

[U-Boot-Users] [PATCH] part 1. Embedded PlanetBoards
by Jeff Mann 21 Jul '06

21 Jul '06

*CHANGELOG Added Support for Embedded Planet Boards EP852 EP866 and EP85xxm. See respective board config file for original author information. Merged from internal company port and QUICCstart kit into the most recent u-boot git by J. Mann, Embedded Planet, 2006-JUL-27. (this is part 1 of 2 split in half for size reasons.) (the first attempt to send this e-mail resulted in a message too big error. Sorry if you get two on acident)

1 0

Re: [U-Boot-Users] [DNX#2006072142000019] [patch] Embedded Planet Boards
by DENX Support System 21 Jul '06

21 Jul '06

Hello list, inside the automatic U-Boot patch tracking system a new ticket [DNX#2006072142000019] was created: <snip> > > *CHANGELOG > Added Support for Embedded Planet Boards EP852 EP866 and EP85xxm. See > respective board config file for original author information. Merged > from internal company port and QUICCstart kit into the most recent > u-boot git by J. Mann, Embedded Planet, 2006-JUL-27. </snip> Your U-Boot support team

1 0

[U-Boot-Users] Setting strataflash lock bit accidentally
by llandre 21 Jul '06

21 Jul '06

Let's assume that, because a software bug, an application has accidentally set the lock bit of the flash sector used to store the U-Boot environment. In this case, when trying to store a new environment with the saveenv command, U-Boot would not be able to complete the operation. Is it enough to define CFG_FLASH_PROTECTION in order to handle this situation and to allow U-Boot to unlock the sector (same thing would happen in case the locked sectors fall in the memrory area devoted to store kernels or ramsisks)? If no, how do you suggest to manage this situation? TIA, llandre DAVE Electronics System House - R&D Department web: http://www.dave-tech.it email: r&d2(a)dave-tech.it

2 3

[U-Boot-Users] [PATCH] fix the incorrect dcbz operation of 83xx
by Liu Dave-r63238 21 Jul '06

21 Jul '06

All, The 834x Rev1.1 silicon has one bug inside. The issue is when the dcache locked with HID0[DLOCK], the dcbz instruction looks like no-op instruction. The right behavior of the dcache is when the dcache locked with HID0[DLOCK], the dcbz instruction allocates new tags in cache. The bug is only in 834x rev1.1, PVR is 0x80830011. The 834x rev2.0 and later and 8360 have not this bug inside. So, when 834x rev2.0/8360 are working with ECC, the dcbz instruction will corrupt the stack in cache, the processor will checkstop reset. However, the 834x rev1.1 can work with ECC with these code, because the sillicon has this cache bug. The dcbz will not corrupt the stack in cache. Really, it is the fault code running fault sillicon. This patch fix the incorrect dcbz operation. Instead of CPU FP writing to initialise the ECC. CHANGELOG: * fix the incorrect dcbz operation instead of CPU FP writing to initialise the ECC memory. Patch by Dave Liu, 21 July 2006 diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 48624fe..8eaa6f6 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -429,54 +429,37 @@ static __inline__ unsigned long get_tbms /* #define CONFIG_DDR_ECC_INIT_VIA_DMA */ void ddr_enable_ecc(unsigned int dram_size) { - uint *p; volatile immap_t *immap = (immap_t *)CFG_IMMRBAR; volatile ddr8349_t *ddr = &immap->ddr; unsigned long t_start, t_end; + register u64 *p; + register uint size; + unsigned int pattern[2]; #if defined(CONFIG_DDR_ECC_INIT_VIA_DMA) uint i; #endif - - debug("Initialize a Cachline in DRAM\n"); icache_enable(); + t_start = get_tbms(); -#if defined(CONFIG_DDR_ECC_INIT_VIA_DMA) - /* Initialise DMA for direct Transfers */ - dma_init(); -#endif - - t_start = get_tbms(); + pattern[0] = 0xdeadbeef; + pattern[1] = 0xdeadbeef; #if !defined(CONFIG_DDR_ECC_INIT_VIA_DMA) - debug("DDR init: Cache flush method\n"); - for (p = 0; p < (uint *)(dram_size); p++) { - if (((unsigned int)p & 0x1f) == 0) { - ppcDcbz((unsigned long) p); - } - - /* write pattern to cache and flush */ - *p = (unsigned int)0xdeadbeef; - - if (((unsigned int)p & 0x1c) == 0x1c) { - ppcDcbf((unsigned long) p); - } + debug("DDR init: CPU FP write method\n"); + size = dram_size; + for (p = 0; p < (u64*)(size); p++) { + ppcDWstore((u32*)p, pattern); } + __asm__ __volatile__("sync"); #else - printf("DDR init: DMA method\n"); - for (p = 0; p < (uint *)(8 * 1024); p++) { - /* zero one data cache line */ - if (((unsigned int)p & 0x1f) == 0) { - ppcDcbz((unsigned long)p); - } - - /* write pattern to it and flush */ - *p = (unsigned int)0xdeadbeef; - - if (((unsigned int)p & 0x1c) == 0x1c) { - ppcDcbf((unsigned long)p); - } + debug("DDR init: DMA method\n"); + size = 0x2000; + for (p = 0; p < (u64*)(size); p++) { + ppcDWstore((u32*)p, pattern); } - + __asm__ __volatile__("sync"); + /* Initialise DMA for direct transfer */ + dma_init(); /* 8K */ dma_xfer((uint *)0x2000, 0x2000, (uint *)0); /* 16K */ diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index 6e02cce..a616beb 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -870,6 +870,18 @@ ppcDcbz: dcbz r0,r3 blr + .globl ppcDWstore +ppcDWstore: + lfd 1, 0(r4) + stfd 1, 0(r3) + blr + + .globl ppcDWload +ppcDWload: + lfd 1, 0(r3) + stfd 1, 0(r4) + blr + /*-------------------------------------------------------------------*/ /* diff --git a/include/common.h b/include/common.h index e4637ad..955f107 100644 --- a/include/common.h +++ b/include/common.h @@ -384,6 +384,11 @@ void ppcSync(void); void ppcDcbz(unsigned long value); #endif +#if defined (CONFIG_MPC83XX) +void ppcDWload(unsigned int *addr, unsigned int *ret); +void ppcDWstore(unsigned int *addr, unsigned int *value); +#endif + /* $(CPU)/cpu.c */ int checkcpu (void); int checkicache (void); diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h

1 0