July 2006 - U-Boot

[U-Boot-Users] minimal bootloader for arm11
by satpal parmar 21 Jul '06

21 Jul '06

Hi everyone; I want to port linux 2.6 on an new board based on ARM1176. I am not able to find suitable bootloader for that.I have used our own bootloader to port same linux kernel on ARM9 board. Considering the fact that I have no experince in bootloader coding. and limited knowledge of uboot code .i would appreciate if any one can help me in in following issues. a) Can I use Uboot for our new ARM11 board. If yes. How much expertise is required. b) If I decide to modify ower own bootloader code ; can you help me to indentify what areas required fresh coding or chagnes in reference to our board ; i want just minimal bootloader. Thanks in advance. satpal

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[U-Boot-Users] [PATCH] improve the CSB bus and DMA performance of 83xx
by Liu Dave-r63238 21 Jul '06

21 Jul '06

All, The default pipeline depth of 83xx CSB is 1 outstanding transcation. If change it to 4, the CSB performace will improve. Change the DMA transfer with cache line burst read/write The DMA performance improved 6x. CHANGELOG: * improve the coherency system bus performance and improve the DMA transfer performace. Patch by Dave Liu, 21 July 2006 diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 20bba6c..2eea221 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -257,9 +257,7 @@ int dma_xfer(void *dest, u32 count, void __asm__ __volatile__ ("isync"); /* init direct transfer, clear CS bit */ - dmamr0 = (DMA_CHANNEL_TRANSFER_MODE_DIRECT | - DMA_CHANNEL_SOURCE_ADDRESS_HOLD_8B | - DMA_CHANNEL_SOURCE_ADRESSS_HOLD_EN); + dmamr0 = DMA_CHANNEL_TRANSFER_MODE_DIRECT; dma->dmamr0 = swab32(dmamr0); diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index 6ed0992..8366cb7 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -69,7 +69,8 @@ #endif #ifdef CFG_SICRL im->sysconf.sicrl = CFG_SICRL; #endif - + /* Set CSB bus pipeline depth */ + im->arbiter.acr |= ACR_PIPE_DEP_IS_03; /* * Memory Controller: */ diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h index c2b4c5c..24191c5 100644 --- a/include/asm-ppc/immap_83xx.h +++ b/include/asm-ppc/immap_83xx.h @@ -371,6 +371,7 @@ typedef struct arbiter8349 { u32 acr; /* Arbiter Configuration Register */ #define ACR_COREDIS 0x10000000 /* Core disable. */ #define ACR_PIPE_DEP 0x00070000 /* Pipeline depth (number of outstanding transactions). */ +#define ACR_PIPE_DEP_IS_03 0x00030000 /* Pipeline depth is 4 */ #define ACR_PCI_RPTCNT 0x00007000 /* PCI repeat count. */ #define ACR_RPTCNT 0x00000700 /* Repeat count. */ #define ACR_APARK 0x00000030 /* Address parking. */

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[U-Boot-Users] [PATCH] fix incorrect bus clk of 83xx
by Liu Dave-r63238 21 Jul '06

21 Jul '06

All, The gd->bus_clk of 83xx should be csb_clk, not libu_clk, If it don't be changed, will make the timer incorrect. CHANGELOG: * fix incorrect gd->bus_clk, it should be csb_clk Patch by Dave Liu, 21 July 2006 diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c index ad6b3f6..bc689c1 100644 --- a/cpu/mpc83xx/speed.c +++ b/cpu/mpc83xx/speed.c @@ -333,7 +333,7 @@ #endif /* (CFG_HRCW_HIGH | RCWH_PCIHOST) gd->pci_clk = pci_sync_in; gd->cpu_clk = gd->core_clk; - gd->bus_clk = gd->lbiu_clk; + gd->bus_clk = gd->csb_clk; return 0; }

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[U-Boot-Users] load u-boot via network and run in ram by u-boot in flash
by Li, Linfeng (SDC) 21 Jul '06

21 Jul '06

Hi I have available u-boot in flash, and it can work . I want to load the u-boot from network and test, but not write to flash, just run in ram. U-boot run from flash should boot the test u-boot like boot other OS. Did somebody do it? How can i do it? Please give me some sugguestion. Thanks&Regards Linfeng CONFIDENTIALITY NOTICE: The contents in this e-mail and any attachment may be proprietary, confidential, and privileged, and is intended only for the use of the individual(s) named above. If the reader of this message is not the intended recipient, you are hereby notified that any dissemination, disclosure, copying or distribution of the contents is strictly prohibited. If you have received this communication in error, please notify the sender immediately by replying to this message and deleting it and all copies and backups thereof.

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[U-Boot-Users] U-Boot AT91RM9200EK Ethernet without PHY
by Erdmann, Thomas 21 Jul '06

21 Jul '06

Hello List, my custom Board (based on the AT91RM9200) doesn't use an Ethernet PHY, because it's directly connected to an Ethernet Switch CPU Port. This is correctly detected and a warning is printed. I want to hard wire the MAC Settings to 100MHz/Full Duplex to communicate with the Switch Chip. Does anyone know if there is a Configuration Option for this or has already done a Patch for this ? Thanks Thomas

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[U-Boot-Users] loadb NAK
by Banajit Goswami 21 Jul '06

21 Jul '06

Hi All, I am able to transmit smaller binary file(about 100bytes) using kermit, but getting the following error when trying to transmit bigger file (around 1500 bytes): (/root/) C-Kermit>send /binary *binary_file_name* ************************* SEND-class command failed. Packets sent: 87 Retransmissions: 22 Timeouts: 3 Damaged packets: 0 Fatal Kermit Protocol Error: NAK out of window Any idea why I am getting a NAK? any pointer would be of much help. Thanks in advance Banajit

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Re: [U-Boot-Users] skipping bad blocks when erasing nand
by David Byron 21 Jul '06

21 Jul '06

On Friday, July 14th, Wolfgang Denk wrote: > I tend to agree here, which was the reason that I said I was willing > to accept the patch, but that at least the printf() shoould be kept > so that the user gets the warning. Sorry for the delay. Here's a patch that lets the erase continue, but does print a message. -DB

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Re: [U-Boot-Users] No serial output from mips/au1550
by mitsy 20 Jul '06

20 Jul '06

Thank you all for the suggestions and help. I will double check all the settings. Mitsy On 7/19/06, Andrew Dyer <amdyer(a)gmail.com> wrote: > On 7/19/06, mitsy <mitsy12(a)gmail.com> wrote: > > I'm using BDI2000 to debug my version of u-boot, which is still under > > development. I can step through the code via telnet with bdi, but I'm > > not seeing any output on serial port when it's supposed to be writing > > stuff out. The only time I see anything on the serial console is when > > I reset the target, before running anything. It spits put some > > garbage. > > Our company does consulting work and having been through u-boot on the > 1550 a few times could probably get you up and running pretty quickly. > If you are interested you can take a look at our website > (http://www.righthandtech.com) or e-mail me at > adyer(a)righthandtech.com. I can get you in touch with the guys that > handle the business end of things or you can use the contact info on > the website. > > -- > Hardware, n.: > The parts of a computer system that can be kicked. >

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[U-Boot-Users] problem compiling examples
by Josef.Baumgartner＠de.telex.com 20 Jul '06

20 Jul '06

Hi, im currently working with the coldfire port of u-boot. When I try to compile the examples, the following error occurs: make[1]: Entering directory `/misc/usb/tmp/u-boot/u-boot-work/examples' m68k-elf-gcc -g -Os -ffixed-d7 -msep-data -D__KERNEL__ -DTEXT_BASE=0xffe00000 -I/misc/usb/tmp/u-boot/u-boot-work/include -fno-builtin -ffreestanding -nostdinc -isystem /usr/local/lib/gcc-lib/m68k-elf/2.95.3/include -pipe -DCONFIG_M68K -D__M68K__ -m5307 -Wall -Wstrict-prototypes -c -o hello_world.o hello_world.c m68k-elf-gcc -g -Os -ffixed-d7 -msep-data -D__KERNEL__ -DTEXT_BASE=0xffe00000 -I/misc/usb/tmp/u-boot/u-boot-work/include -fno-builtin -ffreestanding -nostdinc -isystem /usr/local/lib/gcc-lib/m68k-elf/2.95.3/include -pipe -DCONFIG_M68K -D__M68K__ -m5307 -Wall -Wstrict-prototypes -c -o stubs.o stubs.c m68k-elf-ar crv libstubs.a stubs.o a - stubs.o make[1]: *** No rule to make target `hello_world.srec', needed by `all'. Stop. make[1]: Leaving directory `/misc/usb/tmp/u-boot/u-boot-work/examples' make: *** [examples] Error 2 It seems, there is a problem with the chained implicit rules used to make the srecord file. If I swap the targets as shown below, the problem dissapears: --- u-boot-2006-06-30-2020/examples/Makefile 2006-07-20 14:01:19.000000000 +0200 +++ u-boot-work/examples/Makefile 2006-07-19 12:24:29.000000000 +0200 @@ -60,7 +60,7 @@ include $(TOPDIR)/config.mk SREC = hello_world.srec -BIN = hello_world.bin hello_world +BIN = hello_world hello_world.bin ifeq ($(CPU),mpc8xx) SREC = test_burst.srec @@ -122,7 +122,7 @@ CPPFLAGS += -I.. -all: .depend $(OBJS) $(LIB) $(SREC) $(BIN) +all: .depend $(OBJS) $(LIB) $(BIN) $(SREC) ######################################################################### $(LIB): .depend $(LIBOBJS) I use Gnu Make 3.81 on a debian linux host. Has anybody else had this problem? Would it be ok to change the Makefile or is there another soluten? Regards, Josef

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[U-Boot-Users] [RFC]Nand write/read without ecc
by Terence Soh 20 Jul '06

20 Jul '06

Hi, This patch is specifically for u-bootloader to program binaries generated by mkyaffsimage, for example, as these binaries includes the 16 bytes oob. All comments are appreciated. Typical usage will be "nand write.noecc <source address> <Nand offset address> <size>". Terence. diff /data/src/u-boot-1.1.4/common/cmd_nand.c ./common/cmd_nand.c 8a9,12 > * > * Added programming in both block and spare column area > * Specifically, it is meant for programming binary generated by mkyaffsimage > * (C) 2006 Applied Biosystems Instruments <terence.soh(a)appliedbiosystems.com> 70a75 > #define NANDRW_NOECC 0x08 93a99,105 > static int nand_write_noecc (struct nand_chip* nand, size_t to, size_t len, > size_t * retlen, const u_char * buf); > static int nand_read_noecc(struct nand_chip *nand, size_t start, size_t len, > size_t * retlen, u_char *buf); > int nand_rw_noecc (struct nand_chip* nand, int cmd, > size_t start, size_t len, > size_t * retlen, u_char * buf); 98a111 > static int pages_per_block; 219a233,235 > else if (cmdtail && !strncmp(cmdtail, ".noecc", 2)) { > cmd |= NANDRW_NOECC; /* read/write to OOB without ECC */ > } 243,244c259,265 < ret = nand_rw(nand_dev_desc + curr_device, cmd, off, size, < (size_t *)&total, (u_char*)addr); --- > if(cmd & NANDRW_NOECC){ > ret = nand_rw_noecc(nand_dev_desc + curr_device, cmd, off, size, > &total, (u_char*)addr); > } else { > ret = nand_rw(nand_dev_desc + curr_device, cmd, off, size, > &total, (u_char*)addr); > } 287a309,310 > "nand read.noecc addr off size - read data without ECC" > "nand write.noecc addr off size - write data without ECC" 447a471,528 > /* Dealing in (nand->oobblock + nand->oobsize) i.e. 528, 2112... bytes per page */ > int nand_rw_noecc (struct nand_chip* nand, int cmd, > size_t start, size_t len, > size_t * retlen, u_char * buf) > { > int ret = 0, n, total = 0; > unsigned long eblk; > > while (len) { > if (start%((nand->oobblock + nand->oobsize)*pages_per_block) == 0) { > /* have crossed into new erase block, deal with > * it if it is sure marked bad. > */ > eblk = start/((nand->oobblock + nand->oobsize)*pages_per_block); > eblk *= nand->oobblock; > if (check_block(nand, eblk)) { > if (cmd == (NANDRW_WRITE | NANDRW_NOECC)) { > start += ((nand->oobblock + nand->oobsize)*pages_per_block); > continue; > } > } > } > > if(cmd & NANDRW_NOECC){ > /* Start on 528/2112 bytes boundary */ > if(start%((nand->oobblock + nand->oobsize))){ > printf("\nError: Reading/Writing must start from %d byte page boundary, 0x%8X\n", > (nand->oobblock + nand->oobsize),start); > return -1; > } > else{ > /* reading and writing without ECC */ > if (cmd & NANDRW_READ) { > ret = nand_read_noecc(nand, start, > min(len, (nand->oobblock + nand->oobsize)*pages_per_block), > &n, (u_char*)buf); > } else { > ret = nand_write_noecc(nand, start, > min(len, (nand->oobblock + nand->oobsize)*pages_per_block), > &n, (u_char*)buf); > } > } > } > > if (ret) > break; > > start += n; > buf += n; > total += n; > len -= n; > } > if (retlen) > *retlen = total; > > return ret; > } > 724a806 > pages_per_block = nand->erasesize / nand->oobblock; 878a961,1010 > /* Read entire page (without ECC) */ > static int nand_read_noecc(struct nand_chip *nand, size_t start, size_t len, > size_t * retlen, u_char *buf) > { > int col, page; > > /* First we calculate the starting page */ > /* Address here take spare area into account */ > page = start / (nand->oobblock + nand->oobsize); > /* Get raw starting column */ > col = start % (nand->oobblock + nand->oobsize); > > /* Initialize return value */ > *retlen = 0; > NAND_ENABLE_CE(nand); /* set pin low */ > /* Loop until all data read */ > while (*retlen < len) { > /* Send the read command */ > NanD_Command(nand, NAND_CMD_READ0); > > /* Address to NAND flash don't take the spare area into account */ > if (nand->bus16) { > NanD_Address(nand, ADDR_COLUMN_PAGE, > (page * nand->oobblock) + (col >> 1)); > } else { > NanD_Address(nand, ADDR_COLUMN_PAGE, > (page * nand->oobblock) + col); > } > > /* Read the data directly into the return buffer */ > if ((*retlen + (nand->oobblock + nand->oobsize - col)) >= len) { > NanD_ReadBuf(nand, buf + *retlen, len - *retlen); > *retlen = len; > /* We're done */ > continue; > } else { > NanD_ReadBuf(nand, buf + *retlen, nand->oobblock + nand->oobsize - col); > *retlen += nand->oobblock + nand->oobsize - col; > } > /* For subsequent reads align to page boundary. */ > col = 0; > /* Increment page address */ > page++; > } > /* De-select the NAND device */ > NAND_DISABLE_CE(nand); /* set pin high */ > /* Always successful. No ECC */ > return 0; > } > 1247a1380,1457 > /* Write entire page (including out of bound area) */ > static int nand_write_noecc (struct nand_chip* nand, size_t to, size_t len, > size_t * retlen, const u_char * buf) > { > int i, page, col, ret, cnt = 0; > > /* Initialize return length value */ > *retlen = 0; > ret = 0; > > /* Get page */ > page = ((int) to) / (nand->oobblock + nand->oobsize); > /* Get the starting column. Should be zero */ > col = to % (nand->oobblock + nand->oobsize); > > /* Loop until all data is written */ > while (*retlen < len) { > /* Write data into buffer */ > if ((col + len - *retlen) >= (nand->oobblock + nand->oobsize)) { > /* >= (nand->oobblock + nand->oobsize) bytes to be written */ > for (i = col, cnt = 0; i < (nand->oobblock + nand->oobsize); i++, cnt++) { > nand->data_buf[i] = buf[(*retlen + cnt)]; > } > } else { > /* Less than (nand->oobblock + nand->oobsize) bytes to be written */ > for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++) { > nand->data_buf[i] = buf[(*retlen + cnt)]; > } > } > /* set pin low */ > NAND_ENABLE_CE(nand); > NanD_Command (nand, NAND_CMD_SEQIN); > > if (nand->bus16) { > NanD_Address (nand, ADDR_COLUMN_PAGE, > (page * nand->oobblock) + (col >> 1)); > } else { > NanD_Address (nand, ADDR_COLUMN_PAGE, > (page * nand->oobblock) + col); > } > /* Write out complete page of data */ > if (nand->bus16) { > for (i = 0; i < cnt; i += 2) { > WRITE_NAND (nand->data_buf[i] + > (nand->data_buf[i + 1] << 8), > nand->IO_ADDR); > } > } else { > /* Send command to begin auto page programming */ > for (i = 0; i < cnt ; i++) > WRITE_NAND (nand->data_buf[i], nand->IO_ADDR); > } > /* Send command to actually program the data */ > NanD_Command (nand, NAND_CMD_PAGEPROG); > NanD_Command (nand, NAND_CMD_STATUS); > > NAND_WAIT_READY(nand); > > /* See if device thinks it succeeded */ > if(READ_NAND (nand->IO_ADDR) & 0x01) { > printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__, > page); > ret = -1; > } > > /* De-select the NAND device */ > NAND_DISABLE_CE(nand); /* set pin high */ > > /* Next data start at page boundary */ > col = 0; > /* Update written bytes count */ > *retlen += cnt; > /* Increment page address */ > page++; > } > return ret; > } >

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