November 2023 - U-Boot

[PATCH v3] clk: nuvoton: add read only feature for clk driver
by Jim Liu 15 Dec '23

15 Dec '23

Add a flag to set ahb/apb/fiu/spi clock divider as read-only The spi clock setting is related to booting flash, it is setup by early bootloader. It just protects the clock source and can't modify it in uboot. Signed-off-by: Jim Liu <JJLIU0(a)nuvoton.com> --- Changes for v3: - add commit message Changes for v2: - add commit message --- drivers/clk/nuvoton/clk_npcm.c | 15 ++++++++++++--- drivers/clk/nuvoton/clk_npcm.h | 1 + drivers/clk/nuvoton/clk_npcm8xx.c | 12 ++++++------ 3 files changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/clk/nuvoton/clk_npcm.c b/drivers/clk/nuvoton/clk_npcm.c index 8d71f2a24b..18cb9cddbf 100644 --- a/drivers/clk/nuvoton/clk_npcm.c +++ b/drivers/clk/nuvoton/clk_npcm.c @@ -135,7 +135,7 @@ static u32 npcm_clk_get_div(struct clk *clk) return div; } -static u32 npcm_clk_set_div(struct clk *clk, u32 div) +static int npcm_clk_set_div(struct clk *clk, u32 div) { struct npcm_clk_priv *priv = dev_get_priv(clk->dev); struct npcm_clk_div *divider; @@ -145,6 +145,9 @@ static u32 npcm_clk_set_div(struct clk *clk, u32 div) if (!divider) return -EINVAL; + if (divider->flags & DIV_RO) + return 0; + if (divider->flags & PRE_DIV2) div = div >> 1; @@ -153,6 +156,12 @@ static u32 npcm_clk_set_div(struct clk *clk, u32 div) else clkdiv = ilog2(div); + if (clkdiv > (divider->mask >> (ffs(divider->mask) - 1))) { + printf("clkdiv(%d) for clk(%ld) is over limit\n", + clkdiv, clk->id); + return -EINVAL; + } + val = readl(priv->base + divider->reg); val &= ~divider->mask; val |= (clkdiv << (ffs(divider->mask) - 1)) & divider->mask; @@ -253,8 +262,8 @@ static ulong npcm_clk_set_rate(struct clk *clk, ulong rate) if (ret) return ret; - debug("%s: rate %lu, new rate (%lu / %u)\n", __func__, rate, parent_rate, div); - return (parent_rate / div); + debug("%s: rate %lu, new rate %lu\n", __func__, rate, npcm_clk_get_rate(clk)); + return npcm_clk_get_rate(clk); } static int npcm_clk_set_parent(struct clk *clk, struct clk *parent) diff --git a/drivers/clk/nuvoton/clk_npcm.h b/drivers/clk/nuvoton/clk_npcm.h index 06b60dc8b8..b4726d8381 100644 --- a/drivers/clk/nuvoton/clk_npcm.h +++ b/drivers/clk/nuvoton/clk_npcm.h @@ -50,6 +50,7 @@ #define PRE_DIV2 BIT(2) /* Pre divisor = 2 */ #define POST_DIV2 BIT(3) /* Post divisor = 2 */ #define FIXED_PARENT BIT(4) /* clock source is fixed */ +#define DIV_RO BIT(5) /* divider is read-only */ /* Parameters of PLL configuration */ struct npcm_clk_pll { diff --git a/drivers/clk/nuvoton/clk_npcm8xx.c b/drivers/clk/nuvoton/clk_npcm8xx.c index 27e3cfcf55..d1b32e3237 100644 --- a/drivers/clk/nuvoton/clk_npcm8xx.c +++ b/drivers/clk/nuvoton/clk_npcm8xx.c @@ -45,12 +45,12 @@ static struct npcm_clk_select npcm8xx_clk_selectors[] = { }; static struct npcm_clk_div npcm8xx_clk_dividers[] = { - {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2}, - {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2}, - {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2}, - {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1}, - {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1}, - {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1}, + {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2 | DIV_RO}, + {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2 | DIV_RO}, + {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2 | DIV_RO}, + {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1 | DIV_RO}, + {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1 | DIV_RO}, + {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1 | DIV_RO}, {NPCM8XX_CLK_SPIX, CLKDIV3, SPIXCKDIV, DIV_TYPE1}, {NPCM8XX_CLK_UART, CLKDIV1, UARTDIV1, DIV_TYPE1}, {NPCM8XX_CLK_UART2, CLKDIV3, UARTDIV2, DIV_TYPE1}, -- 2.25.1

2 2

[PATCH v2 0/6] board: siemens: clean up subfolders
by Enrico Leto 15 Dec '23

15 Dec '23

This serie depends on the serie: [PATCH 0/6] siemens,am335x: clean up the draco board family The common folder was initialially created for the common parts of the products based on draco-am355x board family. We have the product lines 'pxm2', 'rut' and the base line unfortunately named 'draco'! Adding the new capricorn-imx8 board family, the files were enhanced without cleanup. Simplify first EEPROM probe and access that implements both i2c with & without driver model. Use abstraction functions for this. Move all am355x specifics to a new file 'board_am335x'. Clean-up includes, config checks, maintainer. Signed-off-by: Enrico Leto <enrico.leto(a)siemens.com> --- Changes for v2: - fix wrong value in CONFIG_IS_ENABLED Enrico Leto (6): siemens: eeprom: clean up definitions siemens: eeprom: simplify setup & read siemens draco: i2c: use driver model for u-boot siemens: board: clean up draco products vs common siemens: board: clean up includes siemens: factoryset: use correct config for soc specific implementation board/siemens/capricorn/board.c | 5 +- board/siemens/common/board.c | 110 ++++++++++++---------------- board/siemens/common/board.h | 24 ++++++ board/siemens/common/board_am335x.c | 58 +++++++++++++++ board/siemens/common/board_am335x.h | 38 ++++++++++ board/siemens/common/factoryset.c | 82 ++++----------------- board/siemens/draco/Makefile | 2 + board/siemens/draco/board.c | 59 ++++----------- board/siemens/draco/board.h | 32 ++------ board/siemens/draco/mux.c | 6 +- board/siemens/pxm2/MAINTAINERS | 2 +- board/siemens/pxm2/Makefile | 2 + board/siemens/pxm2/board.c | 34 +++------ board/siemens/pxm2/board.h | 21 ------ board/siemens/pxm2/mux.c | 6 +- board/siemens/rut/MAINTAINERS | 2 +- board/siemens/rut/Makefile | 2 + board/siemens/rut/board.c | 33 ++------- board/siemens/rut/board.h | 21 ------ board/siemens/rut/mux.c | 5 +- configs/draco-etamin_defconfig | 4 +- configs/draco-rastaban_defconfig | 4 +- configs/draco-thuban_defconfig | 4 +- include/configs/draco-etamin.h | 3 - include/configs/draco-rastaban.h | 3 - include/configs/draco-thuban.h | 3 - 26 files changed, 245 insertions(+), 320 deletions(-) create mode 100644 board/siemens/common/board.h create mode 100644 board/siemens/common/board_am335x.c create mode 100644 board/siemens/common/board_am335x.h delete mode 100644 board/siemens/pxm2/board.h delete mode 100644 board/siemens/rut/board.h -- 2.30.2

2 7

[PATCH v1 0/1] Fix clk-gpio driver
by Svyatoslav Ryhel 15 Dec '23

15 Dec '23

Existing gpio-gate-clock driver acts like a simple GPIO switch without any effect on gated clock. Add actual clock actions into enable/disable ops and implement get_rate op by passing gated clock if it is enabled. Testing current driver implementation shows that it is not fully capable and lacks gated clock manipulations. Svyatoslav Ryhel (1): clk: clk-gpio: add actual gated clock drivers/clk/clk-gpio.c | 47 +++++++++++++++++++++++++++++++++++------- 1 file changed, 40 insertions(+), 7 deletions(-) -- 2.40.1

2 6

[PATCH] arm: dts: imx8mm_evk: Fix PMIC definition
by Alexander Koch 15 Dec '23

15 Dec '23

Newer revisions of the i.MX8MM EVK are equipped with a different PMIC than the initial ones (PCA9540 instead of BD71847), which has already been reflected in 4c07a21e5. These changes have been reverted implicitly as part of the device tree re-sync with the Linux kernel done in 24a7a3c1c. This lead to an inconsistent state: while the device tree describes the old PMIC again the code in board/freescale/imx8mm_evk/spl.c tries to initialize the new PMIC: ret = pmic_get("pca9450@25", &dev); if (ret == -ENODEV) { puts("No pmic\n"); return 0; } This leads to the expected error message from SPL: U-Boot SPL 2023.07.02 (Sep 04 2023 - 15:57:57 +0200) -> No pmic SEC0: RNG instantiated WDT: Started watchdog@30280000 with servicing every 1000ms (60s timeout) Trying to boot from NOR NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.6-0-g15e8ff164 NOTICE: BL31: Built : 13:51:09, Sep 4 2023 Fix by re-applying the device tree changes from 4c07a21e5. Signed-off-by: Alexander Koch <akoch(a)initse.com> --- arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 +- arch/arm/dts/imx8mm-evk.dtsi | 126 ++++++++++++++-------------- 2 files changed, 67 insertions(+), 63 deletions(-) diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 13688ec0d0..1bc7e4a38b 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -121,11 +121,11 @@ bootph-pre-ram; }; -&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { +&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} { bootph-pre-ram; }; -&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { +&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} { bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-evk.dtsi b/arch/arm/dts/imx8mm-evk.dtsi index 7d6317d95b..f2c15bf0ff 100644 --- a/arch/arm/dts/imx8mm-evk.dtsi +++ b/arch/arm/dts/imx8mm-evk.dtsi @@ -183,114 +183,118 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - pmic@4b { - compatible = "rohm,bd71847"; - reg = <0x4b>; - pinctrl-names = "default"; + pmic: pca9450@25 { + reg = <0x25>; + compatible = "nxp,pca9450a"; + /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */ pinctrl-0 = <&pinctrl_pmic>; - interrupt-parent = <&gpio1>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - rohm,reset-snvs-powered; - - #clock-cells = <0>; - clocks = <&osc_32k 0>; - clock-output-names = "clk-32k-out"; + gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; regulators { - buck1_reg: BUCK1 { - regulator-name = "buck1"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1300000>; + #address-cells = <1>; + #size-cells = <0>; + + pca9450,pmic-buck2-uses-i2c-dvs; + /* Run/Standby voltage */ + pca9450,pmic-buck2-dvs-voltage = <950000>, <850000>; + + buck1_reg: regulator@0 { + reg = <0>; + regulator-compatible = "buck1"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; regulator-boot-on; regulator-always-on; - regulator-ramp-delay = <1250>; + regulator-ramp-delay = <3125>; }; - buck2_reg: BUCK2 { - regulator-name = "buck2"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1300000>; + buck2_reg: regulator@1 { + reg = <1>; + regulator-compatible = "buck2"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; regulator-boot-on; regulator-always-on; - regulator-ramp-delay = <1250>; - rohm,dvs-run-voltage = <1000000>; - rohm,dvs-idle-voltage = <900000>; + regulator-ramp-delay = <3125>; }; - buck3_reg: BUCK3 { - // BUCK5 in datasheet - regulator-name = "buck3"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1350000>; + buck3_reg: regulator@2 { + reg = <2>; + regulator-compatible = "buck3"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; regulator-boot-on; regulator-always-on; }; - buck4_reg: BUCK4 { - // BUCK6 in datasheet - regulator-name = "buck4"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; + buck4_reg: regulator@3 { + reg = <3>; + regulator-compatible = "buck4"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; regulator-boot-on; regulator-always-on; }; - buck5_reg: BUCK5 { - // BUCK7 in datasheet - regulator-name = "buck5"; - regulator-min-microvolt = <1605000>; - regulator-max-microvolt = <1995000>; + buck5_reg: regulator@4 { + reg = <4>; + regulator-compatible = "buck5"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; regulator-boot-on; regulator-always-on; }; - buck6_reg: BUCK6 { - // BUCK8 in datasheet - regulator-name = "buck6"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; + buck6_reg: regulator@5 { + reg = <5>; + regulator-compatible = "buck6"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; regulator-boot-on; regulator-always-on; }; - ldo1_reg: LDO1 { - regulator-name = "ldo1"; + ldo1_reg: regulator@6 { + reg = <6>; + regulator-compatible = "ldo1"; regulator-min-microvolt = <1600000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; - ldo2_reg: LDO2 { - regulator-name = "ldo2"; + ldo2_reg: regulator@7 { + reg = <7>; + regulator-compatible = "ldo2"; regulator-min-microvolt = <800000>; - regulator-max-microvolt = <900000>; + regulator-max-microvolt = <1150000>; regulator-boot-on; regulator-always-on; }; - ldo3_reg: LDO3 { - regulator-name = "ldo3"; - regulator-min-microvolt = <1800000>; + ldo3_reg: regulator@8 { + reg = <8>; + regulator-compatible = "ldo3"; + regulator-min-microvolt = <800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; - ldo4_reg: LDO4 { - regulator-name = "ldo4"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1800000>; + ldo4_reg: regulator@9 { + reg = <9>; + regulator-compatible = "ldo4"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; - ldo6_reg: LDO6 { - regulator-name = "ldo6"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; + ldo5_reg: regulator@10 { + reg = <10>; + regulator-compatible = "ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; }; }; }; -- 2.42.0

2 1

[PATCH v2] clk: check parent_name in clk_register to avoid confusing log_error() output
by Yang Xiwen via B4 Relay 15 Dec '23

15 Dec '23

From: Yang Xiwen <forbidden405(a)outlook.com> For some gate clocks and fixed clocks without a parent, calling clk_register will print an useless error message indicating that parent is missing. Fix that by gaurding log_xxx() with an if-statement. Signed-off-by: Yang Xiwen <forbidden405(a)outlook.com> Suggested-by: Sean Anderson <seanga2(a)gmail.com> --- It's found during my development for HiSilicon clock driver. --- Changes in v2: - drop the commit which exports clk_mux_register. - drop the commit which is already merged - drop ccf enable_count fix as it'll be in another patchset - use Anderson's patch for clk_register() - Link to v1: https://lore.kernel.org/r/20230809-clk-fix-v1-0-808dbae54e5e@outlook.com --- drivers/clk/clk.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index a5a3461b66..6ede1b4d4d 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -18,17 +18,19 @@ int clk_register(struct clk *clk, const char *drv_name, const char *name, const char *parent_name) { - struct udevice *parent; + struct udevice *parent = NULL; struct driver *drv; int ret; - ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent); - if (ret) { - log_err("%s: failed to get %s device (parent of %s)\n", - __func__, parent_name, name); - } else { - log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name, - parent->name, parent); + if (parent_name) { + ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent); + if (ret) { + log_err("%s: failed to get %s device (parent of %s)\n", + __func__, parent_name, name); + } else { + log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name, + parent->name, parent); + } } drv = lists_driver_lookup_name(drv_name); --- base-commit: 580eb31199be8a822e62f20965854a242f895d03 change-id: 20230807-clk-fix-17e895f79817 Best regards, -- Yang Xiwen <forbidden405(a)outlook.com>

2 2

[PATCH v2 0/4] clk: ccf: fix enable_count mismatch
by Yang Xiwen via B4 Relay 15 Dec '23

15 Dec '23

As described in [1], enable_count is incremented by 2 when ccf_clk_enable() is called. This series of patch fixed this issue and added a testcase for that. [1]: https://lore.kernel.org/all/SEZPR06MB695927A6DEEEF8489A06897396A7A@SEZPR06M… Signed-off-by: Yang Xiwen <forbidden405(a)outlook.com> --- Changes in v2: - add missing SoB in patch 1/4, no functional change - Link to v1: https://lore.kernel.org/r/20231111-enable_count-v1-0-509f400a99cb@outlook.c… --- Yang Xiwen (4): clk: clk_sandbox_ccf: assign ccf_clk_ops to .ops of the driver clk: get correct ops for clk_enable() and clk_disable() clk: clk_sandbox: get devm clock i2c_root test: dm: clk_ccf: get "i2c_root" clock from &clk_ccf arch/sandbox/dts/test.dts | 6 ++++-- arch/sandbox/include/asm/clk.h | 1 + drivers/clk/clk-uclass.c | 2 ++ drivers/clk/clk_sandbox_ccf.c | 1 + drivers/clk/clk_sandbox_test.c | 5 +++++ test/dm/clk_ccf.c | 14 +++++++++++--- 6 files changed, 24 insertions(+), 5 deletions(-) --- base-commit: 3b913c148249a2b9d12ff25517ec311646e83bee change-id: 20231111-enable_count-ad5001326815 Best regards, -- Yang Xiwen <forbidden405(a)outlook.com>

2 7

[PATCH v3 0/4] bootm: Handle compressed arm64 images with bootm
by Simon Glass 15 Dec '23

15 Dec '23

This little series corrects a problem I noticed with arm64 images, where the kernel is not recognised if compression is used: U-Boot> tftp image.fit Using ethernet@7d580000 device TFTP from server 192.168.4.7; our IP address is 192.168.4.147 Filename 'image.fit'. Load address: 0x1000000 Loading: ################################################## 23 MiB 20.5 MiB/s done Bytes transferred = 24118272 (1700400 hex) U-Boot> bootm ## Loading kernel from FIT Image at 01000000 ... Using 'conf-768' configuration Trying 'kernel' kernel subimage Description: Linux Type: Kernel Image (no loading done) Compression: gzip compressed Data Start: 0x01000120 Data Size: 13662338 Bytes = 13 MiB Verifying Hash Integrity ... OK Bad Linux ARM64 Image magic! With this series: U-Boot> tftp 20000000 image.fit Using ethernet@7d580000 device TFTP from server 192.168.4.7; our IP address is 192.168.4.147 Filename 'image.fit'. Load address: 0x20000000 Loading: ################################################## 23.5 MiB 20.8 MiB/s done Bytes transferred = 24642560 (1780400 hex) U-Boot> bootm 0x20000000 ## Loading kernel from FIT Image at 20000000 ... Using 'conf-768' configuration Trying 'kernel' kernel subimage Description: Linux Type: Kernel Image (no loading done) Compression: zstd compressed Data Start: 0x20000120 Data Size: 14333475 Bytes = 13.7 MiB Verifying Hash Integrity ... OK Using kernel load address 80000 ## Loading fdt from FIT Image at 20000000 ... Using 'conf-768' configuration Trying 'fdt-768' fdt subimage Description: Raspberry Pi 4 Model B Type: Flat Device Tree Compression: zstd compressed Data Start: 0x215f820c Data Size: 9137 Bytes = 8.9 KiB Architecture: AArch64 Verifying Hash Integrity ... OK Uncompressing Flat Device Tree to 3aff3010 Booting using the fdt blob at 0x3aff3010 Working FDT set to 3aff3010 Uncompressing Kernel Image (no loading done) to 80000 Moving Image from 0x80000 to 0x200000, end=2b00000 Using Device Tree in place at 000000003aff3010, end 000000003afff4c4 Working FDT set to 3aff3010 Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd083] The problem is that the arm64 magic is checked before the image is decompressed. However this is only part of it. The kernel_noload image type doesn't work with compression, since the kernel is not loaded. So this series deals with that by using an lmb-allocated buffer for the uncompressed kernel. Another issue is that the arm64 handling is done too early, before the image is loaded. This series moves it to after loading, so that compression can be handled. A patch is included to show the kernel load-address, so it is easy to see what is going on. One annoying feature of arm64 is that the image is often copied to another address. It might be possible for U-Boot to figure that out earlier and decompress it to the right place, but perhaps not. With all of this it should be possible to boot a compressed kernel on any of the 990 arm64 boards supported by Linux, although I have only tested two. Changes in v3: - Rebase on to bootm-refactoring series - Support compression with an lmb-allocated region - Drop patch to disallow kernel_noload with compression - Drop patch 'bootm: Allow omitting the load address' Changes in v2: - Rework the patch based on a better understanding of events - Add a 'success' case to the cover letter - Redo how the arm64 support is implemented Simon Glass (4): image: Correct load_bug typo image: Show the load address when decompressing bootm: Move arm64-image processing later bootm: Support kernel_noload with compression boot/bootm.c | 63 +++++++++++++++++++++++++++++++++++-------------- boot/image.c | 13 ++++++---- include/image.h | 2 +- 3 files changed, 55 insertions(+), 23 deletions(-) -- 2.43.0.rc0.421.g78406f8d94-goog

2 6

[PATCH 1/2] board: st: common: Fix board_get_alt_info_mtd()
by Patrice Chotard 15 Dec '23

15 Dec '23

Since MTD devices are partioned, we got the following error when command "dfu 0" is executed: DFU alt info setting: done ERROR: Too many arguments for nor0 ERROR: DFU entities configuration failed! ERROR: (partition table does not match dfu_alt_info?) Fixes: 31325e1b8b9c ("stm32mp1: dynamically build DFU_ALT_INFO") Signed-off-by: Patrice Chotard <patrice.chotard(a)foss.st.com> --- board/st/common/stm32mp_dfu.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c index a8eb8d5cae2..ded3bf81961 100644 --- a/board/st/common/stm32mp_dfu.c +++ b/board/st/common/stm32mp_dfu.c @@ -73,7 +73,6 @@ static void board_get_alt_info_mmc(struct udevice *dev, char *buf) static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf) { struct mtd_info *part; - bool first = true; const char *name; int len, partnum = 0; @@ -86,17 +85,13 @@ static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf) "mtd %s=", name); len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, - "%s raw 0x0 0x%llx ", + "%s raw 0x0 0x%llx", name, mtd->size); list_for_each_entry(part, &mtd->partitions, node) { partnum++; - if (!first) - len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, ";"); - first = false; - len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, - "%s_%s part %d", + ";%s_%s part %d", name, part->name, partnum); } } -- 2.25.1

3 5

[PATCH 1/2] clk: stm32f: fix setting of division factor for LCD_CLK
by Dario Binacchi 15 Dec '23

15 Dec '23

The value to be written to the register must be appropriately shifted, as is correctly done in other parts of the code. Fixes: 5e993508cb25 ("clk: clk_stm32f: Add set_rate for LTDC clock") Signed-off-by: Dario Binacchi <dario.binacchi(a)amarulasolutions.com> --- drivers/clk/stm32/clk-stm32f.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/stm32/clk-stm32f.c b/drivers/clk/stm32/clk-stm32f.c index ed7660196ef0..4c1864193357 100644 --- a/drivers/clk/stm32/clk-stm32f.c +++ b/drivers/clk/stm32/clk-stm32f.c @@ -530,7 +530,8 @@ static ulong stm32_set_rate(struct clk *clk, ulong rate) /* set pll_saidivr with found value */ clrsetbits_le32(&regs->dckcfgr, RCC_DCKCFGR_PLLSAIDIVR_MASK, - pllsaidivr_table[i]); + pllsaidivr_table[i] << + RCC_DCKCFGR_PLLSAIDIVR_SHIFT); return rate; } -- 2.42.0

2 5

[PATCH] ARM: dts: stm32f769-disco: rework ltdc node
by Dario Binacchi 15 Dec '23

15 Dec '23

With commit f479f5dbb7ac ("ARM: dts: stm32: add ltdc support on stm32f746 MCU"), which adds the 'ltdc' node in stm32f746.dtsi, we can simplify stm32f769-disco-uboot.dtsi and align stm32f769-disco.dtsi with the kernel version. Signed-off-by: Dario Binacchi <dario.binacchi(a)amarulasolutions.com> --- arch/arm/dts/stm32f769-disco-u-boot.dtsi | 23 +++++++++-------------- arch/arm/dts/stm32f769-disco.dts | 4 ++++ 2 files changed, 13 insertions(+), 14 deletions(-) diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi index 2c823cce98b4..add55c96e21f 100644 --- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi @@ -70,22 +70,17 @@ }; }; }; + }; +}; - ltdc: display-controller@40016800 { - compatible = "st,stm32-ltdc"; - reg = <0x40016800 0x200>; - resets = <&rcc STM32F7_APB2_RESET(LTDC)>; - clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>; - - status = "okay"; - bootph-all; +&ltdc { + clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>; + bootph-all; - ports { - port@0 { - dp_out: endpoint { - remote-endpoint = <&dsi_in>; - }; - }; + ports { + port@0 { + dp_out: endpoint { + remote-endpoint = <&dsi_in>; }; }; }; diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts index 6f93fc7bcfcd..d63cd2ba7eb4 100644 --- a/arch/arm/dts/stm32f769-disco.dts +++ b/arch/arm/dts/stm32f769-disco.dts @@ -86,6 +86,10 @@ status = "okay"; }; +&ltdc { + status = "okay"; +}; + &rtc { status = "okay"; }; -- 2.42.0

2 3