August 2022 - U-Boot

[PATCH] arm: mvebu: spl: Always fallback to BootROM boot method
by Pali Rohár 09 Aug '22

09 Aug '22

BootROM boot method should always work so always add it as fallback method to spl_boot_list. In case U-Boot SPI driver fails it is better to try using BootROM than hanging as by default only one boot method is specified. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- arch/arm/mach-mvebu/spl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 13c99913c380..bfcba2e73bab 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -271,6 +271,13 @@ u32 spl_boot_device(void) } } +void board_boot_order(u32 *spl_boot_list) +{ + spl_boot_list[0] = spl_boot_device(); + if (spl_boot_list[0] != BOOT_DEVICE_BOOTROM) + spl_boot_list[1] = BOOT_DEVICE_BOOTROM; +} + #else u32 spl_boot_device(void) -- 2.20.1

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[PATCH] arm: mvebu: turris_omnia: Remove hardcoded spi-nor device tree path
by Pali Rohár 09 Aug '22

09 Aug '22

Linux kernel DTS files renamed spi-nor@0 node to flash@0 which effectively broke U-Boot to boot new Linux kernel versions correctly. So remove hardcoded spi-nor device tree path from Turris Omnia board code and replace it by searching for mtd node by compatible string. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- board/CZ.NIC/turris_omnia/turris_omnia.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 108d160f486d..9d7e63865f14 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -32,8 +32,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define OMNIA_SPI_NOR_PATH "/soc/spi@10600/spi-nor@0" - #define OMNIA_I2C_BUS_NAME "i2c@11000->i2cmux@70->i2c@0" #define OMNIA_I2C_MCU_CHIP_ADDR 0x2a @@ -1030,14 +1028,22 @@ static bool fixup_mtd_partitions(void *blob, int offset, struct mtd_info *mtd) static void fixup_spi_nor_partitions(void *blob) { - struct mtd_info *mtd; + struct mtd_info *mtd = NULL; + char mtd_path[64]; int node; - mtd = get_mtd_device_nm(OMNIA_SPI_NOR_PATH); + node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "jedec,spi-nor"); + if (node < 0) + goto fail; + + if (fdt_get_path(gd->fdt_blob, node, mtd_path, sizeof(mtd_path)) < 0) + goto fail; + + mtd = get_mtd_device_nm(mtd_path); if (IS_ERR_OR_NULL(mtd)) goto fail; - node = fdt_path_offset(blob, OMNIA_SPI_NOR_PATH); + node = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor"); if (node < 0) goto fail; -- 2.20.1

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[PATCH] gpio: turris_omnia_mcu: Fix usage of CMD_EXT_CONTROL
by Pali Rohár 09 Aug '22

09 Aug '22

CMD_GENERAL_CONTROL takes two 8-bit arguments but CMD_EXT_CONTROL takes two 16-bit arguments. Fix this issue and change CMD_EXT_CONTROL arguments to 16-bit. Fixes: 5e4d24ccc115 ("gpio: Add Turris Omnia MCU driver") Signed-off-by: Pali Rohár <pali(a)kernel.org> --- drivers/gpio/turris_omnia_mcu.c | 56 +++++++++++++++------------------ 1 file changed, 26 insertions(+), 30 deletions(-) diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/gpio/turris_omnia_mcu.c index 3e5d74e62cdb..986ccde6bc70 100644 --- a/drivers/gpio/turris_omnia_mcu.c +++ b/drivers/gpio/turris_omnia_mcu.c @@ -137,48 +137,44 @@ static int turris_omnia_mcu_get_value(struct udevice *dev, uint offset) static int turris_omnia_mcu_set_value(struct udevice *dev, uint offset, int value) { struct turris_omnia_mcu_info *info = dev_get_plat(dev); - u8 val[2]; - int ret; - u8 reg; + u8 val16[2]; + u8 val32[4]; switch (offset) { /* bank 0 */ - case ilog2(STS_USB30_PWRON): - reg = CMD_GENERAL_CONTROL; - val[1] = CTL_USB30_PWRON; - break; - case ilog2(STS_USB31_PWRON): - reg = CMD_GENERAL_CONTROL; - val[1] = CTL_USB31_PWRON; - break; - case ilog2(STS_ENABLE_4V5): - reg = CMD_GENERAL_CONTROL; - val[1] = CTL_ENABLE_4V5; - break; - case ilog2(STS_BUTTON_MODE): - reg = CMD_GENERAL_CONTROL; - val[1] = CTL_BUTTON_MODE; - break; + case 0 ... 15: + switch (offset) { + case ilog2(STS_USB30_PWRON): + val16[1] = CTL_USB30_PWRON; + break; + case ilog2(STS_USB31_PWRON): + val16[1] = CTL_USB31_PWRON; + break; + case ilog2(STS_ENABLE_4V5): + val16[1] = CTL_ENABLE_4V5; + break; + case ilog2(STS_BUTTON_MODE): + val16[1] = CTL_BUTTON_MODE; + break; + default: + return -EINVAL; + } + val16[0] = value ? val16[1] : 0; + return dm_i2c_write(dev, CMD_GENERAL_CONTROL, val16, sizeof(val16)); /* bank 2 - supported only when FEAT_EXT_CMDS is set */ case (16 + 32 + 0) ... (16 + 32 + 15): if (!(info->features & FEAT_EXT_CMDS)) return -EINVAL; - reg = CMD_EXT_CONTROL; - val[1] = BIT(offset - 16 - 32); - break; + val32[3] = BIT(offset - 16 - 32) >> 8; + val32[2] = BIT(offset - 16 - 32) & 0xff; + val32[1] = value ? val32[3] : 0; + val32[0] = value ? val32[2] : 0; + return dm_i2c_write(dev, CMD_EXT_CONTROL, val32, sizeof(val32)); default: return -EINVAL; } - - val[0] = value ? val[1] : 0; - - ret = dm_i2c_write(dev, reg, val, 2); - if (ret) - return ret; - - return 0; } static int turris_omnia_mcu_direction_input(struct udevice *dev, uint offset) -- 2.20.1

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[PATCH 1/2] arm: mvebu: turris_omnia: Do not fail in fixup_mtd_partitions when partitions do not exist
by Pali Rohár 09 Aug '22

09 Aug '22

All partitions are created by fixup_mtd_partitions() function, so they do not have to exist just for their removal need. Fixes: 92f36c8e74c1 ("arm: mvebu: turris_omnia: fixup MTD partitions in Linux' DTB") Signed-off-by: Pali Rohár <pali(a)kernel.org> --- board/CZ.NIC/turris_omnia/turris_omnia.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index e262ea1aba51..d836ac94ec29 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -974,11 +974,10 @@ static bool fixup_mtd_partitions(void *blob, int offset, struct mtd_info *mtd) int parts; parts = fdt_subnode_offset(blob, offset, "partitions"); - if (parts < 0) - return false; - - if (fdt_del_node(blob, parts) < 0) - return false; + if (parts >= 0) { + if (fdt_del_node(blob, parts) < 0) + return false; + } parts = fdt_add_subnode(blob, offset, "partitions"); if (parts < 0) -- 2.20.1

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[PATCH 1/2] arm: mvebu: turris_omnia: Show MCU type in show_board_info()
by Pali Rohár 09 Aug '22

09 Aug '22

Different Turris Omnia HW board revisions contains different MCU. Show type in show_board_info() to easily identify which MCU is populated. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- board/CZ.NIC/turris_omnia/turris_omnia.c | 45 ++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index b169abca0956..6fc2018c1cfb 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -62,13 +62,27 @@ enum mcu_commands { CMD_GET_STATUS_WORD = 0x01, CMD_GET_RESET = 0x09, CMD_WATCHDOG_STATE = 0x0b, + + /* available if STS_FEATURES_SUPPORTED bit set in status word */ + CMD_GET_FEATURES = 0x10, }; enum status_word_bits { + STS_MCU_TYPE_MASK = GENMASK(1, 0), + STS_MCU_TYPE_STM32 = 0, + STS_MCU_TYPE_GD32 = 1, + STS_MCU_TYPE_MKL = 2, + STS_MCU_TYPE_UNKN = 3, + STS_FEATURES_SUPPORTED = BIT(2), CARD_DET_STSBIT = 0x0010, MSATA_IND_STSBIT = 0x0020, }; +/* CMD_GET_FEATURES */ +enum features_e { + FEAT_PERIPH_MCU = BIT(0), +}; + /* * Those values and defines are taken from the Marvell U-Boot version * "u-boot-2013.01-2014_T3.0" @@ -371,6 +385,36 @@ static int omnia_get_ram_size_gb(void) return ram_size; } +static const char * const omnia_get_mcu_type(void) +{ + static const char * const mcu_types[] = { + [STS_MCU_TYPE_STM32] = "STM32", + [STS_MCU_TYPE_GD32] = "GD32", + [STS_MCU_TYPE_MKL] = "MKL", + [STS_MCU_TYPE_UNKN] = "unknown", + }; + static const char * const mcu_types_with_perip_resets[] = { + [STS_MCU_TYPE_STM32] = "STM32 (with peripheral resets)", + [STS_MCU_TYPE_GD32] = "GD32 (with peripheral resets)", + [STS_MCU_TYPE_MKL] = "MKL (with peripheral resets)", + [STS_MCU_TYPE_UNKN] = "unknown (with peripheral resets)", + }; + u16 stsword, features; + int ret; + + ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &stsword, sizeof(stsword)); + if (ret) + return "unknown"; + + if (stsword & STS_FEATURES_SUPPORTED) { + ret = omnia_mcu_read(CMD_GET_FEATURES, &features, sizeof(features)); + if (ret == 0 && (features & FEAT_PERIPH_MCU)) + return mcu_types_with_perip_resets[stsword & STS_MCU_TYPE_MASK]; + } + + return mcu_types[stsword & STS_MCU_TYPE_MASK]; +} + /* * Define the DDR layout / topology here in the board file. This will * be used by the DDR3 init code in the SPL U-Boot version to configure @@ -688,6 +732,7 @@ int show_board_info(void) err = turris_atsha_otp_get_serial_number(&version_num, &serial_num); printf("Model: Turris Omnia\n"); + printf(" MCU type: %s\n", omnia_get_mcu_type()); printf(" RAM size: %i MiB\n", omnia_get_ram_size_gb() * 1024); if (err) printf(" Serial Number: unknown\n"); -- 2.20.1

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[PATCH 0/3] dwc_eth_qos PHY dt node fixups
by Rasmus Villemoes 09 Aug '22

09 Aug '22

I need the dwc_eth_qos to gain a fix similar to what fec_mxc got in 89b5bd54c1a4. The first patch provides a simplification around the logic for fetching the phy's address, so there's one less case to worry about. The second introduces a little helper (it doesn't essentially add any extra code since it just returns an extra piece of inforamtion that eth_phy_get_node() already found). And the third hooks it up in the dwc_eth_qos driver. Rasmus Villemoes (3): net: dwc_eth_qos: remove use of DWC_NET_PHYADDR phy: introduce eth_phy_get_node_and_addr() net: dwc_eth_qos: set proper DT node for phy device drivers/net/dwc_eth_qos.c | 9 +++++---- drivers/net/eth-phy-uclass.c | 9 ++++++++- include/configs/imx8mp_evk.h | 2 -- include/configs/imx8mp_rsb3720.h | 1 - include/eth_phy.h | 1 + 5 files changed, 14 insertions(+), 8 deletions(-) -- 2.31.1

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[PATCH] arm: kirkwood: nsa310s: Add Distro boot capability
by Tony Dinh 09 Aug '22

09 Aug '22

- Add distro boot to board include file and deconfig file - Miscellaneous changes: - Remove Gerald from maintainer list (email bounced) - Add CONFIG_SUPPORT_PASSING_ATAGS and friends to support legacy kernel method of booting (e.g. OpenWrt) with appended DTB. - Add CONFIG_UBIFS_SILENCE_MSG to reduce binary size. Note that this patch is depended on the following patch: https://patchwork.ozlabs.org/project/uboot/patch/20220807192709.21717-1-pal… Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- board/zyxel/nsa310s/MAINTAINERS | 1 - configs/nsa310s_defconfig | 17 ++++-------- include/configs/nsa310s.h | 48 +++++++++++++++++++++++++++++---- 3 files changed, 48 insertions(+), 18 deletions(-) diff --git a/board/zyxel/nsa310s/MAINTAINERS b/board/zyxel/nsa310s/MAINTAINERS index d153758c21..11106acf3e 100644 --- a/board/zyxel/nsa310s/MAINTAINERS +++ b/board/zyxel/nsa310s/MAINTAINERS @@ -1,5 +1,4 @@ NSA310S BOARD -M: Gerald Kerma <dreagle(a)doukki.net> M: Tony Dinh <mibodhi(a)gmail.com> M: Luka Perkov <luka.perkov(a)sartura.hr> S: Maintained diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 2b39ae74b3..a5f01ef88e 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -4,6 +4,9 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_SYS_MALLOC_F_LEN=0x400 @@ -14,35 +17,25 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s" CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server" CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="NSA310s> " CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=1050 -CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(root)" CONFIG_CMD_UBI=y -CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y @@ -65,6 +58,6 @@ CONFIG_MII=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y +CONFIG_UBIFS_SILENCE_MSG=y CONFIG_LZMA=y CONFIG_BZIP2=y diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 027a47b5a3..a538721c45 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -9,15 +9,53 @@ #ifndef _CONFIG_NSA310S_H #define _CONFIG_NSA310S_H +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ #include "mv-common.h" -/* default environment variables */ +/* Include the common distro boot environment */ +#ifndef CONFIG_SPL_BUILD + +#ifdef CONFIG_SATA +#define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0) +#else +#define BOOT_TARGET_DEVICES_SATA(func) +#endif + +#ifdef CONFIG_USB_STORAGE +#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) +#else +#define BOOT_TARGET_DEVICES_USB(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_DEVICES_SATA(func) \ + func(DHCP, dhcp, na) + +#define KERNEL_ADDR_R __stringify(0x800000) +#define FDT_ADDR_R __stringify(0x2c00000) +#define RAMDISK_ADDR_R __stringify(0x01100000) +#define SCRIPT_ADDR_R __stringify(0x200000) + +#define LOAD_ADDRESS_ENV_SETTINGS \ + "kernel_addr_r=" KERNEL_ADDR_R "\0" \ + "fdt_addr_r=" FDT_ADDR_R "\0" \ + "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ + "scriptaddr=" SCRIPT_ADDR_R "\0" + +#include <config_distro_bootcmd.h> #define CONFIG_EXTRA_ENV_SETTINGS \ - "console=console=ttyS0,115200\0" \ - "kernel=/boot/zImage\0" \ - "fdt=/boot/nsa310s.dtb\0" \ - "bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0" + LOAD_ADDRESS_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + "console=ttyS0,115200\0" \ + BOOTENV + +#endif /* CONFIG_SPL_BUILD */ /* Ethernet driver configuration */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -- 2.30.2

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[PATCH 016/347] FogBugz #516535: Fix QSPI write issues
by Jit Loon Lim 09 Aug '22

09 Aug '22

From: Chee Hong Ang <chee.hong.ang(a)intel.com> QSPI driver perform chip select on every flash read/write access. The driver need to disable/enable the QSPI controller while performing chip select. This may cause some data lost especially the QSPI controller is configured to run at slower speed as it may take longer time to access the flash device. This patch prevent the driver from disable/enable the QSPI controller too soon and inadvertently halting any ongoing flash read/write access by ensuring the QSPI controller is always in idle mode after each read/write access. Signed-off-by: Chee Hong Ang <chee.hong.ang(a)intel.com> --- drivers/spi/cadence_qspi_apb.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 2cdf4c9c9f..5e03495f45 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -858,13 +858,9 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_plat *plat, writel(CQSPI_REG_INDIRECTRD_DONE, plat->regbase + CQSPI_REG_INDIRECTRD); - /* Check indirect done status */ - ret = wait_for_bit_le32(plat->regbase + CQSPI_REG_INDIRECTRD, - CQSPI_REG_INDIRECTRD_DONE, 0, 10, 0); - if (ret) { - printf("Indirect read clear completion error (%i)\n", ret); - goto failrd; - } + /* Wait til QSPI is idle */ + if (!cadence_qspi_wait_idle(plat->regbase)) + return -EIO; return 0; @@ -1031,6 +1027,11 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_plat *plat, if (bounce_buf) free(bounce_buf); + + /* Wait til QSPI is idle */ + if (!cadence_qspi_wait_idle(plat->regbase)) + return -EIO; + return 0; failwr: -- 2.25.1

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[ANN] U-Boot v2022.10-rc2 released
by Tom Rini 09 Aug '22

09 Aug '22

Hey all, It's release day and so here's v2022.10-rc2. I hope that we're now approaching the stabilization period with this release, but I think we'll see a few more things still come in before -rc3. In terms of a changelog, git log --merges v2022.10-rc1..v2022.10-rc2 contains what I've pulled but as always, better PR messages and tags will provide better results here. So we're now looking at regular releases every other Monday, and with final release on October 3rd, 2022. Thanks all! -- Tom

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rk3399 TPL memory setup code triggers clock frequency limit assertion
by Michal Suchánek 08 Aug '22

08 Aug '22

Hello, when compiled with clock debug rk3399 cannot be booted because memory setup code triggers clock assertion: U-Boot TPL 2022.07-00038-g61e11a8e9f-dirty (Aug 07 2022 - 16:13:17) TPL PLL at ff760000: fbdiv=50, refdiv=1, postdiv1=2, postdiv2=1, vco=1200000 khz, output=600000 khz TPL PLL at ff760020: fbdiv=50, refdiv=1, postdiv1=2, postdiv2=1, vco=1200000 khz, output=600000 khz TPL PLL at ff760080: fbdiv=99, refdiv=2, postdiv1=2, postdiv2=1, vco=1188000 khz, output=594000 khz TPL PLL at ff760060: fbdiv=64, refdiv=1, postdiv1=2, postdiv2=2, vco=1536000 khz, output=384000 khz TPL PLL at ff760040: fbdiv=12, refdiv=1, postdiv1=3, postdiv2=2, vco=288000 khz, output=48000 khz drivers/clk/rockchip/clk_rk3399.c:347: rkclk_set_pll: Assertion `vco_khz >= VCO_MIN_KHZ && vco_khz <= VCO_MAX_KHZ && output_khz >= OUTPUT_MIN_KHZ && output_khz <= OUTPUT_MAX_KHZ && div->fbdiv >= PLL_DIV_MIN && div->fbdiv <= PLL_DIV_MAX' failed.Channel 0: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Channel 1: LPDDR4, 50MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB 256B stride TPL PLL at ff760040: fbdiv=50, refdiv=1, postdiv1=3, postdiv2=1, vco=1200000 khz, output=400000 khz lpddr4_set_rate: change freq to 400000000 mhz 0, 1 TPL PLL at ff760040: fbdiv=100, refdiv=1, postdiv1=3, postdiv2=1, vco=2400000 khz, output=800000 khz lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Trying to boot from BOOTROM Returning to boot ROM... SPL PLL at ff760000: fbdiv=50, refdiv=1, postdiv1=2, postdiv2=1, vco=1200000 khz, output=600000 khz SPL PLL at ff760020: fbdiv=50, refdiv=1, postdiv1=2, postdiv2=1, vco=1200000 khz, output=600000 khz SPL PLL at ff760080: fbdiv=99, refdiv=2, postdiv1=2, postdiv2=1, vco=1188000 khz, output=594000 khz SPL PLL at ff760060: fbdiv=64, refdiv=1, postdiv1=2, postdiv2=2, vco=1536000 khz, output=384000 khz U-Boot SPL 2022.07-00038-g61e11a8e9f-dirty (Aug 07 2022 - 16:13:17 +0200) mmc@fe320000: Got clock clock-controller@ff760000 76 Trying to boot from MMC2 NOTICE: BL31: v2.6(debug): NOTICE: BL31: Built : 14:50:40, Jul 1 2022 INFO: GICv3 with legacy support detected. INFO: ARM GICv3 driver initialized in EL3 INFO: Maximum SPI INTID supported: 287 INFO: plat_rockchip_pmu_init(1624): pd status 3e INFO: BL31: Initializing runtime services INFO: BL31: cortex_a53: CPU workaround for 855873 was applied WARNING: BL31: cortex_a53: CPU workaround for 1530924 was missing! INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x200000 INFO: SPSR = 0x3c9 Clearly the assertion is wrong at least for this PLL because the system boots with the assertion disarmed. Then again, it is not clear that the PLL is operated at this frequency at all - it is immediately changed to higher frequency when the memory type is detected. What would be a resonable way to make rk3399 bootable with clock debug enabled? Thanks Michal

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