April 2022 - U-Boot

[PATCH v2] arm: dts: imx8m*-venice: add gpio hog support
by Tim Harvey 21 Apr '22

21 Apr '22

Add gpio hog support for board-specific gpio lines: - put hogs in u-boot.dtsi so as to keep the regular dts files in sync with the kernel. The hogs will not be put in the kernel as that makes them un-usable by userspace as well as re-initializes them to dt defaults overriding changes which may have been done by bootloader commands. - specify gpio names and initial config - enable GPIO_HOG Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> Acked-by: Peng Fan <peng.fan(a)nxp.com> --- v2: - rebase on imx/master - add Peng's ack tag --- .../dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi | 46 ++++++ .../dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi | 81 ++++++++++ .../dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi | 81 ++++++++++ arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi | 118 ++++++++++++++ arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi | 150 ++++++++++++++++++ arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi | 83 ++++++++++ arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi | 108 +++++++++++++ configs/imx8mm_venice_defconfig | 1 + configs/imx8mn_venice_defconfig | 1 + 9 files changed, 669 insertions(+) diff --git a/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi index f5d52c2fe259..b3592331c72b 100644 --- a/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi @@ -3,3 +3,49 @@ * Copyright 2021 Gateworks Corporation */ #include "imx8mm-venice-gw700x-u-boot.dtsi" + +&gpio1 { + pci_usb_sel { + gpio-hog; + output-low; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "pci_usb_sel"; + }; + + dio_0 { + gpio-hog; + input; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "dio0"; + }; + + dio_1 { + gpio-hog; + input; + gpios = <9 GPIO_ACTIVE_HIGH>; + line-name = "dio1"; + }; +}; + +&gpio4 { + dio_2 { + gpio-hog; + input; + gpios = <3 GPIO_ACTIVE_HIGH>; + line-name = "dio2"; + }; + + dio_3 { + gpio-hog; + input; + gpios = <4 GPIO_ACTIVE_HIGH>; + line-name = "dio3"; + }; + + pci_wdis { + gpio-hog; + output-high; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "pci_wdis#"; + }; +}; diff --git a/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi index f5d52c2fe259..92e44d4ba96b 100644 --- a/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi @@ -3,3 +3,84 @@ * Copyright 2021 Gateworks Corporation */ #include "imx8mm-venice-gw700x-u-boot.dtsi" + +&gpio1 { + rs485_term { + gpio-hog; + output-low; + gpios = <0 GPIO_ACTIVE_HIGH>; + line-name = "rs485_term"; + }; + + mipi_gpio4 { + gpio-hog; + input; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio4"; + }; + + pci_usb_sel { + gpio-hog; + output-low; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "pci_usb_sel"; + }; + + dio_0 { + gpio-hog; + input; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "dio0"; + }; + + dio_1 { + gpio-hog; + input; + gpios = <9 GPIO_ACTIVE_HIGH>; + line-name = "dio1"; + }; +}; + +&gpio4 { + rs485_en { + gpio-hog; + output-low; + gpios = <0 GPIO_ACTIVE_HIGH>; + line-name = "rs485_en"; + }; + + mipi_gpio3 { + gpio-hog; + input; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio3"; + }; + + rs485_half { + gpio-hog; + output-low; + gpios = <2 GPIO_ACTIVE_HIGH>; + line-name = "rs485_hd"; + }; + + mipi_gpio2 { + gpio-hog; + input; + gpios = <3 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio2"; + }; + + mipi_gpio1 { + gpio-hog; + input; + gpios = <4 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio1"; + }; + + pci_wdis { + gpio-hog; + output-high; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "pci_wdis#"; + }; +}; diff --git a/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi index f5d52c2fe259..92e44d4ba96b 100644 --- a/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi @@ -3,3 +3,84 @@ * Copyright 2021 Gateworks Corporation */ #include "imx8mm-venice-gw700x-u-boot.dtsi" + +&gpio1 { + rs485_term { + gpio-hog; + output-low; + gpios = <0 GPIO_ACTIVE_HIGH>; + line-name = "rs485_term"; + }; + + mipi_gpio4 { + gpio-hog; + input; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio4"; + }; + + pci_usb_sel { + gpio-hog; + output-low; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "pci_usb_sel"; + }; + + dio_0 { + gpio-hog; + input; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "dio0"; + }; + + dio_1 { + gpio-hog; + input; + gpios = <9 GPIO_ACTIVE_HIGH>; + line-name = "dio1"; + }; +}; + +&gpio4 { + rs485_en { + gpio-hog; + output-low; + gpios = <0 GPIO_ACTIVE_HIGH>; + line-name = "rs485_en"; + }; + + mipi_gpio3 { + gpio-hog; + input; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio3"; + }; + + rs485_half { + gpio-hog; + output-low; + gpios = <2 GPIO_ACTIVE_HIGH>; + line-name = "rs485_hd"; + }; + + mipi_gpio2 { + gpio-hog; + input; + gpios = <3 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio2"; + }; + + mipi_gpio1 { + gpio-hog; + input; + gpios = <4 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio1"; + }; + + pci_wdis { + gpio-hog; + output-high; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "pci_wdis#"; + }; +}; diff --git a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi index a801ee1deb93..11c773bb70d6 100644 --- a/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi @@ -5,6 +5,124 @@ #include "imx8mm-venice-u-boot.dtsi" +&gpio1 { + uart1_rs422 { + gpio-hog; + output-high; + gpios = <0 GPIO_ACTIVE_HIGH>; + line-name = "uart1_rs422#"; + }; + + uart1rs485 { + gpio-hog; + output-high; + gpios = <3 GPIO_ACTIVE_HIGH>; + line-name = "uart1_rs485#"; + }; + + uart1rs232 { + gpio-hog; + output-high; + gpios = <5 GPIO_ACTIVE_HIGH>; + line-name = "uart1_rs232#"; + }; + + dig1in { + gpio-hog; + input; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "dig1_in"; + }; + + dig1out { + gpio-hog; + output-low; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "dig1_out"; + }; +}; + +&gpio4 { + uart3_rs232 { + gpio-hog; + output-high; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "uart3_rs232#"; + }; + + uart3_rs422 { + gpio-hog; + output-high; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "uart3_rs422#"; + }; + + uart3_rs485 { + gpio-hog; + output-high; + gpios = <8 GPIO_ACTIVE_HIGH>; + line-name = "uart3_rs485#"; + }; + + uart4_rs485 { + gpio-hog; + output-high; + gpios = <27 GPIO_ACTIVE_HIGH>; + line-name = "uart4_rs485#"; + }; + + sim1det { + gpio-hog; + input; + gpios = <29 GPIO_ACTIVE_HIGH>; + line-name = "sim1_det"; + }; + + sim2det { + gpio-hog; + input; + gpios = <30 GPIO_ACTIVE_HIGH>; + line-name = "sim2_det"; + }; +}; + +&gpio5 { + dig2out { + gpio-hog; + output-low; + gpios = <3 GPIO_ACTIVE_HIGH>; + line-name = "dig2_out"; + }; + + dig2in { + gpio-hog; + input; + gpios = <4 GPIO_ACTIVE_HIGH>; + line-name = "dig2_in"; + }; + + sim2sel { + gpio-hog; + output-low; + gpios = <5 GPIO_ACTIVE_HIGH>; + line-name = "sim2_sel"; + }; + + uart4_rs232 { + gpio-hog; + output-high; + gpios = <10 GPIO_ACTIVE_HIGH>; + line-name = "uart4_rs232#"; + }; + + uart4_rs422 { + gpio-hog; + output-high; + gpios = <13 GPIO_ACTIVE_HIGH>; + line-name = "uart4_rs422#"; + }; +}; + &fec1 { phy-reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; diff --git a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi index d0e5d6c5b634..1e1769f55127 100644 --- a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi @@ -5,6 +5,156 @@ #include "imx8mm-venice-u-boot.dtsi" +&gpio1 { + m2rst { + gpio-hog; + output-low; + gpios = <13 GPIO_ACTIVE_HIGH>; + line-name = "m2_reset"; + }; + + m2wdis { + gpio-hog; + output-high; + gpios = <15 GPIO_ACTIVE_HIGH>; + line-name = "m2_wdis#"; + }; +}; + +&gpio2 { + uart2en { + gpio-hog; + output-high; + gpios = <8 GPIO_ACTIVE_HIGH>; + line-name = "uart2_en#"; + }; +}; + +&gpio3 { + m2gdis { + gpio-hog; + output-high; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "m2_gdis#"; + }; + + m2off { + gpio-hog; + output-high; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "m2_off#"; + }; +}; + +&gpio4 { + ampgpio3 { + gpio-hog; + input; + gpios = <11 GPIO_ACTIVE_HIGH>; + line-name = "amp_gpio3"; + }; + + ampgpio2 { + gpio-hog; + input; + gpios = <12 GPIO_ACTIVE_HIGH>; + line-name = "amp_gpio2"; + }; + + ampgpio1 { + gpio-hog; + input; + gpios = <14 GPIO_ACTIVE_HIGH>; + line-name = "amp_gpio1"; + }; + + ltrpwr { + gpio-hog; + output-low; + gpios = <16 GPIO_ACTIVE_HIGH>; + line-name = "lte_pwr#"; + }; + + lterst { + gpio-hog; + output-low; + gpios = <17 GPIO_ACTIVE_HIGH>; + line-name = "lte_rst"; + }; + + ampgpio4 { + gpio-hog; + input; + gpios = <20 GPIO_ACTIVE_HIGH>; + line-name = "amp_gpio4"; + }; + + appgpio1 { + gpio-hog; + input; + gpios = <21 GPIO_ACTIVE_HIGH>; + line-name = "app_gpio1"; + }; + + uart1rs485 { + gpio-hog; + output-low; + gpios = <23 GPIO_ACTIVE_HIGH>; + line-name = "uart1_rs485"; + }; + + uart1term { + gpio-hog; + output-low; + gpios = <25 GPIO_ACTIVE_HIGH>; + line-name = "uart1_term"; + }; + + uart1half { + gpio-hog; + output-low; + gpios = <26 GPIO_ACTIVE_HIGH>; + line-name = "uart1_half"; + }; + + appgpio2 { + gpio-hog; + input; + gpios = <27 GPIO_ACTIVE_HIGH>; + line-name = "app_gpio2"; + }; + + mipigpio1 { + gpio-hog; + input; + gpios = <28 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio1"; + }; +}; + +&gpio5 { + mipigpio4 { + gpio-hog; + input; + gpios = <3 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio4"; + }; + + mipigpio3 { + gpio-hog; + input; + gpios = <4 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio3"; + }; + + mipigpio2 { + gpio-hog; + input; + gpios = <5 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio2"; + }; +}; + &fec1 { phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; diff --git a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi index 36a605468b22..896e5d4edde3 100644 --- a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi @@ -5,6 +5,89 @@ #include "imx8mm-venice-u-boot.dtsi" +&gpio1 { + rs422en { + gpio-hog; + output-high; + gpios = <10 GPIO_ACTIVE_HIGH>; + line-name = "rs422_en#"; + }; + + rs485en { + gpio-hog; + output-high; + gpios = <11 GPIO_ACTIVE_HIGH>; + line-name = "rs485_en#"; + }; + + rs232en { + gpio-hog; + output-low; + gpios = <12 GPIO_ACTIVE_HIGH>; + line-name = "rs232_en#"; + }; +}; + +&gpio2 { + dig2in { + gpio-hog; + input; + gpios = <0 GPIO_ACTIVE_HIGH>; + line-name = "dig2_in"; + }; + + dig2out { + gpio-hog; + output-high; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "dig2_out#"; + }; + + dig1out { + gpio-hog; + output-high; + gpios = <8 GPIO_ACTIVE_HIGH>; + line-name = "dig1_out#"; + }; + + dig1in { + gpio-hog; + input; + gpios = <9 GPIO_ACTIVE_HIGH>; + line-name = "dig1_in"; + }; +}; + +&gpio5 { + sim1det { + gpio-hog; + input; + gpios = <7 GPIO_ACTIVE_LOW>; + line-name = "sim1_det#"; + }; + + sim2det { + gpio-hog; + input; + gpios = <8 GPIO_ACTIVE_LOW>; + line-name = "sim2_det#"; + }; + + sim2sel { + gpio-hog; + output-low; + gpios = <9 GPIO_ACTIVE_HIGH>; + line-name = "sim2_sel"; + }; + + pci_wdis { + gpio-hog; + output-high; + gpios = <12 GPIO_ACTIVE_HIGH>; + line-name = "pci_wdis#"; + }; +}; + &fec1 { phy-reset-gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; diff --git a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi index b334b56b82a1..9431e2a6cde7 100644 --- a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi @@ -5,6 +5,114 @@ #include "imx8mn-venice-u-boot.dtsi" +&gpio1 { + m2rst { + gpio-hog; + output-low; + gpios = <13 GPIO_ACTIVE_HIGH>; + line-name = "m2_reset"; + }; + + m2wdis { + gpio-hog; + output-high; + gpios = <15 GPIO_ACTIVE_HIGH>; + line-name = "m2_wdis#"; + }; +}; + +&gpio2 { + uart2en { + gpio-hog; + output-high; + gpios = <8 GPIO_ACTIVE_HIGH>; + line-name = "uart2_en#"; + }; +}; + +&gpio3 { + m2gdis { + gpio-hog; + output-high; + gpios = <1 GPIO_ACTIVE_HIGH>; + line-name = "m2_gdis#"; + }; + + m2off { + gpio-hog; + output-high; + gpios = <7 GPIO_ACTIVE_HIGH>; + line-name = "m2_off#"; + }; +}; + +&gpio4 { + appgpio1 { + gpio-hog; + input; + gpios = <21 GPIO_ACTIVE_HIGH>; + line-name = "app_gpio1"; + }; + + uart1rs485 { + gpio-hog; + output-low; + gpios = <23 GPIO_ACTIVE_HIGH>; + line-name = "uart1_rs485"; + }; + + uart1term { + gpio-hog; + output-low; + gpios = <25 GPIO_ACTIVE_HIGH>; + line-name = "uart1_term"; + }; + + uart1half { + gpio-hog; + output-low; + gpios = <26 GPIO_ACTIVE_HIGH>; + line-name = "uart1_half"; + }; + + appgpio2 { + gpio-hog; + input; + gpios = <27 GPIO_ACTIVE_HIGH>; + line-name = "app_gpio2"; + }; + + mipigpio1 { + gpio-hog; + input; + gpios = <28 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio1"; + }; +}; + +&gpio5 { + mipigpio4 { + gpio-hog; + input; + gpios = <3 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio4"; + }; + + mipigpio3 { + gpio-hog; + input; + gpios = <4 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio3"; + }; + + mipigpio2 { + gpio-hog; + input; + gpios = <5 GPIO_ACTIVE_HIGH>; + line-name = "mipi_gpio2"; + }; +}; + &fec1 { phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 09f7d8a58ca7..b596f7eb669f 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -73,6 +73,7 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMX8MM=y CONFIG_CLK_IMX8MM=y +CONFIG_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_LED=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index afb9c5c894f4..2f5ea62f5427 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -72,6 +72,7 @@ CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_SPL_DM=y CONFIG_SPL_CLK_IMX8MN=y CONFIG_CLK_IMX8MN=y +CONFIG_GPIO_HOG=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_LED=y -- 2.17.1

2 1

[PATCH v2] imx8m{m,n}-venice-gw7902: add support for GPY111 phy
by Tim Harvey 21 Apr '22

21 Apr '22

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due to part availability. Add support for it: - increase post-reset time to 300ms per datasheet - add tx-delay/rx-delay config Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- v2: rebase on imx/master --- arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi | 2 +- arch/arm/dts/imx8mm-venice-gw7902.dts | 4 ++++ arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi | 2 +- arch/arm/dts/imx8mn-venice-gw7902.dts | 4 ++++ 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi index 1e1769f55127..f21e46b12dd7 100644 --- a/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7902-u-boot.dtsi @@ -158,7 +158,7 @@ &fec1 { phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; - phy-reset-post-delay = <1>; + phy-reset-post-delay = <300>; }; &pinctrl_fec1 { diff --git a/arch/arm/dts/imx8mm-venice-gw7902.dts b/arch/arm/dts/imx8mm-venice-gw7902.dts index adf521632d63..b0404ec4c8af 100644 --- a/arch/arm/dts/imx8mm-venice-gw7902.dts +++ b/arch/arm/dts/imx8mm-venice-gw7902.dts @@ -243,10 +243,14 @@ ethphy0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; + /* TI DP83867 props */ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + /* GPY111 props */ + rx-internal-delay-ps = <2000>; + tx-internal-delay-ps = <2500>; }; }; }; diff --git a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi index 9431e2a6cde7..17e6828c79f8 100644 --- a/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-venice-gw7902-u-boot.dtsi @@ -116,7 +116,7 @@ &fec1 { phy-reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; - phy-reset-post-delay = <1>; + phy-reset-post-delay = <300>; }; &pinctrl_fec1 { diff --git a/arch/arm/dts/imx8mn-venice-gw7902.dts b/arch/arm/dts/imx8mn-venice-gw7902.dts index 29897c161b96..d026d965580e 100644 --- a/arch/arm/dts/imx8mn-venice-gw7902.dts +++ b/arch/arm/dts/imx8mn-venice-gw7902.dts @@ -242,10 +242,14 @@ ethphy0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; + /* TI DP83867 props */ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + /* GPY111 props */ + rx-internal-delay-ps = <2000>; + tx-internal-delay-ps = <2500>; }; }; }; -- 2.17.1

2 1

[PATCH v2] configs: imx8m{m,n}_venice_defconfig: add usb support
by Tim Harvey 21 Apr '22

21 Apr '22

Enable USB support for host controller and various USB ethernet devices. Example usage of USB Mass Storage (UMS) support: u-boot=> mmc list FSL_SDHC: 0 FSL_SDHC: 1 FSL_SDHC: 2 (eMMC) u-boot=> ums 0 mmc 2 UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe30000 Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- v2: rebase on imx/master --- configs/imx8mm_venice_defconfig | 20 ++++++++++++++++++++ configs/imx8mn_venice_defconfig | 20 ++++++++++++++++++++ include/configs/imx8mm_venice.h | 2 ++ include/configs/imx8mn_venice.h | 1 + 4 files changed, 43 insertions(+) diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index c68c1500faaf..dd61ec9b70fb 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -47,6 +47,8 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_UUID=y @@ -98,6 +100,8 @@ CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_BD71837=y CONFIG_SPL_DM_PMIC_BD71837=y @@ -113,5 +117,21 @@ CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_TMU=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_LAN75XX=y +CONFIG_USB_ETHER_LAN78XX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Gateworks" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_IMX_WATCHDOG=y CONFIG_HEXDUMP=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 72e8f3e58593..c3a96a378553 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -47,6 +47,8 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_UUID=y @@ -96,6 +98,8 @@ CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_BD71837=y CONFIG_SPL_DM_PMIC_BD71837=y @@ -111,5 +115,21 @@ CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_TMU=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y +CONFIG_USB_ETHER_ASIX88179=y +CONFIG_USB_ETHER_LAN75XX=y +CONFIG_USB_ETHER_LAN78XX=y +CONFIG_USB_ETHER_MCS7830=y +CONFIG_USB_ETHER_RTL8152=y +CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Gateworks" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_IMX_WATCHDOG=y CONFIG_HEXDUMP=y diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 4b7dcf3ed9f0..c8ac78801264 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -40,6 +40,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ + func(USB, usb, 0) \ + func(USB, usb, 1) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #else diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index d59a73992730..301dbb430c0e 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -37,6 +37,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ + func(USB, usb, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #else -- 2.17.1

2 1

[RFC PATCH v3 00/23] Modernize U-Boot shell
by Francis Laniel 21 Apr '22

21 Apr '22

Hi. First I hope you are fine and the same for your relatives. I would also like to apologize for the delay between v2 and v3. During 2021 summer, Sean Anderson wrote a contribution to add a new shell, based on LIL, to U-Boot [1][2]. While one of the goals of this contribution was to address the fact actual U-Boot shell, which is based on Busybox hush, is old there was a discussion about adding a new shell versus updating the actual one [3][4]. So, in this series, with Harald Seiler, we updated the actual U-Boot shell to reflect what is currently in Busybox source code. Basically, this contribution is about taking a snapshot of Busybox shell/hush.c file (as it exists in commit 37460f5da) and adapt it to suit U-Boot needs. This contribution was written to be as backward-compatible as possible to avoid breaking the existing. So, the 2021 hush flavor offers the same as the actual, that is to say: 1. Variable expansion. 2. Instruction lists (;, && and ||). 3. If, then and else. 4. Loops (for, while and until). No new features offered by Busybox hush were implemented (e.g. functions). It is possible to change the parser at runtime using the "parser" command: => parser print old => parser set 2021 2021> parser print 2021 2021> parser set old => The default parser is the old one. In terms of testing, new unit tests were added to ut to ensure the new behavior is the same as the old one and it does not add regression. Nonetheless, if old behavior was buggy and fixed upstream, the fix is then added to U-Boot [5]. In sandbox, all of these tests pass smoothly: => printenv board board=sandbox => ut hush Running 20 hush tests ... Failures: 0 => parser set 2021 2021> ut hush Running 20 hush tests ... Failures: 0 Thanks to the effort of Harald Seiler, I was successful booting a board: 2021> printenv board_rev board_rev=iMX8MP 2021> boot ... root@iMX8MPboard:~# fw_printenv board_rev board_rev=iMX8MP I also tested another board where both parser were successful to boot it: => printenv fdtfile fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb => boot ... root@lepotato:~# root@lepotato:~# reboot ... => parser set 2021 2021> printenv fdtfile fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb 2021> boot ... root@lepotato:~# I marked this contribution as RFC to indeed collect your opinion. My goal is not to change suddenly actual shell to this one, we clearly need a transition period to think about it. I think it is better to see this contribution as a proof of concept which shows it is possible to update the actual shell. If you want to review it - your review will really be appreciated - here are some information regarding the commits: * commits marked as "test:" deal with unit tests. * commit "cli: Add Busybox upstream hush.c file." copies Busybox shell/hush.c into U-Boot tree, this explain why this commit contains around 12000 additions. * commit "cli: Port Busybox 2021 hush to U-Boot." modifies previously added file to permit us to use this as new shell. The really good idea of #include'ing Busybox code into a wrapper file to define some particular functions while minimizing modifications to upstream code comes from Harald Seiler. * commit "cmd: Add new parser command" adds a new command which permits selecting parser at runtime. I am not really satisfied with the fact it calls cli_init() and cli_loop() each time the parser is set, so your reviews would be welcomed. * Other commits focus on enabling features we need (e.g. if). Changes since v2: * Added a small fix to compile sandbox with NO_SDL=1. * Added a command to change parser at runtime. * Added 2021 parser function to all run_command*(). * Adapted Francis Laniel (23): video: sandbox: Add dummy function for sandbox_sdl_remove_display(). test: Add framework to test hush behavior test: hush: Test hush if/else test/py: hush_if_test: Remove the test file test: hush: Test hush variable expansion test: hush: Test hush commands list test: hush: Test hush loops cli: Add Busybox upstream hush.c file cli: Port Busybox 2021 hush to U-Boot cli: Add menu for hush parser global_data.h: add GD_FLG_HUSH_OLD_PARSER flag. cmd: Add new parser command. cli: Enables using hush 2021 parser as command line parser cli: hush_2021: Enable variables expansion for hush 2021 cli: hush_2021: Add functions to be called from run_command() cli: add hush 2021 as parser for run_command*(). test: hush: Fix instructions list tests for hush 2021 test: hush: Fix variable expansion tests for hush 2021 cli: hush_2021: Enable using \< and \> as string compare operators cli: hush_2021: Enable if keyword test: hush: Fix if tests for hush 2021 cli: hush_2021: Enable loops test: hush: Fix loop tests for hush 2021 arch/sandbox/include/asm/sdl.h | 5 + cmd/Kconfig | 21 + cmd/Makefile | 2 + cmd/parser.c | 125 + common/Makefile | 3 +- common/cli.c | 81 +- common/cli_hush_2021.c | 309 + common/cli_hush_upstream.c | 12795 +++++++++++++++++++++++++++ include/asm-generic/global_data.h | 8 + include/cli_hush.h | 49 +- include/test/hush.h | 15 + include/test/suites.h | 1 + test/Makefile | 3 + test/cmd_ut.c | 6 + test/hush/Makefile | 10 + test/hush/cmd_ut_hush.c | 20 + test/hush/dollar.c | 234 + test/hush/if.c | 353 + test/hush/list.c | 140 + test/hush/loop.c | 90 + test/py/tests/test_hush_if_test.py | 184 - 21 files changed, 14257 insertions(+), 197 deletions(-) create mode 100644 cmd/parser.c create mode 100644 common/cli_hush_2021.c create mode 100644 common/cli_hush_upstream.c create mode 100644 include/test/hush.h create mode 100644 test/hush/Makefile create mode 100644 test/hush/cmd_ut_hush.c create mode 100644 test/hush/dollar.c create mode 100644 test/hush/if.c create mode 100644 test/hush/list.c create mode 100644 test/hush/loop.c delete mode 100644 test/py/tests/test_hush_if_test.py -- 2.25.1

2 24

CVE-2018-25032 on u-boot zlib
by Gan, Yau Wai 21 Apr '22

21 Apr '22

This is to report that CVE is detected during u-boot scanning. Sending to open mailing list as get_maintainer suggested. The current zlib version used in u-boot contains CVE-2018-25032 [1]. Corresponding fix in zlib mainline has been addressed in v1.2.12 [2]. It is required to upgrade zlib in u-boot to that version or later to mitigate the CVE. [1] https://www.cve.org/CVERecord?id=CVE-2018-25032 [2] https://github.com/madler/zlib/commit/5c44459c3b28a9bd3283aaceab7c615f8020c… - Yau Wai

2 1

[PATCH] verdin-imx8mm, verdin-imx8mp: Fix default systemd console output
by Philippe Schenker 21 Apr '22

21 Apr '22

From: Philippe Schenker <philippe.schenker(a)toradex.com> systemd prints its messages on the last console= statement that it finds in the kernel arguments. The current ordering sends the systemd messages to tty1, by default this is the display. Ensure that systemd sends its messages to the default UART, reorder the console= statements accordingly. Signed-off-by: Philippe Schenker <philippe.schenker(a)toradex.com> --- include/configs/verdin-imx8mm.h | 4 ++-- include/configs/verdin-imx8mp.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 6c5b190dd9..1c8f8f6358 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -63,8 +63,8 @@ "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \ "tftp ${fdt_addr} verdin/${fdtfile}; " \ "booti ${loadaddr} - ${fdt_addr}\0" \ - "setup=setenv setupargs console=${console},${baudrate} " \ - "console=tty1 consoleblank=0 earlycon\0" \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ + "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 9e29dc1903..076a70d2bf 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -82,7 +82,7 @@ "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \ "tftp ${fdt_addr} verdin/${fdtfile}; " \ "booti ${loadaddr} - ${fdt_addr}\0" \ - "setup=setenv setupargs console=${console},${baudrate} console=tty1 " \ + "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \ "consoleblank=0 earlycon\0" \ "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \ "if test \"$confirm\" = \"y\"; then " \ -- 2.35.1

3 2

RFC: Adding U-Boot version in FDT chosen node
by Francesco Dolcini 21 Apr '22

21 Apr '22

Hello all, I have a need to pass the u-boot version string to the operating system and I'm thinking at adding `u-boot,version` property storing `version_string` in it in the FDT `chosen` node. Is this something that would be generally useful? Would be a patch like that acceptable in upstream u-boot? Is there any other obvious way to achieve something like that already implemented (using the cmdline would work without any code change, but probably not the nicest solution). Francesco

5 7

im8mn: Loading U-Boot via serial download mode
by Fabio Estevam 21 Apr '22

21 Apr '22

Hi Adam, Looking at your imx8mn beacon patches, it seems you managed to boot the imx8mn beacon board via serial download mode. I am trying to achieve the same on an imx8mn-evk running top of tree U-Boot and added the following changes: --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -50,11 +50,22 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y +CONFIG_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x0 +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y Then I put the board into serial download mode and I run: $ sudo uuu flash.bin The following output appears on the console: U-Boot SPL 2022.04-00856-g246e03476ba3-dirty (Apr 20 2022 - 16:24:48 -0300) SEC0: RNG instantiated Normal Boot WDT: Started watchdog@30280000 with servicing (60s timeout) Trying to boot from BOOTROM Find img info 0x&48020a00, size 872 Need continue download 1024 Download 694696, Total size 696232 NOTICE: BL31: v2.2(release):rel_imx_5.4.47_2.2.0-0-gc949a888e909 NOTICE: BL31: Built : 16:07:45, Apr 20 2022 What would be the other uuu command that needs to be run so that U-Boot proper can be loaded? Thanks, Fabio Estevam

5 8

[PATCH v3] arm: kirkwood: nas220: Add DM Ethernet, SATA, GPIO
by Hajo Noerenberg 21 Apr '22

21 Apr '22

Bring the NAS220 board up to current standards. This is basically an adaptation of the changes Tony Dinh implemented for the Dockstar board. - Implement the changes to v2 as suggested by Stefan Roese - Add CONFIG_SUPPORT_PASSING_ATAGS et al, otherwise standard Debian flash-kernel pkg is unable to start kernel - Add CONFIG_SYS_64BIT_LBA, basic read tests with a 4TB hdd succeed with my NAS220 hardware - Thanks to Stefan and Tony Signed-off-by: Hajo Noerenberg <hajo-uboot(a)noerenberg.de> --- board/Seagate/nas220/MAINTAINERS | 1 + board/Seagate/nas220/nas220.c | 68 +++++++++++--------------------- configs/nas220_defconfig | 16 +++++++- include/configs/nas220.h | 35 ++++++---------- 4 files changed, 49 insertions(+), 71 deletions(-) diff --git a/board/Seagate/nas220/MAINTAINERS b/board/Seagate/nas220/MAINTAINERS index f2df7ea64f..6033f93cf4 100644 --- a/board/Seagate/nas220/MAINTAINERS +++ b/board/Seagate/nas220/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/Seagate/nas220/ F: include/configs/nas220.h F: configs/nas220_defconfig +F: arch/arm/dts/kirkwood-blackarmor-nas220.dts diff --git a/board/Seagate/nas220/nas220.c b/board/Seagate/nas220/nas220.c index cd2bbdad1c..fdbf321ff9 100644 --- a/board/Seagate/nas220/nas220.c +++ b/board/Seagate/nas220/nas220.c @@ -10,17 +10,22 @@ #include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> -#include <asm/global_data.h> -#include <asm/mach-types.h> +#include <netdev.h> +#include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> -#include <asm/arch/cpu.h> -#include <asm/io.h> +#include <asm/global_data.h> +#include <asm/mach-types.h> +#include <linux/bitops.h> DECLARE_GLOBAL_DATA_PTR; +/* blue power led, board power, sata0, sata1 */ +#define NAS220_GE_OE_LOW (~(BIT(12) | BIT(14) | BIT(24) | BIT(28))) +#define NAS220_GE_OE_HIGH (~(0)) +#define NAS220_GE_OE_VAL_LOW (BIT(12) | BIT(14) | BIT(24) | BIT(28)) +#define NAS220_GE_OE_VAL_HIGH (0) + int board_early_init_f(void) { /* @@ -43,9 +48,9 @@ int board_early_init_f(void) MPP9_TW_SCK, MPP10_UART0_TXD, MPP11_UART0_RXD, - MPP12_GPO, + MPP12_GPO, /* blue power led */ MPP13_GPIO, - MPP14_GPIO, + MPP14_GPIO, /* board power */ MPP15_SATA0_ACTn, MPP16_SATA1_ACTn, MPP17_SATA0_PRESENTn, @@ -55,12 +60,12 @@ int board_early_init_f(void) MPP21_GPIO, MPP22_GPIO, MPP23_GPIO, - MPP24_GPIO, + MPP24_GPIO, /* sata0 power */ MPP25_GPIO, - MPP26_GPIO, + MPP26_GPIO, /* power button */ MPP27_GPIO, - MPP28_GPIO, - MPP29_GPIO, + MPP28_GPIO, /* sata1 power */ + MPP29_GPIO, /* reset button */ MPP30_GPIO, MPP31_GPIO, MPP32_GPIO, @@ -73,6 +78,11 @@ int board_early_init_f(void) return 0; } +int board_eth_init(struct bd_info *bis) +{ + return cpu_eth_init(bis); +} + int board_init(void) { /* @@ -85,37 +95,3 @@ int board_init(void) return 0; } - -#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) -{ - u16 reg; - u16 devadr; - char *name = "egiga0"; - - if (miiphy_set_current_dev(name)) - return; - - /* command to read PHY dev address */ - if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) { - printf("Err..%s could not read PHY dev address\n", __func__); - return; - } - - /* - * Enable RGMII delay on Tx and Rx for CPU port - * Ref: sec 4.7.2 of chip datasheet - */ - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg); - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); - miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); - - /* reset the phy */ - miiphy_reset(name, devadr); - - printf("88E1116 Initialized on %s\n", name); -} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index f6a1dcbee0..5bf1233273 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -3,6 +3,9 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Seagate/nas220/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 @@ -20,7 +23,7 @@ CONFIG_USE_PREBOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nas220> " # CONFIG_CMD_FLASH is not set -CONFIG_CMD_IDE=y +CONFIG_CMD_SATA=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -32,6 +35,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xa0000@0x0(uboot),0x010000@0xa0000(env),0x500000@0xc0000(uimage),0x1a40000@0x5c0000(rootfs)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y @@ -47,11 +51,21 @@ CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 CONFIG_SYS_ATA_ALT_OFFSET=0x100 CONFIG_KIRKWOOD_GPIO=y +CONFIG_MVEBU_GPIO=y +CONFIG_GPIO_EXTRA_HEADER=y +CONFIG_DM_GPIO=y +CONFIG_CMD_GPIO=y +CONFIG_GPIO=y +CONFIG_DM_GPIO_LOOKUP_LABEL=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y +CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y +CONFIG_SATA_MV=y +CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y diff --git a/include/configs/nas220.h b/include/configs/nas220.h index 815f81f649..4c20245e5f 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -11,50 +11,37 @@ #ifndef _CONFIG_NAS220_H #define _CONFIG_NAS220_H -/* power-on led, regulator, sata0, sata1 */ -#define NAS220_GE_OE_VAL_LOW ((1 << 12)|(1 << 14)|(1 << 24)|(1 << 28)) -#define NAS220_GE_OE_VAL_HIGH (0) -#define NAS220_GE_OE_LOW (~((1 << 12)|(1 << 14)|(1 << 24)|(1 << 28))) -#define NAS220_GE_OE_HIGH (~(0)) - -/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) - -#include "mv-common.h" - /* - * Environment variables configurations + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros */ +#include "mv-common.h" + /* * Default environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=console=ttyS0,115200\0" \ - "mtdparts=mtdparts=orion_nand:0xa0000@0x0(uboot),"\ - "0x010000@0xa0000(env),"\ - "0x500000@0xc0000(uimage),"\ - "0x1a40000@0x5c0000(rootfs)\0" \ "mtdids=nand0=orion_nand\0"\ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "autostart=no\0"\ "autoload=no\0" /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 8 -#endif /* CONFIG_CMD_NET */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif /* - * EFI partition + * SATA driver configuration */ +#define CONFIG_LBA48 +#define CONFIG_SYS_64BIT_LBA #endif /* _CONFIG_NAS220_H */ -- 2.20.1

3 7

[PATCH] cmd: gpio: Add `gpio read` subcommand
by Diego Rondini 20 Apr '22

20 Apr '22

As explained in commit 4af2a33ee5b9 ("cmd: gpio: Make `gpio input` return pin value again") the `gpio input` is used in scripts to obtain the value of a pin, despite the fact that CMD_RET_FAILURE is indistinguishable from a valid pin value. To be able to detect failures and properly use the value of a GPIO in scripts we introduce the `gpio read` command that sets the variable `name` to the value of the pin. Return code of the `gpio read` command can be used to check for CMD_RET_SUCCESS or CMD_RET_FAILURE. Signed-off-by: Diego Rondini <diego.rondini(a)kynetics.com> --- cmd/gpio.c | 24 ++++++++++++++++++++---- test/py/tests/test_gpio.py | 15 +++++++++++++++ 2 files changed, 35 insertions(+), 4 deletions(-) diff --git a/cmd/gpio.c b/cmd/gpio.c index 4150024e628..150c77cbcf9 100644 --- a/cmd/gpio.c +++ b/cmd/gpio.c @@ -12,6 +12,7 @@ #include <dm.h> #include <log.h> #include <malloc.h> +#include <env.h> #include <asm/gpio.h> #include <linux/err.h> @@ -25,6 +26,7 @@ enum gpio_cmd { GPIOC_SET, GPIOC_CLEAR, GPIOC_TOGGLE, + GPIOC_READ, }; #if defined(CONFIG_DM_GPIO) && !defined(gpio_status) @@ -124,7 +126,7 @@ static int do_gpio(struct cmd_tbl *cmdtp, int flag, int argc, unsigned int gpio; enum gpio_cmd sub_cmd; int value; - const char *str_cmd, *str_gpio = NULL; + const char *str_cmd, *str_gpio, *str_var = NULL; int ret; #ifdef CONFIG_DM_GPIO bool all = false; @@ -137,12 +139,19 @@ static int do_gpio(struct cmd_tbl *cmdtp, int flag, int argc, argc -= 2; argv += 2; #ifdef CONFIG_DM_GPIO - if (argc > 0 && !strcmp(*argv, "-a")) { + if (argc > 0 && !strncmp(str_cmd, "status", 2) && !strcmp(*argv, "-a")) { all = true; argc--; argv++; } #endif + if (argc > 0 && !strncmp(str_cmd, "read", 2)) { + if (argc < 2) + goto show_usage; + str_var = *argv; + argc--; + argv++; + } if (argc > 0) str_gpio = *argv; if (!strncmp(str_cmd, "status", 2)) { @@ -174,6 +183,9 @@ static int do_gpio(struct cmd_tbl *cmdtp, int flag, int argc, case 't': sub_cmd = GPIOC_TOGGLE; break; + case 'r': + sub_cmd = GPIOC_READ; + break; default: goto show_usage; } @@ -205,7 +217,7 @@ static int do_gpio(struct cmd_tbl *cmdtp, int flag, int argc, } /* finally, let's do it: set direction and exec command */ - if (sub_cmd == GPIOC_INPUT) { + if (sub_cmd == GPIOC_INPUT || sub_cmd == GPIOC_READ) { gpio_direction_input(gpio); value = gpio_get_value(gpio); } else { @@ -233,9 +245,11 @@ static int do_gpio(struct cmd_tbl *cmdtp, int flag, int argc, goto err; } else { printf("%d\n", value); + if (sub_cmd == GPIOC_READ) + env_set_ulong(str_var, (ulong)value); } - if (sub_cmd != GPIOC_INPUT && !IS_ERR_VALUE(value)) { + if (sub_cmd != GPIOC_INPUT && sub_cmd != GPIOC_READ && !IS_ERR_VALUE(value)) { int nval = gpio_get_value(gpio); if (IS_ERR_VALUE(nval)) { @@ -267,4 +281,6 @@ U_BOOT_CMD(gpio, 4, 0, do_gpio, "query and control gpio pins", "<input|set|clear|toggle> <pin>\n" " - input/set/clear/toggle the specified pin\n" + "gpio read <name> <pin>\n" + " - set environment variable 'name' to the specified pin\n" "gpio status [-a] [<bank> | <pin>] - show [all/claimed] GPIOs"); diff --git a/test/py/tests/test_gpio.py b/test/py/tests/test_gpio.py index 8c64f686b0b..52bc8502d3e 100644 --- a/test/py/tests/test_gpio.py +++ b/test/py/tests/test_gpio.py @@ -35,3 +35,18 @@ def test_gpio_exit_statuses(u_boot_console): assert(expected_response in response) response = u_boot_console.run_command('gpio input 200; echo rc:$?') assert(expected_response in response) + +(a)pytest.mark.boardspec('sandbox') +(a)pytest.mark.buildconfigspec('cmd_gpio') +def test_gpio_read(u_boot_console): + """Test that gpio read correctly sets the variable to the value of a gpio pin.""" + + response = u_boot_console.run_command('gpio read var 0; echo val:$var') + expected_response = 'val:0' + assert(expected_response in response) + response = u_boot_console.run_command('gpio toggle 0; gpio read var 0; echo val:$var') + expected_response = 'val:1' + assert(expected_response in response) + response = u_boot_console.run_command('setenv var; gpio read var nonexistent-gpio; echo val:$var') + expected_response = 'val:' + assert(expected_response in response) -- 2.34.1

2 3