April 2022 - U-Boot

[PATCH v8 0/5] add TCB driver for sama5d2
by Clément Léger 01 Apr '22

01 Apr '22

When booting under OP-TEE, the SYSC is secured which means the PIT is also not accessible by non-secure world. The TCB 0 however is always available for non-secure world and thus can be used. This series add a TCB driver and enables it in sama5d2 configs. --- Changes in v8: - Switch clock to use t0_clk, generated clk does not works if parent clock is slow_ck. Moreover, tcb0_clk needs to be enabled for the TCB to operate correctly - Change driver to use TCB_CMR_TIMER_CLOCK2 (tcb0_clk / 8) - Add potential missing clk_enable() - Add u-boot,dm-pre-reloc properties to TCB nodes and to its dependencies in order to be used in SPL Changes in v7: - Keep the exact same Linux aic node definition - Fixed a few constant definition to use (1 << x) Changes in V6: - Fix node ordering in device tree - Disable CONFIG_PIT_TIMER in sama5d2 configuration file - Fixed mach-at91/armv7/Makefile to allow building with TCB Changes in v5: - Fixed missing include in .dts file for IRQ defines - Add aic interrupt controller node to avoid DTC warnings Changes in v4: - Add missing interrupts property to tcb node Changes in v3: - Remove useless defines - Add printf in case of unsupported timers specified in device-tree - Add "syscon" compatible to tcb node Changes in v2: - Reworked driver to use existing Linux bindings Clément Léger (5): timer: atmel_tcb_timer: add atmel_tcb driver ARM: dts: at91: sama5d2: add AIC node ARM: dts: at91: sama5d2: add TCB node ARM: dts: at91: sama5d2: add u-boot,dm-pre-reloc property for TCB configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER MAINTAINERS | 1 + arch/arm/dts/sama5d2.dtsi | 28 ++++ arch/arm/mach-at91/armv7/Makefile | 2 + configs/sama5d2_icp_mmc_defconfig | 2 +- configs/sama5d2_ptc_ek_mmc_defconfig | 2 +- configs/sama5d2_ptc_ek_nandflash_defconfig | 2 +- configs/sama5d2_xplained_emmc_defconfig | 2 +- configs/sama5d2_xplained_mmc_defconfig | 2 +- configs/sama5d2_xplained_qspiflash_defconfig | 2 +- configs/sama5d2_xplained_spiflash_defconfig | 2 +- drivers/timer/Kconfig | 8 + drivers/timer/Makefile | 1 + drivers/timer/atmel_tcb_timer.c | 161 +++++++++++++++++++ 13 files changed, 208 insertions(+), 7 deletions(-) create mode 100644 drivers/timer/atmel_tcb_timer.c -- 2.34.1

2 6

Fwd: Re: U-Boot and DM9000 eth driver support
by Marcel Ziswiler 01 Apr '22

01 Apr '22

Just noticed this having been only a private discussion. CCing mailing list as well. -------- Forwarded Message -------- From: Tom Rini <trini(a)konsulko.com> To: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> Cc: marex(a)denx.de <marex(a)denx.de>, Tsi-Chung.Liew(a)nxp.com <Tsi-Chung.Liew(a)nxp.com>, stelian(a)popies.net <stelian(a)popies.net>, ezequiel(a)collabora.com <ezequiel(a)collabora.com>, weber(a)corscience.de <weber(a)corscience.de> Subject: Re: U-Boot and DM9000 eth driver support Date: Thu, 31 Mar 2022 08:15:16 -0400 On Thu, Mar 31, 2022 at 09:23:11AM +0000, Marcel Ziswiler wrote: > Hi Marek > > On Wed, 2022-03-30 at 22:12 +0200, Marek Vasut wrote: > > On 3/30/22 20:36, Tom Rini wrote: > > > Hey all, > > > > > > As I was doing some Kconfig migrations I noticed that there's symbols > > > for the DM9000 ethernet driver that haven't been migrated. In turn > > > however, that driver hasn't been migrated to DM yet, and the deadline > > > for that was v2020.07. Since that means I'll be posting patches to drop > > > the driver later this year, I wanted to give everyone a heads-up now to > > > see if anyone is able to convert the driver since you're listed as > > > maintainers of a platform that uses it. Thanks! > > > > +CC Marcel, since this is used on Colibri PXA270 . > > Yeah, I guess we could also just drop Colibri PXA270 support as we stopped selling those quite a while ago. > Unless, of course, somebody would be interested to keep it further maintained... > > I can send a removal commit as an RFC and we will see. Okay? Yes, board removals (JFYI, everyone on the list) is also a valid path forward. -- Tom

1 0

[PATCH v4 0/8] efi: capsule: Capsule Update fixes and enhancements
by Sughosh Ganu 01 Apr '22

01 Apr '22

This series is cleaning up the usage of the image GUIDs that are used in capsule update and the EFI System Resource Table(ESRT). There are some other enhancements being made to the capsule update code to make it more robust. Firstly, an overview of the fixes being made. Currently, there are two instances of the Firmware Management Protocol(FMP), one defined for updating the FIT images, and the other for updating raw images. The FMP code defines two GUID values, one for all FIT images, and one for raw images. Depending on the FMP instance used on a platform, the platform needs to use the corresponding image GUID value for all images on the platform, and also across platforms. A few issues are being fixed through the patch series. One, that an image for a different platform can be flashed on another platform if both the platforms are using the same FMP instance. So, for e.g. a capsule generated for the Socionext DeveloperBox platform can be flashed on the ZynqMP platform, since both the platforms use the CONFIG_EFI_CAPSULE_FIRMWARE_RAW instance of the FMP. This can be corrected if each firmware image that can be updated through the capsule update mechanism has it's own unique image GUID. The second issue that this patch series fixes is the value of FwClass in the ESRT. With the current logic, all firmware image entries in the ESRT display the same GUID value -- either the FIT GUID or the raw GUID. This is not in compliance with the UEFI specification, as the specification requires all entries to have unique GUID values. The third issue being fixed is the population of the EFI_FIRMWARE_IMAGE_DESCRIPTOR array. The current code uses the dfu framework for populating the image descriptor array. However, there might be other images that are not to be updated through the capsule update mechanism also registered with the dfu framework. As a result of this, the ESRT will show up entries of images that are not to be targeted by the capsule update mechanism. These issues are being fixed by defining a structure, efi_fw_images. A platform can then define image related information like the image GUID and image name. Every platform that uses capsule update mechanism needs to define fw_images array. This array will then be used to populate the image descriptor array, and also in determining if a particular capsule's payload can be used for updating an image on the platform. The other part of the patches are some enhancements being made to the capsule update code to make it more robust. The first enhancement being made is to have a check for the image index being passed through the capsule header. The capsule update code uses the image index value as the dfu alt number, which points to the partition to which the update must be made. The platform is supposed to define the image index value for the updatable firmare images as part of the fw_images array. This value must correspond to the dfu alt num for the corresponding image, and can be obtained by checking the output of the 'dfu list' u-boot command. At the time of update, the image index being passed through the capsule is checked against the image index value obtained from the platform. The second enhancement made is the retrieval of the dfu_alt_info variable from the set_dfu_alt_info function defined in the board file. The dfu framework checks for the existence of this function, and if the function is not defined, gets the value from the environment. This can cause in an incorrect update if the environment variable value is incorrect. By mandating all the platforms which enable the capsule update feature to define set_dfu_alt_info function, the variable is then obtained from the board file rather than the environment. The first patch adds the structure efi_fw_images and defines an array fw_images on all platforms which enable capsule update feature The second patch populates the image descriptor array in the GetImageInfo function with the values from the fw_images array The third patch adds a check for the image index value from the capsule header against the value obtained from the fw_images array for the corresponding image The fourth patch defines the function set_dfu_alt_info for all the platforms which enable capsule update feature and selects SET_DFU_ALT_INFO config symbol for all platforms that enable capsule update feature. The fifth patch splits the capsule update test script into two, one for FMP for raw images, and one for FMP for FIT images. The test for FIT images is being enabled on the sandbox_flattree variant. The sixth patch removes the now unused FIT and raw image GUID values from the FMP module. The seventh patch removes the --raw and --fit command line parameters in the mkeficapsule utility. The eighth patch makes corresponding changes in the capsule update related documentation. Changes since V3: ----------------- * Do not remove the existing dfu_alt_info definitions made by platforms in the config files, as discussed with Masami. * Squash the selection of the SET_DFU_ALT_INFO config symbol for capsule update feature as part of this patch. * Rephrase the commit message to indicate that the doc changes are not just limited to adding the GUID values, but other info as well. * Elaborate with an example on the relation between the dfu alt number and the image index Changes since V2: ----------------- * Add a new member image_index to the struct efi_fw_images to allow the platforms to define the values for images. * Address review comments from Michal Simek for the xilinx boards. * Fix double inclusion of efi_loader.h as was pointed out by Heiko Thiery. * Use the image index values defined in the platform's fw_images array for the image descriptors * Add a description for adding image index value and definition of set_dfu_alt_info function for the capsule updates. Changes since V1: ----------------- * Make changes for the xilinx boards as suggested by Michal Simek. * Add a GUID for the sandbox FIT image. * Split the capsule update test cases into two scripts, one for raw images and one for FIT images. * Add the capsule update test case for FIT images on sandbox64 and sandbox_flattree variants. * Add capsule update support on sandbox_flattree variant for enabling FIT capsule update testing as part of the python tests Sughosh Ganu (8): capsule: Add Image GUIDs and image index for platforms using capsule updates capsule: FMP: Populate the image descriptor array from platform data capsule: Put a check for image index before the update board: Define set_dfu_alt_info() for boards with UEFI capsule update enabled test: capsule: Modify the capsule tests to use GUID values for sandbox FMP: Remove GUIDs for FIT and raw images mkeficapsule: Remove raw and FIT GUID types doc: uefi: Update the capsule update related documentation .../imx8mp_rsb3720a1/imx8mp_rsb3720a1.c | 44 +++++ .../imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 43 ++++ board/emulation/common/qemu_dfu.c | 6 +- board/emulation/qemu-arm/qemu-arm.c | 20 ++ board/kontron/pitx_imx8m/pitx_imx8m.c | 40 +++- board/kontron/sl-mx8mm/sl-mx8mm.c | 39 ++++ board/kontron/sl28/sl28.c | 40 ++++ board/sandbox/sandbox.c | 54 +++++ board/socionext/developerbox/developerbox.c | 52 +++++ board/xilinx/common/board.c | 24 +++ board/xilinx/zynq/board.c | 5 +- board/xilinx/zynqmp/zynqmp.c | 5 +- configs/sandbox64_defconfig | 1 - configs/sandbox_defconfig | 1 - configs/sandbox_flattree_defconfig | 5 + doc/develop/uefi/uefi.rst | 24 ++- include/configs/imx8mm-cl-iot-gate.h | 10 + include/configs/imx8mp_rsb3720.h | 10 + include/configs/kontron-sl-mx8mm.h | 6 + include/configs/kontron_pitx_imx8m.h | 6 + include/configs/kontron_sl28.h | 6 + include/configs/qemu-arm.h | 10 + include/configs/sandbox.h | 14 ++ include/configs/synquacer.h | 14 ++ include/configs/xilinx_versal.h | 6 + include/configs/xilinx_zynqmp.h | 10 + include/configs/zynq-common.h | 10 + include/efi_api.h | 8 - include/efi_loader.h | 21 ++ lib/efi_loader/Kconfig | 2 + lib/efi_loader/efi_capsule.c | 8 +- lib/efi_loader/efi_firmware.c | 95 +++------ test/py/tests/test_efi_capsule/conftest.py | 21 +- .../test_capsule_firmware_fit.py | 186 ++++++++++++++++++ ...rmware.py => test_capsule_firmware_raw.py} | 159 +++++---------- tools/eficapsule.h | 8 - tools/mkeficapsule.c | 26 +-- 37 files changed, 802 insertions(+), 237 deletions(-) create mode 100644 test/py/tests/test_efi_capsule/test_capsule_firmware_fit.py rename test/py/tests/test_efi_capsule/{test_capsule_firmware.py => test_capsule_firmware_raw.py} (75%) -- 2.25.1

3 19

[PATCH] mtd: spi: Add ISSI QSPI to lightweight SPI flash stack for spl
by raaj.lokanathan＠intel.com 01 Apr '22

01 Apr '22

From: "Lokanathan, Raaj" <raaj.lokanathan(a)intel.com> Add support for reading data/images from this ISSI QSPI flash. Signed-off-by: Lokanathan, Raaj <raaj.lokanathan(a)intel.com> --- drivers/mtd/spi/spi-nor-tiny.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c index 68152ce3b4..6a5da38cb1 100644 --- a/drivers/mtd/spi/spi-nor-tiny.c +++ b/drivers/mtd/spi/spi-nor-tiny.c @@ -219,6 +219,7 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info, case SNOR_MFR_MICRON: /* Some Micron need WREN command; all will accept it */ need_wren = true; + case SNOR_MFR_ISSI: case SNOR_MFR_MACRONIX: case SNOR_MFR_WINBOND: if (need_wren) @@ -432,7 +433,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, return -ENOTSUPP; } -#ifdef CONFIG_SPI_FLASH_MACRONIX +#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_ISSI) /** * macronix_quad_enable() - set QE bit in Status Register. * @nor: pointer to a 'struct spi_nor' @@ -661,8 +662,9 @@ static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info, /* Enable Quad I/O if needed. */ if (spi_nor_get_protocol_width(nor->read_proto) == 4) { switch (JEDEC_MFR(info)) { -#ifdef CONFIG_SPI_FLASH_MACRONIX +#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_ISSI) case SNOR_MFR_MACRONIX: + case SNOR_MFR_ISSI: err = macronix_quad_enable(nor); break; #endif -- 2.25.1

2 1

[v2,0/3] Add support for different mediatek pinctrl designs
by Sam Shih 01 Apr '22

01 Apr '22

MediaTek SoC's pinconf register usage varies by SoC, So the original code uses V0/V1 to mark different pinconf design. But actually, the real difference is the design of the "pin" itself. Different SoCs will choose specify "pin design", which we call the "io_type" of the pin. For a better understanding of mediatek pinctrl design. and make the driver clear and flexible, this patch series changes common parts of mediatek pinctrl driver to support various pinctrl controller designs. --- v2: fix build fail caused by patch [2/3] Sam Shih (3): pinctrl: mediatek: rewrite mtk_pinconf_set and related functions pinctrl: mediatek: introduce multiple memory bases support pinctrl: mediatek: add support for different types of IO pins drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 219 ++++++++++++++---- drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 78 ++++++- 2 files changed, 246 insertions(+), 51 deletions(-) -- 2.18.0

1 3

[PATCH] clk: imx8mp: Fill in DWC3 USB, USB PHY, HSIOMIX clock
by Marek Vasut 01 Apr '22

01 Apr '22

Add clock tables required to bring up DWC3 USB, USB PHY and HSIOMIX domain. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- drivers/clk/imx/clk-imx8mp.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index c77500bcce0..1aca30d2f71 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -76,6 +76,10 @@ static const char *imx8mp_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll "sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; +static const char *imx8mp_hsio_axi_sels[] = {"clock-osc-24m", "sys_pll2_500m", "sys_pll1_800m", + "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", + "clk_ext4", "audio_pll2_out", }; + static const char *imx8mp_main_axi_sels[] = {"clock-osc-24m", "sys_pll2_333m", "sys_pll1_800m", "sys_pll2_250m", "sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "sys_pll1_100m",}; @@ -156,6 +160,14 @@ static const char *imx8mp_uart4_sels[] = {"clock-osc-24m", "sys_pll1_80m", "sys_ "sys_pll2_100m", "sys_pll3_out", "clk_ext2", "clk_ext3", "audio_pll2_out", }; +static const char *imx8mp_usb_core_ref_sels[] = {"clock-osc-24m", "sys_pll1_100m", "sys_pll1_40m", + "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", + "clk_ext3", "audio_pll2_out", }; + +static const char *imx8mp_usb_phy_ref_sels[] = {"clock-osc-24m", "sys_pll1_100m", "sys_pll1_40m", + "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", + "clk_ext3", "audio_pll2_out", }; + static const char *imx8mp_gic_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll2_100m", "sys_pll1_800m", "sys_pll2_500m", "clk_ext4", "audio_pll2_out" }; @@ -324,6 +336,8 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_SYS_PLL2_500M, imx_clk_fixed_factor("sys_pll2_500m", "sys_pll2_out", 1, 2)); clk_dm(IMX8MP_SYS_PLL2_1000M, imx_clk_fixed_factor("sys_pll2_1000m", "sys_pll2_out", 1, 1)); + clk_dm(IMX8MP_CLK_24M, imx_clk_fixed_factor("clock-osc-24m", "osc_24m", 1, 1)); + base = dev_read_addr_ptr(dev); if (!base) return -EINVAL; @@ -332,6 +346,7 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_A53_CG, imx_clk_gate3("arm_a53_cg", "arm_a53_src", base + 0x8000, 28)); clk_dm(IMX8MP_CLK_A53_DIV, imx_clk_divider2("arm_a53_div", "arm_a53_cg", base + 0x8000, 0, 3)); + clk_dm(IMX8MP_CLK_HSIO_AXI, imx8m_clk_composite("hsio_axi", imx8mp_hsio_axi_sels, base + 0x8380)); clk_dm(IMX8MP_CLK_MAIN_AXI, imx8m_clk_composite_critical("main_axi", imx8mp_main_axi_sels, base + 0x8800)); clk_dm(IMX8MP_CLK_ENET_AXI, imx8m_clk_composite_critical("enet_axi", imx8mp_enet_axi_sels, base + 0x8880)); clk_dm(IMX8MP_CLK_NAND_USDHC_BUS, imx8m_clk_composite_critical("nand_usdhc_bus", imx8mp_nand_usdhc_sels, base + 0x8900)); @@ -361,6 +376,8 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_UART2, imx8m_clk_composite("uart2", imx8mp_uart2_sels, base + 0xaf80)); clk_dm(IMX8MP_CLK_UART3, imx8m_clk_composite("uart3", imx8mp_uart3_sels, base + 0xb000)); clk_dm(IMX8MP_CLK_UART4, imx8m_clk_composite("uart4", imx8mp_uart4_sels, base + 0xb080)); + clk_dm(IMX8MP_CLK_USB_CORE_REF, imx8m_clk_composite("usb_core_ref", imx8mp_usb_core_ref_sels, base + 0xb100)); + clk_dm(IMX8MP_CLK_USB_PHY_REF, imx8m_clk_composite("usb_phy_ref", imx8mp_usb_phy_ref_sels, base + 0xb180)); clk_dm(IMX8MP_CLK_GIC, imx8m_clk_composite_critical("gic", imx8mp_gic_sels, base + 0xb200)); clk_dm(IMX8MP_CLK_WDOG, imx8m_clk_composite("wdog", imx8mp_wdog_sels, base + 0xb900)); @@ -389,11 +406,14 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0)); clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0)); clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0)); + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "osc_32k", base + 0x44d0, 0)); + clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0)); clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0)); clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0)); clk_dm(IMX8MP_CLK_WDOG1_ROOT, imx_clk_gate4("wdog1_root_clk", "wdog", base + 0x4530, 0)); clk_dm(IMX8MP_CLK_WDOG2_ROOT, imx_clk_gate4("wdog2_root_clk", "wdog", base + 0x4540, 0)); clk_dm(IMX8MP_CLK_WDOG3_ROOT, imx_clk_gate4("wdog3_root_clk", "wdog", base + 0x4550, 0)); + clk_dm(IMX8MP_CLK_HSIO_ROOT, imx_clk_gate4("hsio_root_clk", "ipg_root", base + 0x45c0, 0)); clk_dm(IMX8MP_CLK_USDHC3_ROOT, imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0)); -- 2.35.1

2 1

[PATCH] env: Avoid using a leftover text-environment file
by Simon Glass 01 Apr '22

01 Apr '22

If include/generated/environment.h exists (perhaps leftover from a build of another board) it is used, even if the board currently being built does not have a text environment. This causes a build error. Fix it by emptying the file if it should not be there. Fixes: https://source.denx.de/u-boot/u-boot/-/issues/9 Signed-off-by: Simon Glass <sjg(a)chromium.org> Reported-by: Sean Anderson <seanga2(a)gmail.com> --- Makefile | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 9ef34ca4b7f..2351d6dacd2 100644 --- a/Makefile +++ b/Makefile @@ -1834,7 +1834,9 @@ ENV_FILE := $(if $(ENV_SOURCE_FILE),$(ENV_FILE_CFG),$(wildcard $(ENV_FILE_BOARD) # Run the environment text file through the preprocessor, but only if it is # non-empty, to save time and possible build errors if something is wonky with -# the board +# the board. +# If there is no ENV_FILE, produce an empty output file, to prevent a previous +# build's file being used in the case of in-tree builds. quiet_cmd_gen_envp = ENVP $@ cmd_gen_envp = \ if [ -s "$(ENV_FILE)" ]; then \ @@ -1845,6 +1847,7 @@ quiet_cmd_gen_envp = ENVP $@ -I$(srctree)/arch/$(ARCH)/include \ $< -o $@; \ else \ + rm $@; \ touch $@ ; \ fi include/generated/env.in: include/generated/env.txt FORCE -- 2.35.1.723.g4982287a31-goog

3 3

[PATCH] imx: power-domain: Add i.MX8MP HSIOMIX driver
by Marek Vasut 01 Apr '22

01 Apr '22

Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe in the correct order. Currently supported is the USB 3.0 part which can be tested, PCIe support should be easy to add. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- drivers/power/domain/Kconfig | 7 ++ drivers/power/domain/Makefile | 1 + drivers/power/domain/imx8mp-hsiomix.c | 162 ++++++++++++++++++++++++++ 3 files changed, 170 insertions(+) create mode 100644 drivers/power/domain/imx8mp-hsiomix.c diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig index 04fc0054323..7e1b8c072fa 100644 --- a/drivers/power/domain/Kconfig +++ b/drivers/power/domain/Kconfig @@ -40,6 +40,13 @@ config IMX8M_POWER_DOMAIN Enable support for manipulating NXP i.MX8M on-SoC power domains via requests to the ATF. +config IMX8MP_HSIOMIX_BLKCTRL + bool "Enable i.MX8MP HSIOMIX domain driver" + depends on POWER_DOMAIN && IMX8MP + select CLK + help + Enable support for manipulating NXP i.MX8MP on-SoC HSIOMIX block controller. + config MTK_POWER_DOMAIN bool "Enable the MediaTek power domain driver" depends on POWER_DOMAIN && ARCH_MEDIATEK diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile index 7c8af67dbd6..e6244776216 100644 --- a/drivers/power/domain/Makefile +++ b/drivers/power/domain/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_APPLE_PMGR_POWER_DOMAIN) += apple-pmgr.o obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain-legacy.o imx8-power-domain.o obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o +obj-$(CONFIG_IMX8MP_HSIOMIX_BLKCTRL) += imx8mp-hsiomix.o obj-$(CONFIG_MTK_POWER_DOMAIN) += mtk-power-domain.o obj-$(CONFIG_MESON_GX_VPU_POWER_DOMAIN) += meson-gx-pwrc-vpu.o obj-$(CONFIG_MESON_EE_POWER_DOMAIN) += meson-ee-pwrc.o diff --git a/drivers/power/domain/imx8mp-hsiomix.c b/drivers/power/domain/imx8mp-hsiomix.c new file mode 100644 index 00000000000..6b4420f044b --- /dev/null +++ b/drivers/power/domain/imx8mp-hsiomix.c @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Marek Vasut <marex(a)denx.de> + */ + +#include <common.h> +#include <asm/io.h> +#include <clk.h> +#include <dm.h> +#include <dm/device.h> +#include <dm/device_compat.h> +#include <power-domain-uclass.h> + +#include <dt-bindings/power/imx8mp-power.h> + +#define GPR_REG0 0x0 +#define PCIE_CLOCK_MODULE_EN BIT(0) +#define USB_CLOCK_MODULE_EN BIT(1) + +struct imx8mp_hsiomix_priv { + void __iomem *base; + struct clk clk_usb; + struct power_domain pd_bus; + struct power_domain pd_usb; + struct power_domain pd_usb_phy1; + struct power_domain pd_usb_phy2; +}; + +static int imx8mp_hsiomix_on(struct power_domain *power_domain) +{ + struct udevice *dev = power_domain->dev; + struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev); + struct power_domain *domain; + int ret; + + ret = power_domain_on(&priv->pd_bus); + if (ret) + return ret; + + if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) { + domain = &priv->pd_usb; + } else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY1) { + domain = &priv->pd_usb_phy1; + } else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2) { + domain = &priv->pd_usb_phy2; + } else { + ret = -EINVAL; + goto err_pd; + } + + ret = power_domain_on(domain); + if (ret) + goto err_pd; + + ret = clk_enable(&priv->clk_usb); + if (ret) + goto err_clk; + + if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) + setbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN); + + return 0; + +err_clk: + power_domain_off(domain); +err_pd: + power_domain_off(&priv->pd_bus); + return ret; +} + +static int imx8mp_hsiomix_off(struct power_domain *power_domain) +{ + struct udevice *dev = power_domain->dev; + struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev); + int ret; + + if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) + clrbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN); + + clk_disable(&priv->clk_usb); + + if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) + power_domain_off(&priv->pd_usb); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY1) + power_domain_off(&priv->pd_usb_phy1); + else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2) + power_domain_off(&priv->pd_usb_phy2); + + power_domain_off(&priv->pd_bus); + + return 0; +} + +static int imx8mp_hsiomix_of_xlate(struct power_domain *power_domain, + struct ofnode_phandle_args *args) +{ + struct udevice *dev = power_domain->dev; + + power_domain->id = args->args[0]; + + return 0; +} + +static int imx8mp_hsiomix_probe(struct udevice *dev) +{ + struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev); + int ret; + + priv->base = dev_read_addr_ptr(dev); + + ret = clk_get_by_name(dev, "usb", &priv->clk_usb); + if (ret < 0) + return ret; + + ret = power_domain_get_by_name(dev, &priv->pd_bus, "bus"); + if (ret < 0) + goto err_pd_bus; + + ret = power_domain_get_by_name(dev, &priv->pd_usb, "usb"); + if (ret < 0) + goto err_pd_usb; + + ret = power_domain_get_by_name(dev, &priv->pd_usb_phy1, "usb-phy1"); + if (ret < 0) + goto err_pd_usb_phy1; + + ret = power_domain_get_by_name(dev, &priv->pd_usb_phy2, "usb-phy2"); + if (ret < 0) + goto err_pd_usb_phy2; + + return 0; + +err_pd_usb_phy2: + power_domain_free(&priv->pd_usb_phy1); +err_pd_usb_phy1: + power_domain_free(&priv->pd_usb); +err_pd_usb: + power_domain_free(&priv->pd_bus); +err_pd_bus: + clk_free(&priv->clk_usb); + return ret; +} + +static const struct udevice_id imx8mp_hsiomix_ids[] = { + { .compatible = "fsl,imx8mp-hsio-blk-ctrl" }, + { } +}; + +struct power_domain_ops imx8mp_hsiomix_ops = { + .on = imx8mp_hsiomix_on, + .off = imx8mp_hsiomix_off, + .of_xlate = imx8mp_hsiomix_of_xlate, +}; + +U_BOOT_DRIVER(imx8mp_hsiomix) = { + .name = "imx8mp_hsiomix", + .id = UCLASS_POWER_DOMAIN, + .of_match = imx8mp_hsiomix_ids, + .probe = imx8mp_hsiomix_probe, + .priv_auto = sizeof(struct imx8mp_hsiomix_priv), + .ops = &imx8mp_hsiomix_ops, +}; -- 2.35.1

1 0

[PATCH] power_domain: Add power_domain_get_by_name()
by Marek Vasut 01 Apr '22

01 Apr '22

Implement power_domain_get_by_name() convenience function which parses DT property 'power-domain-names' and looks up power domain by matching name. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/power/domain/power-domain-uclass.c | 14 ++++++++++++++ include/power-domain.h | 21 +++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/drivers/power/domain/power-domain-uclass.c b/drivers/power/domain/power-domain-uclass.c index 0c5823ceddf..74c33d4e2e0 100644 --- a/drivers/power/domain/power-domain-uclass.c +++ b/drivers/power/domain/power-domain-uclass.c @@ -80,6 +80,20 @@ int power_domain_get_by_index(struct udevice *dev, return 0; } +int power_domain_get_by_name(struct udevice *dev, + struct power_domain *power_domain, const char *name) +{ + int index; + + index = dev_read_stringlist_search(dev, "power-domain-names", name); + if (index < 0) { + debug("fdt_stringlist_search() failed: %d\n", index); + return index; + } + + return power_domain_get_by_index(dev, power_domain, index); +} + int power_domain_get(struct udevice *dev, struct power_domain *power_domain) { return power_domain_get_by_index(dev, power_domain, 0); diff --git a/include/power-domain.h b/include/power-domain.h index 113276b5119..2ff6c77cd76 100644 --- a/include/power-domain.h +++ b/include/power-domain.h @@ -107,6 +107,27 @@ int power_domain_get_by_index(struct udevice *dev, } #endif +/** + * power_domain_get_by_name - Get the named power domain for a device. + * + * @dev: The client device. + * @power_domain: A pointer to a power domain struct to initialize. + * @name: Power domain name to be powered on. + * + * Return: 0 if OK, or a negative error code. + */ +#if CONFIG_IS_ENABLED(POWER_DOMAIN) +int power_domain_get_by_name(struct udevice *dev, + struct power_domain *power_domain, const char *name); +#else +static inline +int power_domain_get_by_name(struct udevice *dev, + struct power_domain *power_domain, const char *name) +{ + return -ENOSYS; +} +#endif + /** * power_domain_free - Free a previously requested power domain. * -- 2.35.1

1 0