April 2022 - U-Boot

[PATCH v2] IOMUX: Fix access past end of console_devices
by Sean Anderson 20 Apr '22

20 Apr '22

We should only access console_devices[file][i] once we have checked that i < cd_count[file]. Otherwise, we will access uninitialized memory at the end of the loop. console_devices[file][i] should not be NULL, but putting the assignment in the loop condition allows us to ensure that i is checked beforehand. This isn't a bug, but it does make valgrind stop complaining. Fixes: 400797cad3 ("IOMUX: Split out for_each_console_dev() helper macro") Signed-off-by: Sean Anderson <seanga2(a)gmail.com> Reviewed-by: Andrew Scull <ascull(a)google.com> --- Changes in v2: - Put each clause of the for loop on its own line include/iomux.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/iomux.h b/include/iomux.h index 37f5f6dee6..35caa697eb 100644 --- a/include/iomux.h +++ b/include/iomux.h @@ -24,10 +24,10 @@ extern struct stdio_dev **console_devices[MAX_FILES]; */ extern int cd_count[MAX_FILES]; -#define for_each_console_dev(i, file, dev) \ - for (i = 0, dev = console_devices[file][i]; \ - i < cd_count[file]; \ - i++, dev = console_devices[file][i]) +#define for_each_console_dev(i, file, dev) \ + for (i = 0; \ + i < cd_count[file] && (dev = console_devices[file][i]); \ + i++) int iomux_match_device(struct stdio_dev **, const int, struct stdio_dev *); int iomux_doenv(const int, const char *); -- 2.35.1

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[PATCH] Convert CONFIG_SYS_MEM_TOP_HIDE to Kconfig
by Tom Rini 20 Apr '22

20 Apr '22

This converts the following to Kconfig: CONFIG_SYS_MEM_TOP_HIDE Signed-off-by: Tom Rini <trini(a)konsulko.com> --- Kconfig | 11 +++++++++++ README | 21 --------------------- board/samsung/common/board.c | 4 ++-- common/board_f.c | 2 +- configs/odroid-xu3_defconfig | 3 ++- configs/odroid_defconfig | 3 ++- configs/origen_defconfig | 3 ++- configs/s5pc210_universal_defconfig | 3 ++- configs/theadorable_debug_defconfig | 3 ++- configs/trats2_defconfig | 3 ++- configs/trats_defconfig | 3 ++- include/configs/odroid.h | 3 --- include/configs/odroid_xu3.h | 3 --- include/configs/origen.h | 2 -- include/configs/s5pc210_universal.h | 2 -- include/configs/theadorable.h | 3 --- include/configs/trats.h | 2 -- include/configs/trats2.h | 2 -- 18 files changed, 28 insertions(+), 48 deletions(-) diff --git a/Kconfig b/Kconfig index 112745440b5a..cd63f6a74e52 100644 --- a/Kconfig +++ b/Kconfig @@ -456,6 +456,17 @@ config STACK_SIZE by the UEFI sub-system. On some boards initrd_high is calculated as base stack pointer minus this stack size. +config SYS_MEM_TOP_HIDE + hex "Exclude some memory from U-Boot / OS information" + default 0x0 + help + If set, this specified memory area will get subtracted from the top + (end) of RAM and won't get "touched" at all by U-Boot. By fixing up + gd->ram_size the OS / next stage should gets passed the now + "corrected" memory size and won't touch it either. + WARNING: Please make sure that this value is a multiple of the OS + page size. + config SYS_HAS_SRAM bool default y if TARGET_PIC32MZDASK diff --git a/README b/README index f31fcd73f196..4deef2789450 100644 --- a/README +++ b/README @@ -1887,27 +1887,6 @@ Configuration Settings: the RAM base is not zero, or RAM is divided into banks, this variable needs to be recalcuated to get the address. -- CONFIG_SYS_MEM_TOP_HIDE: - If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, - this specified memory area will get subtracted from the top - (end) of RAM and won't get "touched" at all by U-Boot. By - fixing up gd->ram_size the Linux kernel should gets passed - the now "corrected" memory size and won't touch it either. - This should work for arch/ppc and arch/powerpc. Only Linux - board ports in arch/powerpc with bootwrapper support that - recalculate the memory size from the SDRAM controller setup - will have to get fixed in Linux additionally. - - This option can be used as a workaround for the 440EPx/GRx - CHIP 11 errata where the last 256 bytes in SDRAM shouldn't - be touched. - - WARNING: Please make sure that this value is a multiple of - the Linux page size (normally 4k). If this is not the case, - then the end address of the Linux memory will be located at a - non page size aligned address and this could cause major - problems. - - CONFIG_SYS_LOADS_BAUD_CHANGE: Enable temporary baudrate change while serial download diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 97791aaeffe2..ff178b7fe677 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -107,9 +107,9 @@ int board_init(void) } boot_temp_check(); #endif -#ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE +#if CONFIG_VAL(SYS_MEM_TOP_HIDE) /* The last few MB of memory can be reserved for secure firmware */ - ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE; + ulong size = CONFIG_SYS_MEM_TOP_HIDE; gd->ram_size -= size; gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size; diff --git a/common/board_f.c b/common/board_f.c index 5b655ad6efe4..4d7e40013e1c 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -327,7 +327,7 @@ static int setup_dest_addr(void) * Ram is setup, size stored in gd !! */ debug("Ram size: %08lX\n", (ulong)gd->ram_size); -#if defined(CONFIG_SYS_MEM_TOP_HIDE) +#if CONFIG_VAL(SYS_MEM_TOP_HIDE) /* * Subtract specified amount of memory to hide so that it won't * get "touched" at all by U-Boot. By fixing up gd->ram_size diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 8a507904be9f..250c0b4b3da3 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -10,9 +10,10 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x310000 CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3" CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2" +CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SYS_LOAD_ADDR=0x43e00000 +CONFIG_SYS_MEM_TOP_HIDE=0x01600000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 54ff5799cb73..058e7dc3177c 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -11,9 +11,10 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x140000 CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid" +CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SYS_LOAD_ADDR=0x43e00000 +CONFIG_SYS_MEM_TOP_HIDE=0x00100000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 83a83ab13b14..b4b0d8b1464c 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -14,8 +14,9 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen" CONFIG_SPL_TEXT_BASE=0x02021410 CONFIG_SPL=y CONFIG_IDENT_STRING=" for ORIGEN" -CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x43e00000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${bootenv};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;if run loadbootscript; then run bootscript; fi; fi;load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index 3c0c7b53547b..e70ce25b099d 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -11,8 +11,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210" -CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x44800000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="Please use defined boot" CONFIG_BOOTCOMMAND="run mmcboot" diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 3b841b0c427a..230c086617a5 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -17,9 +17,10 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_SYS_MEM_TOP_HIDE=0x80000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index b93c9eb7175b..690cdef4c4ab 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -10,9 +10,10 @@ CONFIG_TARGET_TRATS2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2" +CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SYS_LOAD_ADDR=0x43e00000 +CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index d55c1d70e64b..18890799535e 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -10,8 +10,9 @@ CONFIG_TARGET_TRATS=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats" -CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x44800000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 42031bb99344..b8b47af4712b 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -21,9 +21,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE -/* Reserve the last 1 MiB for the secure firmware */ -#define CONFIG_SYS_MEM_TOP_HIDE (1UL << 20UL) -#define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE #include <linux/sizes.h> diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 616f25eafd3e..eb35d7b4ae2d 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -15,9 +15,6 @@ #define TZPC_BASE_OFFSET 0x10000 #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ -/* Reserve the last 22 MiB for the secure firmware */ -#define CONFIG_SYS_MEM_TOP_HIDE (22UL << 20UL) -#define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) diff --git a/include/configs/origen.h b/include/configs/origen.h index 278c204ded8a..c4f5997c3dec 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -19,8 +19,6 @@ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ - /* Power Down Modes */ #define S5P_CHECK_SLEEP 0x00000BAD #define S5P_CHECK_DIDLE 0xBAD00000 diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 8cbdbc733c0b..ae56c66e15cd 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -24,8 +24,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ - /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ #define NORMAL_MTDPARTS_DEFAULT CONFIG_MTDPARTS_DEFAULT diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 14817b165cfa..fdf048b27b3c 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -43,9 +43,6 @@ /* SATA support */ #define CONFIG_LBA48 -/* Enable LCD and reserve 512KB from top of memory*/ -#define CONFIG_SYS_MEM_TOP_HIDE 0x80000 - /* FPGA programming support */ #define CONFIG_FPGA_STRATIX_V diff --git a/include/configs/trats.h b/include/configs/trats.h index 41ac6090c270..910fc150b18b 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -28,8 +28,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ - /* Tizen - partitions definitions */ #define PARTS_CSA "csa-mmc" #define PARTS_BOOT "boot" diff --git a/include/configs/trats2.h b/include/configs/trats2.h index a980e6c47d11..3e121bc6909a 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ - /* Tizen - partitions definitions */ #define PARTS_CSA "csa-mmc" #define PARTS_BOOT "boot" -- 2.25.1

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spl: spi: Raw Kernel Image Support for Falcon Mode Boot Via SPI Devices
by Nathan Barrett-Morrison 20 Apr '22

20 Apr '22

Hi Tom, I believe this patch is still relevant, so I'm resubmitting it. It was previously marked as superseded. Thanks, Nathan >From 0bb98a42bcb01c078f63513d9151d307dbfd6ccd Mon Sep 17 00:00:00 2001 From: Nathan Barrett-Morrison <nathan.morrison(a)timesys.com> Date: Tue, 19 Apr 2022 17:35:21 -0400 Subject: [PATCH v2] Allow Falcon Mode boot to use raw kernel image when booting via SPI. When using Falcon Mode boot with a raw, unwrapped kernel image, the bootz_setup() call inside of spl_parse_image_header() is unreachable because the mkimage header magic check in spi_load_image_os() will never pass. This check is entirely redundant and unnecessary, as the spl_parse_image_header() call will also check for IH_MAGIC. Signed-off-by: Nathan Barrett-Morrison <nathan.morrison(a)timesys.com> Cc: Tom Rini <trini(a)konsulko.com> --- Changes for v2: - Remove proposed CONFIG_SYS_SPI_KERNEL_SKIP_HEADER option, as we've determined the entire check is redundant and unnecessary. Just delete it instead. common/spl/spl_spi.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index cf3f7ef4c0..22e9c87eae 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -34,9 +34,6 @@ static int spi_load_image_os(struct spl_image_info *spl_image, spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, sizeof(*header), (void *)header); - if (image_get_magic(header) != IH_MAGIC) - return -1; - err = spl_parse_image_header(spl_image, bootdev, header); if (err) return err; -- 2.30.2

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[PATCH] tools: kwboot: Fix spelling of "followed" in kwboot.1
by Vagrant Cascadian 20 Apr '22

20 Apr '22

Fix spelling of "followed" in kwboot.1 manpage. Series: 2 Signed-off-by: Vagrant Cascadian <vagrant(a)debian.org> --- Changes in v2: Use "tools: kwboot:" prefix. Add full commit message. doc/kwboot.1 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/kwboot.1 b/doc/kwboot.1 index f555ff26a2..d663bf1f77 100644 --- a/doc/kwboot.1 +++ b/doc/kwboot.1 @@ -74,7 +74,7 @@ BootROM's standard input and BootROM's terminal echo are active and working fine. To workaround this BootROM bug with standard output, it is possible to manually overwrite BootROM variables stored in SRAM which BootROM use for checking if standard output is enabled or not. To enable BootROM -standard output on UART, type this command folled by ENTER key: +standard output on UART, type this command followed by ENTER key: .RS 1.2i .TP -- 2.35.1

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[PATCH 0/5] Reduce size of a few boards
by Simon Glass 20 Apr '22

20 Apr '22

This series is intended to be applied before with EFI clean-up series from Takahiro-san. It reduces the size of a few boards by removing features. It also allows the partition driver to be dropped in SPL, thus eliminating the SPL size gains. The helper-function patch must be applied after the EFI series, but the others can come before. Simon Glass (5): disk: Add an option for partitions in SPL tbs2910: Disable ext4 write rcar3_salvator-x: Drop EFI_LOADER phycore-rk3288: Avoid enabling partition support in SPL disk: Use a helper function to reduce duplication configs/phycore-rk3288_defconfig | 2 +- configs/rcar3_salvator-x_defconfig | 2 +- configs/tbs2910_defconfig | 1 - disk/Kconfig | 24 +++++++++++++--- disk/Makefile | 6 ++-- disk/disk-uclass.c | 46 ++++++++++++++++-------------- drivers/block/blk-uclass.c | 2 +- 7 files changed, 51 insertions(+), 32 deletions(-) -- 2.35.1.723.g4982287a31-goog

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[PATCH v4 01/14] rockchip: rk3228-power: sync power domain dt-binding header from Linux
by Johan Jonker 20 Apr '22

20 Apr '22

In order to update the DT for rk3228 sync the power domain dt-binding header. This is the state as of v5.17 in Linux. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> Reviewed-by: Kever Yang <kever.yang(a)rock-chips.com> --- include/dt-bindings/power/rk3228-power.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 include/dt-bindings/power/rk3228-power.h diff --git a/include/dt-bindings/power/rk3228-power.h b/include/dt-bindings/power/rk3228-power.h new file mode 100644 index 00000000..6a8dc1bf --- /dev/null +++ b/include/dt-bindings/power/rk3228-power.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3228_POWER_H__ +#define __DT_BINDINGS_POWER_RK3228_POWER_H__ + +/** + * RK3228 idle id Summary. + */ + +#define RK3228_PD_CORE 0 +#define RK3228_PD_MSCH 1 +#define RK3228_PD_BUS 2 +#define RK3228_PD_SYS 3 +#define RK3228_PD_VIO 4 +#define RK3228_PD_VOP 5 +#define RK3228_PD_VPU 6 +#define RK3228_PD_RKVDEC 7 +#define RK3228_PD_GPU 8 +#define RK3228_PD_PERI 9 +#define RK3228_PD_GMAC 10 + +#endif -- 2.20.1

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[PATCH v11 00/16] Add Rikomagic MK808 board
by Johan Jonker 20 Apr '22

20 Apr '22

MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port, HDMI and a micro-SD card slot. It also includes on-board NAND and 1GB of SDRAM. Changed V11: remove defines update defconfig align doc examples Changed V10: add u-boot,spl-fifo-mode property combine patches core support restyle doc rockchip.rst add more px30 doc info add more rk3066 doc info Changed V9: fix TABs and spaces add led config enable led gpio change pinctrl regmap source disable STIMER move include Changed V8: update clock driver update grf header file Changed V7: add board files enable boot from SD card restyle pinctrl driver restyle sdram driver === Boot procedure flow for a Rockchip rk3066 SoC: 1.Read 2K SDRAM initialization image code to internal SRAM 2.Run image code to do SDRAM initialization 3.Transfer boot image code to SDRAM 4.Run boot image code Supported system boot from the following devices: Nand Flash SPI nor Flash eMMC device UART interface If all boot options fail then enter into BootROM mode on the USB OTG port. Unlike later SoC models the rk3066 BootROM doesn't have SDMMC support. The size of a full U-boot binary is too large for the internal SDRAM memory. Of that 64k size only 32kb sram - 2kb bootrom is available for the first stage. Similar to the already supported rk3188, the BootROM will attempt to load up the first stage image in two steps: first 1KB to offset 0x800 in the SRAM and then the remainder to offset 0xc00 in the SRAM. It always enters at offset 0x804 after a 4 ASCII character "RK30" header. With CONFIG_TPL_ROCKCHIP_EARLYRETURN_TO_BROM=y this first stage is combined with the U-boot TPL binary (u-boot-tpl.bin). For rk3066 with NAND flash and U-boot this gives the following stages: - TPL: init external SDRAM - SPL: init SDMMC and read U-boot from SD CARD. - U-boot: read Linux kernel from SD CARD. - Kernel Additionally the rk3066 requires everything the BootROM loads to be RC4-encrypted. === Boot solution with full U-boot stored on SD CARD: Compile commands(U-boot): ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make mk808_defconfig ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make menuconfig ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- make all === Size of SPL and TPL must be aligned to 2kb. If bricked and no BootROM mode shows up then connect pin 8 and 9 of the NAND flash with a needle while reconnecting to the USB OTG port to a PC. === Show connected devices with: lsusb Bus 001 Device 004: ID 2207:300a Fuzhou Rockchip Electronics Company RK3066 in Mask ROM mode === Program commands with ./flash.sh: #!/bin/sh printf "RK30" > tplspl.bin dd if=u-boot-tpl.bin >> tplspl.bin truncate -s %2048 tplspl.bin truncate -s %2048 u-boot-spl.bin ../tools/boot_merger --verbose config-flash.ini ../tools/upgrade_tool ul ./RK30xxLoader_uboot.bin === config-flash.ini: [CHIP_NAME] NAME=RK30 [VERSION] MAJOR=2 MINOR=21 [CODE471_OPTION] NUM=1 Path1=30_LPDDR2_300MHz_DD.bin [CODE472_OPTION] NUM=1 Path1=rk30usbplug.bin [LOADER_OPTION] NUM=2 LOADER1=FlashData LOADER2=FlashBoot FlashData=tplspl.bin FlashBoot=u-boot-spl.bin [OUTPUT] PATH=RK30xxLoader_uboot.bin === Partition Map for MMC device 0 -- Partition Type: EFI Part Start LBA End LBA Name 1 0x00000040 0x00001f7f "loader1" 2 0x00004000 0x00005fff "loader2" 3 0x00006000 0x00007fff "trust" 4 0x00008000 0x0003ffff "boot" 5 0x00040000 0x00ed7fde "rootfs" Make sure boot and esp flag are set for boot partition. Loader1 partition is not used by RK3066. === Boot partition: extlinux -- extlinux.conf zImage rk3066a-mk808.dtb === extlinux.conf: label kernel kernel /zImage fdt /rk3066a-mk808.dtb append root=LABEL=linuxroot init=/sbin/init rootfstype=ext4 rootwait === Program commands (SD CARD with GPT partition): sudo dd if=u-boot-dtb.img of=/dev/sda seek=16384 === TODO: Better program flow/tools USB NAND etc etc === Johan Jonker (12): rockchip: rk3066-power: sync power domain dt-binding header from Linux arm: dts: rockchip: fix rk3xxx-u-boot.dtsi arm: dts: rockchip: fix include rk3xxx-u-boot.dtsi arm: dts: rockchip: add rk3066a.dtsi arm: dts: rockchip: add rk3066a-mk808.dts rockchip: tools: add rk3066 support to rkcommon.c rockchip: rk3066: add core support rockchip: rk3066: add Rikomagic MK808 board rockchip: rk3066: add mk808_defconfig doc: rockchip: restyle rockchip.rst doc: rockchip: add px30/rk3326 boards and examples doc: rockchip: add rk3066 Rikomagic MK808 Paweł Jarosz (4): rockchip: rk3066: add grf header file rockchip: rk3066: add clock driver for rk3066 soc rockchip: rk3066: add rk3066 pinctrl driver rockchip: rk3066: add sdram driver arch/arm/dts/Makefile | 3 + arch/arm/dts/rk3066a-mk808-u-boot.dtsi | 49 + arch/arm/dts/rk3066a-mk808.dts | 216 +++++ arch/arm/dts/rk3066a-u-boot.dtsi | 4 + arch/arm/dts/rk3066a.dtsi | 879 +++++++++++++++++ arch/arm/dts/rk3188-u-boot.dtsi | 1 + arch/arm/dts/rk3188.dtsi | 1 - arch/arm/dts/rk3xxx-u-boot.dtsi | 8 +- arch/arm/include/asm/arch-rk3066/boot0.h | 8 + arch/arm/include/asm/arch-rk3066/gpio.h | 8 + arch/arm/include/asm/arch-rk3066/timer.h | 6 + .../include/asm/arch-rockchip/cru_rk3066.h | 157 +++ .../include/asm/arch-rockchip/grf_rk3066.h | 210 +++++ arch/arm/mach-rockchip/Kconfig | 23 + arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3066/Kconfig | 39 + arch/arm/mach-rockchip/rk3066/Makefile | 5 + arch/arm/mach-rockchip/rk3066/clk_rk3066.c | 33 + arch/arm/mach-rockchip/rk3066/rk3066.c | 49 + arch/arm/mach-rockchip/rk3066/syscon_rk3066.c | 55 ++ board/rikomagic/mk808/Kconfig | 15 + board/rikomagic/mk808/MAINTAINERS | 6 + board/rikomagic/mk808/Makefile | 3 + board/rikomagic/mk808/mk808.c | 3 + configs/mk808_defconfig | 102 ++ doc/board/rockchip/rockchip.rst | 262 ++++- drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk_rk3066.c | 717 ++++++++++++++ drivers/pinctrl/rockchip/Makefile | 1 + drivers/pinctrl/rockchip/pinctrl-rk3066.c | 112 +++ drivers/ram/rockchip/Makefile | 1 + drivers/ram/rockchip/sdram_rk3066.c | 892 ++++++++++++++++++ include/configs/mk808.h | 9 + include/configs/rk3066_common.h | 47 + include/dt-bindings/power/rk3066-power.h | 22 + tools/rkcommon.c | 1 + 36 files changed, 3894 insertions(+), 55 deletions(-) create mode 100644 arch/arm/dts/rk3066a-mk808-u-boot.dtsi create mode 100644 arch/arm/dts/rk3066a-mk808.dts create mode 100644 arch/arm/dts/rk3066a-u-boot.dtsi create mode 100644 arch/arm/dts/rk3066a.dtsi create mode 100644 arch/arm/include/asm/arch-rk3066/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3066/gpio.h create mode 100644 arch/arm/include/asm/arch-rk3066/timer.h create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3066.h create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3066.h create mode 100644 arch/arm/mach-rockchip/rk3066/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3066/Makefile create mode 100644 arch/arm/mach-rockchip/rk3066/clk_rk3066.c create mode 100644 arch/arm/mach-rockchip/rk3066/rk3066.c create mode 100644 arch/arm/mach-rockchip/rk3066/syscon_rk3066.c create mode 100644 board/rikomagic/mk808/Kconfig create mode 100644 board/rikomagic/mk808/MAINTAINERS create mode 100644 board/rikomagic/mk808/Makefile create mode 100644 board/rikomagic/mk808/mk808.c create mode 100644 configs/mk808_defconfig create mode 100644 drivers/clk/rockchip/clk_rk3066.c create mode 100644 drivers/pinctrl/rockchip/pinctrl-rk3066.c create mode 100644 drivers/ram/rockchip/sdram_rk3066.c create mode 100644 include/configs/mk808.h create mode 100644 include/configs/rk3066_common.h create mode 100644 include/dt-bindings/power/rk3066-power.h -- 2.20.1

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[PATCH 0/2] usb: dwc3: Add support for standalone DWC3 nodes
by Alban Bedel 20 Apr '22

20 Apr '22

Hi all, I recently submitted a patch to fix the support for the DWC3 controller on the imx8mq which, unlike most DWC3 implementation, doesn't use a top glue node with child DWC3 nodes. Instead it has the DWC3 node directly on the main bus. Angus Ainslie then asked why this patch was needed as he had submitted the original support for the imx8mq. Looking into the issue it turned out that Angus patch basically let the driver use the `port` subnodes, which are there to define the connection to a type C connector, as DWC3 nodes. As the board I'm working on has no type C connecor, hence no `port` subnodes the driver just did nothing in my case. This new series replace my previous patch (usb: dwc3-generic: Fix the iMX8MQ support). It starts by reverting Angus patch as it was not following the DT binding and then add support for generic DWC3 without glue node. This fix the imx8mq case and might add support for a few other SoC at the same time. Alban Alban Bedel (2): Revert "usb: dwc3: dwc3-generic: check the parent nodes" usb: dwc3: Add support for standalone DWC3 nodes drivers/usb/dwc3/dwc3-generic.c | 124 +++++++++++++++++--------------- 1 file changed, 68 insertions(+), 56 deletions(-) -- 2.32.0

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[PATCH v2] soc: xilinx: versal: fix out of bounds array access
by Jorge Ramirez-Ortiz 20 Apr '22

20 Apr '22

The call to xilinx_pm_request requires an array of a larger size. Signed-off-by: Jorge Ramirez-Ortiz <jorge(a)foundries.io> --- drivers/soc/soc_xilinx_versal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/soc_xilinx_versal.c b/drivers/soc/soc_xilinx_versal.c index f8bcd9ab40..3d8c25c19b 100644 --- a/drivers/soc/soc_xilinx_versal.c +++ b/drivers/soc/soc_xilinx_versal.c @@ -45,7 +45,7 @@ static const struct soc_ops soc_xilinx_versal_ops = { static int soc_xilinx_versal_probe(struct udevice *dev) { struct soc_xilinx_versal_priv *priv = dev_get_priv(dev); - u32 ret_payload[4]; + u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; priv->family = versal_family; -- 2.34.1

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[PATCH] usb: dwc3-generic: Fix the iMX8MQ support
by Alban Bedel 20 Apr '22

20 Apr '22

The binding of iMX8MQ USB controller doesn't use child nodes like the other devices supported in this driver. To support it split the child nodes parsing to its own function and add a field to the platform data to indicate that we should just use the top node. Signed-off-by: Alban Bedel <alban.bedel(a)aerq.com> --- drivers/usb/dwc3/dwc3-generic.c | 95 +++++++++++++++++++-------------- 1 file changed, 56 insertions(+), 39 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 01bd0ca190e3..defef43ff503 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -221,6 +221,7 @@ U_BOOT_DRIVER(dwc3_generic_host) = { struct dwc3_glue_ops { void (*select_dr_mode)(struct udevice *dev, int index, enum usb_dr_mode mode); + int single_node; }; void dwc3_ti_select_dr_mode(struct udevice *dev, int index, @@ -307,54 +308,66 @@ struct dwc3_glue_ops ti_ops = { .select_dr_mode = dwc3_ti_select_dr_mode, }; +static int dwc3_glue_bind_node(struct udevice *parent, ofnode node, + enum usb_dr_mode dr_mode) +{ + const char *name = ofnode_get_name(node); + const char *driver = NULL; + struct udevice *dev; + int ret; + + debug("%s: subnode name: %s\n", __func__, name); + + /* if the parent node doesn't have a mode check the leaf */ + if (!dr_mode) + dr_mode = usb_get_dr_mode(node); + + switch (dr_mode) { + case USB_DR_MODE_PERIPHERAL: + case USB_DR_MODE_OTG: +#if CONFIG_IS_ENABLED(DM_USB_GADGET) + debug("%s: dr_mode: OTG or Peripheral\n", __func__); + driver = "dwc3-generic-peripheral"; +#endif + break; +#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD) + case USB_DR_MODE_HOST: + debug("%s: dr_mode: HOST\n", __func__); + driver = "dwc3-generic-host"; + break; +#endif + default: + debug("%s: unsupported dr_mode\n", __func__); + return -ENODEV; + }; + + if (!driver) + return 0; + + ret = device_bind_driver_to_node(parent, driver, name, + node, &dev); + if (ret) + debug("%s: not able to bind usb device mode\n", + __func__); + return ret; +} + static int dwc3_glue_bind(struct udevice *parent) { + struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(parent); ofnode node; int ret; enum usb_dr_mode dr_mode; + if (ops->single_node) + return dwc3_glue_bind_node(parent, dev_ofnode(parent), 0); + dr_mode = usb_get_dr_mode(dev_ofnode(parent)); ofnode_for_each_subnode(node, dev_ofnode(parent)) { - const char *name = ofnode_get_name(node); - struct udevice *dev; - const char *driver = NULL; - - debug("%s: subnode name: %s\n", __func__, name); - - /* if the parent node doesn't have a mode check the leaf */ - if (!dr_mode) - dr_mode = usb_get_dr_mode(node); - - switch (dr_mode) { - case USB_DR_MODE_PERIPHERAL: - case USB_DR_MODE_OTG: -#if CONFIG_IS_ENABLED(DM_USB_GADGET) - debug("%s: dr_mode: OTG or Peripheral\n", __func__); - driver = "dwc3-generic-peripheral"; -#endif - break; -#if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD) - case USB_DR_MODE_HOST: - debug("%s: dr_mode: HOST\n", __func__); - driver = "dwc3-generic-host"; - break; -#endif - default: - debug("%s: unsupported dr_mode\n", __func__); - return -ENODEV; - }; - - if (!driver) - continue; - - ret = device_bind_driver_to_node(parent, driver, name, - node, &dev); - if (ret) { - debug("%s: not able to bind usb device mode\n", - __func__); + ret = dwc3_glue_bind_node(parent, node, dr_mode); + if (ret) return ret; - } } return 0; @@ -454,6 +467,10 @@ static int dwc3_glue_remove(struct udevice *dev) return 0; } +struct dwc3_glue_ops single_node_ops = { + .single_node = 1, +}; + static const struct udevice_id dwc3_glue_ids[] = { { .compatible = "xlnx,zynqmp-dwc3" }, { .compatible = "xlnx,versal-dwc3" }, @@ -464,7 +481,7 @@ static const struct udevice_id dwc3_glue_ids[] = { { .compatible = "rockchip,rk3328-dwc3" }, { .compatible = "rockchip,rk3399-dwc3" }, { .compatible = "qcom,dwc3" }, - { .compatible = "fsl,imx8mq-dwc3" }, + { .compatible = "fsl,imx8mq-dwc3", .data = (ulong)&single_node_ops }, { .compatible = "intel,tangier-dwc3" }, { } }; -- 2.32.0

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