April 2022 - U-Boot

[PATCH 1/4] imx: bootaux: cleanup code
by Peng Fan (OSS) 20 May '22

20 May '22

From: Peng Fan <peng.fan(a)nxp.com> Use if (CONFIG_IS_ENABLED()) to make code cleaner Enable elf support for i.MX8M Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- arch/arm/mach-imx/imx_bootaux.c | 43 +++++++++++++++------------------ 1 file changed, 20 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c index 9ffe5ac6e34..6a075ccc4fb 100644 --- a/arch/arm/mach-imx/imx_bootaux.c +++ b/arch/arm/mach-imx/imx_bootaux.c @@ -14,7 +14,13 @@ #include <linux/compiler.h> #include <cpu_func.h> -#ifndef CONFIG_IMX8M +/* Just to avoid build error */ +#if CONFIG_IS_ENABLED(IMX8M) +#define SRC_M4C_NON_SCLR_RST_MASK BIT(0) +#define SRC_M4_ENABLE_MASK BIT(0) +#define SRC_M4_REG_OFFSET 0 +#endif + const __weak struct rproc_att hostmap[] = { }; static const struct rproc_att *get_host_mapping(unsigned long auxcore) @@ -59,7 +65,7 @@ static unsigned long load_elf_image_m_core_phdr(unsigned long addr) return 0; } - dst = (void *)(phdr->p_paddr - mmap->da) + mmap->sa; + dst = (void *)(ulong)(phdr->p_paddr - mmap->da) + mmap->sa; src = (void *)addr + phdr->p_offset; debug("Loading phdr %i to 0x%p (%i bytes)\n", @@ -77,7 +83,6 @@ static unsigned long load_elf_image_m_core_phdr(unsigned long addr) return ehdr->e_entry; } -#endif int arch_auxiliary_core_up(u32 core_id, ulong addr) { @@ -86,10 +91,6 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr) if (!addr) return -EINVAL; -#ifdef CONFIG_IMX8M - stack = *(u32 *)addr; - pc = *(u32 *)(addr + 4); -#else /* * handling ELF64 binaries * isn't supported yet. @@ -109,7 +110,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr) stack = *(u32 *)addr; pc = *(u32 *)(addr + 4); } -#endif + printf("## Starting auxiliary core stack = 0x%08lX, pc = 0x%08lX...\n", stack, pc); @@ -120,36 +121,32 @@ int arch_auxiliary_core_up(u32 core_id, ulong addr) flush_dcache_all(); /* Enable M4 */ -#ifdef CONFIG_IMX8M - arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, - 0, 0, 0, 0, NULL); -#else - clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET, - SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK); -#endif + if (CONFIG_IS_ENABLED(IMX8M)) { + arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0, 0, 0, 0, NULL); + } else { + clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET, + SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK); + } return 0; } int arch_auxiliary_core_check_up(u32 core_id) { -#ifdef CONFIG_IMX8M struct arm_smccc_res res; - - arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, - 0, 0, 0, 0, &res); - - return res.a0; -#else unsigned int val; + if (CONFIG_IS_ENABLED(IMX8M)) { + arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, 0, 0, 0, 0, &res); + return res.a0; + } + val = readl(SRC_BASE_ADDR + SRC_M4_REG_OFFSET); if (val & SRC_M4C_NON_SCLR_RST_MASK) return 0; /* assert in reset */ return 1; -#endif } /* -- 2.36.0

2 7

[PATCH v2] i.MX8 crypto/fsl: Enable fsl CAAM rng driver
by Gaurav Jain 20 May '22

20 May '22

rng driver enabled to read random number using caam. Signed-off-by: Gaurav Jain <gaurav.jain(a)nxp.com> --- drivers/crypto/fsl/jr.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 85a3dac796..acd29924f7 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -767,8 +767,14 @@ init: return -1; } #if CONFIG_IS_ENABLED(OF_CONTROL) - if (ofnode_valid(scu_node)) + if (ofnode_valid(scu_node)) { + if (IS_ENABLED(CONFIG_DM_RNG)) { + ret = device_bind_driver(NULL, "caam-rng", "caam-rng", NULL); + if (ret) + printf("Couldn't bind rng driver (%d)\n", ret); + } return ret; + } #endif #ifdef CONFIG_FSL_CORENET -- 2.25.1

2 1

[PATCH] configs: remove FEC_QUIRK_ENET_MAC from imx8m configs
by Tim Harvey 20 May '22

20 May '22

FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus does not need to be defined in the various board config includes. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- include/configs/cgtqmx8.h | 1 - include/configs/imx8mm-cl-iot-gate.h | 1 - include/configs/imx8mm_data_modul_edm_sbc.h | 1 - include/configs/imx8mm_evk.h | 1 - include/configs/imx8mm_venice.h | 3 --- include/configs/imx8mn_venice.h | 3 --- include/configs/imx8mp_evk.h | 1 - include/configs/imx8mp_rsb3720.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/kontron-sl-mx8mm.h | 2 -- include/configs/kontron_pitx_imx8m.h | 1 - include/configs/pico-imx8mq.h | 1 - include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - 15 files changed, 20 deletions(-) diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 6da0483ef09a..4c04bbf64471 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -132,6 +132,5 @@ /* Networking */ #define CONFIG_FEC_MXC_PHYADDR -1 -#define FEC_QUIRK_ENET_MAC #endif /* __CGTQMX8_H */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index c20c32b6951f..a283f70168f8 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -160,7 +160,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_FEC_MXC_PHYADDR 0 -#define FEC_QUIRK_ENET_MAC /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 33778a2365e9..de56640cd84a 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -52,7 +52,6 @@ /* PHY needs a longer autonegotiation timeout after reset */ #define PHY_ANEG_TIMEOUT 20000 -#define FEC_QUIRK_ENET_MAC /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 42b78485cfcf..b8a6d8062e26 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -78,6 +78,5 @@ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_FEC_MXC_PHYADDR 0 -#define FEC_QUIRK_ENET_MAC #endif diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 28417c55b9b6..b11477d6f3a0 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -111,7 +111,4 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -/* FEC */ -#define FEC_QUIRK_ENET_MAC - #endif diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 0379c27f11a5..d0188592dfbf 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -107,7 +107,4 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -/* FEC */ -#define FEC_QUIRK_ENET_MAC - #endif diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index cc8d65cb54ed..4acfdde09e91 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -32,7 +32,6 @@ #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 1 -#define FEC_QUIRK_ENET_MAC #define DWC_NET_PHYADDR 1 diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index c5dd545471e1..4ccf6935ed2a 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -51,7 +51,6 @@ /* ENET1 */ #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 4 -#define FEC_QUIRK_ENET_MAC #define DWC_NET_PHYADDR 4 #ifdef CONFIG_DWC_ETH_QOS diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index f7929e5867e9..17d7765f7b1f 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -37,7 +37,6 @@ /* ENET1 */ #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 0 -#define FEC_QUIRK_ENET_MAC #endif #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index f6410114b765..7a8fedc9fc73 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -31,7 +31,6 @@ /* ENET1 */ #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 0 -#define FEC_QUIRK_ENET_MAC #endif #define CONFIG_MFG_ENV_SETTINGS \ diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 1b429f7dbe22..81c365873136 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -70,8 +70,6 @@ #define CONFIG_MALLOC_F_ADDR 0x930000 #endif -#define FEC_QUIRK_ENET_MAC - #define ENV_MEM_LAYOUT_SETTINGS \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=0x42000000\0" \ diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index e8e92920dcbc..d0d93f0eb4df 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -38,7 +38,6 @@ /* ENET1 Config */ #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 0 -#define FEC_QUIRK_ENET_MAC #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 95845276e7b4..42c7bf7ee8c7 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -31,7 +31,6 @@ /* ENET1 */ #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 1 -#define FEC_QUIRK_ENET_MAC #endif /* Initial environment variables */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index da3dc95f9ee1..100b663a7422 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -95,7 +95,6 @@ /* ENET */ #define CONFIG_FEC_MXC_PHYADDR 7 -#define FEC_QUIRK_ENET_MAC /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 7b7407752c15..210705638231 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -36,7 +36,6 @@ /* ENET1 */ #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 7 -#define FEC_QUIRK_ENET_MAC #define PHY_ANEG_TIMEOUT 20000 #endif /* CONFIG_CMD_NET */ -- 2.17.1

2 1

[PATCH] i.MX6SX: crypto/fsl: fix entropy delay value
by Gaurav Jain 20 May '22

20 May '22

RNG Hardware error is reported due to incorrect entropy delay rng self test are run to determine the correct ent_dly. test is executed with different voltage and temperature to identify the worst case value for ent_dly. after adding a margin value(1000), ent_dly should be at least 12000. Signed-off-by: Gaurav Jain <gaurav.jain(a)nxp.com> --- drivers/crypto/fsl/jr.c | 11 ++++++++++- include/fsl_sec.h | 6 +++++- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 1d951cf0a6..85a3dac796 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -623,7 +623,7 @@ static void kick_trng(int ent_delay, ccsr_sec_t *sec) static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) { - int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN; + int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY; struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; u32 inst_handles; @@ -652,6 +652,15 @@ static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) * the RNG. */ ret = instantiate_rng(sec_idx, sec, gen_sk); + /* + * entropy delay is calculated via self-test method. + * self-test are run across different volatge, temp. + * if worst case value for ent_dly is identified, + * loop can be skipped for that platform. + */ + if (IS_ENABLED(CONFIG_MX6SX)) + break; + } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX)); if (ret) { printf("SEC%u: Failed to instantiate RNG\n", sec_idx); diff --git a/include/fsl_sec.h b/include/fsl_sec.h index 7b6e3e2c20..d57c4ca820 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -48,7 +48,11 @@ struct rng4tst { u32 rtmctl; /* misc. control register */ u32 rtscmisc; /* statistical check misc. register */ u32 rtpkrrng; /* poker range register */ -#define RTSDCTL_ENT_DLY_MIN 3200 +#ifdef CONFIG_MX6SX +#define RTSDCTL_ENT_DLY 12000 +#else +#define RTSDCTL_ENT_DLY 3200 +#endif #define RTSDCTL_ENT_DLY_MAX 12800 union { u32 rtpkrmax; /* PRGM=1: poker max. limit register */ -- 2.25.1

3 3

[PATCH 1/2] mx6slevk: Remove duplicated "mmc dev" command
by Fabio Estevam 20 May '22

20 May '22

From: Fabio Estevam <festevam(a)denx.de> The "mmc dev ${mmcdev}" command is done twice. Remove one ocurrence to avoid the duplication. Signed-off-by: Fabio Estevam <festevam(a)denx.de> --- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 12789c934c0f..79057f7f4c14 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" # CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 2bfeac35877d..2f9026287fc6 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -14,7 +14,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPI_BOOT=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 09d71ae905f7..5a43a5501cea 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -23,7 +23,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y -- 2.25.1

2 3

[PATCH 1/4] ARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)
by Marek Vasut 20 May '22

20 May '22

Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/include/asm/arch-imx8m/imx-regs.h | 10 ++++++++++ include/configs/imx8mm-cl-iot-gate.h | 2 +- include/configs/imx8mm_beacon.h | 2 +- include/configs/imx8mm_evk.h | 2 +- include/configs/imx8mm_icore_mx8mm.h | 2 +- include/configs/imx8mm_venice.h | 2 +- include/configs/imx8mn_beacon.h | 2 +- include/configs/imx8mn_evk.h | 2 +- include/configs/imx8mn_var_som.h | 2 +- include/configs/imx8mn_venice.h | 2 +- include/configs/imx8mp_evk.h | 2 +- include/configs/imx8mp_rsb3720.h | 2 +- include/configs/imx8mq_cm.h | 2 +- include/configs/imx8mq_evk.h | 2 +- include/configs/imx8mq_phanbell.h | 2 +- include/configs/kontron-sl-mx8mm.h | 2 +- include/configs/kontron_pitx_imx8m.h | 2 +- include/configs/phycore_imx8mm.h | 2 +- include/configs/phycore_imx8mp.h | 2 +- include/configs/pico-imx8mq.h | 2 +- include/configs/verdin-imx8mm.h | 2 +- include/configs/verdin-imx8mp.h | 2 +- 22 files changed, 31 insertions(+), 21 deletions(-) diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index b2a8ad77ae1..1da75528d46 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -48,6 +48,16 @@ #ifdef CONFIG_IMX8MM #define USDHC3_BASE_ADDR 0x30B60000 #endif +#define UART_BASE_ADDR(n) ( \ + !!sizeof(struct { \ + static_assert((n) >= 1 && (n) <= 4); \ + int pad; \ + }) * ( \ + (n) == 1 ? UART1_BASE_ADDR : \ + (n) == 2 ? UART2_BASE_ADDR : \ + (n) == 3 ? UART3_BASE_ADDR : \ + UART4_BASE_ADDR) \ + ) #define TZASC_BASE_ADDR 0x32F80000 diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index c20c32b6951..60746588b73 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -145,7 +145,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 7c17f14964f..573ddaf2952 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -91,7 +91,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 42b78485cfc..bd10406d79d 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -68,7 +68,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index f521add5b04..b9b24a8c51d 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -66,7 +66,7 @@ #define CONFIG_SYS_BOOTM_LEN SZ_256M /* UART */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 1b26e0280e1..f3dad256100 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -102,7 +102,7 @@ #define CONFIG_SYS_BOOTM_LEN SZ_256M /* UART */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 41ce3c1c8ce..79c6b1076ff 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -107,7 +107,7 @@ #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ #endif -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 034132225c6..805ae2a7518 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -75,7 +75,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 318289b76bc..00358892b28 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -64,7 +64,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ -#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(4) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index a4826779022..dcb5baf6eb4 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -98,7 +98,7 @@ #define CONFIG_SYS_BOOTM_LEN SZ_256M /* UART */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index cc8d65cb54e..908ed76f39e 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -80,7 +80,7 @@ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index c5dd545471e..c0f2824fd4c 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -169,7 +169,7 @@ #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ #endif -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 989486aa6dc..6eecfc813a4 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -71,7 +71,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */ -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index f7929e5867e..8596d999257 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -78,7 +78,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index f6410114b76..9cf779b0752 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -106,7 +106,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 1b429f7dbe2..8b2a10dda1f 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -28,7 +28,7 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Board and environment settings */ -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) #define CONFIG_HOSTNAME "kontron-mx8mm" #ifdef CONFIG_USB_EHCI_HCD diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index e8e92920dcb..182ee590318 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -84,7 +84,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 71f0c42ec0c..46fadd56106 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -84,7 +84,7 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ /* UART */ -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 0c963b62b3b..eb92c423392 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -84,7 +84,7 @@ #define PHYS_SDRAM_SIZE 0x80000000 /* UART */ -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 95845276e7b..567b06c4f5d 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -85,7 +85,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */ -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index da3dc95f9ee..130a1ed54d1 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -84,7 +84,7 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ /* UART */ -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 7b7407752c1..33cfd3d2d73 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -101,7 +101,7 @@ #define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G) /* UART */ -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -- 2.35.1

5 16

[PATCH] board: gateworks: venice: enable SPL_DM_SERIAL
by Tim Harvey 20 May '22

20 May '22

The uart2 and its pinmux are already marked with u-boot,dm-spl but we need to move the call to preloader_console_init() after spl_early_init() to avoid a board hang as dm can't be used until after spl_early_init() due to the uart driver not enabling the uart clock. Remove the manual config of the UART pinmux now that it is no longer needed. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- board/gateworks/venice/spl.c | 23 ++--------------------- configs/imx8mm_venice_defconfig | 1 - configs/imx8mn_venice_defconfig | 1 - configs/imx8mp_venice_defconfig | 1 - 4 files changed, 2 insertions(+), 24 deletions(-) diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c index 223f22d3463c..6e6ce015f28a 100644 --- a/board/gateworks/venice/spl.c +++ b/board/gateworks/venice/spl.c @@ -87,37 +87,20 @@ static void spl_dram_init(int size) ddr_init(dram_timing); } -#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) #ifdef CONFIG_IMX8MM -static iomux_v3_cfg_t const uart_pads[] = { - IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static iomux_v3_cfg_t const wdog_pads[] = { IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; #elif CONFIG_IMX8MN -static const iomux_v3_cfg_t uart_pads[] = { - IMX8MN_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - IMX8MN_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static const iomux_v3_cfg_t wdog_pads[] = { IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; #elif CONFIG_IMX8MP -static const iomux_v3_cfg_t uart_pads[] = { - MX8MP_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), - MX8MP_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - static const iomux_v3_cfg_t wdog_pads[] = { MX8MP_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), }; - #endif int board_early_init_f(void) @@ -128,8 +111,6 @@ int board_early_init_f(void) set_wdog_reset(wdog); - imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); - return 0; } @@ -276,8 +257,6 @@ void board_init_f(ulong dummy) timer_init(); - preloader_console_init(); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); @@ -287,6 +266,8 @@ void board_init_f(ulong dummy) hang(); } + preloader_console_init(); + enable_tzc380(); /* need to hold PCIe switch in reset otherwise it can lock i2c bus EEPROM is on */ diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 76c5aaa413a3..e61464078fc4 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -114,7 +114,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_SERIAL=y -# CONFIG_SPL_DM_SERIAL is not set CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 867871373e2d..7b8be003369d 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -113,7 +113,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_SERIAL=y -# CONFIG_SPL_DM_SERIAL is not set CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index e654762b8cb9..01d9f8b6698c 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -113,7 +113,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_SERIAL=y -# CONFIG_SPL_DM_SERIAL is not set CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y -- 2.17.1

2 1

[PATCH] configs: imx8mp_venice: add FEC_QUIRK_ENET_MAC
by Tim Harvey 20 May '22

20 May '22

The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined. Fixes: commit 2395625209cc ("board: gateworks: venice: add imx8mp-venice-gw740x support") Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- include/configs/imx8mp_venice.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index aa0396db8b83..4120e4cc6bad 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -106,4 +106,8 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) + +/* FEC */ +#define FEC_QUIRK_ENET_MAC + #endif -- 2.17.1

2 2

[PATCH v2] mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver
by Ye Li 20 May '22

20 May '22

Because mxs_nand_spl driver does not support DM, to use the minimum ECC layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC. Signed-off-by: Ye Li <ye.li(a)nxp.com> Reviewed-by: Han Xu <han.xu(a)nxp.com> --- Changes in v2: - Use IS_ENABLED to replace #ifdef drivers/mtd/nand/raw/mxs_nand.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c index ee5d7fd..0c4e559 100644 --- a/drivers/mtd/nand/raw/mxs_nand.c +++ b/drivers/mtd/nand/raw/mxs_nand.c @@ -1380,6 +1380,9 @@ int mxs_nand_init_spl(struct nand_chip *nand) else nand_info->max_ecc_strength_supported = 40; + if (IS_ENABLED(CONFIG_NAND_MXS_USE_MINIMUM_ECC)) + nand_info->use_minimum_ecc = true; + err = mxs_nand_alloc_buffers(nand_info); if (err) return err; -- 2.7.4

2 1

[PATCH] ARM: dts: imx: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBC
by Marek Vasut 20 May '22

20 May '22

The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz to guarantee this I2C device can work correctly. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/dts/imx8mm-data-modul-edm-sbc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imx8mm-data-modul-edm-sbc.dts b/arch/arm/dts/imx8mm-data-modul-edm-sbc.dts index 154116d01c9..5b022040902 100644 --- a/arch/arm/dts/imx8mm-data-modul-edm-sbc.dts +++ b/arch/arm/dts/imx8mm-data-modul-edm-sbc.dts @@ -392,7 +392,7 @@ &i2c2 { /* IMX8MM ERRATA e7805 -- I2C is limited to 384 kHz due to SoC bug */ - clock-frequency = <320000>; + clock-frequency = <100000>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; pinctrl-1 = <&pinctrl_i2c2_gpio>; -- 2.35.1

2 1