February 2022 - U-Boot

[PATCH v2] ARM: dts: imx6ull: Use the correct name for ESAI_TX0
by Fabio Estevam 05 Feb '22

05 Feb '22

According to the i.MX6ULL Reference Manual, pad CSI_DATA07 may have the ESAI_TX0 functionality, not ESAI_T0. Also, NXP's i.MX Config Tools 10.0 generates dtsi with the MX6ULL_PAD_CSI_DATA07__ESAI_TX0 naming, so fix it accordingly. There are no devicetree users in mainline that use the old name, so just remove the old entry. Fixes: f8ca22b8de32 ("arm: dts: imx6ull: add pinctrl defines") Reported-by: George Makarov <georgemakarov1(a)gmail.com> Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- Changes since v2: - Use the linux-version fix: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/… arch/arm/dts/imx6ull-pinfunc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imx6ull-pinfunc.h b/arch/arm/dts/imx6ull-pinfunc.h index eb025a9d4759..7328d4ef8559 100644 --- a/arch/arm/dts/imx6ull-pinfunc.h +++ b/arch/arm/dts/imx6ull-pinfunc.h @@ -82,6 +82,6 @@ #define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0 #define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0 #define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC 0x0488 0x0000 0x9 0x0 -#define MX6ULL_PAD_CSI_DATA07__ESAI_T0 0x0200 0x048C 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA07__ESAI_TX0 0x0200 0x048C 0x0000 0x9 0x0 #endif /* __DTS_IMX6ULL_PINFUNC_H */ -- 2.25.1

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[PATCH] spl: Provide more space to be used for storing SPL on imx28 OCRAM
by Lukasz Majewski 05 Feb '22

05 Feb '22

With the current configuration provided in mxsimage{-spl}.mx28.cfg the size of SPL binary has been constrained to 32 KiB, due to "LOAD IVT" command with 0x8000 offset. The problem was that, the imx28 ROM takes the u-boot.sb and then extracts from it the IVT header and places it on the 0x8000 OCRAM offset overwriting any valid (i.e. loaded from eMMC or SPI-NOR) SPL code. This bug was unnoticed as the overwrite size was just 32 bytes, so the probability that some important code is altered was low. However, in the XEA board (where the SPL size is ~39KiB), the overwritten data was `(struct dm_spi_ops *) 0x800c <mxs_spi_ops>`, which is used during the boot process. As a result the SPL execution code hanged with "undefined instruction" abort as callbacks (with wrong addresses) from it were called. The fix is to change the OCRAM's offset where IVT is loaded to 0xE000, so the SPL can grow up to ~57KiB (the maximal size of OCRAM memory available is 0xE3FC). Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg | 4 ++-- arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg index 0d95064ff7f..fd09780303e 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg +++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage-spl.mx28.cfg @@ -2,5 +2,5 @@ DISPLAYPROGRESS SECTION 0x0 BOOTABLE TAG LAST LOAD 0x1000 spl/u-boot-spl.bin - LOAD IVT 0x8000 0x1000 - CALL HAB 0x8000 0x0 + LOAD IVT 0xE000 0x1000 + CALL HAB 0xE000 0x0 diff --git a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg index 3f7bf599248..f0f3dd7d6b1 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg +++ b/arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg @@ -2,8 +2,8 @@ DISPLAYPROGRESS SECTION 0x0 BOOTABLE TAG LAST LOAD 0x1000 spl/u-boot-spl.bin - LOAD IVT 0x8000 0x1000 - CALL HAB 0x8000 0x0 + LOAD IVT 0xE000 0x1000 + CALL HAB 0xE000 0x0 LOAD 0x40002000 u-boot.bin - LOAD IVT 0x8000 0x40002000 - CALL HAB 0x8000 0x0 + LOAD IVT 0xE000 0x40002000 + CALL HAB 0xE000 0x0 -- 2.20.1

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[PATCH v2 1/4] arm64: dts: imx8mq-u-boot.dtsi: alphabetically re-order properties
by sbabic＠denx.de 05 Feb '22

05 Feb '22

> Alphabetically re-order properties. > Signed-off-by: Patrick Wildt <patrick(a)blueri.se> > Reviewed-by: Fabio Estevam <festevam(a)denx.de> Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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[PATCH V2 1/2] arm: dts: imx8mm-beacon: Resync dtsi with Kernel 5.17-rc1
by Adam Ford 05 Feb '22

05 Feb '22

Resync the SOM and baseboar files with the device trees that will be included in 5.17-RC1 when it's cut. This will improve pinmuxing for USDHC1 and add USB functionality. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/arch/arm/dts/imx8mm-beacon-baseboard.dtsi b/arch/arm/dts/imx8mm-beacon-baseboard.dtsi index d6b9dedd16..4097a66163 100644 --- a/arch/arm/dts/imx8mm-beacon-baseboard.dtsi +++ b/arch/arm/dts/imx8mm-beacon-baseboard.dtsi @@ -43,6 +43,17 @@ enable-active-high; }; + reg_usbotg1: regulator-usbotg1 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usb_otg1>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + reg_usdhc2_vmmc: regulator-usdhc2 { compatible = "regulator-fixed"; regulator-name = "VSD_3V3"; @@ -102,7 +113,6 @@ compatible = "wlf,wm8962"; reg = <0x1a>; clocks = <&clk IMX8MM_CLK_SAI3_ROOT>; - clock-names = "xclk"; DCVDD-supply = <&reg_audio>; DBVDD-supply = <&reg_audio>; AVDD-supply = <&reg_audio>; @@ -170,6 +180,24 @@ status = "okay"; }; +&usbotg1 { + vbus-supply = <&reg_usbotg1>; + disable-over-current; + dr_mode="otg"; + status = "okay"; +}; + +&usbotg2 { + pinctrl-names = "default"; + disable-over-current; + dr_mode="host"; + status = "okay"; +}; + +&usbphynop2 { + reset-gpios = <&pca6416_1 7 GPIO_ACTIVE_HIGH>; +}; + &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; @@ -216,6 +244,12 @@ >; }; + pinctrl_reg_usb_otg1: usbotg1grp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19 + >; + }; + pinctrl_sai3: sai3grp { fsl,pins = < MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 diff --git a/arch/arm/dts/imx8mm-beacon-som.dtsi b/arch/arm/dts/imx8mm-beacon-som.dtsi index d897913537..cf07987ccc 100644 --- a/arch/arm/dts/imx8mm-beacon-som.dtsi +++ b/arch/arm/dts/imx8mm-beacon-som.dtsi @@ -91,7 +91,7 @@ #size-cells = <1>; compatible = "jedec,spi-nor"; spi-max-frequency = <80000000>; - spi-tx-bus-width = <4>; + spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; }; }; @@ -256,12 +256,13 @@ &usdhc1 { #address-cells = <1>; #size-cells = <0>; - pinctrl-names = "default"; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; bus-width = <4>; non-removable; cap-power-off-card; - pm-ignore-notify; keep-power-in-suspend; mmc-pwrseq = <&usdhc1_pwrseq>; status = "okay"; -- 2.32.0

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[PATCH] imx: imx8mn_beacon: Fix USB booting
by Adam Ford 05 Feb '22

05 Feb '22

The i.MX8M Nano can boot over USB using the boot ROM instead of adding extra code to SPL to support USB drivers, etc. However, when booting from USB, the environment doesnt' know where to load and causes a hang. Fix this hang by supporting CONFIG_ENV_IS_NOWHERE=y. It only falls back to this condition when booting from USB, so it does not impact MMC booting. Suggested-by: Michael Nazzareno Trimarchi <michael(a)amarulasolutions.com> Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 8b98d687ec..1766a43cce 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -66,6 +66,7 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent interrupts" CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index a707ee664e..8ac36121aa 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -66,6 +66,7 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 -- 2.32.0

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[PATCH] ARM: imx8m: support env in fat and ext4
by Ricardo Salveti 05 Feb '22

05 Feb '22

Change boot device logic to also allow environment stored in fat and in ext4 when booting from SD or from eMMC. As the boot device check for SD and for eMMC was depending on ENV_IS_IN_MMC being defined, change the ifdef blocks at env_get_location to use IS_ENABLED instead for all modes, returning NOWHERE when no valid mode is found. Signed-off-by: Ricardo Salveti <ricardo(a)foundries.io> --- arch/arm/mach-imx/imx8m/soc.c | 35 +++++++++++++++-------------------- 1 file changed, 15 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index f2ddc834d4b..a3ce517a104 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -1306,40 +1306,35 @@ void do_error(struct pt_regs *pt_regs, unsigned int esr) enum env_location env_get_location(enum env_operation op, int prio) { enum boot_device dev = get_boot_device(); - enum env_location env_loc = ENVL_UNKNOWN; if (prio) - return env_loc; + return ENVL_UNKNOWN; switch (dev) { -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH case QSPI_BOOT: - env_loc = ENVL_SPI_FLASH; - break; -#endif -#ifdef CONFIG_ENV_IS_IN_NAND + if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) + return ENVL_SPI_FLASH; + return ENVL_NOWHERE; case NAND_BOOT: - env_loc = ENVL_NAND; - break; -#endif -#ifdef CONFIG_ENV_IS_IN_MMC + if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND)) + return ENVL_NAND; + return ENVL_NOWHERE; case SD1_BOOT: case SD2_BOOT: case SD3_BOOT: case MMC1_BOOT: case MMC2_BOOT: case MMC3_BOOT: - env_loc = ENVL_MMC; - break; -#endif + if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) + return ENVL_MMC; + else if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4)) + return ENVL_EXT4; + else if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT)) + return ENVL_FAT; + return ENVL_NOWHERE; default: -#if defined(CONFIG_ENV_IS_NOWHERE) - env_loc = ENVL_NOWHERE; -#endif - break; + return ENVL_NOWHERE; } - - return env_loc; } #ifndef ENV_IS_EMBEDDED -- 2.33.0

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[PATCH v2 2/4] arm64: dts: imx8mq-u-boot.dtsi: explicitly add spl filename
by sbabic＠denx.de 05 Feb '22

05 Feb '22

> Explicitly add SPL aka u-boot-spl.bin filename. > Signed-off-by: Patrick Wildt <patrick(a)blueri.se> > Reviewed-by: Fabio Estevam <festevam(a)denx.de> Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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[PATCH] arm: imx: imx8mq: add support to get values for more clocks
by Heiko Thiery 05 Feb '22

05 Feb '22

Return the root clock values for MXC_CSPI_CLK, MXC_I2C_CLK, MXC_UART_CLK and MXC_QSPI_CLK. At least for the I2C clock the missing support leads to a wrong configured I2C frequency. The expected value is 100kHz but the resulting value is about 1MHz. Signed-off-by: Heiko Thiery <heiko.thiery(a)gmail.com> --- More information and measurements about the wrong configure I2C frequency can be found here: https://lists.denx.de/pipermail/u-boot/2021-September/460176.html arch/arm/mach-imx/imx8m/clock_imx8mq.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c index 60e2218a3c..9db62b944e 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c @@ -359,10 +359,18 @@ unsigned int mxc_get_clock(enum mxc_clock clk) clock_get_target_val(IPG_CLK_ROOT, &val); val = val & 0x3; return get_root_clk(AHB_CLK_ROOT) / (val + 1); + case MXC_CSPI_CLK: + return get_root_clk(ECSPI1_CLK_ROOT); case MXC_ESDHC_CLK: return get_root_clk(USDHC1_CLK_ROOT); case MXC_ESDHC2_CLK: return get_root_clk(USDHC2_CLK_ROOT); + case MXC_I2C_CLK: + return get_root_clk(I2C1_CLK_ROOT); + case MXC_UART_CLK: + return get_root_clk(UART1_CLK_ROOT); + case MXC_QSPI_CLK: + return get_root_clk(QSPI_CLK_ROOT); default: return get_root_clk(clk); } -- 2.30.0

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[PATCH v1 2/2] imx: imx8qm_rm7720: adjust fdt_addr
by Oliver Graute 05 Feb '22

05 Feb '22

The Linux Kernel Image size for arm64 is still growing. A Kernel with 54 MB at load address 0x80280000 overlaps with fdt_addr at 0x83000000. So let's increase it to 0x84000000 Signed-off-by: Oliver Graute <oliver.graute(a)kococonnector.com> --- include/configs/imx8qm_rom7720.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 31d861481f..3c905b1446 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -61,7 +61,7 @@ "image=Image\0" \ "panel=NULL\0" \ "console=ttyLP0\0" \ - "fdt_addr=0x83000000\0" \ + "fdt_addr=0x84000000\0" \ "boot_fdt=try\0" \ "fdt_file=imx8qm-rom7720-a1.dtb\0" \ "initrd_addr=0x83800000\0" \ -- 2.17.1

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[PATCH v6 0/1] imx8mn_var_som: Add support for Variscite VAR-SOM-MX8M-NANO board
by Ariel D'Alessandro 05 Feb '22

05 Feb '22

Changes in v6: * Fixed typo in documentation. * Removed downstream config option IMX8M_BOARD_INIT_DRAM. Changes in v5: * Fixed documentation. Changes in v4: * Added board documentation. * Cleaned up board config. Changes in v3: * Picked device tree from kernel. * Properly added MAINTAINERS entry. * Removed CONFIG_SPL_BUILD anti-pattern in board config. Changes in v2: * Reordered dt properties alphabetically. * Removed downstream stuff in bootargs. * Fixed binman configuration. * Several code styling fixes. Ariel D'Alessandro (1): imx8mn_var_som: Add support for Variscite VAR-SOM-MX8M-NANO board arch/arm/dts/Makefile | 1 + .../dts/imx8mn-var-som-symphony-u-boot.dtsi | 256 ++++++++ arch/arm/dts/imx8mn-var-som-symphony.dts | 240 ++++++++ arch/arm/dts/imx8mn-var-som.dtsi | 547 ++++++++++++++++++ arch/arm/mach-imx/imx8m/Kconfig | 8 + board/variscite/imx8mn_var_som/Kconfig | 17 + board/variscite/imx8mn_var_som/MAINTAINERS | 7 + board/variscite/imx8mn_var_som/Makefile | 12 + board/variscite/imx8mn_var_som/ddr4_timing.c | 528 +++++++++++++++++ .../variscite/imx8mn_var_som/imx8mn_var_som.c | 30 + .../imx8mn_var_som/imximage-8mn-ddr4.cfg | 10 + board/variscite/imx8mn_var_som/spl.c | 93 +++ configs/imx8mn_var_som_defconfig | 98 ++++ doc/board/index.rst | 1 + doc/board/variscite/imx8mn_var_som.rst | 56 ++ doc/board/variscite/index.rst | 9 + include/configs/imx8mn_var_som.h | 90 +++ 17 files changed, 2003 insertions(+) create mode 100644 arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mn-var-som-symphony.dts create mode 100644 arch/arm/dts/imx8mn-var-som.dtsi create mode 100644 board/variscite/imx8mn_var_som/Kconfig create mode 100644 board/variscite/imx8mn_var_som/MAINTAINERS create mode 100644 board/variscite/imx8mn_var_som/Makefile create mode 100644 board/variscite/imx8mn_var_som/ddr4_timing.c create mode 100644 board/variscite/imx8mn_var_som/imx8mn_var_som.c create mode 100644 board/variscite/imx8mn_var_som/imximage-8mn-ddr4.cfg create mode 100644 board/variscite/imx8mn_var_som/spl.c create mode 100644 configs/imx8mn_var_som_defconfig create mode 100644 doc/board/variscite/imx8mn_var_som.rst create mode 100644 doc/board/variscite/index.rst create mode 100644 include/configs/imx8mn_var_som.h -- 2.30.2

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