October 2022 - U-Boot

[PATCH] imx8m: fix reading of DDR4 MR registers [again]
by Rasmus Villemoes 24 Oct '22

24 Oct '22

Commit 290ffe5788 (imx8m: fix reading of DDR4 MR registers) lifted a private definition of lpddr4_mr_read() from imx8mm-cl-iot-gate board code to drivers/ddr/imx/imx8m/ddrphy_utils.c, because that version actually seems to work in practice. However, commit 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver) reintroduced the broken version in drivers/ddr/imx/imx8m/ddr_init.c, copied most of the rest of ddrphy_utils.c to drivers/ddr/imx/phy/ddrphy_utils.c, and stopped building drivers/ddr/imx/imx8m/ddrphy_utils.c [and that file was then finally completely removed with 7e9bd84883 (imx8m: ddrphy_utils: Remove unused file)]. I assume this must have broken the imx8mm-cl-iot-gate board, at least those that have not had their eeprom programmed with the proper information. It certainly did break our out-of-tree board which always reads back the ID register and uses that for a sanity check. So apply the fix from 290ffe5788 once again. Fixes: 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver) Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- drivers/ddr/imx/imx8m/ddr_init.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c index d964184ddc..52a4aa6323 100644 --- a/drivers/ddr/imx/imx8m/ddr_init.c +++ b/drivers/ddr/imx/imx8m/ddr_init.c @@ -134,8 +134,14 @@ unsigned int lpddr4_mr_read(unsigned int mr_rank, unsigned int mr_addr) tmp = reg32_read(DRC_PERF_MON_MRR0_DAT(0)); } while ((tmp & 0x8) == 0); tmp = reg32_read(DRC_PERF_MON_MRR1_DAT(0)); - tmp = tmp & 0xff; reg32_write(DRC_PERF_MON_MRR0_DAT(0), 0x4); + while (tmp) { //try to find a significant byte in the word + if (tmp & 0xff) { + tmp &= 0xff; + break; + } + tmp >>= 8; + } return tmp; } -- 2.37.2

3 2

[PATCH 2/2] board/km: drop CONFIG_KM_ROOTFSSIZE
by Holger Brunck 24 Oct '22

24 Oct '22

This unused nowadays and can be dropped. Signed-off-by: Holger Brunck <holger.brunck(a)hitachienergy.com> --- include/configs/km/km-powerpc.h | 3 --- include/configs/kmcent2.h | 3 --- scripts/config_whitelist.txt | 1 - 3 files changed, 7 deletions(-) diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index 20a36fbe11..424caa0df9 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -21,11 +21,8 @@ * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose * @CONFIG_KM_PHRAM: address for /var * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) - * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM */ -/* size of rootfs in RAM */ -#define CONFIG_KM_ROOTFSSIZE 0x0 /* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable * is not valid yet, which is the case for when u-boot copies itself to RAM */ #define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM)>>10) diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 0d470c4b4a..1b1900179e 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -179,11 +179,8 @@ * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose * @CONFIG_KM_PHRAM: address for /var * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) - * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM */ -/* size of rootfs in RAM */ -#define CONFIG_KM_ROOTFSSIZE 0x0 /* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable * is not valid yet, which is the case for when u-boot copies itself to RAM */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 7cf82f1a90..3ee6741285 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -246,7 +246,6 @@ CONFIG_KM_DEF_ENV_FLASH_BOOT CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI CONFIG_KM_ECC_MODE CONFIG_KM_NEW_ENV -CONFIG_KM_ROOTFSSIZE CONFIG_KM_UBI_LINUX_MTD CONFIG_KM_UBI_PARTITION_NAME_APP CONFIG_KM_UBI_PARTITION_NAME_BOOT -- 2.37.0.rc2.2.g39c15e4

2 1

[PATCH v2] blk: fix a couple of trivial documentation typos
by Mattijs Korpershoek 24 Oct '22

24 Oct '22

In some cases, the param variable is wrong, and in other cases we have undocumented arguments. Fix the docs. Signed-off-by: Mattijs Korpershoek <mkorpershoek(a)baylibre.com> --- Changes in v2: * Don't edit blk_foreach_probe() comment as it's just returing (Simon) * Link to v1: https://lore.kernel.org/r/20221013-blk-doc-typos-v1-0-8031607c6a4c@baylibre… --- include/blk.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/include/blk.h b/include/blk.h index 8806c382d4e7..d3ab9a10b969 100644 --- a/include/blk.h +++ b/include/blk.h @@ -119,7 +119,7 @@ int blkcache_init(void); * @param start - starting block number * @param blkcnt - number of blocks to read * @param blksz - size in bytes of each block - * @param buf - buffer to contain cached data + * @param buffer - buffer to contain cached data * * Return: - 1 if block returned from cache, 0 otherwise. */ @@ -136,7 +136,7 @@ int blkcache_read(int iftype, int dev, * @param start - starting block number * @param blkcnt - number of blocks available * @param blksz - size in bytes of each block - * @param buf - buffer containing data to cache + * @param buffer - buffer containing data to cache * */ void blkcache_fill(int iftype, int dev, @@ -250,7 +250,7 @@ struct blk_ops { * The MMC standard provides for two boot partitions (numbered 1 and 2), * rpmb (3), and up to 4 addition general-purpose partitions (4-7). * - * @desc: Block device to update + * @dev: Block device to update * @hwpart: Hardware partition number to select. 0 means the raw * device, 1 is the first partition, 2 is the second, etc. * @return 0 if OK, -ve on error @@ -642,6 +642,7 @@ int blk_print_part_devnum(enum uclass_id uclass_id, int devnum); * * @uclass_id: Block device type * @devnum: Device number + * @start: Start block number to read (0=first) * @blkcnt: Number of blocks to read * @buffer: Address to write data to * Return: number of blocks read, or -ve error number on error @@ -654,6 +655,7 @@ ulong blk_read_devnum(enum uclass_id uclass_id, int devnum, lbaint_t start, * * @uclass_id: Block device type * @devnum: Device number + * @start: Start block number to write (0=first) * @blkcnt: Number of blocks to write * @buffer: Address to read data from * Return: number of blocks written, or -ve error number on error --- base-commit: 0e49f5c26caf9972137a474065afd4bdfe5ec062 change-id: 20221013-blk-doc-typos-de90e92ccd6b Best regards, -- Mattijs Korpershoek <mkorpershoek(a)baylibre.com>

3 2

[PATCH] test: Fix typo in test name
by Michal Suchanek 24 Oct '22

24 Oct '22

For other sandbox tests the printed test name corresponds to the configuration except for this one. Signed-off-by: Michal Suchanek <msuchanek(a)suse.de> --- test/run | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/run b/test/run index 810b47e08d..5b17204c73 100755 --- a/test/run +++ b/test/run @@ -53,7 +53,7 @@ run_test "sandbox_spl" ./test/py/test.py --bd sandbox_spl --build ${para} \ # Run the sane tests with sandbox_noinst (i.e. without OF_PLATDATA_INST) echo "${prompt}" -run_test "sandbox_spl" ./test/py/test.py --bd sandbox_noinst --build ${para} \ +run_test "sandbox_noinst" ./test/py/test.py --bd sandbox_noinst --build ${para} \ -k 'test_ofplatdata or test_handoff or test_spl' if [ -z "$tools_only" ]; then -- 2.37.3

3 4

[PATCH v2] cmd: bcb: select user(0) hwpart in __bcb_load()
by Mattijs Korpershoek 24 Oct '22

24 Oct '22

For some blk operations, it's possible that a different hw partition gets selected via blk_dselect_hwpart(). In that case, only the region of the device covered by that partition is accessible. This breaks "bcb load" which attempts to read the gpt and assumes it's on the user(0) hw partition: => bcb load 2 misc GUID Partition Table Header signature is wrong: 0xDE7B17AD07D9E5D6 != 0x5452415020494645 find_valid_gpt: *** ERROR: Invalid GPT *** GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645 find_valid_gpt: *** ERROR: Invalid Backup GPT *** Error: mmc 2:misc read failed (-2) Add a fail-safe in __bcb_load() to ensure we will always read from the user(0) hwpartition. This fixes the following fastboot sequence: $ fastboot erase mmc2boot1 # switch to hwpart1 $ fastboot reboot bootloader # switch to hwpart0, then reads GPT Signed-off-by: Mattijs Korpershoek <mkorpershoek(a)baylibre.com> --- Changes in v2: * Move hwpart selection into the bcb command instead of fb_mmc.c * Link to v1: https://lore.kernel.org/r/20221010-switch-hwpart-v1-0-52cbd34c72b7@baylibre… --- cmd/bcb.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/cmd/bcb.c b/cmd/bcb.c index 1622a90c97f0..02d0c70d87e2 100644 --- a/cmd/bcb.c +++ b/cmd/bcb.c @@ -14,6 +14,7 @@ #include <part.h> #include <malloc.h> #include <memalign.h> +#include <linux/err.h> enum bcb_cmd { BCB_CMD_LOAD, @@ -128,6 +129,16 @@ static int __bcb_load(int devnum, const char *partp) goto err_read_fail; } + /* + * always select the USER mmc hwpart in case another + * blk operation selected a different hwpart + */ + ret = blk_dselect_hwpart(desc, 0); + if (IS_ERR_VALUE(ret)) { + ret = -ENODEV; + goto err_read_fail; + } + part = simple_strtoul(partp, &endp, 0); if (*endp == '\0') { ret = part_get_info(desc, part, &info); --- base-commit: c4c32e359662aa95d9dbda2bd1272181bd9cb830 change-id: 20221011-usb-hwpart-599c278980b3 Best regards, -- Mattijs Korpershoek <mkorpershoek(a)baylibre.com>

3 2

[PATCH 1/1] board: gateworks: gw_ventana: fix building with GCC 12.2
by Heinrich Schuchardt 24 Oct '22

24 Oct '22

Building with GCC 12.2 results in an error board/gateworks/gw_ventana/gw_ventana.c:636:68: error: the comparison will always evaluate as 'true' for the address of 'pwm_padmux' will never be NULL [-Werror=address] 636 | } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") && | ^~ Remove the superfluous check. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- board/gateworks/gw_ventana/gw_ventana.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 99f52b9953..78d317d864 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -633,8 +633,7 @@ void setup_board_gpio(int board, struct ventana_board_info *info) ctrl); gpio_requestf(cfg->gpio_param, "dio%d", i); gpio_direction_input(cfg->gpio_param); - } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") && - cfg->pwm_padmux) { + } else if (hwconfig_subarg_cmp(arg, "mode", "pwm")) { if (!cfg->pwm_param) { printf("DIO%d: Error: pwm config invalid\n", i); -- 2.37.2

4 3

[PATCH v2 1/2] sandbox: Initialize sysreset before relocation
by Michal Suchanek 24 Oct '22

24 Oct '22

Without this the early sysreset code cannot be tested. Signed-off-by: Michal Suchanek <msuchanek(a)suse.de> --- v2: use u-boot,dm-pre-proper rather than u-boot,dm-pre-reloc - sandbox SPL cannot build otherwise --- arch/sandbox/dts/sandbox.dtsi | 1 + arch/sandbox/dts/test.dts | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index de7a218f45..14c3f54563 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -239,6 +239,7 @@ reset@1 { compatible = "sandbox,reset"; + u-boot,dm-pre-proper; }; rng { diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 4ee471238e..88ddc7c4da 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -1121,10 +1121,12 @@ reset@0 { compatible = "sandbox,warm-reset"; + u-boot,dm-pre-proper; }; reset@1 { compatible = "sandbox,reset"; + u-boot,dm-pre-proper; }; resetc: reset-ctl { -- 2.37.3

3 5

[PATCH 0/3] qemu: allow auto-booting through firmware device
by Andre Przywara 24 Oct '22

24 Oct '22

Hi, when running QEMU and specifying both a firmware binary (--bios) and a kernel (-kernel) on the command line, QEMU will run the firmware, but will also record information about the provided kernel in the QEMU firmware device. U-Boot's "qfw" command can load the kernel to a provided address then. However using a kernel (and initrd) provided this way requires typing some rather generic commands. This series automates this, so that the default boot sequence tries to launch a kernel this way first. If that fails, we gracefully continue with the existing boot locations. This simplifies automated booting, with external firmware: $ qemu-system-aarch64 -machine virt,virtualization=on,gic-version=2 -cpu cortex-a57 -nographic -display none -d unimp --bios u-boot.bin -kernel Image -initrd initrd.gz -append "earlycon" The first two patches clean up some qfw issues, so that the automatic booting becomes smoother, while the third patch adds the new commands to QEMU's distro_boot script. Please have a look! Cheers, Andre Andre Przywara (3): qfw: store loaded file size in environment variable qfw: return failure when no kernel could be loaded qemu: Try to automatically boot from the QEMU firmware device (qfw) cmd/qfw.c | 6 ++++-- include/configs/qemu-arm.h | 12 ++++++++++++ 2 files changed, 16 insertions(+), 2 deletions(-) -- 2.25.1

2 6

[PATCH v2] gpio: adp5585: add gpio driver for ADP5585 I/O Expander Controller
by Alice Guo (OSS) 24 Oct '22

24 Oct '22

From: Alice Guo <alice.guo(a)nxp.com> Add gpio driver for ADP5585 I/O Expander Controller. The ADP5585 is a 10 input/output port expander and can be used to increase the number of I/Os available to a processor. Signed-off-by: Alice Guo <alice.guo(a)nxp.com> --- Changes for v2: - add a commit log - remove unrelated change - remove "on i.MX platform" in Kconfig file drivers/gpio/Kconfig | 6 + drivers/gpio/Makefile | 1 + drivers/gpio/adp5585_gpio.c | 238 ++++++++++++++++++++++++++++++++++++ 3 files changed, 245 insertions(+) create mode 100644 drivers/gpio/adp5585_gpio.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index c949f9d2f7..c38022d01c 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -605,4 +605,10 @@ config TURRIS_OMNIA_MCU help Support for GPIOs on MCU connected to Turris Omnia via i2c. +config ADP5585_GPIO + bool "ADP5585 GPIO driver" + depends on DM_GPIO && DM_I2C + help + Support ADP5585 GPIO expander. + endif diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 9d718a554e..2f60b98384 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -75,3 +75,4 @@ obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o +obj-$(CONFIG_ADP5585_GPIO) += adp5585_gpio.o diff --git a/drivers/gpio/adp5585_gpio.c b/drivers/gpio/adp5585_gpio.c new file mode 100644 index 0000000000..ea0cb75459 --- /dev/null +++ b/drivers/gpio/adp5585_gpio.c @@ -0,0 +1,238 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022 NXP + * + * ADP5585 I/O Expander Controller + * + * Author: Alice Guo <alice.guo(a)nxp.com> + */ + +#include <asm/gpio.h> +#include <dm.h> +#include <dt-bindings/gpio/gpio.h> +#include <i2c.h> + +#define ADP5585_ID 0x00 +#define ADP5585_INT_STATUS 0x01 +#define ADP5585_STATUS 0x02 +#define ADP5585_FIFO_1 0x03 +#define ADP5585_FIFO_2 0x04 +#define ADP5585_FIFO_3 0x05 +#define ADP5585_FIFO_4 0x06 +#define ADP5585_FIFO_5 0x07 +#define ADP5585_FIFO_6 0x08 +#define ADP5585_FIFO_7 0x09 +#define ADP5585_FIFO_8 0x0A +#define ADP5585_FIFO_9 0x0B +#define ADP5585_FIFO_10 0x0C +#define ADP5585_FIFO_11 0x0D +#define ADP5585_FIFO_12 0x0E +#define ADP5585_FIFO_13 0x0F +#define ADP5585_FIFO_14 0x10 +#define ADP5585_FIFO_15 0x11 +#define ADP5585_FIFO_16 0x12 +#define ADP5585_GPI_INT_STAT_A 0x13 +#define ADP5585_GPI_INT_STAT_B 0x14 +#define ADP5585_GPI_STATUS_A 0x15 +#define ADP5585_GPI_STATUS_B 0x16 +#define ADP5585_RPULL_CONFIG_A 0x17 +#define ADP5585_RPULL_CONFIG_B 0x18 +#define ADP5585_RPULL_CONFIG_C 0x19 +#define ADP5585_RPULL_CONFIG_D 0x1A +#define ADP5585_GPI_INT_LEVEL_A 0x1B +#define ADP5585_GPI_INT_LEVEL_B 0x1C +#define ADP5585_GPI_EVENT_EN_A 0x1D +#define ADP5585_GPI_EVENT_EN_B 0x1E +#define ADP5585_GPI_INTERRUPT_EN_A 0x1F +#define ADP5585_GPI_INTERRUPT_EN_B 0x20 +#define ADP5585_DEBOUNCE_DIS_A 0x21 +#define ADP5585_DEBOUNCE_DIS_B 0x22 +#define ADP5585_GPO_DATA_OUT_A 0x23 +#define ADP5585_GPO_DATA_OUT_B 0x24 +#define ADP5585_GPO_OUT_MODE_A 0x25 +#define ADP5585_GPO_OUT_MODE_B 0x26 +#define ADP5585_GPIO_DIRECTION_A 0x27 +#define ADP5585_GPIO_DIRECTION_B 0x28 +#define ADP5585_RESET1_EVENT_A 0x29 +#define ADP5585_RESET1_EVENT_B 0x2A +#define ADP5585_RESET1_EVENT_C 0x2B +#define ADP5585_RESET2_EVENT_A 0x2C +#define ADP5585_RESET2_EVENT_B 0x2D +#define ADP5585_RESET_CFG 0x2E +#define ADP5585_PWM_OFFT_LOW 0x2F +#define ADP5585_PWM_OFFT_HIGH 0x30 +#define ADP5585_PWM_ONT_LOW 0x31 +#define ADP5585_PWM_ONT_HIGH 0x32 +#define ADP5585_PWM_CFG 0x33 +#define ADP5585_LOGIC_CFG 0x34 +#define ADP5585_LOGIC_FF_CFG 0x35 +#define ADP5585_LOGIC_INT_EVENT_EN 0x36 +#define ADP5585_POLL_PTIME_CFG 0x37 +#define ADP5585_PIN_CONFIG_A 0x38 +#define ADP5585_PIN_CONFIG_B 0x39 +#define ADP5585_PIN_CONFIG_D 0x3A +#define ADP5585_GENERAL_CFG 0x3B +#define ADP5585_INT_EN 0x3C + +#define ADP5585_MAXGPIO 10 +#define ADP5585_BANK(offs) ((offs) > 4) +#define ADP5585_BIT(offs) ((offs) > 4 ? \ + 1u << ((offs) - 5) : 1u << (offs)) + +struct adp5585_plat { + fdt_addr_t addr; + u8 id; + u8 dat_out[2]; + u8 dir[2]; +}; + +static int adp5585_direction_input(struct udevice *dev, unsigned int offset) +{ + int ret; + unsigned int bank; + struct adp5585_plat *plat = dev_get_plat(dev); + + bank = ADP5585_BANK(offset); + + plat->dir[bank] &= ~ADP5585_BIT(offset); + ret = dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1); + + return ret; +} + +static int adp5585_direction_output(struct udevice *dev, unsigned int offset, + int value) +{ + int ret; + unsigned int bank, bit; + struct adp5585_plat *plat = dev_get_plat(dev); + + bank = ADP5585_BANK(offset); + bit = ADP5585_BIT(offset); + + plat->dir[bank] |= bit; + + if (value) + plat->dat_out[bank] |= bit; + else + plat->dat_out[bank] &= ~bit; + + ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1); + ret |= dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1); + + return ret; +} + +static int adp5585_get_value(struct udevice *dev, unsigned int offset) +{ + struct adp5585_plat *plat = dev_get_plat(dev); + unsigned int bank = ADP5585_BANK(offset); + unsigned int bit = ADP5585_BIT(offset); + u8 val; + + if (plat->dir[bank] & bit) + val = plat->dat_out[bank]; + else + dm_i2c_read(dev, ADP5585_GPI_STATUS_A + bank, &val, 1); + + return !!(val & bit); +} + +static int adp5585_set_value(struct udevice *dev, unsigned int offset, int value) +{ + int ret; + unsigned int bank, bit; + struct adp5585_plat *plat = dev_get_plat(dev); + + bank = ADP5585_BANK(offset); + bit = ADP5585_BIT(offset); + + if (value) + plat->dat_out[bank] |= bit; + else + plat->dat_out[bank] &= ~bit; + + ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1); + + return ret; +} + +static int adp5585_get_function(struct udevice *dev, unsigned int offset) +{ + unsigned int bank, bit, dir; + struct adp5585_plat *plat = dev_get_plat(dev); + + bank = ADP5585_BANK(offset); + bit = ADP5585_BIT(offset); + dir = plat->dir[bank] & bit; + + if (!dir) + return GPIOF_INPUT; + else + return GPIOF_OUTPUT; +} + +static int adp5585_xlate(struct udevice *dev, struct gpio_desc *desc, + struct ofnode_phandle_args *args) +{ + desc->offset = args->args[0]; + desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0; + + return 0; +} + +static const struct dm_gpio_ops adp5585_ops = { + .direction_input = adp5585_direction_input, + .direction_output = adp5585_direction_output, + .get_value = adp5585_get_value, + .set_value = adp5585_set_value, + .get_function = adp5585_get_function, + .xlate = adp5585_xlate, +}; + +static int adp5585_probe(struct udevice *dev) +{ + struct adp5585_plat *plat = dev_get_plat(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + int ret; + + if (!plat) + return 0; + + plat->addr = dev_read_addr(dev); + if (plat->addr == FDT_ADDR_T_NONE) + return -EINVAL; + + ret = dm_i2c_read(dev, ADP5585_ID, &plat->id, 1); + if (ret < 0) + return ret; + + uc_priv->gpio_count = ADP5585_MAXGPIO; + uc_priv->bank_name = "adp5585-gpio"; + + for (int i = 0; i < 2; i++) { + ret = dm_i2c_read(dev, ADP5585_GPO_DATA_OUT_A + i, &plat->dat_out[i], 1); + if (ret) + return ret; + + ret = dm_i2c_read(dev, ADP5585_GPIO_DIRECTION_A + i, &plat->dir[i], 1); + if (ret) + return ret; + } + + return 0; +} + +static const struct udevice_id adp5585_ids[] = { + { .compatible = "adp5585" }, + { } +}; + +U_BOOT_DRIVER(adp5585) = { + .name = "adp5585", + .id = UCLASS_GPIO, + .of_match = adp5585_ids, + .probe = adp5585_probe, + .ops = &adp5585_ops, + .plat_auto = sizeof(struct adp5585_plat), +}; -- 2.17.1

3 2

[PATCH v4 0/4] net: Enable NC-SI support
by Joel Stanley 24 Oct '22

24 Oct '22

Back in 2019 Sam submitted NC-SI support. The NC-SI PHY driver was merged (patches 1 and 2), but we never got around to merging patches 3 and 4: https://lore.kernel.org/u-boot/20190618013720.2823-1-sam@mendozajonas.com/ Sam as long since moved on from working on the Aspeed BMCs, but the code has been in use in the vendor fork for some time. This refreshes his patches and enables support in the Aspeed defconfigs, giving compile coverage to the NC-SI phy. v4 splits the ncsi integration and cmd code into separate patches, and adds r-b from Ramon and Cédric to patches 3 and 4. Joel Stanley (1): config/aspeed: Enable NC-SI support Samuel Mendoza-Jonas (3): net: NC-SI setup and handling cmd: Add ncsi command net/ftgmac100: Add NC-SI mode support include/net.h | 2 +- include/phy.h | 2 ++ cmd/net.c | 22 ++++++++++++++++++++++ drivers/net/ftgmac100.c | 14 ++++++++++---- drivers/net/phy/ncsi.c | 1 + drivers/net/phy/phy.c | 9 ++++++++- net/net.c | 27 ++++++++++++++++++++++++++- cmd/Kconfig | 8 ++++++++ configs/evb-ast2500_defconfig | 2 ++ configs/evb-ast2600_defconfig | 2 ++ 10 files changed, 82 insertions(+), 7 deletions(-) -- 2.35.1

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