October 2022 - U-Boot

[PATCH v2] cmd: mtd: try to erase bad blocks only if scrub flag is provided
by Mikhail Kshevetskiy 24 Oct '22

24 Oct '22

'mtd erase' command should not erase bad blocks. To force bad block erasing there is 'mtd erase.dontskipbad' command. Unfortunately nand layer erases bad blocks unconditionally. This is wrong. Fix issue by adding bad block checks to do_mtd_erase() function in the case srub flag is not provided. We can't simplify code by eliminating -EIO result check of mtd_erase() as it will terminate erasing with CMD_RET_SUCCESS. Thanks to Dario Binacchi <dario.binacchi(a)amarulasolutions.com> for his patch. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy(a)iopsys.eu> --- cmd/mtd.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/cmd/mtd.c b/cmd/mtd.c index ad5cc9827d..a314745e95 100644 --- a/cmd/mtd.c +++ b/cmd/mtd.c @@ -434,11 +434,24 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag, int argc, erase_op.mtd = mtd; erase_op.addr = off; erase_op.len = mtd->erasesize; - erase_op.scrub = scrub; while (len) { - ret = mtd_erase(mtd, &erase_op); + if (!scrub) { + ret = mtd_block_isbad(mtd, erase_op.addr); + if (ret < 0) { + printf("Failed to get bad block at 0x%08llx\n", + erase_op.addr); + ret = CMD_RET_FAILURE; + goto out_put_mtd; + } else if (ret > 0) { + /* simulate bad block behavior */ + ret = -EIO; + goto skip_block_erasing; + } + } + ret = mtd_erase(mtd, &erase_op); +skip_block_erasing: if (ret) { /* Abort if its not a bad block error */ if (ret != -EIO) -- 2.35.1

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[PATCH 0/6] imx: imx6ul: kontron-sl-mx6ul: Fixes and improvements
by Frieder Schrempf 24 Oct '22

24 Oct '22

From: Frieder Schrempf <frieder.schrempf(a)kontron.de> This series fixes some issues with the kontron-sl-mx6ul board configuration. It also syncs devicetrees with changes in the Linux kernel. Notes: * This series is based on imx/master and fixes the previously merged sync patch from Marcel [1]. * The devicetree changes this is based on are still pending in Linux (see [2]). [1] https://patchwork.ozlabs.org/project/uboot/patch/20220721132748.1052244-9-m… [2] https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220815082814.… Frieder Schrempf (6): Makefile: Make flash.bin target available for all platforms imx: imx6ul: kontron-sl-mx6ul: Enable migrated Kconfig options imx: imx6ul: kontron-sl-mx6ul: Fix CONFIG_ENV_SPI_BUS imx: imx6ul: kontron-sl-mx6ul: Select correct boot and env device imx: imx6ul: kontron-sl-mx6ul: Migrate to use CONFIG_EXTRA_ENV_TEXT imx: imx6ul: kontron-sl-mx6ul: Sync devicetrees Makefile | 4 +- arch/arm/dts/Makefile | 4 +- arch/arm/dts/imx6ul-kontron-bl-43.dts | 103 +++++ ...i => imx6ul-kontron-bl-common-u-boot.dtsi} | 0 ...x-s.dtsi => imx6ul-kontron-bl-common.dtsi} | 0 ...oot.dtsi => imx6ul-kontron-bl-u-boot.dtsi} | 2 +- ...tron-n631x-s.dts => imx6ul-kontron-bl.dts} | 9 +- arch/arm/dts/imx6ul-kontron-n6x1x-s.dts | 423 ------------------ ...mon.dtsi => imx6ul-kontron-sl-common.dtsi} | 15 + ...-n631x-som.dtsi => imx6ul-kontron-sl.dtsi} | 6 +- ...ot.dtsi => imx6ull-kontron-bl-u-boot.dtsi} | 2 +- arch/arm/dts/imx6ull-kontron-bl.dts | 15 + arch/arm/dts/imx6ull-kontron-n641x-s.dts | 16 - ...n641x-som.dtsi => imx6ull-kontron-sl.dtsi} | 6 +- board/kontron/sl-mx6ul/MAINTAINERS | 6 +- board/kontron/sl-mx6ul/Makefile | 2 + board/kontron/sl-mx6ul/sl-mx6ul-common.c | 24 + board/kontron/sl-mx6ul/sl-mx6ul-common.h | 11 + board/kontron/sl-mx6ul/sl-mx6ul.c | 15 + board/kontron/sl-mx6ul/sl-mx6ul.env | 4 + board/kontron/sl-mx6ul/spl.c | 39 +- configs/kontron-sl-mx6ul_defconfig | 13 +- include/configs/kontron-sl-mx6ul.h | 10 +- 23 files changed, 242 insertions(+), 487 deletions(-) create mode 100644 arch/arm/dts/imx6ul-kontron-bl-43.dts rename arch/arm/dts/{imx6ul-kontron-n6x1x-s-u-boot.dtsi => imx6ul-kontron-bl-common-u-boot.dtsi} (100%) rename arch/arm/dts/{imx6ul-kontron-n6x1x-s.dtsi => imx6ul-kontron-bl-common.dtsi} (100%) rename arch/arm/dts/{imx6ul-kontron-n631x-s-u-boot.dtsi => imx6ul-kontron-bl-u-boot.dtsi} (75%) rename arch/arm/dts/{imx6ul-kontron-n631x-s.dts => imx6ul-kontron-bl.dts} (52%) delete mode 100644 arch/arm/dts/imx6ul-kontron-n6x1x-s.dts rename arch/arm/dts/{imx6ul-kontron-n6x1x-som-common.dtsi => imx6ul-kontron-sl-common.dtsi} (90%) rename arch/arm/dts/{imx6ul-kontron-n631x-som.dtsi => imx6ul-kontron-sl.dtsi} (62%) rename arch/arm/dts/{imx6ull-kontron-n641x-s-u-boot.dtsi => imx6ull-kontron-bl-u-boot.dtsi} (75%) create mode 100644 arch/arm/dts/imx6ull-kontron-bl.dts delete mode 100644 arch/arm/dts/imx6ull-kontron-n641x-s.dts rename arch/arm/dts/{imx6ull-kontron-n641x-som.dtsi => imx6ull-kontron-sl.dtsi} (55%) create mode 100644 board/kontron/sl-mx6ul/sl-mx6ul-common.c create mode 100644 board/kontron/sl-mx6ul/sl-mx6ul-common.h create mode 100644 board/kontron/sl-mx6ul/sl-mx6ul.env -- 2.37.2

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[PATCH] cmd: mtd: try to erase bad blocks only if scrub flag is provided
by Mikhail Kshevetskiy 24 Oct '22

24 Oct '22

'mtd erase' command should not erase bad blocks. To force bad block erasing there is 'mtd erase.dontskipbad' command. Unfortunately nand layer erases bad blocks unconditionally. This is wrong. Fix issue by adding bad block checks to do_mtd_erase() function in the case srub flag is not provided. We can't simplify code by eliminating -EIO result check of mtd_erase() as it will terminate erasing with CMD_RET_SUCCESS. Thanks to Dario Binacchi <dario.binacchi(a)amarulasolutions.com> for his patch. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy(a)iopsys.eu> --- cmd/mtd.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/cmd/mtd.c b/cmd/mtd.c index ad5cc9827d..a314745e95 100644 --- a/cmd/mtd.c +++ b/cmd/mtd.c @@ -434,11 +434,24 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag, int argc, erase_op.mtd = mtd; erase_op.addr = off; erase_op.len = mtd->erasesize; - erase_op.scrub = scrub; while (len) { - ret = mtd_erase(mtd, &erase_op); + if (!scrub) { + ret = mtd_block_isbad(mtd, erase_op.addr); + if (ret < 0) { + printf("Failed to get bad block at 0x%08llx\n", + erase_op.addr); + ret = CMD_RET_FAILURE; + goto out_put_mtd; + } else if (ret > 0) { + /* simulate bad block behavior */ + ret = -EIO; + goto skip_block_erasing; + } + } + ret = mtd_erase(mtd, &erase_op); +skip_block_erasing: if (ret) { /* Abort if its not a bad block error */ if (ret != -EIO) -- 2.35.1

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[PATCH v2 0/8] arm: dts: imx: sync device trees with upstream linux kernel part 1
by Marcel Ziswiler 24 Oct '22

24 Oct '22

From: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> This series synchronises them imx device trees with the upstream Linux kernel (v6.0-rc1). I split it into two parts. This is part 1. It also fixes a few issues as discussed during/after the pre-mature application of my first series [1]. I am not touching kontron-sl-mx6ul as Frieder already took care of those [2]. Feedback welcome. Thanks! [1] https://patchwork.ozlabs.org/project/uboot/cover/20220721132748.1052244-1-m… [2] https://patchwork.ozlabs.org/project/uboot/cover/20220823142917.306176-1-fr… Changes in v2: - imxrt1050: Re-added DDR timings aka semc node as pointed out by Fabio. Thanks! - imx8ulp: Re-added s400_mu device tree node. Marcel Ziswiler (8): vf610: synchronise device tree with linux imxrt1020: fix lpuart issue in common u-boot device tree imxrt1050: synchronise device tree with linux imx8ulp: synchronise device tree with linux imx8mq: synchronise device tree with linux imx8mp: synchronise device tree with linux imx8mn: synchronise device tree with linux imx8mm: synchronise device tree with linux arch/arm/dts/imx8mm-beacon-baseboard.dtsi | 4 +- arch/arm/dts/imx8mm-evk.dtsi | 43 ++ arch/arm/dts/imx8mm-icore-mx8mm.dtsi | 12 +- arch/arm/dts/imx8mm-mx8menlo.dts | 4 +- arch/arm/dts/imx8mm-u-boot.dtsi | 2 +- arch/arm/dts/imx8mm-venice-gw700x.dtsi | 24 +- arch/arm/dts/imx8mm-venice-gw7901.dts | 8 +- arch/arm/dts/imx8mm-venice-gw7902.dts | 10 +- arch/arm/dts/imx8mm-venice-gw7903.dts | 6 +- arch/arm/dts/imx8mm-verdin.dtsi | 10 +- arch/arm/dts/imx8mn-beacon-baseboard.dtsi | 4 +- arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi | 2 +- .../dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 2 +- arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 2 +- arch/arm/dts/imx8mn-evk.dtsi | 45 +- .../dts/imx8mn-var-som-symphony-u-boot.dtsi | 2 +- arch/arm/dts/imx8mn-var-som-symphony.dts | 6 +- arch/arm/dts/imx8mn-venice-gw7902.dts | 8 +- arch/arm/dts/imx8mn-venice-u-boot.dtsi | 2 +- arch/arm/dts/imx8mn.dtsi | 13 +- arch/arm/dts/imx8mp-dhcom-pdk2.dts | 27 +- arch/arm/dts/imx8mp-dhcom-som.dtsi | 20 +- arch/arm/dts/imx8mp-evk.dts | 126 ++-- arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts | 48 +- arch/arm/dts/imx8mp-u-boot.dtsi | 2 +- arch/arm/dts/imx8mp-venice-gw74xx.dts | 116 ++-- arch/arm/dts/imx8mp-verdin.dtsi | 14 +- arch/arm/dts/imx8mp.dtsi | 33 +- arch/arm/dts/imx8mq-evk.dts | 43 ++ arch/arm/dts/imx8mq-u-boot.dtsi | 10 +- arch/arm/dts/imx8mq.dtsi | 15 +- arch/arm/dts/imx8ulp-evk-u-boot.dtsi | 15 +- arch/arm/dts/imx8ulp-evk.dts | 191 +----- arch/arm/dts/imx8ulp-pinfunc.h | 4 +- arch/arm/dts/imx8ulp.dtsi | 564 +++++------------- arch/arm/dts/imxrt1020-evk-u-boot.dtsi | 7 +- arch/arm/dts/imxrt1020-evk.dts | 1 - arch/arm/dts/imxrt1050-evk-u-boot.dtsi | 155 ++++- arch/arm/dts/imxrt1050-evk.dts | 257 +------- arch/arm/dts/imxrt1050-pinfunc.h | 2 +- arch/arm/dts/imxrt1050.dtsi | 168 +++--- arch/arm/dts/vf610-pinfunc.h | 2 +- include/dt-bindings/clock/imx8mp-clock.h | 13 +- include/dt-bindings/clock/imx8ulp-clock.h | 49 +- include/dt-bindings/clock/imxrt1050-clock.h | 9 +- include/dt-bindings/interconnect/imx8mm.h | 50 ++ include/dt-bindings/interconnect/imx8mn.h | 41 ++ include/dt-bindings/power/imx8mp-power.h | 15 +- include/dt-bindings/power/imx8ulp-power.h | 26 + include/dt-bindings/reset/imx8mp-reset.h | 50 ++ include/dt-bindings/reset/imx8mq-reset.h | 61 +- include/dt-bindings/reset/imx8ulp-pcc-reset.h | 59 ++ 52 files changed, 1146 insertions(+), 1256 deletions(-) create mode 100644 include/dt-bindings/interconnect/imx8mm.h create mode 100644 include/dt-bindings/interconnect/imx8mn.h create mode 100644 include/dt-bindings/power/imx8ulp-power.h create mode 100644 include/dt-bindings/reset/imx8mp-reset.h create mode 100644 include/dt-bindings/reset/imx8ulp-pcc-reset.h -- 2.35.1

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[PATCH] cmd: sf: Handle unaligned 'update' start offset
by Marek Vasut 23 Oct '22

23 Oct '22

Currently the 'sf update' command fails in case the 'start' offset is not aligned to SPI NOR erase block size. Add the missing alignment calculation. In case the start offset is in the middle of erase block, round start address down to the nearest aligned one, compare only the updated data between what is in the SPI NOR and what is being written, copy new data at offset of the compare buffer, and write back the entire erase block. This is useful e.g. on i.MX6Q where the u-boot-with-spl.imx is at offset 0x400 in the SPI NOR, while the SPI NOR may have erase block size e.g. 0x1000 bytes. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Jan Kiszka <jan.kiszka(a)siemens.com> Cc: Pratyush Yadav <p.yadav(a)ti.com> Cc: Sean Anderson <seanga2(a)gmail.com> --- cmd/sf.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/cmd/sf.c b/cmd/sf.c index bd102f5af9d..f9b2d9a47a7 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -179,16 +179,18 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, size_t len, const char *buf, char *cmp_buf, size_t *skipped) { char *ptr = (char *)buf; + u32 start_offset = offset % flash->sector_size; + u32 read_offset = offset - start_offset; - debug("offset=%#x, sector_size=%#x, len=%#zx\n", - offset, flash->sector_size, len); + debug("offset=%#x+%#x, sector_size=%#x, len=%#zx\n", + read_offset, start_offset, flash->sector_size, len); /* Read the entire sector so to allow for rewriting */ - if (spi_flash_read(flash, offset, flash->sector_size, cmp_buf)) + if (spi_flash_read(flash, read_offset, flash->sector_size, cmp_buf)) return "read"; /* Compare only what is meaningful (len) */ - if (memcmp(cmp_buf, buf, len) == 0) { - debug("Skip region %x size %zx: no change\n", - offset, len); + if (memcmp(cmp_buf + start_offset, buf, len) == 0) { + debug("Skip region %x+%x size %zx: no change\n", + start_offset, read_offset, len); *skipped += len; return NULL; } @@ -197,7 +199,7 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, return "erase"; /* If it's a partial sector, copy the data into the temp-buffer */ if (len != flash->sector_size) { - memcpy(cmp_buf, buf, len); + memcpy(cmp_buf + start_offset, buf, len); ptr = cmp_buf; } /* Write one complete sector */ @@ -238,6 +240,8 @@ static int spi_flash_update(struct spi_flash *flash, u32 offset, for (; buf < end && !err_oper; buf += todo, offset += todo) { todo = min_t(size_t, end - buf, flash->sector_size); + todo = min_t(size_t, end - buf, + flash->sector_size - (offset % flash->sector_size)); if (get_timer(last_update) > 100) { printf(" \rUpdating, %zu%% %lu B/s", 100 - (end - buf) / scale, -- 2.35.1

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[PATCH] mtd: spi-nor-core: Fix index value for SCCR dwords
by tkuw584924＠gmail.com 23 Oct '22

23 Oct '22

From: Takahiro Kuwano <Takahiro.Kuwano(a)infineon.com> Array index for SCCR 22th DWORD should be 21. Fixes: bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map") Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano(a)infineon.com> --- drivers/mtd/spi/spi-nor-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index e3c86e080a1d..65dc69a4be9a 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -2493,7 +2493,7 @@ static int spi_nor_parse_sccr(struct spi_nor *nor, for (i = 0; i < sccr_header->length; i++) table[i] = le32_to_cpu(table[i]); - if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE, table[22])) + if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE, table[21])) nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE; out: -- 2.25.1

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[PATCH] spi: spi-mem: ease checks in dtr_supports_op()
by Dhruva Gole 23 Oct '22

23 Oct '22

Remove the extra conditions that cause some cases to fail prematurely like if the data number of bytes is odd. The controller can handle odd number of bytes data read in DTR Mode. Don't fail supports op for this condition. Signed-off-by: Dhruva Gole <d-gole(a)ti.com> --- For a deeper context, refer to a cover letter from an earlier patch series: https://lore.kernel.org/u-boot/20221019064759.493607-1-d-gole@ti.com/T/#m3f… Here, I am trying to boot from OSPI Flash present on board the AM62-SK EVM. However, despite enabling the necessary configs and DT nodes, my boot flow seemed to be failing. I then came to know that the condition causing this failure was that my generated DTB was of odd number of bytes. So, while loading the dtb from the Octal SPI NOR Flash to the memory, the data.nbytes was odd which made the supports_op function return false. This check feels a little too strict at the spi-mem stage and we should let the controller decide what to do in case of odd bytes in DTR. After applying this patch, I was able to succesfully boot the AM62SK EVM without any issues. I would also like to justify this patch by pointing the community to the equivalent code in the linux kernel, in drivers/spi/spi-mem.c, where this check is absent as well. The controller does work with odd number of bytes and I have not seen any sort of bugs in the absence of this supports_op check. Hence, feel that it is safe enough to discard this check from here. drivers/spi/spi-mem.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 8e8995fc537f..eecc13bec90d 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -181,10 +181,6 @@ bool spi_mem_dtr_supports_op(struct spi_slave *slave, if (op->dummy.nbytes && op->dummy.buswidth == 8 && op->dummy.nbytes % 2) return false; - if (op->data.dir != SPI_MEM_NO_DATA && - op->dummy.buswidth == 8 && op->data.nbytes % 2) - return false; - return spi_mem_check_buswidth(slave, op); } EXPORT_SYMBOL_GPL(spi_mem_dtr_supports_op); -- 2.25.1

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[PATCH 0/4] mtd: spi-nor-core: Track flash's internal address mode in s25hx-t
by tkuw584924＠gmail.com 23 Oct '22

23 Oct '22

From: Takahiro Kuwano <Takahiro.Kuwano(a)infineon.com> For S25hx-T support in Linux (single die package only), flash's internal address mode is not changed and it is assumed as factory default. Current implementation of u-boot forces to 4-byte address mode while some parts are 3-byte address mode by default. That will cause a problem when we use u-boot to load the Linux kernel. This series tries to avoid the problem, by porting two changes from linux [0][1] and additional rework. [0] https://patchwork.ozlabs.org/project/linux-mtd/patch/20200525091544.17270-7… [1] https://patchwork.ozlabs.org/project/linux-mtd/patch/20220725092505.446315-… Takahiro Kuwano (4): mtd: spi-nor-core: Default to addr_width of 3 for configurable widths mtd: spi-nor-core: Track flash's internal address mode mtd: spi-nor-core: Rework spansion_read/write_any_reg() to use addr_mode_nbytes mtd: spi-nor-core: Rework s25hx_t_post_bfpt_fixup() for flash's internal address mode drivers/mtd/spi/spi-nor-core.c | 42 ++++++++++++++++++++++++---------- include/linux/mtd/spi-nor.h | 5 ++++ 2 files changed, 35 insertions(+), 12 deletions(-) -- 2.25.1

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[PATCH 0/3] mtd: spi-nor-core: Add support for s28hl512t, s28hl01gt, and s28hs01gt
by tkuw584924＠gmail.com 23 Oct '22

23 Oct '22

From: Takahiro Kuwano <Takahiro.Kuwano(a)infineon.com> These devices are variants of s28hs512t(1.8V 512Mb) with different density(1Gb) and power supply voltage(3V). Datasheet: https://www.infineon.com/dgdl/Infineon-S28HS256T_S28HS512T_S28HS01GT_S28HL2… Tested on Zynq-7000 platform with Infineon SPI controller Takahiro Kuwano (3): mtd: spi-nor-core: Rename s28hs512t prefix mtd: spi-nor-core: Rename configuration macro for S28 support mtd: spi-nor-ids: Add s28hl512t, s28hl01gt, and s28hs01gt IDs configs/j721s2_evm_a72_defconfig | 2 +- configs/j721s2_evm_r5_defconfig | 2 +- drivers/mtd/spi/Kconfig | 10 +++---- drivers/mtd/spi/spi-nor-core.c | 48 +++++++++++++++++--------------- drivers/mtd/spi/spi-nor-ids.c | 5 +++- 5 files changed, 36 insertions(+), 31 deletions(-) -- 2.25.1

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Don't use sudo in python tests
by Heinrich Schuchardt 23 Oct '22

23 Oct '22

Hello Simon, As described in doc/develop/py_testing.doc using sudo in python tests should be avoided. * users building U-Boot may not be sudoers * running code as sudo comes with a risk You added sudo in test/py/tests/test_ut.py Can we use virt-make-fs here? Best regards Heinrich

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