August 2021 - U-Boot

[PATCH] ARM: meson: Add S905Y2 SOC ID
by Christian Hewitt 30 Aug '21

30 Aug '21

Add the SOC ID for the S905Y2 to board info, see below for before/after tested with a Radxa Zero board: SoC: Amlogic Meson G12A (Unknown) Revision 28:b (30:2) SoC: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2) Signed-off-by: Christian Hewitt <christianshewitt(a)gmail.com> --- arch/arm/mach-meson/board-info.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c index d16d3f194d..2421acd817 100644 --- a/arch/arm/mach-meson/board-info.c +++ b/arch/arm/mach-meson/board-info.c @@ -64,6 +64,7 @@ static const struct meson_gx_package_id { { "A113X", 0x25, 0x37, 0xff }, { "A113D", 0x25, 0x22, 0xff }, { "S905D2", 0x28, 0x10, 0xf0 }, + { "S905Y2", 0x28, 0x30, 0xf0 }, { "S905X2", 0x28, 0x40, 0xf0 }, { "A311D", 0x29, 0x10, 0xf0 }, { "S922X", 0x29, 0x40, 0xf0 }, -- 2.17.1

2 2

[PATCHv2] configs: Layerscape: Remove the 'fdt_addr' env
by Zhiqiang Hou 30 Aug '21

30 Aug '21

From: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> On Layerscape platforms, the DTB is loaded from boot filesystem, per the fdt_addr description in doc/README.distro, it must be removed. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> --- V2: - Removed unrelated description in change log. include/configs/ls1012a2g5rdb.h | 1 - include/configs/ls1012afrdm.h | 2 +- include/configs/ls1012afrwy.h | 1 - include/configs/ls1012aqds.h | 1 - include/configs/ls1012ardb.h | 1 - include/configs/ls1021atsn.h | 3 +-- include/configs/ls1021atwr.h | 4 +--- include/configs/ls1028aqds.h | 3 +-- include/configs/ls1028ardb.h | 3 +-- include/configs/ls1043a_common.h | 1 - include/configs/ls1046a_common.h | 1 - include/configs/ls1088ardb.h | 2 -- include/configs/ls2080ardb.h | 2 -- include/configs/lx2160a_common.h | 1 - 14 files changed, 5 insertions(+), 21 deletions(-) diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 44f9da7306..d9ff011bac 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -29,7 +29,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x00f00000\0" \ "kernel_addr=0x01000000\0" \ "kernelheader_addr=0x800000\0" \ "scriptaddr=0x80000000\0" \ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 2711f651d7..c7fdd10cf5 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2021 NXP */ #ifndef __LS1012ARDB_H__ @@ -24,7 +25,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "fdt_high=0xffffffffffffffff\0" \ - "fdt_addr=0x00f00000\0" \ "kernel_addr=0x01000000\0" \ "scriptaddr=0x80000000\0" \ "fdtheader_addr_r=0x80100000\0" \ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index f8b386125c..7ffca56d72 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -41,7 +41,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x00f00000\0" \ "kernel_addr=0x01000000\0" \ "kernel_size_sd=0x16000\0" \ "kernelhdr_size_sd=0x10\0" \ diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 3e5fdadc40..d0bfd3e494 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -101,7 +101,6 @@ #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ - "fdt_addr=0x00f00000\0" \ "kernel_addr=0x01000000\0" \ "kernelheader_addr=0x600000\0" \ "scriptaddr=0x80000000\0" \ diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index c8a2f120dc..6fff966ee2 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -46,7 +46,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x00f00000\0" \ "kernel_addr=0x01000000\0" \ "kernelheader_addr=0x600000\0" \ "scriptaddr=0x80000000\0" \ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 58c2d97a32..97fd61f6f9 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0 - * Copyright 2016-2019 NXP Semiconductors + * Copyright 2016-2019, 2021 NXP Semiconductors * Copyright 2019 Vladimir Oltean <olteanv(a)gmail.com> */ @@ -151,7 +151,6 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ "initrd_high=0xffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x61000000\0" \ "kernelheader_addr=0x60800000\0" \ "scriptaddr=0x80000000\0" \ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index ba308c514b..5be179a36b 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2019 NXP + * Copyright 2019, 2021 NXP */ #ifndef __CONFIG_H @@ -290,7 +290,6 @@ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200 " \ "cma=64M@0x0-0xb0000000\0" \ "initrd_high=0xffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x65000000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ @@ -347,7 +346,6 @@ "bootargs=root=/dev/ram0 rw console=ttyS0,115200 " \ "cma=64M@0x0-0xb0000000\0" \ "initrd_high=0xffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x61000000\0" \ "kernelheader_addr=0x60800000\0" \ "scriptaddr=0x80000000\0" \ diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 9ae37b96ce..31f60b1a9d 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2019-2020 NXP + * Copyright 2019-2021 NXP */ #ifndef __LS1028A_QDS_H @@ -88,7 +88,6 @@ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "ramdisk_addr=0x800000\0" \ "ramdisk_size=0x2000000\0" \ - "fdt_addr=0x00f00000\0" \ "kernel_addr=0x01000000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 1a80cb945d..2806012960 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2019 NXP + * Copyright 2019, 2021 NXP */ #ifndef __LS1028A_RDB_H @@ -78,7 +78,6 @@ "ramdisk_addr=0x800000\0" \ "ramdisk_size=0x2000000\0" \ "bootm_size=0x10000000\0" \ - "fdt_addr=0x00f00000\0" \ "kernel_addr=0x01000000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 834c3e6780..aa280cbfc9 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -236,7 +236,6 @@ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x61000000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 289acc02d3..329f667cda 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -229,7 +229,6 @@ "ramdisk_addr=0x800000\0" \ "ramdisk_size=0x2000000\0" \ "bootm_size=0x10000000\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x61000000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index ad3043bbdb..58cde004c1 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -313,7 +313,6 @@ "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x1000000\0" \ "kernel_addr_sd=0x8000\0" \ "kernelhdr_addr_sd=0x3000\0" \ @@ -382,7 +381,6 @@ "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x1000000\0" \ "kernel_addr_sd=0x8000\0" \ "kernelhdr_addr_sd=0x3000\0" \ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 49c2cc573b..b6a12870d7 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -371,7 +371,6 @@ unsigned long get_board_sys_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x581000000\0" \ "kernel_start=0x1000000\0" \ "kernelheader_start=0x800000\0" \ @@ -434,7 +433,6 @@ unsigned long get_board_sys_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_addr=0x581000000\0" \ "kernel_start=0x1000000\0" \ "kernelheader_start=0x600000\0" \ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 1338ee3cda..cdc392a7fb 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -214,7 +214,6 @@ unsigned long get_board_ddr_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "fdt_addr=0x64f00000\0" \ "kernel_start=0x1000000\0" \ "kernelheader_start=0x600000\0" \ "scriptaddr=0x80000000\0" \ -- 2.17.1

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Re: [PATCH] Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
by Rick Chen 30 Aug '21

30 Aug '21

> From: Tom Rini <trini(a)konsulko.com> > Sent: Thursday, August 26, 2021 11:48 PM > To: u-boot(a)lists.denx.de > Cc: Alexey Brodkin <alexey.brodkin(a)synopsys.com>; Anup Patel <anup.patel(a)wdc.com>; Atish Patra <atish.patra(a)wdc.com>; Bin Meng <bmeng.cn(a)gmail.com>; Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com>; Leo Yu-Chi Liang(梁育齊) <ycliang(a)andestech.com>; Palmer Dabbelt <palmer(a)dabbelt.com>; Paul Walmsley <paul.walmsley(a)sifive.com>; Rick Jian-Zhi Chen(陳建志) <rick(a)andestech.com>; Sean Anderson <seanga2(a)gmail.com>; Simon Glass <sjg(a)chromium.org> > Subject: [PATCH] Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig > > We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. > Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. > > Cc: Alexey Brodkin <alexey.brodkin(a)synopsys.com> > Cc: Anup Patel <anup.patel(a)wdc.com> > Cc: Atish Patra <atish.patra(a)wdc.com> > Cc: Bin Meng <bmeng.cn(a)gmail.com> > Cc: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> > Cc: Leo <ycliang(a)andestech.com> > Cc: Palmer Dabbelt <palmer(a)dabbelt.com> > Cc: Paul Walmsley <paul.walmsley(a)sifive.com> > Cc: Rick Chen <rick(a)andestech.com> > Cc: Sean Anderson <seanga2(a)gmail.com> > Cc: Simon Glass <sjg(a)chromium.org> > Signed-off-by: Tom Rini <trini(a)konsulko.com> > --- > I'm Cc'ing a bunch of RISC-V folks since that's where I'm least confident and just put it per-board for now. > --- > arch/Kconfig | 25 +++++++++++++++++++++++++ > arch/arc/include/asm/cache.h | 3 --- > arch/arm/Kconfig | 15 --------------- > arch/mips/Kconfig | 26 +++----------------------- > arch/mips/include/asm/cache.h | 12 +----------- > arch/mips/mach-bmips/Kconfig | 20 ++++++++++---------- > arch/mips/mach-mtmips/Kconfig | 4 ++-- > arch/mips/mach-pic32/Kconfig | 2 +- > arch/powerpc/cpu/mpc83xx/Kconfig | 6 ++++++ > arch/powerpc/cpu/mpc85xx/Kconfig | 15 +++++++++++++++ > arch/powerpc/cpu/mpc8xx/Kconfig | 2 ++ > arch/powerpc/include/asm/cache.h | 7 ------- > arch/riscv/Kconfig | 2 ++ Reviewed-by: Rick Chen <rick(a)andestech.com>

1 0

[PATCH] efi_loader: sections with zero VirtualSize
by Heinrich Schuchardt 30 Aug '21

30 Aug '21

In a section header VirtualSize may be zero. This is for instance seen in the .sbat section of shim. In this case use SizeOfRawData as section size. Fixes: 9d30a941cce5 ("efi_loader: don't load beyond VirtualSize") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- lib/efi_loader/efi_image_loader.c | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index a0eb63fceb..838e3a7f02 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -800,6 +800,23 @@ efi_status_t efi_check_pe(void *buffer, size_t size, void **nt_header) return EFI_SUCCESS; } +/** + * section_size() - determine size of section + * + * The size of a section in memory if normally given by VirtualSize. + * If VirtualSize is not provided, use SizeOfRawData. + * + * @sec: section header + * Return: size of section in memory + */ +static u32 section_size(IMAGE_SECTION_HEADER *sec) +{ + if (sec->Misc.VirtualSize) + return sec->Misc.VirtualSize; + else + return sec->SizeOfRawData; +} + /** * efi_load_pe() - relocate EFI binary * @@ -869,8 +886,9 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, /* Calculate upper virtual address boundary */ for (i = num_sections - 1; i >= 0; i--) { IMAGE_SECTION_HEADER *sec = &sections[i]; + virt_size = max_t(unsigned long, virt_size, - sec->VirtualAddress + sec->Misc.VirtualSize); + sec->VirtualAddress + section_size(sec)); } /* Read 32/64bit specific header bits */ @@ -931,11 +949,16 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, /* Load sections into RAM */ for (i = num_sections - 1; i >= 0; i--) { IMAGE_SECTION_HEADER *sec = &sections[i]; - memset(efi_reloc + sec->VirtualAddress, 0, - sec->Misc.VirtualSize); + u32 copy_size = section_size(sec); + + if (copy_size > sec->SizeOfRawData) { + copy_size = sec->SizeOfRawData; + memset(efi_reloc + sec->VirtualAddress, 0, + sec->Misc.VirtualSize); + } memcpy(efi_reloc + sec->VirtualAddress, efi + sec->PointerToRawData, - min(sec->Misc.VirtualSize, sec->SizeOfRawData)); + copy_size); } /* Run through relocations */ -- 2.30.2

2 1

[PATCH 1/1] efi_loader: rounding of image size
by Heinrich Schuchardt 29 Aug '21

29 Aug '21

We should not first allocate memory and then report a rounded up value as image size. Instead first round up according to section allocation and then allocate the memory. Fixes: 82786754b9d2 ("efi_loader: ImageSize must be multiple of SectionAlignment") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- lib/efi_loader/efi_image_loader.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index 62066b72e4..3e63c24b52 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -898,6 +898,7 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, image_base = opt->ImageBase; efi_set_code_and_data_type(loaded_image_info, opt->Subsystem); handle->image_type = opt->Subsystem; + virt_size = ALIGN(virt_size, opt->SectionAlignment); efi_reloc = efi_alloc(virt_size, loaded_image_info->image_code_type); if (!efi_reloc) { @@ -908,12 +909,12 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, handle->entry = efi_reloc + opt->AddressOfEntryPoint; rel_size = opt->DataDirectory[rel_idx].Size; rel = efi_reloc + opt->DataDirectory[rel_idx].VirtualAddress; - virt_size = ALIGN(virt_size, opt->SectionAlignment); } else if (nt->OptionalHeader.Magic == IMAGE_NT_OPTIONAL_HDR32_MAGIC) { IMAGE_OPTIONAL_HEADER32 *opt = &nt->OptionalHeader; image_base = opt->ImageBase; efi_set_code_and_data_type(loaded_image_info, opt->Subsystem); handle->image_type = opt->Subsystem; + virt_size = ALIGN(virt_size, opt->SectionAlignment); efi_reloc = efi_alloc(virt_size, loaded_image_info->image_code_type); if (!efi_reloc) { @@ -924,7 +925,6 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, handle->entry = efi_reloc + opt->AddressOfEntryPoint; rel_size = opt->DataDirectory[rel_idx].Size; rel = efi_reloc + opt->DataDirectory[rel_idx].VirtualAddress; - virt_size = ALIGN(virt_size, opt->SectionAlignment); } else { log_err("Invalid optional header magic %x\n", nt->OptionalHeader.Magic); -- 2.30.2

1 0

imx8mm memory env in U-Boot
by Tim Harvey 28 Aug '21

28 Aug '21

Greetings, I'm trying to understand what the best memory usage is in U-Boot for IMX8M boards for generic distro configs such as: loadaddr, kernel_addr_r, fdt_addr_r, ramdisk_addr, scriptaddr. My understanding is that the following is a good rule of thumb: loadaddr = DDR start + 32MB (as FIT images may load kernel at DDR start; but this only allows for a 32MB kernel) kernel_addr_r = $loadaddr fdt_addr_r = $kernel_addr_r + 128MB (allows you up to 128MB for your kernel; handy if you want a kernel with internal ramdisk) ramdisk_addr = fdt_addr_r + 512KB (512KB should be plenty for a dt) scriptaddr = $loadaddr Looking at the various imx8mm boards upstream they are kind of all over the place but do follow some patterns likely due to some of us just going with what prior boards used. While I'm at it I've encountered a couple other questions: - why on IMX8MM is CONFIG_LOADADDR is 0x40480000 when DDR starts at 0x40000000. Why the 4608KB offset? - what is CONFIG_SYS_INIT_RAM_SIZE? Most boards are setting this to 2MB but a couple (cl-iot-gate/phycore) set it to 512KB - what are people using for the load address for the kernel within FIT images? I expect start of DDR is appropriate (0x40000000) however for whatever reason I've been using 0x40200000. This plays into the env as you can't overlap where you loaded the FIT image with where you told the FIT image to relocate the kernel to. Best regards, Tim

2 3

spmi: msm: add arbiter version 5 support
by Дмитрий Санковский 28 Aug '21

28 Aug '21

>From 47256d6b85f3622cfd1b498d04d0fdda3b713c67 Mon Sep 17 00:00:00 2001 From: Dzmitry Sankouski <dsankouski(a)gmail.com> Date: Sat, 28 Aug 2021 13:53:42 +0300 Subject: [PATCH] spmi: msm: add arbiter version 5 support Signed-off-by: Dzmitry Sankouski <dsankouski(a)gmail.com> --- MAINTAINERS | 1 + drivers/spmi/spmi-msm.c | 154 +++++++++++++++++++++++++++------------- 2 files changed, 107 insertions(+), 48 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 52ddc99cda..6b8b0783d2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -392,6 +392,7 @@ F: drivers/phy/msm8916-usbh-phy.c F: drivers/serial/serial_msm.c F: drivers/serial/serial_msm_geni.c F: drivers/smem/msm_smem.c +F: drivers/spmi/spmi-msm.c F: drivers/usb/host/ehci-msm.c ARM STI diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c index 5a335e50aa..4b14b08313 100644 --- a/drivers/spmi/spmi-msm.c +++ b/drivers/spmi/spmi-msm.c @@ -19,39 +19,63 @@ DECLARE_GLOBAL_DATA_PTR; /* PMIC Arbiter configuration registers */ -#define PMIC_ARB_VERSION 0x0000 -#define PMIC_ARB_VERSION_V2_MIN 0x20010000 - -#define ARB_CHANNEL_OFFSET(n) (0x4 * (n)) -#define SPMI_CH_OFFSET(chnl) ((chnl) * 0x8000) - -#define SPMI_REG_CMD0 0x0 -#define SPMI_REG_CONFIG 0x4 -#define SPMI_REG_STATUS 0x8 -#define SPMI_REG_WDATA 0x10 -#define SPMI_REG_RDATA 0x18 - -#define SPMI_CMD_OPCODE_SHIFT 27 -#define SPMI_CMD_SLAVE_ID_SHIFT 20 -#define SPMI_CMD_ADDR_SHIFT 12 -#define SPMI_CMD_ADDR_OFFSET_SHIFT 4 -#define SPMI_CMD_BYTE_CNT_SHIFT 0 - -#define SPMI_CMD_EXT_REG_WRITE_LONG 0x00 -#define SPMI_CMD_EXT_REG_READ_LONG 0x01 - -#define SPMI_STATUS_DONE 0x1 +#define PMIC_ARB_VERSION 0x0000 +#define PMIC_ARB_VERSION_V2_MIN 0x20010000 +#define PMIC_ARB_VERSION_V3_MIN 0x30000000 +#define PMIC_ARB_VERSION_V5_MIN 0x50000000 + +#define APID_MAP_OFFSET_V1_V2_V3 (0x800) +#define APID_MAP_OFFSET_V5 (0x900) +#define ARB_CHANNEL_OFFSET(n) (0x4 * (n)) +#define SPMI_CH_OFFSET(chnl) ((chnl) * 0x8000) +#define SPMI_V5_OBS_CH_OFFSET(chnl) ((chnl) * 0x80) +#define SPMI_V5_RW_CH_OFFSET(chnl) ((chnl) * 0x10000) + +#define SPMI_REG_CMD0 0x0 +#define SPMI_REG_CONFIG 0x4 +#define SPMI_REG_STATUS 0x8 +#define SPMI_REG_WDATA 0x10 +#define SPMI_REG_RDATA 0x18 + +#define SPMI_CMD_OPCODE_SHIFT 27 +#define SPMI_CMD_SLAVE_ID_SHIFT 20 +#define SPMI_CMD_ADDR_SHIFT 12 +#define SPMI_CMD_ADDR_OFFSET_SHIFT 4 +#define SPMI_CMD_BYTE_CNT_SHIFT 0 + +#define SPMI_CMD_EXT_REG_WRITE_LONG 0x00 +#define SPMI_CMD_EXT_REG_READ_LONG 0x01 + +#define SPMI_STATUS_DONE 0x1 + +#define SPMI_MAX_CHANNELS 128 +#define SPMI_MAX_SLAVES 16 +#define SPMI_MAX_PERIPH 256 + +enum arb_ver { + V1 = 1, + V2, + V3, + V5 = 5 +}; -#define SPMI_MAX_CHANNELS 128 -#define SPMI_MAX_SLAVES 16 -#define SPMI_MAX_PERIPH 256 +/* + * PMIC arbiter version 5 uses different register offsets for read/write vs + * observer channels. + */ +enum pmic_arb_channel { + PMIC_ARB_CHANNEL_RW, + PMIC_ARB_CHANNEL_OBS, +}; struct msm_spmi_priv { - phys_addr_t arb_chnl; /* ARB channel mapping base */ + phys_addr_t arb_chnl; /* ARB channel mapping base */ phys_addr_t spmi_core; /* SPMI core */ - phys_addr_t spmi_obs; /* SPMI observer */ + phys_addr_t spmi_obs; /* SPMI observer */ /* SPMI channel map */ uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH]; + /* SPMI bus arbiter version */ + u32 arb_ver; }; static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, @@ -59,6 +83,7 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, { struct msm_spmi_priv *priv = dev_get_priv(dev); unsigned channel; + unsigned int ch_offset; uint32_t reg = 0; if (usid >= SPMI_MAX_SLAVES) @@ -69,8 +94,8 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, channel = priv->channel_map[usid][pid]; /* Disable IRQ mode for the current channel*/ - writel(0x0, priv->spmi_core + SPMI_CH_OFFSET(channel) + - SPMI_REG_CONFIG); + writel(0x0, + priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG); /* Write single byte */ writel(val, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA); @@ -82,6 +107,12 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, reg |= (off << SPMI_CMD_ADDR_OFFSET_SHIFT); reg |= 1; /* byte count */ + if (priv->arb_ver == V5) { + ch_offset = SPMI_V5_RW_CH_OFFSET(channel); + } else { + ch_offset = SPMI_CH_OFFSET(channel); + } + /* Send write command */ writel(reg, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0); @@ -104,6 +135,7 @@ static int msm_spmi_read(struct udevice *dev, int usid, int pid, int off) { struct msm_spmi_priv *priv = dev_get_priv(dev); unsigned channel; + unsigned int ch_offset; uint32_t reg = 0; if (usid >= SPMI_MAX_SLAVES) @@ -113,8 +145,14 @@ static int msm_spmi_read(struct udevice *dev, int usid, int pid, int off) channel = priv->channel_map[usid][pid]; + if (priv->arb_ver == V5) { + ch_offset = SPMI_V5_OBS_CH_OFFSET(channel); + } else { + ch_offset = SPMI_CH_OFFSET(channel); + } + /* Disable IRQ mode for the current channel*/ - writel(0x0, priv->spmi_obs + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG); + writel(0x0, priv->spmi_obs + ch_offset + SPMI_REG_CONFIG); /* Prepare read command */ reg |= SPMI_CMD_EXT_REG_READ_LONG << SPMI_CMD_OPCODE_SHIFT; @@ -124,13 +162,12 @@ static int msm_spmi_read(struct udevice *dev, int usid, int pid, int off) reg |= 1; /* byte count */ /* Request read */ - writel(reg, priv->spmi_obs + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0); + writel(reg, priv->spmi_obs + ch_offset + SPMI_REG_CMD0); /* Wait till CMD DONE status */ reg = 0; while (!reg) { - reg = readl(priv->spmi_obs + SPMI_CH_OFFSET(channel) + - SPMI_REG_STATUS); + reg = readl(priv->spmi_obs + ch_offset + SPMI_REG_STATUS); } if (reg ^ SPMI_STATUS_DONE) { @@ -139,8 +176,8 @@ static int msm_spmi_read(struct udevice *dev, int usid, int pid, int off) } /* Read the data */ - return readl(priv->spmi_obs + SPMI_CH_OFFSET(channel) + - SPMI_REG_RDATA) & 0xFF; + return readl(priv->spmi_obs + ch_offset + + SPMI_REG_RDATA) & 0xFF; } static struct dm_spmi_ops msm_spmi_ops = { @@ -153,28 +190,49 @@ static int msm_spmi_probe(struct udevice *dev) struct udevice *parent = dev->parent; struct msm_spmi_priv *priv = dev_get_priv(dev); int node = dev_of_offset(dev); + u32 config_addr; u32 hw_ver; - bool is_v1; + u32 version; int i; + int err; + + config_addr = dev_read_addr_index(dev, 0); + priv->spmi_core = dev_read_addr_index(dev, 1); + priv->spmi_obs = dev_read_addr_index(dev, 2); + + hw_ver = readl(config_addr + PMIC_ARB_VERSION); + + if (hw_ver < PMIC_ARB_VERSION_V3_MIN) { + priv->arb_ver = V2; + version = 2; + priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3; + } else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) { + priv->arb_ver = V3; + version = 3; + priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3; + } else { + priv->arb_ver = V5; + version = 5; + priv->arb_chnl = config_addr + APID_MAP_OFFSET_V5; + + if (err) { + dev_err(dev, "could not read APID->PPID mapping table, rc= %d\n", err); + return -1; + } + } - priv->arb_chnl = dev_read_addr(dev); - priv->spmi_core = fdtdec_get_addr_size_auto_parent(gd->fdt_blob, - dev_of_offset(parent), node, "reg", 1, NULL, false); - priv->spmi_obs = fdtdec_get_addr_size_auto_parent(gd->fdt_blob, - dev_of_offset(parent), node, "reg", 2, NULL, false); - - hw_ver = readl(priv->arb_chnl + PMIC_ARB_VERSION - 0x800); - is_v1 = (hw_ver < PMIC_ARB_VERSION_V2_MIN); - - dev_dbg(dev, "PMIC Arb Version-%d (0x%x)\n", (is_v1 ? 1 : 2), hw_ver); + dev_dbg(dev, "PMIC Arb Version-%d (0x%x)\n", version, hw_ver); if (priv->arb_chnl == FDT_ADDR_T_NONE || priv->spmi_core == FDT_ADDR_T_NONE || priv->spmi_obs == FDT_ADDR_T_NONE) return -EINVAL; + dev_dbg(dev, "priv->arb_chnl address (0x%x)\n", priv->arb_chnl); + dev_dbg(dev, "priv->spmi_core address (0x%x)\n", priv->spmi_core); + dev_dbg(dev, "priv->spmi_obs address (0x%x)\n", priv->spmi_obs); /* Scan peripherals connected to each SPMI channel */ - for (i = 0; i < SPMI_MAX_PERIPH ; i++) { + for (i = 0; i < SPMI_MAX_PERIPH; i++) { uint32_t periph = readl(priv->arb_chnl + ARB_CHANNEL_OFFSET(i)); uint8_t slave_id = (periph & 0xf0000) >> 16; uint8_t pid = (periph & 0xff00) >> 8; @@ -195,5 +253,5 @@ U_BOOT_DRIVER(msm_spmi) = { .of_match = msm_spmi_ids, .ops = &msm_spmi_ops, .probe = msm_spmi_probe, - .priv_auto = sizeof(struct msm_spmi_priv), + .priv_auto = sizeof(struct msm_spmi_priv), }; -- 2.20.1

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[PATCH] Kconfig: Don't use RSA_FREESCALE_EXP on MX7ULP
by Oleksandr Suvorov 28 Aug '21

28 Aug '21

From: Ricardo Salveti <ricardo(a)foundries.io> The CAAM on IMX7ULP doesn't support public key hardware acceleration (PKHA), as in other NXP parts. Disable RSA_FREESCALE_EXP for IMX7ULP too. Fixed: f4e9ff7135 ("Kconfig: Don't use RSA_FREESCALE_EXP on IMX") Signed-off-by: Ricardo Salveti <ricardo(a)foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov(a)foundries.io> --- lib/rsa/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/rsa/Kconfig b/lib/rsa/Kconfig index a90d67e5a8..55e17596f0 100644 --- a/lib/rsa/Kconfig +++ b/lib/rsa/Kconfig @@ -1,6 +1,6 @@ config RSA bool "Use RSA Library" - select RSA_FREESCALE_EXP if FSL_CAAM && !ARCH_MX7 && !ARCH_MX6 && !ARCH_MX5 + select RSA_FREESCALE_EXP if FSL_CAAM && !ARCH_MX7 && !ARCH_MX7ULP && !ARCH_MX6 && !ARCH_MX5 select RSA_SOFTWARE_EXP if !RSA_FREESCALE_EXP help RSA support. This enables the RSA algorithm used for FIT image -- 2.31.1

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[PATCH 0/2] drivers: mmc: Add wait_dat0 support for more devices
by stcarlso＠linux.microsoft.com 28 Aug '21

28 Aug '21

From: Stephen Carlson <stcarlso(a)linux.microsoft.com> This patch adds eMMC driver support for polling the DAT0 data connection on the Freescale LX devices and SDHCI compatible devices. Polling until the card reports it is no longer busy increases eMMC driver performance over the default behavior, which is to wait for the worst case timeout specified by the card upon each mmc_switch operation. This change has been tested on the Broadcom NS3 series (SDHCI) and LX2160A series (Freescale/NXP eSDHC). U-Boot boot time savings depend on the eMMC memory used, but can range from 100 to 500 ms or more. Stephen Carlson (2): drivers: mmc: Add wait_dat0 support for Freescale eSDHC driver drivers: mmc: Add wait_dat0 support for sdhci driver drivers/mmc/fsl_esdhc.c | 16 ++++++++++++++++ drivers/mmc/sdhci.c | 20 ++++++++++++++++++++ include/sdhci.h | 2 ++ 3 files changed, 38 insertions(+) -- 2.17.1

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[PATCH 1/2] mmc: fix switch issue with send_status disabled
by Ye Li 28 Aug '21

28 Aug '21

When send_status is false or wait_dat0 is not supported, the switch function should not send CMD13 but directly return. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- drivers/mmc/mmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 8078a89..a1fd533 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -823,7 +823,7 @@ static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value, * capable of polling by using mmc_wait_dat0, then rely on waiting the * stated timeout to be sufficient. */ - if (ret == -ENOSYS && !send_status) { + if (ret == -ENOSYS || !send_status) { mdelay(timeout_ms); return 0; } -- 2.7.4

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