September 2020 - U-Boot

[PATCH v2 2/2] mips: dts: Fix PIC32MZDA GPIO register definitions
by John Robertson 19 Sep '20

19 Sep '20

The GPIO bank name for banks J and K are not correct when using the 'gpio' command from the console. The driver derives the bank name from the device tree instance string by using the instance value and adding 'A': gpio0@xxaddrxx is Bank A, gpio1@yyaddryy is Bank B and so on. On the PIC32, there is no Bank I so instances 8 and 9 need to be incremented as a minimum change. An alternative (less opaque) implementation would be to use a bank-name property instead but this would require modifying the driver code too. Signed-off-by: John Robertson <john.robertson(a)simiatec.com> --- arch/mips/dts/pic32mzda.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/dts/pic32mzda.dtsi b/arch/mips/dts/pic32mzda.dtsi index 8f9b4cc50e..2c2b7293d8 100644 --- a/arch/mips/dts/pic32mzda.dtsi +++ b/arch/mips/dts/pic32mzda.dtsi @@ -134,14 +134,14 @@ #gpio-cells = <2>; }; - gpioJ: gpio8@1f860800 { + gpioJ: gpio9@1f860800 { compatible = "microchip,pic32mzda-gpio"; reg = <0x1f860800 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioK: gpio9@1f860900 { + gpioK: gpio10@1f860900 { compatible = "microchip,pic32mzda-gpio"; reg = <0x1f860900 0xe0>; gpio-controller; -- 2.28.0

2 1

[PATCH v2 1/2] mips: dts: Fix PIC32MZDA GPIO register definitions
by John Robertson 19 Sep '20

19 Sep '20

GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or using the 'gpio' command from the console. The root cause is a discrepancy between the driver and the device tree: the driver code expects an absolute I/O address in the <reg> property, while the device tree defines the address relative to a declaration in the parent pinctrl node. Changing the device tree to fix a driver issue would normally be wrong, however: - I have run the first version of U-Boot in which this driver appears (v2016.03) and the same problem exists, so this is not a regression; - There is no code that references a parent device tree node that might suggest the intent of the author was to parse the DT as it exists now; - The equivalent Linux PIC32 GPIO driver also uses absolute addresses for the GPIO <reg> property. This change brings the U-Boot DT more into line with Linux. Additionally, the data sheet (Microchip ref. 60001361H) shows that the register set to control a GPIO bank spans 0xE0 bytes, but the device tree specified size is only 0x48 bytes. Signed-off-by: John Robertson <john.robertson(a)simiatec.com> --- Changes in v2 - Split patch - Document change more fully arch/mips/dts/pic32mzda.dtsi | 45 ++++++++++++++++++------------------ 1 file changed, 22 insertions(+), 23 deletions(-) diff --git a/arch/mips/dts/pic32mzda.dtsi b/arch/mips/dts/pic32mzda.dtsi index 4c8b7a9a0b..8f9b4cc50e 100644 --- a/arch/mips/dts/pic32mzda.dtsi +++ b/arch/mips/dts/pic32mzda.dtsi @@ -69,6 +69,8 @@ }; pinctrl: pinctrl@1f801400 { + #address-cells = <1>; + #size-cells = <1>; compatible = "microchip,pic32mzda-pinctrl"; reg = <0x1f801400 0x100>, /* in */ <0x1f801500 0x200>, /* out */ @@ -76,75 +78,72 @@ reg-names = "ppsin","ppsout","port"; status = "disabled"; - ranges = <0 0x1f860000 0xa00>; - #address-cells = <1>; - #size-cells = <1>; - gpioA: gpio0@0 { + gpioA: gpio0@1f860000 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x000 0x48>; + reg = <0x1f860000 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioB: gpio1@100 { + gpioB: gpio1@1f860100 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x100 0x48>; + reg = <0x1f860100 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioC: gpio2@200 { + gpioC: gpio2@1f860200 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x200 0x48>; + reg = <0x1f860200 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioD: gpio3@300 { + gpioD: gpio3@1f860300 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x300 0x48>; + reg = <0x1f860300 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioE: gpio4@400 { + gpioE: gpio4@1f860400 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x400 0x48>; + reg = <0x1f860400 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioF: gpio5@500 { + gpioF: gpio5@1f860500 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x500 0x48>; + reg = <0x1f860500 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioG: gpio6@600 { + gpioG: gpio6@1f860600 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x600 0x48>; + reg = <0x1f860600 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioH: gpio7@700 { + gpioH: gpio7@1f860700 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x700 0x48>; + reg = <0x1f860700 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioJ: gpio8@800 { + gpioJ: gpio8@1f860800 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x800 0x48>; + reg = <0x1f860800 0xe0>; gpio-controller; #gpio-cells = <2>; }; - gpioK: gpio9@900 { + gpioK: gpio9@1f860900 { compatible = "microchip,pic32mzda-gpio"; - reg = <0x900 0x48>; + reg = <0x1f860900 0xe0>; gpio-controller; #gpio-cells = <2>; }; -- 2.28.0

2 1

[PATCH] mips: dts: Fix device tree warnings for PIC32MZDA
by John Robertson 19 Sep '20

19 Sep '20

Signed-off-by: John Robertson <john.robertson(a)simiatec.com> --- arch/mips/dts/pic32mzda.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/mips/dts/pic32mzda.dtsi b/arch/mips/dts/pic32mzda.dtsi index 4c8b7a9a0b..8aff9eb812 100644 --- a/arch/mips/dts/pic32mzda.dtsi +++ b/arch/mips/dts/pic32mzda.dtsi @@ -26,8 +26,13 @@ }; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { compatible = "mips,mips14kc"; + device-type = "cpu"; + reg = <0>; }; }; @@ -40,6 +45,7 @@ uart1: serial@1f822000 { compatible = "microchip,pic32mzda-uart"; reg = <0x1f822000 0x50>; + interrupt-parent = <&evic>; interrupts = <112 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; clocks = <&clock PB2CLK>; @@ -48,6 +54,7 @@ uart2: serial@1f822200 { compatible = "microchip,pic32mzda-uart"; reg = <0x1f822200 0x50>; + interrupt-parent = <&evic>; interrupts = <145 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock PB2CLK>; status = "disabled"; @@ -56,6 +63,7 @@ uart6: serial@1f822a00 { compatible = "microchip,pic32mzda-uart"; reg = <0x1f822a00 0x50>; + interrupt-parent = <&evic>; interrupts = <188 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock PB2CLK>; status = "disabled"; @@ -153,6 +161,7 @@ sdhci: sdhci@1f8ec000 { compatible = "microchip,pic32mzda-sdhci"; reg = <0x1f8ec000 0x100>; + interrupt-parent = <&evic>; interrupts = <191 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock REF4CLK>, <&clock PB5CLK>; clock-names = "base_clk", "sys_clk"; @@ -164,6 +173,7 @@ ethernet: ethernet@1f882000 { compatible = "microchip,pic32mzda-eth"; reg = <0x1f882000 0x1000>; + interrupt-parent = <&evic>; interrupts = <153 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock PB5CLK>; status = "disabled"; @@ -176,6 +186,7 @@ reg = <0x1f8e3000 0x1000>, <0x1f884000 0x1000>; reg-names = "mc", "control"; + interrupt-parent = <&evic>; interrupts = <132 IRQ_TYPE_EDGE_RISING>, <133 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock PB5CLK>; -- 2.28.0

2 1

[PATCH v3 4/4] mmc: pic32: Refresh PIC32 MMC driver
by John Robertson 19 Sep '20

19 Sep '20

CONFIG_BLK needs to be enabled by default to allow U-Boot to compile after a 'make pic32mzdask_defconfig'. Signed-off-by: John Robertson <john.robertson(a)simiatec.com> --- Changes in v3 - address review comment from Daniel Schwierzeck - This file should have been generated by 'make savedefconfig' rather than being manually edited configs/pic32mzdask_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index 7bf61e2d8d..6ff1ee3489 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -27,7 +27,6 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_EFI_PARTITION is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -# CONFIG_BLK is not set CONFIG_CLK=y CONFIG_MMC=y CONFIG_DM_MMC=y -- 2.28.0

2 1

[PATCH v3 3/4] mmc: pic32: Refresh PIC32 MMC driver
by John Robertson 19 Sep '20

19 Sep '20

The PIC32MZ DA Starter Kit does not need the card detect workaround because the SDCD signal line is connected properly. Disable the workaround in this case. Signed-off-by: John Robertson <john.robertson(a)simiatec.com> --- arch/mips/dts/pic32mzda_sk.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/dts/pic32mzda_sk.dts b/arch/mips/dts/pic32mzda_sk.dts index b3c916a6db..fc86154e0a 100644 --- a/arch/mips/dts/pic32mzda_sk.dts +++ b/arch/mips/dts/pic32mzda_sk.dts @@ -40,6 +40,7 @@ }; &sdhci { + microchip,use-sdcd; status = "okay"; }; -- 2.28.0

2 1

[PATCH v3 2/4] mmc: pic32: Refresh PIC32 MMC driver
by John Robertson 19 Sep '20

19 Sep '20

The GPIO pins used by the SDHCI controller need to be configured to allow the interface to work. Signed-off-by: John Robertson <john.robertson(a)simiatec.com> --- drivers/pinctrl/pinctrl_pic32.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/pinctrl/pinctrl_pic32.c b/drivers/pinctrl/pinctrl_pic32.c index 911af1297b..899c279975 100644 --- a/drivers/pinctrl/pinctrl_pic32.c +++ b/drivers/pinctrl/pinctrl_pic32.c @@ -222,6 +222,31 @@ static void pic32_eth_pin_config(struct udevice *dev) pic32_pinconfig_set(priv, configs, ARRAY_SIZE(configs)); } +static void pic32_sdhci_pin_config(struct udevice *dev) +{ + struct pic32_pinctrl_priv *priv = dev_get_priv(dev); + const struct pic32_pin_config configs[] = { + /* SDWP - H2 */ + PIN_CONFIG(PIC32_PORT_H, 2, PIN_CONFIG_PIC32_DIGITAL), + /* SDCD - A0 */ + PIN_CONFIG(PIC32_PORT_A, 0, PIN_CONFIG_PIC32_DIGITAL), + /* SDCMD - D4 */ + PIN_CONFIG(PIC32_PORT_D, 4, PIN_CONFIG_PIC32_DIGITAL), + /* SDCK - A6 */ + PIN_CONFIG(PIC32_PORT_A, 6, PIN_CONFIG_PIC32_DIGITAL), + /* SDDATA0 - G13 */ + PIN_CONFIG(PIC32_PORT_G, 13, PIN_CONFIG_PIC32_DIGITAL), + /* SDDATA1 - G12 */ + PIN_CONFIG(PIC32_PORT_G, 12, PIN_CONFIG_PIC32_DIGITAL), + /* SDDATA2 - G14 */ + PIN_CONFIG(PIC32_PORT_G, 14, PIN_CONFIG_PIC32_DIGITAL), + /* SDDATA3 - A7 */ + PIN_CONFIG(PIC32_PORT_A, 7, PIN_CONFIG_PIC32_DIGITAL), + }; + + pic32_pinconfig_set(priv, configs, ARRAY_SIZE(configs)); +} + static int pic32_pinctrl_request(struct udevice *dev, int func, int flags) { struct pic32_pinctrl_priv *priv = dev_get_priv(dev); @@ -240,6 +265,9 @@ static int pic32_pinctrl_request(struct udevice *dev, int func, int flags) case PERIPH_ID_ETH: pic32_eth_pin_config(dev); break; + case PERIPH_ID_SDHCI: + pic32_sdhci_pin_config(dev); + break; default: debug("%s: unknown-unhandled case\n", __func__); break; -- 2.28.0

2 1

[PATCH v3 1/4] mmc: pic32: Refresh PIC32 MMC driver
by John Robertson 19 Sep '20

19 Sep '20

The existing driver is not compatible with the Driver Model. This patch makes the necessary changes while also removing obsolescent calls/properties as follows: - fdtdec_* calls replaced with dev_read_* equivalents; - 'clock-freq-min-max' property replaced by querying the frequency of the source clock 'base_clk'; - The card detect erratum workaround is applied during probe rather than overriding get_cd. The card detect workaround (Microchip ref. DS80000736E, erratum #15) is not always needed and can be disabled using a vendor specific DT property. Signed-off-by: John Robertson <john.robertson(a)simiatec.com> --- Changes in v3 - address review comments from Daniel Schwierzeck - Remove <common.h>, DECLARE_GLOBAL_DATA_PTR not required by dev_* API - Replace dev_read_addr_size() + ioremap() with dev_remap_addr() drivers/mmc/pic32_sdhci.c | 86 +++++++++++++++++++++++---------------- 1 file changed, 50 insertions(+), 36 deletions(-) diff --git a/drivers/mmc/pic32_sdhci.c b/drivers/mmc/pic32_sdhci.c index 029e0fbc2b..e201bdb8f4 100644 --- a/drivers/mmc/pic32_sdhci.c +++ b/drivers/mmc/pic32_sdhci.c @@ -6,65 +6,76 @@ * Andrei Pistirica <andrei.pistirica(a)microchip.com> */ -#include <common.h> #include <dm.h> #include <sdhci.h> -#include <linux/errno.h> -#include <mach/pic32.h> +#include <clk.h> -DECLARE_GLOBAL_DATA_PTR; - -static int pic32_sdhci_get_cd(struct sdhci_host *host) -{ - /* PIC32 SDHCI CD errata: - * - set CD_TEST and clear CD_TEST_INS bit - */ - sdhci_writeb(host, SDHCI_CTRL_CD_TEST, SDHCI_HOST_CONTROL); - - return 0; -} - -static const struct sdhci_ops pic32_sdhci_ops = { - .get_cd = pic32_sdhci_get_cd, +struct pic32_sdhci_plat { + struct mmc_config cfg; + struct mmc mmc; }; static int pic32_sdhci_probe(struct udevice *dev) { + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct pic32_sdhci_plat *plat = dev_get_platdata(dev); struct sdhci_host *host = dev_get_priv(dev); - const void *fdt = gd->fdt_blob; - u32 f_min_max[2]; - fdt_addr_t addr; - fdt_size_t size; + + struct clk clk; + ulong clk_rate; int ret; - addr = fdtdec_get_addr_size(fdt, dev_of_offset(dev), "reg", &size); - if (addr == FDT_ADDR_T_NONE) + ret = clk_get_by_name(dev, "base_clk", &clk); + if (ret) + return ret; + + clk_rate = clk_get_rate(&clk); + clk_free(&clk); + + if (IS_ERR_VALUE(clk_rate)) + return clk_rate; + + host->ioaddr = dev_remap_addr(dev); + + if (!host->ioaddr) return -EINVAL; - host->ioaddr = ioremap(addr, size); host->name = dev->name; host->quirks = SDHCI_QUIRK_NO_HISPD_BIT; - host->bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "bus-width", 4); - host->ops = &pic32_sdhci_ops; - - ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), - "clock-freq-min-max", f_min_max, 2); - if (ret) { - printf("sdhci: clock-freq-min-max not found\n"); + host->bus_width = dev_read_u32_default(dev, "bus-width", 4); + host->max_clk = clk_rate; + + host->mmc = &plat->mmc; + host->mmc->dev = dev; + + ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0); + if (ret) return ret; - } - host->max_clk = f_min_max[1]; + host->mmc->priv = host; + upriv->mmc = host->mmc; - ret = add_sdhci(host, 0, f_min_max[0]); + ret = sdhci_probe(dev); if (ret) return ret; - host->mmc->dev = dev; + + if (!dev_read_bool(dev, "microchip,use-sdcd")) { + // Use workaround 1 for erratum #15 by default + u8 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); + ctrl = (ctrl & ~SDHCI_CTRL_CD_TEST_INS) | SDHCI_CTRL_CD_TEST; + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); + } return 0; } +static int pic32_sdhci_bind(struct udevice *dev) +{ + struct pic32_sdhci_plat *plat = dev_get_platdata(dev); + + return sdhci_bind(dev, &plat->mmc, &plat->cfg); +} + static const struct udevice_id pic32_sdhci_ids[] = { { .compatible = "microchip,pic32mzda-sdhci" }, { } @@ -74,6 +85,9 @@ U_BOOT_DRIVER(pic32_sdhci_drv) = { .name = "pic32_sdhci", .id = UCLASS_MMC, .of_match = pic32_sdhci_ids, + .ops = &sdhci_ops, + .bind = pic32_sdhci_bind, .probe = pic32_sdhci_probe, .priv_auto_alloc_size = sizeof(struct sdhci_host), + .platdata_auto_alloc_size = sizeof(struct pic32_sdhci_plat) }; -- 2.28.0

2 1

[PATCH 1/4] cmd: mem: Correctly count the errors in mtest
by Stefan Roese 19 Sep '20

19 Sep '20

This patch changes mtest to correctly count the overall errors and print them even in the abort (Ctrl-C) case. Signed-off-by: Stefan Roese <sr(a)denx.de> --- cmd/mem.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/cmd/mem.c b/cmd/mem.c index 6d54f19527..9367278aa8 100644 --- a/cmd/mem.c +++ b/cmd/mem.c @@ -871,7 +871,7 @@ static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc, ulong start, end; vu_long *buf, *dummy; ulong iteration_limit = 0; - int ret; + ulong count = 0; ulong errs = 0; /* number of errors, or -1 if interrupted */ ulong pattern = 0; int iteration; @@ -929,6 +929,7 @@ static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc, } if (errs == -1UL) break; + count += errs; } /* @@ -947,14 +948,10 @@ static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc, if (errs == -1UL) { /* Memory test was aborted - write a newline to finish off */ putc('\n'); - ret = 1; - } else { - printf("Tested %d iteration(s) with %lu errors.\n", - iteration, errs); - ret = errs != 0; } + printf("Tested %d iteration(s) with %lu errors.\n", iteration, count); - return ret; + return errs != 0; } #endif /* CONFIG_CMD_MEMTEST */ -- 2.25.1

3 24

[PATCH] dm: arm: bcmstb: Enable driver model for Ethernet drivers
by Thomas Fitzsimmons 19 Sep '20

19 Sep '20

Eliminate the Driver Model migration warning for the bcm7260 and bcm7445 ports (though neither port has Ethernet support yet). Signed-off-by: Thomas Fitzsimmons <fitzsim(a)fitzsim.org> --- configs/bcm7260_defconfig | 1 + configs/bcm7445_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index f25659db48..47157f04eb 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -31,4 +31,5 @@ CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCMSTB=y CONFIG_MTD=y +CONFIG_DM_ETH=y # CONFIG_EFI_LOADER is not set diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 18d31048ff..0f80e309ab 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -33,6 +33,7 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCMSTB=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_DM_ETH=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_BCMSTB_SPI=y -- 2.26.0.rc2

2 4

[PATCH] fs/squashfs: Fix Coverity Scan defects
by Joao Marcos Costa 19 Sep '20

19 Sep '20

Fix control flow issues and null pointer dereferences. Signed-off-by: Joao Marcos Costa <jmcosta944(a)gmail.com> --- fs/squashfs/sqfs.c | 20 +++++++++++++------- fs/squashfs/sqfs_dir.c | 3 +-- fs/squashfs/sqfs_inode.c | 5 ++++- 3 files changed, 18 insertions(+), 10 deletions(-) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index f67f7c4a40..15208b4dab 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -154,7 +154,7 @@ static int sqfs_frag_lookup(u32 inode_fragment_index, header = get_unaligned_le16(metadata_buffer + table_offset); metadata = metadata_buffer + table_offset + SQFS_HEADER_SIZE; - if (!metadata) { + if (!metadata || !header) { ret = -ENOMEM; goto free_buffer; } @@ -434,9 +434,9 @@ static int sqfs_search_dir(struct squashfs_dir_stream *dirs, char **token_list, { struct squashfs_super_block *sblk = ctxt.sblk; char *path, *target, **sym_tokens, *res, *rem; - struct squashfs_ldir_inode *ldir = NULL; int j, ret, new_inode_number, offset; struct squashfs_symlink_inode *sym; + struct squashfs_ldir_inode *ldir; struct squashfs_dir_inode *dir; struct fs_dir_stream *dirsp; struct fs_dirent *dent; @@ -448,8 +448,8 @@ static int sqfs_search_dir(struct squashfs_dir_stream *dirs, char **token_list, table = sqfs_find_inode(dirs->inode_table, le32_to_cpu(sblk->inodes), sblk->inodes, sblk->block_size); - /* root is a regular directory, not an extended one */ dir = (struct squashfs_dir_inode *)table; + ldir = (struct squashfs_ldir_inode *)table; /* get directory offset in directory table */ offset = sqfs_dir_offset(table, m_list, m_count); @@ -1146,7 +1146,10 @@ static int sqfs_get_regfile_info(struct squashfs_reg_inode *reg, finfo->start = get_unaligned_le32(&reg->start_block); finfo->frag = SQFS_IS_FRAGMENTED(get_unaligned_le32(&reg->fragment)); - if (finfo->size < 1 || finfo->offset < 0 || finfo->start < 0) + if (finfo->frag && finfo->offset == 0xFFFFFFFF) + return -EINVAL; + + if (finfo->size < 1 || finfo->start == 0xFFFFFFFF) return -EINVAL; if (finfo->frag) { @@ -1156,7 +1159,7 @@ static int sqfs_get_regfile_info(struct squashfs_reg_inode *reg, if (ret < 0) return -EINVAL; finfo->comp = true; - if (fentry->size < 1 || fentry->start < 0) + if (fentry->size < 1 || fentry->start == 0x7FFFFFFF) return -EINVAL; } else { datablk_count = DIV_ROUND_UP(finfo->size, le32_to_cpu(blksz)); @@ -1181,7 +1184,10 @@ static int sqfs_get_lregfile_info(struct squashfs_lreg_inode *lreg, finfo->start = get_unaligned_le64(&lreg->start_block); finfo->frag = SQFS_IS_FRAGMENTED(get_unaligned_le32(&lreg->fragment)); - if (finfo->size < 1 || finfo->offset < 0 || finfo->start < 0) + if (finfo->frag && finfo->offset == 0xFFFFFFFF) + return -EINVAL; + + if (finfo->size < 1 || finfo->start == 0x7FFFFFFF) return -EINVAL; if (finfo->frag) { @@ -1191,7 +1197,7 @@ static int sqfs_get_lregfile_info(struct squashfs_lreg_inode *lreg, if (ret < 0) return -EINVAL; finfo->comp = true; - if (fentry->size < 1 || fentry->start < 0) + if (fentry->size < 1 || fentry->start == 0x7FFFFFFF) return -EINVAL; } else { datablk_count = DIV_ROUND_UP(finfo->size, le32_to_cpu(blksz)); diff --git a/fs/squashfs/sqfs_dir.c b/fs/squashfs/sqfs_dir.c index 00d2891e7d..a265b98fe6 100644 --- a/fs/squashfs/sqfs_dir.c +++ b/fs/squashfs/sqfs_dir.c @@ -34,8 +34,7 @@ int sqfs_dir_offset(void *dir_i, u32 *m_list, int m_count) struct squashfs_ldir_inode *ldir; struct squashfs_dir_inode *dir; u32 start_block; - u16 offset; - int j; + int j, offset; switch (get_unaligned_le16(&base->inode_type)) { case SQFS_DIR_TYPE: diff --git a/fs/squashfs/sqfs_inode.c b/fs/squashfs/sqfs_inode.c index 1387779a85..1368f3063c 100644 --- a/fs/squashfs/sqfs_inode.c +++ b/fs/squashfs/sqfs_inode.c @@ -142,8 +142,11 @@ int sqfs_read_metablock(unsigned char *file_mapping, int offset, u16 header; data = file_mapping + offset; + if (!data) + return -EFAULT; + header = get_unaligned((u16 *)data); - if (!header || !data) + if (!header) return -EINVAL; *compressed = SQFS_COMPRESSED_METADATA(header); -- 2.17.1

2 2