July 2020 - U-Boot

QSPI mode on imx6ull evk
by Matthias Weißer 22 Jul '20

22 Jul '20

Hi I currently try to get the QSPI flash on the imx6ull evk working in quad mode. This attempt fails as when spi_child_post_bind is called there seems to be no spi child in the udevice (spi@21e0000) which then leads to spi_slave_ofdata_to_platdata not called and the according definitions in the device tree (like spi-rx-bus-width) are not parsed. I am using plain v2020.07 without any modifications on the MCIMX6ULL-EVK. mx6ull_14x14_evk_defconfig was the config I used. I tried to CC some of the people involved in the development of the affected parts of u-boot. Please correct me if I am wrong. Any help would be appreciated. Regards Matthias

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[PATCH 0/6] mx6cuboxi: enable OF_PLATDATA with MMC support
by Walter Lozano 22 Jul '20

22 Jul '20

The SPL in iMX6 boards is restricted to 68 KB as this is the free available space in OCRAM for most revisions. In this context, adding OF_CONTROL and DM increases the SPL size which could make it difficult to add specific features required for custom scenarios. These patches aim to take advantage of OF_PLATADATA in order to reduce the SPL size in this scenario, by parsing DT data to generate platdata structures, and thus removing the overhead caused by DT and related libraries. This series is focused in MMC driver, which is used for boot in boards such as Cubox-i. Also, in order to support CD, the OF_PLATDATA support is also implemented on GPIO driver. Walter Lozano (6): mmc: fsl_esdhc_imx: rename driver name to match ll_entry mmc: fsl_esdhc_imx: add OF_PLATDATA support gpio: mxc_gpio: add OF_PLATDATA support mmc: fsl_esdhc_imx: add CD support when OF_PLATDATA is enabled drivers: rename more drivers to match compatible string mx6cuboxi: enable OF_PLATDATA configs/mx6cuboxi_defconfig | 1 + drivers/gpio/mxc_gpio.c | 18 +++++- drivers/mmc/fsl_esdhc_imx.c | 94 +++++++++++++++++++++++++----- drivers/pinctrl/nxp/pinctrl-imx6.c | 6 +- drivers/video/imx/mxc_ipuv3_fb.c | 4 +- 5 files changed, 103 insertions(+), 20 deletions(-) -- 2.20.1

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[PATCH v2 00/12] rockchip: ROCKPi N8/N10 hardware enablement
by Jagan Teki 22 Jul '20

22 Jul '20

Series enable hardware enablement on ROCKPi N8/N10 boards. - USB 3.0 Host - USB 2.0 Host - USB 3.0 Gadget - USB 2.0 Gadget - HDMI Out - PCIe Note: dts patches are Synced from linux-next and few from mailing list. Jagan Teki (8): ARM: dts: rockchip: Sync ROCKPi N8/N10 dts(i) from Linux ARM: dts: rockchip: Add usb host0 ohci node for rk3288 ARM: dts: rockchip: Add USB for RockPI N8/N10 arm: dts: rockchip: Add HDMI out for RockPI N8/N10 arm64: dts: rockchip: Add PCIe for RockPI N10 rockchip: rock-pi-n10: Enable PCI/NVME arm64: dts: rockchip: Add u-boot,spl-boot-order for ROCKPi N10 rockchip: rock-p-n8/n10: Disable RAM_ROCKCHIP_DEBUG Suniel Mahesh (4): arm: dts: rockchip: Sync rk3288 dtsi from linux rockchip: rock-pi-n10: Enable on board devices rockchip: evb_rk3288: Add console settings rockchip: rock-pi-n8: Enable on board devices arch/arm/dts/rk3288-rock-pi-n8.dts | 2 +- arch/arm/dts/rk3288-vmarc-som.dtsi | 132 +++++++----- arch/arm/dts/rk3288.dtsi | 17 +- .../arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi | 6 + arch/arm/dts/rk3399pro-rock-pi-n10.dts | 6 +- arch/arm/dts/rk3399pro-vmarc-som.dtsi | 201 ++++++++++++++---- .../dts/rockchip-radxa-dalang-carrier.dtsi | 95 ++++++--- configs/rock-pi-n10-rk3399pro_defconfig | 25 +++ configs/rock-pi-n8-rk3288_defconfig | 17 ++ include/configs/evb_rk3288.h | 6 +- 10 files changed, 379 insertions(+), 128 deletions(-) -- 2.25.1

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[PATCH v6 0/5] rockchip: roc-rk3399-pc: Custom SPL
by Jagan Teki 22 Jul '20

22 Jul '20

This series supports custom initialization code required for roc-rk3399-pc board on SPL stage. Now this series is well mature code handling to add custom spl_board_init code parts. roc-rk3399-pc would require custom leds initialization based on user intervention of the power key. This code handles the user intervention via SPI environment variable. If someone or production systems wants this feature then 'pwr_key' has to be set otherwise it is normal like other rk3399 boards in Mainline. Changes for v6: - use spl board init code for led_setup Changes for v5: - drop banner changes - add code changes in roc-pc-rk3399.c Changes for v4: - enable SPL_BOARD_INIT in all platforms Changes for v3: - support leds on SPL - support env 'pwr_key' Jagan Teki (5): rockchip: rk3399: Add weak led_setup() rockchip: roc-rk3399-pc: Add custom led_setup() rockchip: Don't clear the reset status reg rockchip: Separate the reset cause from display cpuinfo rockchip: roc-rk3399-pc: Set LED only during POR and pwr_key=y arch/arm/include/asm/arch-rockchip/cru.h | 3 +- arch/arm/mach-rockchip/Makefile | 5 ++- arch/arm/mach-rockchip/cpu-info.c | 26 ++++++----- arch/arm/mach-rockchip/rk3399/rk3399.c | 6 +++ arch/arm/mach-rockchip/tpl.c | 7 --- board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 48 +++++++++++++++++---- configs/roc-pc-mezzanine-rk3399_defconfig | 6 ++- configs/roc-pc-rk3399_defconfig | 6 ++- 8 files changed, 71 insertions(+), 36 deletions(-) -- 2.25.1

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[PATCH v3 1/2] rockchip: Add rk3288 SoC detection helper
by Jagan Teki 22 Jul '20

22 Jul '20

Rockchip SoC's has a new revision chip for rk3288 SoCs. RK3288 has a new revision chip called RK3288W which is similar but different hclk_vio clock and fixed OHCI host. Add common Rockchip SoC detection helper to support this rk3288w detection. Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- Changes for v3: - add rk3288 cpu spec header .../include/asm/arch-rockchip/cpu_rk3288.h | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/cpu_rk3288.h diff --git a/arch/arm/include/asm/arch-rockchip/cpu_rk3288.h b/arch/arm/include/asm/arch-rockchip/cpu_rk3288.h new file mode 100644 index 0000000000..7445e64b8c --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/cpu_rk3288.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Rockchip Electronics Co., Ltd. + */ + +#ifndef __ASM_ARCH_CPU_RK3288_H +#define __ASM_ARCH_CPU_RK3288_H + +#include <asm/io.h> + +#define ROCKCHIP_CPU_MASK 0xffff0000 +#define ROCKCHIP_CPU_RK3288 0x32880000 + +#define ROCKCHIP_SOC_MASK (ROCKCHIP_CPU_MASK | 0xff) +#define ROCKCHIP_SOC_RK3288 (ROCKCHIP_CPU_RK3288 | 0x00) +#define ROCKCHIP_SOC_RK3288W (ROCKCHIP_CPU_RK3288 | 0x01) + +#define RK3288_HDMI_PHYS 0xff980000 +#define HDMI_CONFIG0_ID 0x4 +#define RK3288W_HDMI_REVID 0x1a + +static inline int rockchip_soc_id(void) +{ + u8 reg; + +#if defined(CONFIG_ROCKCHIP_RK3288) + reg = readb(RK3288_HDMI_PHYS + HDMI_CONFIG0_ID); + if (reg == RK3288W_HDMI_REVID) + return ROCKCHIP_SOC_RK3288W; + else + return ROCKCHIP_SOC_RK3288; +#else + return 0; +#endif +} + +#define ROCKCHIP_SOC(id, ID) \ +static inline bool soc_is_##id(void) \ +{ \ + int soc_id = rockchip_soc_id(); \ + if (soc_id) \ + return ((soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \ + return false; \ +} + +ROCKCHIP_SOC(rk3288, RK3288) +ROCKCHIP_SOC(rk3288w, RK3288W) + +#endif /* __ASM_ARCH_CPU_RK3288_H */ -- 2.25.1

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[PATCH v2 1/2] arm64: dts: rockchip: Add ROCKPi 4A/4B support
by Jagan Teki 22 Jul '20

22 Jul '20

Rock PI 4 has 3 variants of hardware platforms called RockPI 4A, 4B, and 4C. - Rock PI 4A has no Wif/BT. - Rock PI 4B has AP6256 Wifi/BT, PoE. - Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable GPIO pin change compared to 4B, 4C So move common nodes, properties into dtsi file and include on respective variant dts files. Use 4B dts into default rock-pi-4 defconfig until we find any solution for dynamic detection of these variants. Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- Changes for v2: - none arch/arm/dts/Makefile | 3 +- ...99-rock-pi-4.dts => rk3399-rock-pi-4.dtsi} | 26 ------------ arch/arm/dts/rk3399-rock-pi-4a.dts | 13 ++++++ arch/arm/dts/rk3399-rock-pi-4b-u-boot.dtsi | 6 +++ arch/arm/dts/rk3399-rock-pi-4b.dts | 42 +++++++++++++++++++ configs/rock-pi-4-rk3399_defconfig | 4 +- 6 files changed, 65 insertions(+), 29 deletions(-) rename arch/arm/dts/{rk3399-rock-pi-4.dts => rk3399-rock-pi-4.dtsi} (95%) create mode 100644 arch/arm/dts/rk3399-rock-pi-4a.dts create mode 100644 arch/arm/dts/rk3399-rock-pi-4b-u-boot.dtsi create mode 100644 arch/arm/dts/rk3399-rock-pi-4b.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 82e9b18cb8..bcd89af6a5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -136,7 +136,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ rk3399-puma-haikou.dtb \ rk3399-roc-pc.dtb \ rk3399-roc-pc-mezzanine.dtb \ - rk3399-rock-pi-4.dtb \ + rk3399-rock-pi-4a.dtb \ + rk3399-rock-pi-4b.dtb \ rk3399-rock960.dtb \ rk3399-rockpro64.dtb \ rk3399pro-rock-pi-n10.dtb diff --git a/arch/arm/dts/rk3399-rock-pi-4.dts b/arch/arm/dts/rk3399-rock-pi-4.dtsi similarity index 95% rename from arch/arm/dts/rk3399-rock-pi-4.dts rename to arch/arm/dts/rk3399-rock-pi-4.dtsi index 3923ec01ef..1c55a4645b 100644 --- a/arch/arm/dts/rk3399-rock-pi-4.dts +++ b/arch/arm/dts/rk3399-rock-pi-4.dtsi @@ -11,9 +11,6 @@ #include "rk3399-opp.dtsi" / { - model = "Radxa ROCK Pi 4"; - compatible = "radxa,rockpi4", "rockchip,rk3399"; - chosen { stdout-path = "serial2:1500000n8"; }; @@ -587,17 +584,6 @@ pinctrl-names = "default"; pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; sd-uhs-sdr104; - status = "okay"; - - brcmf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - interrupt-parent = <&gpio0>; - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; - interrupt-names = "host-wake"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_host_wake_l>; - }; }; &sdmmc { @@ -666,18 +652,6 @@ &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; - - bluetooth { - compatible = "brcm,bcm43438-bt"; - clocks = <&rk808 1>; - clock-names = "ext_clock"; - device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; - }; }; &uart2 { diff --git a/arch/arm/dts/rk3399-rock-pi-4a.dts b/arch/arm/dts/rk3399-rock-pi-4a.dts new file mode 100644 index 0000000000..d96dd3ebd3 --- /dev/null +++ b/arch/arm/dts/rk3399-rock-pi-4a.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar(a)mentor.com> + * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel(a)mentor.com> + */ + +/dts-v1/; +#include "rk3399-rock-pi-4.dtsi" + +/ { + model = "Radxa ROCK Pi 4A"; + compatible = "radxa,rockpi4", "rockchip,rk3399"; +}; diff --git a/arch/arm/dts/rk3399-rock-pi-4b-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4b-u-boot.dtsi new file mode 100644 index 0000000000..85ee5770ad --- /dev/null +++ b/arch/arm/dts/rk3399-rock-pi-4b-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Jagan Teki <jagan(a)amarulasolutions.com> + */ + +#include "rk3399-rock-pi-4-u-boot.dtsi" diff --git a/arch/arm/dts/rk3399-rock-pi-4b.dts b/arch/arm/dts/rk3399-rock-pi-4b.dts new file mode 100644 index 0000000000..4ca970acac --- /dev/null +++ b/arch/arm/dts/rk3399-rock-pi-4b.dts @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar(a)mentor.com> + * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel(a)mentor.com> + */ + +/dts-v1/; +#include "rk3399-rock-pi-4.dtsi" + +/ { + model = "Radxa ROCK Pi 4B"; + compatible = "radxa,rockpi4", "rockchip,rk3399"; +}; + +&sdio0 { + status = "okay"; + + brcmf: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; + interrupt-names = "host-wake"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake_l>; + }; +}; + +&uart0 { + status = "okay"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; + device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; + }; +}; diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index 98f71a50a5..1d34476825 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -9,7 +9,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb" CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set @@ -24,7 +24,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4" +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -- 2.25.1

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[PATCH] travis: update sbsigntools to 0.9.4
by AKASHI Takahiro 22 Jul '20

22 Jul '20

Signed-off-by: AKASHI Takahiro <takahiro.akashi(a)linaro.org> --- v1: * execute 'make install' with sudo --- .travis.yml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/.travis.yml b/.travis.yml index 1ff140855ea3..c99c37947c7f 100644 --- a/.travis.yml +++ b/.travis.yml @@ -52,6 +52,14 @@ addons: - sbsigntool - fakeroot - mtd-utils + - automake + - binutils-dev + - gnu-efi + - help2man + - libguestfs-tools + - linux-image-kvm + - pkg-config + - uuid-dev install: # Clone uboot-test-hooks @@ -69,6 +77,14 @@ install: - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - wget http://mirrors.kernel.org/ubuntu/pool/main/m/mpfr4/libmpfr4_3.1.4-1_amd64.d… && sudo dpkg -i libmpfr4_3.1.4-1_amd64.deb && rm libmpfr4_3.1.4-1_amd64.deb - wget http://mirrors.kernel.org/ubuntu/pool/universe/e/efitools/efitools_1.8.1-0u… && sudo dpkg -i efitools_1.8.1-0ubuntu2_amd64.deb && rm efitools_1.8.1-0ubuntu2_amd64.deb + - git clone https://git.kernel.org/pub/scm/linux/kernel/git/jejb/sbsigntools.git /tmp/sbsigntools && + pushd /tmp/sbsigntools && + git checkout -b latest v0.9.4 && + ./autogen.sh && + ./configure && + make && + sudo make install && + popd env: global: -- 2.27.0

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[PATCH v2 10/12] rockchip: rock-pi-n10: Enable PCI/NVME
by Jagan Teki 22 Jul '20

22 Jul '20

Enable PCI/NVME for M.2 Slot on RockPI-4 boards. => nvme info Device 0: Vendor: 0x144d Rev: 4L1QCXB7 Prod: S35FNX0J623292 Type: Hard Disk Capacity: 122104.3 MB = 119.2 GB (250069680 x 512) Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- Changes for v2: - none configs/rock-pi-n10-rk3399pro_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index 895820fbe6..2aa2fafaa4 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -21,6 +21,7 @@ CONFIG_TPL=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y @@ -39,6 +40,8 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_NVME=y +CONFIG_PCI=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y -- 2.25.1

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[PATCH] rockchp: firefly-rk3399: enable CONFIG_USB_DWC3
by Kever Yang 22 Jul '20

22 Jul '20

To fix below build error: drivers/usb/host/built-in.o: In function `xhci_dwc3_remove': drivers/usb/host/xhci-dwc3.c:174: undefined reference to `dwc3_shutdown_phy' drivers/usb/host/built-in.o: In function `xhci_dwc3_probe': drivers/usb/host/xhci-dwc3.c:130: undefined reference to `dwc3_setup_phy' Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- configs/firefly-rk3399_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 5181510aac..cf030f923c 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y +CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -23,7 +24,6 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -54,6 +54,7 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_DWC3=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y -- 2.17.1

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[PATCH v2] i2c: eeprom: Use reg property instead of offset and size
by Michal Simek 22 Jul '20

22 Jul '20

Remove adhoc dt binding for fixed-partition definition for i2c eeprom. fixed-partition are using reg property instead of offset/size pair. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Changes in v2: - Bootcount tested on zynqmp zcu104 - Add missing address/size cells - Use dev_read_addr_size_index - Check parameters Just build tested - ge_bx50v3_defconfig Definitely please retest on hardware. --- arch/arm/dts/imx53-ppd-uboot.dtsi | 15 +++++++++------ arch/arm/dts/imx6q-bx50v3-uboot.dtsi | 12 +++++++----- drivers/misc/i2c_eeprom.c | 20 ++++++++++---------- 3 files changed, 26 insertions(+), 21 deletions(-) diff --git a/arch/arm/dts/imx53-ppd-uboot.dtsi b/arch/arm/dts/imx53-ppd-uboot.dtsi index d38a1bc264c9..b308a517a73c 100644 --- a/arch/arm/dts/imx53-ppd-uboot.dtsi +++ b/arch/arm/dts/imx53-ppd-uboot.dtsi @@ -22,17 +22,20 @@ }; &eeprom { + #address-cells = <1>; + #size-cells = <0>; + partitions { compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - vpd { - offset = <0>; - size = <1022>; + vpd@0 { + reg = <0 1022>; }; - bootcount: bootcount { - offset = <1022>; - size = <2>; + bootcount: bootcount@1022 { + reg = <1022 2>; }; }; }; diff --git a/arch/arm/dts/imx6q-bx50v3-uboot.dtsi b/arch/arm/dts/imx6q-bx50v3-uboot.dtsi index df446e0ed149..996eb18046c7 100644 --- a/arch/arm/dts/imx6q-bx50v3-uboot.dtsi +++ b/arch/arm/dts/imx6q-bx50v3-uboot.dtsi @@ -21,17 +21,19 @@ }; &eeprom { + #address-cells = <1>; + #size-cells = <0>; partitions { compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - vpd { - offset = <0>; - size = <1022>; + vpd@0 { + reg = <0 1022>; }; bootcount: bootcount { - offset = <1022>; - size = <2>; + reg = <1022 2>; }; }; }; diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 45c34d388c8a..335cf70e8b7e 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -301,19 +301,19 @@ static int i2c_eeprom_partition_probe(struct udevice *dev) static int i2c_eeprom_partition_ofdata_to_platdata(struct udevice *dev) { struct i2c_eeprom_partition *priv = dev_get_priv(dev); - u32 offset, size; - int ret; + fdt_size_t addr, size; - ret = dev_read_u32(dev, "offset", &offset); - if (ret) - return ret; + addr = dev_read_addr_size_index(dev, 0, &size); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; - ret = dev_read_u32(dev, "size", &size); - if (ret) - return ret; + if (!size) + return -EINVAL; + + priv->offset = (u32)addr; + priv->size = (u32)size; - priv->offset = offset; - priv->size = size; + debug("%s: base %x, size %x\n", __func__, priv->offset, priv->size); return 0; } -- 2.27.0

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