May 2020 - U-Boot

[PATCH] imx: Kconfig: enable IMX_BOOTAUX for i.MX8M
by Peng Fan 08 Jun '20

08 Jun '20

i.MX8M could use imx bootaux to boot m4/m7 core, so let's add it to the dependency list. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- arch/arm/mach-imx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 396f7c9288..2b97208445 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -23,7 +23,7 @@ config IMX_RDC config IMX_BOOTAUX bool "Support boot auxiliary core" - depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 + depends on ARCH_MX7 || ARCH_MX6 || ARCH_VF610 || ARCH_IMX8M help bootaux [addr] to boot auxiliary core. -- 2.16.4

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[PATCH] ARM: imx: ddr: Add missing PHY reset
by Marek Vasut 08 Jun '20

08 Jun '20

The iMX7D RM 9.2.4.9.3 Power removal flow Table 9-11. Re-enabling power explicitly says both the DDR controller and the PHY must be reset in the correct sequence. Currently the code only resets the controller. This leads to a misbehavior where the system brings the DRAM up after reboot, but the DRAM is unstable. Add the missing reset. The easiest way to trigger this is by triggering WDT without having the WDT assert WDOG_B signal, i.e. mw.w 0x30280000 0x25 . Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx(a)nxp.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/include/asm/arch-mx7/imx-regs.h | 1 + arch/arm/mach-imx/mx7/ddr.c | 22 +++++++++++++++++++--- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index 95238dcaa8..f37419c07f 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -274,6 +274,7 @@ struct src { #define SRC_DDRC_RCR_DDRC_CORE_RST_OFFSET 1 #define SRC_DDRC_RCR_DDRC_CORE_RST_MASK (1 << 1) +#define SRC_DDRC_RCR_DDRC_PRST_MASK (1 << 0) /* GPR0 Bit Fields */ #define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_MASK 0x1u diff --git a/arch/arm/mach-imx/mx7/ddr.c b/arch/arm/mach-imx/mx7/ddr.c index 9ffd8c6c66..45954ed1ed 100644 --- a/arch/arm/mach-imx/mx7/ddr.c +++ b/arch/arm/mach-imx/mx7/ddr.c @@ -13,6 +13,7 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/mx7-ddr.h> #include <common.h> +#include <linux/delay.h> /* * Routine: mx7_dram_cfg @@ -37,8 +38,23 @@ void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val, (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; int i; - /* Assert DDR Controller preset and DDR PHY reset */ - writel(SRC_DDRC_RCR_DDRC_CORE_RST_MASK, &src_regs->ddrc_rcr); + /* + * iMX7D RM 9.2.4.9.3 Power removal flow Table 9-11. Re-enabling power + * row 2 says "Reset controller / PHY by driving core_ddrc_rst = 0 , + * aresetn_n = 0, presetn = 0. That means reset everything. + */ + writel(SRC_DDRC_RCR_DDRC_CORE_RST_MASK | SRC_DDRC_RCR_DDRC_PRST_MASK, + &src_regs->ddrc_rcr); + + /* + * iMX7D RM 6.2.7.26 SRC_DDRC_RCR says wait 30 cycles (of unknown). + * If we assume this is 30 cycles at 100 MHz (about the rate of a + * DRAM bus), that's 300 nS, so waiting 10 uS is more then plenty. + */ + udelay(10); + + /* De-assert DDR Controller 'preset' and DDR PHY reset */ + clrbits_le32(&src_regs->ddrc_rcr, SRC_DDRC_RCR_DDRC_PRST_MASK); /* DDR controller configuration */ writel(ddrc_regs_val->mstr, &ddrc_regs->mstr); @@ -72,7 +88,7 @@ void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val, writel(ddrc_regs_val->odtcfg, &ddrc_regs->odtcfg); writel(ddrc_regs_val->odtmap, &ddrc_regs->odtmap); - /* De-assert DDR Controller preset and DDR PHY reset */ + /* De-assert DDR Controller 'core_ddrc_rstn' and 'aresetn' */ clrbits_le32(&src_regs->ddrc_rcr, SRC_DDRC_RCR_DDRC_CORE_RST_MASK); /* PHY configuration */ -- 2.25.1

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[PATCH 1/2] ARM: imx: m53menlo: Do not fail boot on invalid splash screen
by Marek Vasut 08 Jun '20

08 Jun '20

None of these splash screen loading errors are so critical as to justify complete failure to boot, so just print error message as needed and return 0, the boot can very likely continue without the splash. Fix a couple of missing free(dst) instances as well. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx(a)nxp.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- board/menlo/m53menlo/m53menlo.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c index 58a564ac31..d4288a2c57 100644 --- a/board/menlo/m53menlo/m53menlo.c +++ b/board/menlo/m53menlo/m53menlo.c @@ -353,24 +353,28 @@ int board_late_init(void) ret = splash_screen_prepare(); if (ret < 0) - return ret; + goto splasherr; len = CONFIG_SYS_VIDEO_LOGO_MAX_SIZE; ret = gunzip(dst + 2, CONFIG_SYS_VIDEO_LOGO_MAX_SIZE - 2, (uchar *)addr, &len); if (ret) { printf("Error: no valid bmp or bmp.gz image at %lx\n", addr); - free(dst); - return ret; + goto splasherr; } ret = uclass_get_device(UCLASS_VIDEO, 0, &dev); if (ret) - return ret; + goto splasherr; ret = video_bmp_display(dev, (ulong)dst + 2, xpos, ypos, true); if (ret) - return ret; + goto splasherr; + + return 0; + +splasherr: + free(dst); #endif return 0; } -- 2.25.1

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[PATCH v3 1/5] imx8mp_evk: spl: drop useless code
by Fabio Estevam 08 Jun '20

08 Jun '20

From: Peng Fan <peng.fan(a)nxp.com> Drop useless getting ccm device, there is no need to explicted do this in board code, and we not enable SPL CLK currently. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- Changes since v2: - None. Rebased against U-Boot master board/freescale/imx8mp_evk/spl.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index cd5b32c3f8..f2cc177757 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -29,11 +29,6 @@ #include <mmc.h> #include <asm/arch/ddr.h> -#include <dm/uclass.h> -#include <dm/device.h> -#include <dm/uclass-internal.h> -#include <dm/device-internal.h> - DECLARE_GLOBAL_DATA_PTR; int spl_board_boot_device(enum boot_device boot_dev_spl) @@ -48,16 +43,7 @@ void spl_dram_init(void) void spl_board_init(void) { - struct udevice *dev; - int ret; - puts("Normal Boot\n"); - - ret = uclass_get_device_by_name(UCLASS_CLK, - "clock-controller@30380000", - &dev); - if (ret < 0) - printf("Failed to find clock node. Check device tree\n"); } #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE) -- 2.17.1

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[PATCH] imx8mp_evk: Add a README file
by Fabio Estevam 08 Jun '20

08 Jun '20

Add a README file explaining the U-Boot build and SD card flash procedures. Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- board/freescale/imx8mp_evk/README | 41 +++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 board/freescale/imx8mp_evk/README diff --git a/board/freescale/imx8mp_evk/README b/board/freescale/imx8mp_evk/README new file mode 100644 index 0000000000..7dbf61fa94 --- /dev/null +++ b/board/freescale/imx8mp_evk/README @@ -0,0 +1,41 @@ +U-Boot for the NXP i.MX8MP EVK board + +Quick Start +=========== +- Build the ARM Trusted firmware binary +- Get the firmware-imx package +- Build U-Boot +- Boot + +Get and Build the ARM Trusted firmware +====================================== +Note: $(srctree) is the U-Boot source directory +Get ATF from: https://source.codeaurora.org/external/imx/imx-atf +branch: imx_5.4.3_2.0.0 +$ make PLAT=imx8mp bl31 +$ sudo cp build/imx8mp/release/bl31.bin $(srctree) + +Get the ddr firmware +==================== +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.7.bin +$ chmod +x firmware-imx-8.7.bin +$ ./firmware-imx-8.7 +$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_1d_dmem.bin +$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_201904.bin $(srctree)/lpddr4_pmu_train_1d_imem.bin +$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_201904.bin $(srctree)/lpddr4_pmu_train_2d_dmem.bin +$ sudo cp firmware-imx-8.7/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_201904.bin $(srctree)/lpddr4_pmu_train_2d_imem.bin + +Build U-Boot +============ +$ export CROSS_COMPILE=aarch64-poky-linux- +$ make imx8mp_evk_defconfig +$ export ATF_LOAD_ADDR=0x960000 +$ make flash.bin + +Burn the flash.bin to the MicroSD card at offset 32KB +$sudo dd if=flash.bin of=/dev/sd[x] bs=1K seek=32; sync + +Boot +==== +Set Boot switch to SD boot +Use /dev/ttyUSB2 for U-Boot console -- 2.17.1

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[PATCH v1 00/15] add basic driver support for broadcom NS3 soc
by Rayagonda Kokatanur 08 Jun '20

08 Jun '20

This is the second patch set series prepared on top of the first patch set ("add initial support for broadcom NS3 soc"). This patch set will add following, -dt nodes and defconfig options for basic device like pinctrl, gpio, mmc, qspi, wdt, i2c and pcie. -start wdt service -Enable GPT commands -Enable EXT4 and FAT fs support Pramod Kumar (2): arm: dts: ns3: add emmc node arm: dts: ns3: add sp805 watchdog node Rayagonda Kokatanur (12): configs: ns3: enable pinctrl driver dt-bindings: pinctrl: add ns3 pads definition arm: dts: ns3: add pinctrl node arm: dts: ns3: add gpio node configs: ns3: enable BCM IPROC mmc driver configs: ns3: enable mmc commands arm: dts: ns3: add qspi node arm: dts: ns3: add i2c node configs: ns3: enable gpt commands configs: ns3: enable EXT4 and FAT fs support configs: ns3: enable sp805 watchdog driver board: ns3: start sp805 watchdog service Srinath Mannam (1): arm: dts: ns3: add PAXB PCIe host and phy node arch/arm/dts/ns3-board.dts | 58 ++++ arch/arm/dts/ns3-pinctrl.dtsi | 321 ++++++++++++++++++ arch/arm/dts/ns3.dtsi | 224 ++++++++++++ board/broadcom/bcmns3/ns3.c | 56 +++ configs/bcm_ns3_defconfig | 19 ++ .../dt-bindings/pinctrl/brcm,pinctrl-ns3.h | 41 +++ 6 files changed, 719 insertions(+) create mode 100644 arch/arm/dts/ns3-pinctrl.dtsi create mode 100644 include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h -- 2.17.1

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[PATCH] imx: Update MTD partitions layout for display5 (i.MX6Q) board
by Lukasz Majewski 08 Jun '20

08 Jun '20

This change updates the MTD partition layout on SPI-NOR memory for display5 board. Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- include/configs/display5.h | 7 ++++--- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 6241375c4c78..ce6d62a69fd9 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -70,7 +70,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=02008000.spi.1" -CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),4m(swu-kernel),16m(swu-initramfs),1m(factory),-(reserved)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),6m(swu-kernel),20m(swu-initramfs),3840k(reserved),1m(factory)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index eb46e3b256d0..e4665eed9e13 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -72,7 +72,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=02008000.spi.1" -CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),4m(swu-kernel),16m(swu-initramfs),1m(factory),-(reserved)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),6m(swu-kernel),20m(swu-initramfs),3840k(reserved),1m(factory)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_PARTITION_TYPE_GUID=y CONFIG_OF_CONTROL=y diff --git a/include/configs/display5.h b/include/configs/display5.h index 6600b94ac3a7..7d96205439cd 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -30,9 +30,10 @@ * 0x020000 - 0x120000 : SPI.u-boot (1MiB) * 0x120000 - 0x130000 : SPI.u-boot-env1 (64KiB) * 0x130000 - 0x140000 : SPI.u-boot-env2 (64KiB) - * 0x140000 - 0x540000 : SPI.swupdate-kernel-FIT (4MiB) - * 0x540000 - 0x1540000 : SPI.swupdate-initramfs (16MiB) - * 0x1540000 - 0x1640000 : SPI.factory (1MiB) + * 0x140000 - 0x740000 : SPI.swupdate-kernel-FIT (6MiB) + * 0x740000 - 0x1B40000 : SPI.swupdate-initramfs (20MiB) + * 0x1B40000 - 0x1F00000 : SPI.reserved (3840KiB) + * 0x1F00000 - 0x2000000 : SPI.factory (1MiB) */ /* SPI Flash Configs */ -- 2.20.1

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[PATCH] power: pmic: Add SPL Kconfig entry for PFUZE100
by Marek Vasut 08 Jun '20

08 Jun '20

Add Kconfig entry for the PFUZE PMIC, SPL variant. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <fabio.estevam(a)nxp.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- drivers/power/pmic/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index ef8bf49d49..a62aa38054 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -105,6 +105,13 @@ config DM_PMIC_PFUZE100 This config enables implementation of driver-model pmic uclass features for PMIC PFUZE100. The driver implements read/write operations. +config SPL_DM_PMIC_PFUZE100 + bool "Enable Driver Model for PMIC PFUZE100 in SPL" + depends on DM_PMIC + ---help--- + This config enables implementation of driver-model pmic uclass features + for PMIC PFUZE100 in SPL. The driver implements read/write operations. + config DM_PMIC_MAX77686 bool "Enable Driver Model for PMIC MAX77686" depends on DM_PMIC -- 2.25.1

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[PATCH] ARM: dts: imxrt1050: indent lcdif node correctly
by Giulio Benetti 08 Jun '20

08 Jun '20

Accidentally submitted a patch with indentation not correct, let's fix it by indenting wrong lines. Signed-off-by: Giulio Benetti <giulio.benetti(a)benettiengineering.com> --- arch/arm/dts/imxrt1050.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi index 7cfe5f5c95..a9281001e5 100644 --- a/arch/arm/dts/imxrt1050.dtsi +++ b/arch/arm/dts/imxrt1050.dtsi @@ -147,12 +147,12 @@ }; lcdif: lcdif@402b8000 { - compatible = "fsl,imxrt-lcdif"; - reg = <0x402b8000 0x10000>; - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMXRT1050_CLK_LCDIF>; - clock-names = "per"; - status = "disabled"; + compatible = "fsl,imxrt-lcdif"; + reg = <0x402b8000 0x4000>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMXRT1050_CLK_LCDIF>; + clock-names = "per"; + status = "disabled"; }; }; }; -- 2.20.1

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[PATCH] drivers: net: qe: deselect QE when DM_ETH is enabled
by Madalin Bucur 08 Jun '20

08 Jun '20

A compilation error appears when QE is compiled with DM_ETH enabled: drivers/qe/uec.c: In function 'init_phy': drivers/qe/uec.c:425:28: error: dereferencing pointer to incomplete type 'struct eth_device' uec = (uec_private_t *)dev->priv; ^~ drivers/qe/uec.c: In function 'uec_initialize': drivers/qe/uec.c:1357:43: error: invalid application of 'sizeof' to incomplete type 'struct eth_device' dev = (struct eth_device *)malloc(sizeof(struct eth_device)); ^~~~~~ The patch disables CONFIG_QE when CONFIG_DM_ETH is set. Signed-off-by: Madalin Bucur <madalin.bucur(a)oss.nxp.com> --- drivers/qe/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/qe/Kconfig b/drivers/qe/Kconfig index 864b36b..44c9f01 100644 --- a/drivers/qe/Kconfig +++ b/drivers/qe/Kconfig @@ -3,7 +3,7 @@ # config QE bool "Enable support for QUICC Engine" - depends on PPC + depends on PPC && !DM_ETH default y if ARCH_T1040 || ARCH_T1042 || ARCH_T1024 || ARCH_P1021 \ || ARCH_P1025 help -- 2.1.0

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