May 2020 - U-Boot

[PATCH 1/5] dm: core: Fix devfdt_get_addr_ptr return value
by Ovidiu Panait 11 Jun '20

11 Jun '20

According to the description of devfdt_get_addr_ptr, this function should return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE. This is also a problem because there are two definitions for dev_read_addr_ptr, depending on CONFIG_DM_DEV_READ_INLINE: 1. one returning NULL on failure (drivers/core/read.c): void *dev_read_addr_ptr(const struct udevice *dev) { fdt_addr_t addr = dev_read_addr(dev); return (addr == FDT_ADDR_T_NONE) ? NULL : map_sysmem(addr, 0); } 2. another one, which is a wrapper over devfdt_get_addr_ptr, returning (void *)FDT_ADDR_T_NONE (include/dm/read.h) static inline void *dev_read_addr_ptr(const struct udevice *dev) { return devfdt_get_addr_ptr(dev); } Currently, some drivers which make use of devfdt_get_addr_ptr check the return value for NULL: drivers/i2c/mvtwsi.c drivers/i2c/designware_i2c.c drivers/usb/host/ehci-zynq.c while others check the return value for (void *)FDT_ADDR_T_NONE: drivers/pinctrl/mvebu/pinctrl-mvebu.c drivers/timer/ast_timer.c drivers/watchdog/ast_wdt.c Fix this by making devfdt_get_addr_ptr return NULL on failure, as described in the function comments. Also, update the drivers currently checking (void *)FDT_ADDR_T_NONE to check for NULL. Signed-off-by: Ovidiu Panait <ovidiu.panait(a)windriver.com> --- drivers/clk/aspeed/clk_ast2500.c | 4 ++-- drivers/core/fdtaddr.c | 5 ++++- drivers/i2c/ast_i2c.c | 4 ++-- drivers/pinctrl/mvebu/pinctrl-mvebu.c | 2 +- drivers/timer/ast_timer.c | 4 ++-- drivers/watchdog/ast_wdt.c | 4 ++-- 6 files changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c index ccfeded30c..284f5f58d6 100644 --- a/drivers/clk/aspeed/clk_ast2500.c +++ b/drivers/clk/aspeed/clk_ast2500.c @@ -498,8 +498,8 @@ static int ast2500_clk_ofdata_to_platdata(struct udevice *dev) struct ast2500_clk_priv *priv = dev_get_priv(dev); priv->scu = devfdt_get_addr_ptr(dev); - if (IS_ERR(priv->scu)) - return PTR_ERR(priv->scu); + if (!priv->scu) + return -EINVAL; return 0; } diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c index dfcb868f65..044d5871b0 100644 --- a/drivers/core/fdtaddr.c +++ b/drivers/core/fdtaddr.c @@ -14,6 +14,7 @@ #include <log.h> #include <asm/io.h> #include <dm/device-internal.h> +#include <mapmem.h> DECLARE_GLOBAL_DATA_PTR; @@ -154,7 +155,9 @@ fdt_addr_t devfdt_get_addr(const struct udevice *dev) void *devfdt_get_addr_ptr(const struct udevice *dev) { - return (void *)(uintptr_t)devfdt_get_addr_index(dev, 0); + fdt_addr_t addr = devfdt_get_addr_index(dev, 0); + + return (addr == FDT_ADDR_T_NONE) ? NULL : map_sysmem(addr, 0); } void *devfdt_remap_addr_index(const struct udevice *dev, int index) diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index 214362d04b..253e653666 100644 --- a/drivers/i2c/ast_i2c.c +++ b/drivers/i2c/ast_i2c.c @@ -93,8 +93,8 @@ static int ast_i2c_ofdata_to_platdata(struct udevice *dev) int ret; priv->regs = devfdt_get_addr_ptr(dev); - if (IS_ERR(priv->regs)) - return PTR_ERR(priv->regs); + if (!priv->regs) + return -EINVAL; ret = clk_get_by_index(dev, 0, &priv->clk); if (ret < 0) { diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c index 2206e958ec..ac0377e796 100644 --- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c +++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c @@ -194,7 +194,7 @@ int mvebu_pinctl_probe(struct udevice *dev) } priv->base_reg = devfdt_get_addr_ptr(dev); - if (priv->base_reg == (void *)FDT_ADDR_T_NONE) { + if (!priv->base_reg) { debug("%s: Failed to get base address\n", __func__); return -EINVAL; } diff --git a/drivers/timer/ast_timer.c b/drivers/timer/ast_timer.c index 3838601f54..9f28cbfcf9 100644 --- a/drivers/timer/ast_timer.c +++ b/drivers/timer/ast_timer.c @@ -65,8 +65,8 @@ static int ast_timer_ofdata_to_platdata(struct udevice *dev) struct ast_timer_priv *priv = dev_get_priv(dev); priv->regs = devfdt_get_addr_ptr(dev); - if (IS_ERR(priv->regs)) - return PTR_ERR(priv->regs); + if (!priv->regs) + return -EINVAL; priv->tmc = ast_get_timer_counter(priv->regs, AST_TICK_TIMER); diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c index 7e11465a57..a21f9a4d14 100644 --- a/drivers/watchdog/ast_wdt.c +++ b/drivers/watchdog/ast_wdt.c @@ -91,8 +91,8 @@ static int ast_wdt_ofdata_to_platdata(struct udevice *dev) struct ast_wdt_priv *priv = dev_get_priv(dev); priv->regs = devfdt_get_addr_ptr(dev); - if (IS_ERR(priv->regs)) - return PTR_ERR(priv->regs); + if (!priv->regs) + return -EINVAL; return 0; } -- 2.17.1

5 10

[PATCH 0/9] spi: dm-convert and cleanups
by Jagan Teki 11 Jun '20

11 Jun '20

We still have few drivers left over, drivers/spi/fsl_espi.c drivers/spi/fsl_dspi.c drivers/spi/kirkwood_spi.c drivers/spi/mxc_spi.c drivers/spi/omap3_spi.c drivers/spi/sh_qspi.c Yes, most of them have SPL foot-print issues but will figure out the proper solutions and do necessary cleanup in coming days. Travis-CI: https://travis-ci.org/github/openedev/u-boot-amarula/builds/691159310 Note: - fsl_espi.c will completely removed along with SPI config items on their boards, since there is no response on dm-conversion over years even though we made couple of zap patches. - We are planning to push this soon. Any inputs? Jagan. Jagan Teki (9): spi Drop spi_init() spi: Kconfig: Drop redundant CF_SPI definition spi: Kconfig: Move MSCC_BB_SPI, FSL_QSPI into DM_SPI ks2_evm: Switch to DM_SPL, SPL_OF_CONTROL spi: davinci: Drop non-dm code spi: mxs: Drop nondm code spi: mxs: Code cleanup spi: Zap SOFT_SPI (non-dm) doc: driver-model: Update SPI migration status configs/k2e_evm_defconfig | 2 + configs/k2g_evm_defconfig | 2 + configs/k2hk_evm_defconfig | 2 + configs/k2l_evm_defconfig | 2 + doc/driver-model/migration.rst | 5 - drivers/spi/Kconfig | 73 ++++++------ drivers/spi/Makefile | 1 - drivers/spi/cf_spi.c | 4 - drivers/spi/davinci_spi.c | 157 ------------------------- drivers/spi/kirkwood_spi.c | 4 - drivers/spi/mxs_spi.c | 158 +++---------------------- drivers/spi/soft_spi_legacy.c | 168 --------------------------- include/configs/ti_armv7_keystone2.h | 17 --- 13 files changed, 58 insertions(+), 537 deletions(-) delete mode 100644 drivers/spi/soft_spi_legacy.c -- 2.25.1

3 20

[PATCH 1/3] spi: atmel: Drop CONFIG_SYS_SPI_WRITE_TOUT
by Jagan Teki 11 Jun '20

11 Jun '20

Drop CONFIG_SYS_SPI_WRITE_TOUT there is no code usage. Cc: Wenyou Yang <wenyou.yang(a)atmel.com> Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- drivers/spi/atmel_spi.h | 4 ---- scripts/config_whitelist.txt | 1 - 2 files changed, 5 deletions(-) diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h index 6167bd164b..b602887c29 100644 --- a/drivers/spi/atmel_spi.h +++ b/drivers/spi/atmel_spi.h @@ -95,7 +95,3 @@ static inline struct atmel_spi_slave *to_atmel_spi(struct spi_slave *slave) readl(as->regs + ATMEL_SPI_##reg) #define spi_writel(as, reg, value) \ writel(value, as->regs + ATMEL_SPI_##reg) - -#if !defined(CONFIG_SYS_SPI_WRITE_TOUT) -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) -#endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 92e202e5aa..761da1aef6 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3816,7 +3816,6 @@ CONFIG_SYS_SPI_MXC_WAIT CONFIG_SYS_SPI_RTC_DEVID CONFIG_SYS_SPI_ST_ENABLE_WP_PIN CONFIG_SYS_SPI_U_BOOT_SIZE -CONFIG_SYS_SPI_WRITE_TOUT CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SPL_LEN CONFIG_SYS_SPL_MALLOC_SIZE -- 2.25.1

1 5

[U-Boot] [PATCH v2 00/16] Add Intel Stratix 10 SoC support
by Ley Foon Tan 11 Jun '20

11 Jun '20

This is 2nd version of patchset to adds support for Intel Stratix 10 SoC. This patchset is work on top of patchset in [1]. Changes: - update base addresses header - use reset framework for periperhals (16550 UART, MMC, EMAC) - change to use serial DM driver - move bridge command to misc common driver and reuse for other platforms - rework board_init_f() in SPL - update S10 dts and dtsi - Mailbox: - change to use register offset to access register instead of register structure - rename function with __xxx prefix - DDR: - rework DDR driver - change to use register offset to access register instead of register structure - remove union bitwise structure - use wait_for_bit to poll Patchset history: [v1]: https://patchwork.ozlabs.org/cover/900499/ [1]: https://patchwork.ozlabs.org/cover/910018/ Ley Foon Tan (16): arm: socfpga: stratix10: Add watchdog and firewall base addresses arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch arm: socfpga: misc: Move bridge command to misc common arm: socfpga: stratix10: Add misc support for Stratix10 SoC arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC arm: socfpga: stratix10: Add MMU support for Stratix10 SoC arm: socfpga: Restructure the SPL file arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC arm: socfpga: stratix10: Add timer support for Stratix10 SoC ddr: altera: stratix10: Add DDR support for Stratix10 SoC board: altera: stratix10: Add socdk board support for Stratix10 SoC arm: dts: socfpga: stratix10: update dtsi and dts arm: socfpga: stratix10: Enable Stratix10 SoC build arch/arm/Kconfig | 9 +- arch/arm/dts/socfpga_stratix10.dtsi | 22 +- arch/arm/dts/socfpga_stratix10_socdk.dts | 3 + arch/arm/mach-socfpga/Kconfig | 16 + arch/arm/mach-socfpga/Makefile | 23 +- arch/arm/mach-socfpga/clock_manager.c | 4 +- arch/arm/mach-socfpga/clock_manager_s10.c | 380 +++++++++++++++++++ arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 11 + arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 + .../mach-socfpga/include/mach/clock_manager_s10.h | 210 +++++++++++ arch/arm/mach-socfpga/include/mach/firewall_s10.h | 120 ++++++ arch/arm/mach-socfpga/include/mach/handoff_s10.h | 34 ++ arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 144 ++++++++ arch/arm/mach-socfpga/include/mach/misc.h | 2 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 2 + .../mach-socfpga/include/mach/reset_manager_s10.h | 116 ++++++ arch/arm/mach-socfpga/include/mach/sdram_s10.h | 183 +++++++++ .../arm/mach-socfpga/include/mach/system_manager.h | 5 +- .../mach-socfpga/include/mach/system_manager_s10.h | 176 +++++++++ arch/arm/mach-socfpga/mailbox_s10.c | 380 +++++++++++++++++++ arch/arm/mach-socfpga/misc.c | 34 ++ arch/arm/mach-socfpga/misc_gen5.c | 26 +-- arch/arm/mach-socfpga/misc_s10.c | 133 +++++++ arch/arm/mach-socfpga/mmu-arm64_s10.c | 71 ++++ arch/arm/mach-socfpga/reset_manager.c | 13 + arch/arm/mach-socfpga/reset_manager_s10.c | 140 +++++++ arch/arm/mach-socfpga/spl_a10.c | 105 ++++++ arch/arm/mach-socfpga/{spl.c => spl_gen5.c} | 57 +--- arch/arm/mach-socfpga/spl_s10.c | 199 ++++++++++ arch/arm/mach-socfpga/system_manager_s10.c | 91 +++++ arch/arm/mach-socfpga/timer_s10.c | 26 ++ arch/arm/mach-socfpga/wrap_pinmux_config_s10.c | 56 +++ arch/arm/mach-socfpga/wrap_pll_config_s10.c | 59 +++ board/altera/stratix10-socdk/MAINTAINERS | 7 + board/altera/stratix10-socdk/Makefile | 7 + board/altera/stratix10-socdk/socfpga.c | 7 + configs/socfpga_stratix10_defconfig | 58 +++ drivers/ddr/altera/Makefile | 1 + drivers/ddr/altera/sdram_s10.c | 388 ++++++++++++++++++++ include/configs/socfpga_stratix10_socdk.h | 222 +++++++++++ 40 files changed, 3459 insertions(+), 83 deletions(-) create mode 100644 arch/arm/mach-socfpga/clock_manager_s10.c create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/firewall_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/handoff_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/mailbox_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h create mode 100644 arch/arm/mach-socfpga/mailbox_s10.c create mode 100644 arch/arm/mach-socfpga/misc_s10.c create mode 100644 arch/arm/mach-socfpga/mmu-arm64_s10.c create mode 100644 arch/arm/mach-socfpga/reset_manager_s10.c create mode 100644 arch/arm/mach-socfpga/spl_a10.c rename arch/arm/mach-socfpga/{spl.c => spl_gen5.c} (82%) create mode 100644 arch/arm/mach-socfpga/spl_s10.c create mode 100644 arch/arm/mach-socfpga/system_manager_s10.c create mode 100644 arch/arm/mach-socfpga/timer_s10.c create mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c create mode 100644 arch/arm/mach-socfpga/wrap_pll_config_s10.c create mode 100644 board/altera/stratix10-socdk/MAINTAINERS create mode 100644 board/altera/stratix10-socdk/Makefile create mode 100644 board/altera/stratix10-socdk/socfpga.c create mode 100644 configs/socfpga_stratix10_defconfig create mode 100644 drivers/ddr/altera/sdram_s10.c create mode 100644 include/configs/socfpga_stratix10_socdk.h

4 25

[PATCH 00/22] x86: Enhance MTRR functionality to support multiple CPUs
by Simon Glass 10 Jun '20

10 Jun '20

At present MTRRs are mirrored to the secondary CPUs only once, as those CPUs are started up. But U-Boot may add more MTRRs later, e.g. if it decides that a video console must be set up. This series enhances the x86 multi-processor support to allow MTRRs to be updated at any time. It also updates the 'mtrr' command to support setting the MTRRs on CPUs other than the boot CPU. Simon Glass (22): x86: mp_init: Switch to livetree x86: Move MP code into mp_init x86: mp_init: Avoid declarations in header files x86: mp_init: Switch parameter names in start_aps() x86: mp_init: Drop the num_cpus static variable x86: mtrr: Fix 'ensable' typo x86: mp_init: Set up the CPU numbers at the start x86: mp_init: Adjust bsp_init() to return more information x86: cpu: Remove unnecessary #ifdefs x86: mp: Support APs waiting for instructions global_data: Add a generic global_data flag for SMP state x86: Set the SMP flag when MP init is complete x86: mp: Allow running functions on multiple CPUs x86: mp: Park CPUs before running the OS x86: mp: Add iterators for CPUs x86: mtrr: Use MP calls to list the MTRRs x86: mtrr: Update MTRRs on all CPUs x86: mtrr: Add support for writing to MTRRs on any CPU x86: mtrr: Update the command to use the new mtrr calls x86: mtrr: Restructure so command execution is in one place x86: mtrr: Update 'mtrr' to allow setting MTRRs on any CPU x86: mtrr: Enhance 'mtrr' command to list MTRRs on any CPU arch/x86/cpu/cpu.c | 63 ++--- arch/x86/cpu/i386/cpu.c | 26 +-- arch/x86/cpu/mp_init.c | 377 +++++++++++++++++++++++++----- arch/x86/cpu/mtrr.c | 149 ++++++++++++ arch/x86/include/asm/mp.h | 118 ++++++++-- arch/x86/include/asm/mtrr.h | 51 ++++ cmd/x86/mtrr.c | 148 ++++++++---- include/asm-generic/global_data.h | 1 + include/dm/uclass.h | 2 +- 9 files changed, 751 insertions(+), 184 deletions(-) -- 2.27.0.rc0.183.gde8f92d652-goog

3 46

[PATCH 0/7] mmc: zynqmp_sdhci: Add support for Tap delay
by Michal Simek 10 Jun '20

10 Jun '20

Hi, this patchset adding support for Tap delay programming for ZynqMP and Versal. Based on mainline discussion also DT properties have been introduced which are documented here. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/D… The patchset is using these DT properties which are optional. Default values are also listed. The patchset is based on: https://lists.denx.de/pipermail/u-boot/2020-May/410326.html Also new code is adding checking for SOCs which are not needed at that time when patch is applied (For example "mmc: zynq_sdhci: Read clock phase delays from dt" and IS_ENABLED(CONFIG_ARCH_ZYNQMP)... But I kept it there for more cleaner patches built on the top. Thanks, Michal Ashok Reddy Soma (5): Revert "mmc: zynq: parse dt when probing" mmc: zynq_sdhci: Define timing macro's mmc: zynq_sdhci: Set tapdelays based on clk phase delays mmc: zynq_sdhci: Add clock phase delays for Versal mmc: zynq_sdhci: Extend UHS timings till hs200 Michal Simek (2): mmc: zynq_sdhci: Move macro to the top mmc: zynq_sdhci: Read clock phase delays from dt drivers/mmc/sdhci.c | 3 +- drivers/mmc/zynq_sdhci.c | 406 ++++++++++++++++++++++++++++++++++++--- include/mmc.h | 13 ++ include/sdhci.h | 1 + 4 files changed, 398 insertions(+), 25 deletions(-) -- 2.26.2

4 16

[PATCH v2 00/35] dm: Add programmatic generation of ACPI tables (part B)
by Simon Glass 10 Jun '20

10 Jun '20

NOTE: I have resent this as v1 to avoid confusion This is split from the original series in an attempt to get things applied in chunks. This part includes: - writing basic ACPI code for integers, strings, names, packages - writing descriptors for GPIO, I2C, interrupts, SPI - writing code to enable/disable ACPI peripherals via GPIOs - writing SSDT and DSDT tables - additional ways to determine ACPI device names Much of this code is taken from coreboot and I have tried to avoid changing the original code for no reason. Changes include: - splitting the acpi_dp functions into their own file - adding tests - adding (lots of) comments - using a context pointer instead of global variables - tidying up some code where couldn't resist (e.g. acpigen_emit_namestring()) Changes in v2: - Fix memset of I2C descriptor - Fix memset of SPI descriptor Changes in v1: - Capitalise ACPI_OPS_PTR - Split into more patches for review - Add tests - Rebase on top of common.h series - Fix 'the an' typo - Move header definitions into this patch - Update sandbox driver slightly for testing - Switch parameter order of _acpi_fill_ssdt() and make it static - Fix 'sentinal' and 'METHOD_FILL_SDDT' typos - Correct the commit subject - Generalise the ACPI function recursion with acpi_recurse_method() - Generalise the ACPI function recursion with acpi_recurse_method() - Use OEM_TABLE_ID instead of ACPI_TABLE_CREATOR - Update ACPI_DSTATUS enum - Drop writing of coreboot tables - Generalise the ACPI function recursion with acpi_recurse_method() - Use acpi,ddn instead of acpi,desc - Rename to acpi_device_infer_name() - Update newly created sandbox tests Simon Glass (35): dm: core: Add an ACPI name for the root node acpi: Add a function to get a device path and scope acpi: Add a way to check device status irq: Add a method to convert an interrupt to ACPI acpi: Support generation of ACPI code acpi: Support generation of interrupt descriptor gpio: Add a method to convert a GPIO to ACPI acpi: Support string output acpi: Support generation of GPIO descriptor acpi: Support generation of a GPIO/irq for a device acpi: Support generation of I2C descriptor acpi: Support generation of SPI descriptor acpigen: Support writing a length acpigen: Support writing a package acpi: Support writing an integer acpi: Support writing a string acpi: Support writing a name acpi: Support writing a UUID acpi: Support writing Device Properties objects via _DSD acpi: Support writing a GPIO acpi: Support copying properties from device tree to ACPI acpi: Add support for various misc ACPI opcodes acpi: Add support for writing a Power Resource acpi: Add support for writing a GPIO power sequence acpi: Add support for a generic power sequence acpi: Add support for SSDT generation x86: acpi: Move MADT down a bit acpi: Record the items added to SSDT acpi: Support ordering SSDT data by device x86: Allow devices to write an SSDT acpi: Add support for DSDT generation x86: Allow devices to write to DSDT pci: Avoid a crash in device_is_on_pci_bus() dm: acpi: Enhance acpi_get_name() acpi: Add an acpi split command arch/sandbox/dts/test.dts | 14 +- arch/x86/lib/acpi_table.c | 54 +- cmd/acpi.c | 15 +- doc/device-tree-bindings/chosen.txt | 9 + doc/device-tree-bindings/device.txt | 13 + drivers/core/acpi.c | 207 ++++++- drivers/core/root.c | 13 + drivers/gpio/gpio-uclass.c | 21 + drivers/gpio/sandbox.c | 86 +++ drivers/i2c/sandbox_i2c.c | 1 + drivers/misc/irq-uclass.c | 18 +- drivers/misc/irq_sandbox.c | 16 + drivers/rtc/sandbox_rtc.c | 13 + drivers/spi/sandbox_spi.c | 1 + include/acpi/acpi_device.h | 401 +++++++++++++ include/acpi/acpi_dp.h | 283 +++++++++ include/acpi/acpi_table.h | 6 + include/acpi/acpigen.h | 347 +++++++++++ include/asm-generic/gpio.h | 27 + include/dm/acpi.h | 63 ++ include/dm/device.h | 2 +- include/irq.h | 43 ++ include/spi.h | 4 +- include/test/ut.h | 17 + lib/acpi/Makefile | 3 + lib/acpi/acpi_device.c | 812 ++++++++++++++++++++++++++ lib/acpi/acpi_dp.c | 397 +++++++++++++ lib/acpi/acpigen.c | 477 +++++++++++++++ test/dm/Makefile | 2 + test/dm/acpi.c | 277 ++++++++- test/dm/acpi_dp.c | 511 +++++++++++++++++ test/dm/acpigen.c | 861 ++++++++++++++++++++++++++++ test/dm/gpio.c | 62 ++ test/dm/irq.c | 23 + test/dm/pci.c | 14 + 35 files changed, 5080 insertions(+), 33 deletions(-) create mode 100644 include/acpi/acpi_device.h create mode 100644 include/acpi/acpi_dp.h create mode 100644 include/acpi/acpigen.h create mode 100644 lib/acpi/acpi_device.c create mode 100644 lib/acpi/acpi_dp.c create mode 100644 lib/acpi/acpigen.c create mode 100644 test/dm/acpi_dp.c create mode 100644 test/dm/acpigen.c -- 2.26.2.645.ge9eca65c58-goog

4 83

[PATCH v5 1/8] lib: rsa: distinguish between tpl and spl for CONFIG_RSA_VERIFY
by Heiko Stuebner 09 Jun '20

09 Jun '20

From: Heiko Stuebner <heiko.stuebner(a)theobroma-systems.com> While the SPL may want to do signature checking this won't be the case for TPL in all cases, as TPL is mostly used when the amount of initial memory is not enough for a full SPL. So on a system where SPL uses DM but TPL does not we currently end up with a TPL compile error of: lib/rsa/rsa-verify.c:48:25: error: dereferencing pointer to incomplete type ‘struct checksum_algo’ To prevent that change the $(SPL_) to $(SPL_TPL_) to distinguish between both. If someone really needs FIT signature checking in TPL as well, a new TPL_RSA_VERIFY config symbol needs to be added. Signed-off-by: Heiko Stuebner <heiko.stuebner(a)theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- changes in v5: - drop change that belongs in patch 2/8 changes in v4: - amound -> amount - found another entry to handle changes in v2: - fix typo "distinguis(h)" lib/rsa/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/rsa/Makefile b/lib/rsa/Makefile index 14ed3cb401..c61ebfd79e 100644 --- a/lib/rsa/Makefile +++ b/lib/rsa/Makefile @@ -5,6 +5,6 @@ # (C) Copyright 2000-2007 # Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. -obj-$(CONFIG_$(SPL_)RSA_VERIFY) += rsa-verify.o rsa-checksum.o +obj-$(CONFIG_$(SPL_TPL_)RSA_VERIFY) += rsa-verify.o rsa-checksum.o obj-$(CONFIG_RSA_VERIFY_WITH_PKEY) += rsa-keyprop.o obj-$(CONFIG_RSA_SOFTWARE_EXP) += rsa-mod-exp.o -- 2.25.1

4 14

[PATCH v2 1/1] imx: rom api: fix image offset computation
by Sébastien Szymanski 09 Jun '20

09 Jun '20

When not booting from FlexSPI, the offset computation is: offset = image_offset + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000; When booting from SD card or eMMC user partition, image_offset is 0x8000. It is useless to add and remove 0x8000. When booting from other device, image_offset is 0 so this computation is wrong. Simplfy this computation to work on all booting devices. Signed-off-by: Sébastien Szymanski <sebastien.szymanski(a)armadeus.com> --- Changes from v2: * Previous version was wrong. arch/arm/mach-imx/spl_imx_romapi.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c index 5dc0f7174e..78dd005e7f 100644 --- a/arch/arm/mach-imx/spl_imx_romapi.c +++ b/arch/arm/mach-imx/spl_imx_romapi.c @@ -83,12 +83,7 @@ static int spl_romapi_load_image_seekable(struct spl_image_info *spl_image, printf("image offset 0x%x, pagesize 0x%x, ivt offset 0x%x\n", image_offset, pagesize, offset); - if (((rom_bt_dev >> 16) & 0xff) == BT_DEV_TYPE_FLEXSPINOR) - offset = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512; - else - offset = image_offset + - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000; - + offset = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512; size = ALIGN(sizeof(struct image_header), pagesize); ret = g_rom_api->download_image((u8 *)header, offset, size, ((uintptr_t)header) ^ offset ^ size); -- 2.26.2

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[PATCH 1/5] imx8mm_evk: Select the watchdog driver
by Fabio Estevam 08 Jun '20

08 Jun '20

Currently the watchdog driver is not selected, which causes the following warnings in both SPL and U-Boot proper: U-Boot SPL 2020.07-rc1-00387-g67887903af (May 07 2020 - 23:49:27 -0300) Normal Boot WDT: Started without servicing (60s timeout) Trying to boot from MMC1 U-Boot 2020.07-rc1-00387-g67887903af (May 07 2020 - 23:49:27 -0300) CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz Reset cause: POR Model: FSL i.MX8MM EVK board DRAM: 2 GiB WDT: Started without servicing (60s timeout) .... System reboots after staying 60s in the U-Boot prompt. Fix this problem by enabling CONFIG_WATCHDOG so that watchdog can be properly serviced. Suggested-by: Marek Vasut <marex(a)denx.de> Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- configs/imx8mm_evk_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 9a72f46f27..e7abf6b07c 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -85,5 +85,4 @@ CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y -# CONFIG_WATCHDOG is not set CONFIG_IMX_WATCHDOG=y -- 2.17.1

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