January 2020 - U-Boot

[PATCH v1 0/1] MIPS: allow override of flush_dcache_range()
by Alex Nemirovsky 08 Jan '20

08 Jan '20

Useful in custom HW designs which have a need to flush dcache range in a completely non standard way. Alex Nemirovsky (1): MIPS: allow override of flush_dcache_range() arch/mips/lib/cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4

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[PATCH] net: phy: add XFI, USXGMII types to is_10g_interface helper
by Alex Marginean 08 Jan '20

08 Jan '20

The helper is used to reset PHYs on connect and it determines the clause to use (c22/c45) based on interface type. This fixes 'PHY reset timed out' warnings in console for USXGMII/XFI PHYs. Signed-off-by: Alex Marginean <alexandru.marginean(a)nxp.com> --- include/phy.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/phy.h b/include/phy.h index 6ace9b3a0c..8debb28fad 100644 --- a/include/phy.h +++ b/include/phy.h @@ -249,7 +249,9 @@ extern struct phy_driver gen10g_driver; /* For now, XGMII is the only 10G interface */ static inline int is_10g_interface(phy_interface_t interface) { - return interface == PHY_INTERFACE_MODE_XGMII; + return interface == PHY_INTERFACE_MODE_XGMII || + interface == PHY_INTERFACE_MODE_USXGMII || + interface == PHY_INTERFACE_MODE_XFI; } #endif -- 2.17.1

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[U-Boot] [PATCH 0/4] fdt: Switch to the latest libfdt, sort-of
by Simon Glass 08 Jan '20

08 Jan '20

This series brings over the latest libfdt with some changes to deal with the recent code-size bloat. With this change U-Boot size increases about 2.5KB on 'rock' and SPL reduces by about 128 bytes. This should be acceptable. The 'assumptions' series is still under review, so we can sync that up later when complete. Simon Glass (4): fdt: Add INT32_MAX to kernel.h for libfdt fdt: Add Kconfig options to control code size mx6: tbs2910: Minimise libfdt code size fdt: Sync up to the latest libfdt configs/tbs2910_defconfig | 1 + include/linux/kernel.h | 2 + include/linux/libfdt_env.h | 1 + lib/Kconfig | 33 +++ lib/libfdt/Makefile | 3 +- lib/libfdt/fdt_ro.c | 420 ++++++++++++++++++++------- scripts/dtc/libfdt/Makefile.libfdt | 7 + scripts/dtc/libfdt/fdt.c | 182 ++++++++---- scripts/dtc/libfdt/fdt.h | 47 +-- scripts/dtc/libfdt/fdt_addresses.c | 94 +++--- scripts/dtc/libfdt/fdt_empty_tree.c | 47 +-- scripts/dtc/libfdt/fdt_overlay.c | 91 ++---- scripts/dtc/libfdt/fdt_ro.c | 341 +++++++++++++++------- scripts/dtc/libfdt/fdt_rw.c | 119 ++++---- scripts/dtc/libfdt/fdt_strerror.c | 47 +-- scripts/dtc/libfdt/fdt_sw.c | 241 ++++++++++----- scripts/dtc/libfdt/fdt_wip.c | 47 +-- scripts/dtc/libfdt/libfdt.h | 268 +++++++++++++---- scripts/dtc/libfdt/libfdt_env.h | 48 +-- scripts/dtc/libfdt/libfdt_internal.h | 144 +++++---- tools/libfdt/fdt_rw.c | 3 +- 21 files changed, 1314 insertions(+), 872 deletions(-) -- 2.24.0.rc0.303.g954a862665-goog

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[PULL u-boot] Please pull u-boot-amlogic-20191018
by Neil Armstrong 08 Jan '20

08 Jan '20

Hi Tom, This PR adds more support for the Khadas VIM3L, variant of VIM3 but using the Amlogic SM1 S905D3 SoC, plus various small fixes. The CI job is at https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic/pipelines/1780 Thanks, Neil The following changes since commit 0b0c6af38738f2c132cfd41a240889acaa031c8f: Prepare v2020.01 (2020-01-06 15:56:31 -0500) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git tags/u-boot-amlogic-20200108 for you to fetch changes up to 262d34363373c10a00279036c1561283c30495c2: board: amlogic: select PWRSEQ for all amlogic platform (2020-01-07 14:50:41 +0100) ---------------------------------------------------------------- - Khadas VIM3L based on Amlogic S905D3 support - Various fixups for amlogic boards - Unnecessary header includes drop into video/meson ---------------------------------------------------------------- Anand Moon (2): configs: meson64: enable GIC support for G12A/G12B board: amlogic: select PWRSEQ for all amlogic platform Christian Hewitt (2): ARM: dts: Import Khadas VIM3L DT from Linux 5.5-rc1 boards: amlogic: add Khadas VIM3L support Simon Glass (1): video: meson: Drop unnecessary header includes arch/arm/dts/Makefile | 1 + arch/arm/dts/meson-sm1-khadas-vim3l.dts | 95 +++++++++++++++++++++++ arch/arm/mach-meson/Kconfig | 1 + board/amlogic/w400/MAINTAINERS | 1 + board/amlogic/w400/README.khadas-vim3l | 132 ++++++++++++++++++++++++++++++++ configs/khadas-vim3l_defconfig | 62 +++++++++++++++ drivers/video/meson/meson_canvas.c | 4 + drivers/video/meson/meson_plane.c | 5 ++ drivers/video/meson/meson_vclk.c | 2 + drivers/video/meson/meson_venc.c | 4 + drivers/video/meson/meson_vpu.c | 18 ++++- drivers/video/meson/meson_vpu.h | 17 ++-- drivers/video/meson/meson_vpu_init.c | 4 + include/configs/meson64.h | 2 +- include/video.h | 2 + 15 files changed, 334 insertions(+), 16 deletions(-) create mode 100644 arch/arm/dts/meson-sm1-khadas-vim3l.dts create mode 100644 board/amlogic/w400/README.khadas-vim3l create mode 100644 configs/khadas-vim3l_defconfig

1 1

[NXP-IMX] please pull nxp-imx-1-8-2020
by Peng Fan 08 Jan '20

08 Jan '20

Hi Stefano, Please pull NXP i.MX nxp-imx-1-8-2020 based on imx/master --------------------------------------------------------------------- Add i.MX8MP SoC and EVK board Update README for i.MX8MN EVK and fix mmc env Add pca9450 driver -------------------------------------------------------------------- CI: https://travis-ci.org/MrVan/u-boot/builds/634032004 Thanks, Peng. The following changes since commit b6e7ef4bf71bc0927dea35fdec0a653a82ae57a7: ARM: mxs: spl_boot.c: make early_delay more robust (2020-01-07 10:26:57 +0100) are available in the Git repository at: https://github.com/MrVan/u-boot.git nxp-imx-1-8-2020 for you to fetch changes up to 4cf193430da90b46d698325243f5d34ed16e12c0: imx: imx8mn: enable CONFIG_CMD_ERASEENV (2020-01-08 15:42:05 +0800) ---------------------------------------------------------------- Peng Fan (24): imx: get cpu id/type of i.MX8MP imx8mp: set BYPASS ID SWAP to avoid AXI bus errors imx: cpu: enlarge bit mask to 0x1FF for cpu type imx: imx8m: add Kconfig entry for i.MX8MP imx: spl: support i.MX8MP spl_boot_device dt-bindings: clock: add i.MX8MP clock header arm: dts: add i.MX8MP pinfunc header imx: imx8mp: add basic clock imx: imx8m: add 1GHz fracpll entry pinctrl: imx8m: support i.MX8MP mxc_ocotp: support i.MX8MP ddr: imx8m: Add DRAM PLL to generate 1000Mhz output arm: dts: freescale: Add i.MX8MP dtsi support imx: imx8mp: add pin header file imx: add i.MX8MP PE property imx: Kconfig: make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP imx: imx8m: only support non-dm code in clock_imx8mm.c clk: imx: add imx_clk_mux2_flags clk: imx: add i.MX8MP clk driver imx: imx8m: add imximage-8mp-lpddr4.cfg imx: add i.MX8MP EVK board imx8mn: evk: add README imx: imx8mn_evk: add board_mmc_get_env_dev imx: imx8mn: enable CONFIG_CMD_ERASEENV Ye Li (1): power: Add new PMIC PCA9450 driver arch/arm/dts/Makefile | 3 +- arch/arm/dts/imx8mp-evk-u-boot.dtsi | 121 ++++++++ arch/arm/dts/imx8mp-evk.dts | 231 ++++++++++++++++ arch/arm/dts/imx8mp-pinfunc.h | 931 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/imx8mp.dtsi | 598 ++++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-imx/cpu.h | 1 + arch/arm/include/asm/arch-imx8m/clock.h | 3 +- arch/arm/include/asm/arch-imx8m/clock_imx8mm.h | 112 +++++++- arch/arm/include/asm/arch-imx8m/imx8mp_pins.h | 1080 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/mach-imx/iomux-v3.h | 2 +- arch/arm/include/asm/mach-imx/sys_proto.h | 1 + arch/arm/mach-imx/Kconfig | 3 +- arch/arm/mach-imx/cpu.c | 6 +- arch/arm/mach-imx/imx8m/Kconfig | 11 + arch/arm/mach-imx/imx8m/Makefile | 2 +- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 340 ++++++++++++++++++++--- arch/arm/mach-imx/imx8m/clock_slice.c | 272 ++++++++++++++++++ arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg | 17 ++ arch/arm/mach-imx/imx8m/soc.c | 9 +- arch/arm/mach-imx/spl.c | 3 +- board/freescale/imx8mn_evk/README | 37 +++ board/freescale/imx8mn_evk/imx8mn_evk.c | 5 + board/freescale/imx8mp_evk/Kconfig | 14 + board/freescale/imx8mp_evk/MAINTAINERS | 6 + board/freescale/imx8mp_evk/Makefile | 12 + board/freescale/imx8mp_evk/imx8mp_evk.c | 94 +++++++ board/freescale/imx8mp_evk/lpddr4_timing.c | 1847 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/freescale/imx8mp_evk/spl.c | 158 +++++++++++ configs/imx8mn_ddr4_evk_defconfig | 11 +- configs/imx8mp_evk_defconfig | 84 ++++++ drivers/clk/imx/Kconfig | 16 ++ drivers/clk/imx/Makefile | 2 + drivers/clk/imx/clk-imx8mp.c | 362 ++++++++++++++++++++++++ drivers/clk/imx/clk.h | 10 + drivers/ddr/imx/imx8m/ddrphy_utils.c | 4 + drivers/misc/mxc_ocotp.c | 13 + drivers/pinctrl/nxp/pinctrl-imx8m.c | 1 + drivers/power/pmic/Kconfig | 7 + drivers/power/pmic/Makefile | 2 + drivers/power/pmic/pca9450.c | 93 +++++++ drivers/power/pmic/pmic_pca9450.c | 50 ++++ include/configs/imx8mp_evk.h | 165 +++++++++++ include/dt-bindings/clock/imx8mp-clock.h | 300 ++++++++++++++++++++ include/power/pca9450.h | 60 ++++ 44 files changed, 7048 insertions(+), 51 deletions(-) create mode 100644 arch/arm/dts/imx8mp-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mp-evk.dts create mode 100644 arch/arm/dts/imx8mp-pinfunc.h create mode 100644 arch/arm/dts/imx8mp.dtsi create mode 100644 arch/arm/include/asm/arch-imx8m/imx8mp_pins.h create mode 100644 arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg create mode 100644 board/freescale/imx8mn_evk/README create mode 100644 board/freescale/imx8mp_evk/Kconfig create mode 100644 board/freescale/imx8mp_evk/MAINTAINERS create mode 100644 board/freescale/imx8mp_evk/Makefile create mode 100644 board/freescale/imx8mp_evk/imx8mp_evk.c create mode 100644 board/freescale/imx8mp_evk/lpddr4_timing.c create mode 100644 board/freescale/imx8mp_evk/spl.c create mode 100644 configs/imx8mp_evk_defconfig create mode 100644 drivers/clk/imx/clk-imx8mp.c create mode 100644 drivers/power/pmic/pca9450.c create mode 100644 drivers/power/pmic/pmic_pca9450.c create mode 100644 include/configs/imx8mp_evk.h create mode 100644 include/dt-bindings/clock/imx8mp-clock.h create mode 100644 include/power/pca9450.h

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[PATCH] imx: imx8mq: handle ESDHC in mxc_get_clock
by Peng Fan 08 Jan '20

08 Jan '20

fsl_esdhc_imx driver will call "mxc_get_clock(MXC_ESDHC_CLK + dev->seq)", however mxc_get_clock wrongly handle MXC_ESDHC_CLK as root clk and cause sd card could not be detected in U-Boot proper, as below: "Loading Environment from MMC... unable to select a mode" Handle MXC_ESDHC_CLK in mxc_get_clock to fix the issue. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- arch/arm/mach-imx/imx8m/clock_imx8mq.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c index 2db5bde211..878f2be166 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c @@ -326,16 +326,20 @@ unsigned int mxc_get_clock(enum mxc_clock clk) { u32 val; - if (clk == MXC_ARM_CLK) + switch(clk) { + case MXC_ARM_CLK: return get_root_clk(ARM_A53_CLK_ROOT); - - if (clk == MXC_IPG_CLK) { + case MXC_IPG_CLK: clock_get_target_val(IPG_CLK_ROOT, &val); val = val & 0x3; return get_root_clk(AHB_CLK_ROOT) / (val + 1); + case MXC_ESDHC_CLK: + return get_root_clk(USDHC1_CLK_ROOT); + case MXC_ESDHC2_CLK: + return get_root_clk(USDHC2_CLK_ROOT); + default: + return get_root_clk(clk); } - - return get_root_clk(clk); } u32 imx_get_uartclk(void) -- 2.16.4

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[PATCH] gpio/mpc83xx_spisel_boot.c: gpio driver for SPISEL_BOOT signal
by Rasmus Villemoes 08 Jan '20

08 Jan '20

From: "Klaus H. Sorensen" <khso(a)prevas.dk> Some SoCs in the mpc83xx family, e.g. mpc8309, have a dedicated spi chip select, SPISEL_BOOT, that is used by the boot code to boot from flash. This chip select will typically be used to select a SPI boot flash. The SPISEL_BOOT signal is controlled by a single bit in the SPI_CS register. Implement a gpio driver for the spi chip select register. This allows a spi driver capable of using gpios as chip select, to bind a chip select to SPISEL_BOOT. It may be a little odd to do this as a GPIO driver, since the signal is neither GP or I, but it is quite convenient to present it to the spi driver that way. The alternative it to teach mpc8xxx_spi to handle the SPISEL_BOOT signal itself (that is how it's done in the linux kernel, see commit 69b921acae8a) Signed-off-by: Klaus H. Sorensen <khso(a)prevas.dk> Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- .../gpio/fsl,mpc83xx-spisel-boot.txt | 22 +++ drivers/gpio/Kconfig | 8 + drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_spisel_boot.c | 148 ++++++++++++++++++ 4 files changed, 179 insertions(+) create mode 100644 doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt create mode 100644 drivers/gpio/mpc83xx_spisel_boot.c diff --git a/doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt b/doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt new file mode 100644 index 0000000000..52d8bb0a5c --- /dev/null +++ b/doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt @@ -0,0 +1,22 @@ +MPC83xx SPISEL_BOOT gpio controller + +Provide access to MPC83xx SPISEL_BOOT signal as a gpio to allow it to be +easily bound as a SPI controller chip select. + +The SPISEL_BOOT signal is always an output. + +Required properties: + +- compatible: must be "fsl,mpc83xx-spisel-boot" or "fsl,mpc8309-spisel-boot". +- reg: must point to the SPI_CS register in the SoC register map. +- ngpios: number of gpios provided by driver, normally 1. + +Example: + + spisel_boot: spisel_boot@14c { + compatible = "fsl,mpc8309-spisel-boot"; + reg = <0x14c 0x04>; + #gpio-cells = <2>; + device_type = "gpio"; + ngpios = <1>; + }; diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index c1ad5d64a3..73fdb8cb3b 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -383,6 +383,14 @@ config MPC8XXX_GPIO value setting, the open-drain feature, which can configure individual GPIOs to work as open-drain outputs, is supported. +config MPC83XX_SPISEL_BOOT + bool "Freescale MPC83XX SPISEL_BOOT driver" + depends on DM_GPIO && ARCH_MPC830X + help + GPIO driver to set/clear dedicated SPISEL_BOOT output on MPC83XX. + + This pin is typically used as spi chip select to a spi nor flash. + config MT7621_GPIO bool "MediaTek MT7621 GPIO driver" depends on DM_GPIO && SOC_MT7628 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index ccc49e2eb0..bbeec30431 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_DM644X_GPIO) += da8xx_gpio.o obj-$(CONFIG_ALTERA_PIO) += altera_pio.o obj-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o obj-$(CONFIG_MPC8XXX_GPIO) += mpc8xxx_gpio.o +obj-$(CONFIG_MPC83XX_SPISEL_BOOT) += mpc83xx_spisel_boot.o obj-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o obj-$(CONFIG_OMAP_GPIO) += omap_gpio.o obj-$(CONFIG_DB8500_GPIO) += db8500_gpio.o diff --git a/drivers/gpio/mpc83xx_spisel_boot.c b/drivers/gpio/mpc83xx_spisel_boot.c new file mode 100644 index 0000000000..c7b08404d9 --- /dev/null +++ b/drivers/gpio/mpc83xx_spisel_boot.c @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 DEIF A/S + * + * GPIO driver to set/clear SPISEL_BOOT pin on mpc83xx. + */ + +#include <common.h> +#include <dm.h> +#include <mapmem.h> +#include <asm/gpio.h> + +struct mpc83xx_spisel_boot { + u32 __iomem *spi_cs; + ulong addr; + uint gpio_count; + ulong type; +}; + +static u32 gpio_mask(uint gpio) +{ + return (1U << (31 - (gpio))); +} + +static int mpc83xx_spisel_boot_direction_input(struct udevice *dev, uint gpio) +{ + return -EINVAL; +} + +static int mpc83xx_spisel_boot_set_value(struct udevice *dev, uint gpio, int value) +{ + struct mpc83xx_spisel_boot *data = dev_get_priv(dev); + + debug("%s: gpio=%d, value=%u, gpio_mask=0x%08x\n", __func__, + gpio, value, gpio_mask(gpio)); + + if (value) + setbits_be32(data->spi_cs, gpio_mask(gpio)); + else + clrbits_be32(data->spi_cs, gpio_mask(gpio)); + + return 0; +} + +static int mpc83xx_spisel_boot_direction_output(struct udevice *dev, uint gpio, int value) +{ + return 0; +} + +static int mpc83xx_spisel_boot_get_value(struct udevice *dev, uint gpio) +{ + struct mpc83xx_spisel_boot *data = dev_get_priv(dev); + + return !!(in_be32(data->spi_cs) & gpio_mask(gpio)); +} + +static int mpc83xx_spisel_boot_get_function(struct udevice *dev, uint gpio) +{ + return GPIOF_OUTPUT; +} + +#if CONFIG_IS_ENABLED(OF_CONTROL) +static int mpc83xx_spisel_boot_ofdata_to_platdata(struct udevice *dev) +{ + struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev); + fdt_addr_t addr; + u32 reg[2]; + + dev_read_u32_array(dev, "reg", reg, 2); + addr = dev_translate_address(dev, reg); + + plat->addr = addr; + plat->size = reg[1]; + plat->ngpios = dev_read_u32_default(dev, "ngpios", 1); + + return 0; +} +#endif + +static int mpc83xx_spisel_boot_platdata_to_priv(struct udevice *dev) +{ + struct mpc83xx_spisel_boot *priv = dev_get_priv(dev); + struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev); + unsigned long size = plat->size; + ulong driver_data = dev_get_driver_data(dev); + + if (size == 0) + size = 0x04; + + priv->addr = plat->addr; + priv->spi_cs = map_sysmem(plat->addr, size); + + if (!priv->spi_cs) + return -ENOMEM; + + priv->gpio_count = plat->ngpios; + + priv->type = driver_data; + + return 0; +} + +static int mpc83xx_spisel_boot_probe(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct mpc83xx_spisel_boot *data = dev_get_priv(dev); + char name[32], *str; + + mpc83xx_spisel_boot_platdata_to_priv(dev); + + snprintf(name, sizeof(name), "MPC@%lx_", data->addr); + str = strdup(name); + + if (!str) + return -ENOMEM; + + uc_priv->bank_name = str; + uc_priv->gpio_count = data->gpio_count; + + return 0; +} + +static const struct dm_gpio_ops mpc83xx_spisel_boot_ops = { + .direction_input = mpc83xx_spisel_boot_direction_input, + .direction_output = mpc83xx_spisel_boot_direction_output, + .get_value = mpc83xx_spisel_boot_get_value, + .set_value = mpc83xx_spisel_boot_set_value, + .get_function = mpc83xx_spisel_boot_get_function, +}; + +static const struct udevice_id mpc83xx_spisel_boot_ids[] = { + { .compatible = "fsl,mpc8309-spisel-boot" }, + { .compatible = "fsl,mpc83xx-spisel-boot" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(spisel_boot_mpc83xx) = { + .name = "spisel_boot_mpc83xx", + .id = UCLASS_GPIO, + .ops = &mpc83xx_spisel_boot_ops, +#if CONFIG_IS_ENABLED(OF_CONTROL) + .ofdata_to_platdata = mpc83xx_spisel_boot_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct mpc8xxx_gpio_plat), + .of_match = mpc83xx_spisel_boot_ids, +#endif + .probe = mpc83xx_spisel_boot_probe, + .priv_auto_alloc_size = sizeof(struct mpc83xx_spisel_boot), +}; -- 2.23.0

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[U-Boot] [PATCH v2 00/15] AVB using OP-TEE
by Jens Wiklander 08 Jan '20

08 Jan '20

Hi, This adds support for storing AVB rollback indexes in the RPMB partition. The RPMB partition (content and key) is managed by OP-TEE (https://www.op-tee.org/) which is a secure OS leveraging ARM TrustZone. The Linux kernel can already support OP-TEE with reading and updating rollback indexes in the RPMB partition, the catch is that this is needed before the kernel has booted. The design here is the same as what is in the Linux kernel, with the exception that the user space daemon tee-supplicant is integrated in the OP-TEE driver here (drivers/tee/optee/supplicant.c) instead. A new uclass (UCLASS_TEE) is introduced to provide an abstraction for interfacing with a Trusted Execution Environment (TEE). There's also the OP-TEE driver using UCLASS_TEE for registration. A Trusted Application (TA) interface is added to be used by the AVB verify functions which are updated accordingly. The TA is managed by OP-TEE and is executed in a secure TrustZone protected environment. The header files drivers/tee/optee/optee_{msg,msg_supplicant,smc}.h and include/tee/optee_ta_avb.h are copied from https://github.com/OP-TEE/optee_os/tree/master more or less unmodified. They may need to be updated from time to time in order to support new features. In MMC there's a new function, mmc_rpmb_route_frames(), which as the name suggests is used to route RPMB frames to/from the MMC. This saves OP-TEE from implementing an MMC driver which would need to share resources with its counterpart here in U-boot. This was tested on a Hikey (Kirin 620) board. I've added myself as maintainer of the TEE stuff. v2: * Added sandbox driver and a test in test/dm for the new TEE uclass: Commit ("test: tee: test TEE uclass") and the enabling commits ("sandbox: dt: add sandbox_tee node") and ("configs: sandbox: enable CONFIG_TEE (TEE uclass)") * Added descriptions of exported structs and functions * Added documentation for the TEE uclass and the OP-TEE driver with the new commit ("Documentation: tee uclass and op-tee driver") * Added documentation for the changes in avb_verify * Addressed review comments from Simon Glass * Added the commit ("cmd: avb: print error message if command fails") * Made a few functions static in the OP-TEE driver * Commit ("cmd: avb read_rb: print rb_idx in hexadecimal") and ("tee: optee: support AVB trusted application"); Reviewed-by: Igor Opaniuk <igor.opaniuk(a)linaro.org> Thanks, Jens Jens Wiklander (15): dm: fdt: scan for devices under /firmware too cmd: avb read_rb: print rb_idx in hexadecimal cmd: avb: print error message if command fails mmc: rpmb: add mmc_rpmb_route_frames() Add UCLASS_TEE for Trusted Execution Environment dt/bindings: add bindings for optee tee: add OP-TEE driver Documentation: tee uclass and op-tee driver test: tee: test TEE uclass sandbox: dt: add sandbox_tee node configs: sandbox: enable CONFIG_TEE (TEE uclass) arm: dt: hikey: Add optee node optee: support routing of rpmb data frames to mmc tee: optee: support AVB trusted application avb_verify: support using OP-TEE TA AVB MAINTAINERS | 7 + arch/arm/dts/hi6220-hikey.dts | 7 + arch/sandbox/dts/sandbox.dts | 4 + arch/sandbox/dts/sandbox64.dts | 4 + arch/sandbox/dts/test.dts | 4 + cmd/avb.c | 19 +- common/avb_verify.c | 132 +++- configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig | 1 + configs/sandbox_noblk_defconfig | 1 + configs/sandbox_spl_defconfig | 1 + doc/README.avb2 | 13 + doc/README.tee | 112 ++++ .../firmware/linaro,optee-tz.txt | 31 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/core/root.c | 15 +- drivers/mmc/rpmb.c | 160 +++++ drivers/tee/Kconfig | 17 + drivers/tee/Makefile | 4 + drivers/tee/optee/Kconfig | 23 + drivers/tee/optee/Makefile | 5 + drivers/tee/optee/core.c | 622 ++++++++++++++++++ drivers/tee/optee/optee_msg.h | 423 ++++++++++++ drivers/tee/optee/optee_msg_supplicant.h | 234 +++++++ drivers/tee/optee/optee_private.h | 41 ++ drivers/tee/optee/optee_smc.h | 444 +++++++++++++ drivers/tee/optee/rpmb.c | 184 ++++++ drivers/tee/optee/supplicant.c | 92 +++ drivers/tee/tee-uclass.c | 192 ++++++ include/avb_verify.h | 4 + include/dm/uclass-id.h | 1 + include/mmc.h | 2 + include/tee.h | 297 +++++++++ include/tee/optee_ta_avb.h | 48 ++ test/dm/Makefile | 1 + test/dm/tee.c | 182 +++++ 38 files changed, 3325 insertions(+), 7 deletions(-) create mode 100644 doc/README.tee create mode 100644 doc/device-tree-bindings/firmware/linaro,optee-tz.txt create mode 100644 drivers/tee/Kconfig create mode 100644 drivers/tee/Makefile create mode 100644 drivers/tee/optee/Kconfig create mode 100644 drivers/tee/optee/Makefile create mode 100644 drivers/tee/optee/core.c create mode 100644 drivers/tee/optee/optee_msg.h create mode 100644 drivers/tee/optee/optee_msg_supplicant.h create mode 100644 drivers/tee/optee/optee_private.h create mode 100644 drivers/tee/optee/optee_smc.h create mode 100644 drivers/tee/optee/rpmb.c create mode 100644 drivers/tee/optee/supplicant.c create mode 100644 drivers/tee/tee-uclass.c create mode 100644 include/tee.h create mode 100644 include/tee/optee_ta_avb.h create mode 100644 test/dm/tee.c -- 2.17.1

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[Patch v2] net: pfe_eth: Use spi_flash_read API to access flash memory
by Kuldeep Singh 08 Jan '20

08 Jan '20

Current PFE firmware access spi-nor memory directly. New spi-mem framework does not support direct memory access. So, let's use spi_flash_read API to access memory instead of directly using it. Signed-off-by: Kuldeep Singh <kuldeep.singh(a)nxp.com> --- v2: Add return error code Some changes in displayed log drivers/net/pfe_eth/pfe_firmware.c | 45 +++++++++++++++++++++++++++++++++++++- include/configs/ls1012a_common.h | 5 ++++- 2 files changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index e4563f1..3aa9a08 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -12,13 +12,14 @@ #include <net/pfe_eth/pfe_eth.h> #include <net/pfe_eth/pfe_firmware.h> +#include <spi_flash.h> #ifdef CONFIG_CHAIN_OF_TRUST #include <fsl_validate.h> #endif #define PFE_FIRMWARE_FIT_CNF_NAME "config@1" -static const void *pfe_fit_addr = (void *)CONFIG_SYS_LS_PFE_FW_ADDR; +static const void *pfe_fit_addr; /* * PFE elf firmware loader. @@ -159,6 +160,44 @@ static int pfe_fit_check(void) return ret; } +int pfe_spi_flash_init(void) +{ + struct spi_flash *pfe_flash; + int ret = 0; + void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH); + +#ifdef CONFIG_DM_SPI_FLASH + struct udevice *new; + + /* speed and mode will be read from DT */ + ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, + CONFIG_ENV_SPI_CS, 0, 0, &new); + + pfe_flash = dev_get_uclass_priv(new); +#else + pfe_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, + CONFIG_ENV_SPI_CS, + CONFIG_ENV_SPI_MAX_HZ, + CONFIG_ENV_SPI_MODE); +#endif + if (!pfe_flash) { + printf("SF: probe for pfe failed\n"); + return ret; + } + + ret = spi_flash_read(pfe_flash, + CONFIG_SYS_LS_PFE_FW_ADDR, + CONFIG_SYS_QE_FMAN_FW_LENGTH, + addr); + if (ret) + printf("SF: read for pfe failed\n"); + + pfe_fit_addr = addr; + spi_flash_free(pfe_flash); + + return ret; +} + /* * PFE firmware initialization. * Loads different firmware files from FIT image. @@ -183,6 +222,10 @@ int pfe_firmware_init(void) int ret = 0; int fw_count; + ret = pfe_spi_flash_init(); + if (ret) + goto err; + ret = pfe_fit_check(); if (ret) goto err; diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 2579e2f..cbc5bff 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -36,9 +36,12 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +/* PFE */ +#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000 +#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 + /*SPI device */ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_TFABOOT) -#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000 #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_FSL_SPI_INTERFACE #define CONFIG_SF_DATAFLASH -- 2.7.4

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[PATCH] mpc83xx_clk: always treat MPC83XX_CLK_PCI as invalid
by Rasmus Villemoes 08 Jan '20

08 Jan '20

The current mpc83xx_clk driver is broken for any board for which mpc83xx_has_pci() is true, i.e. anything not MPC8308: When is_clk_valid() reports that MPC83XX_CLK_PCI is valid, init_all_clks() proceeds to call init_single_clk(), but that doesn't know about either MPC83XX_CLK_PCI or has any handling of the TYPE_SCCR_ONOFF mode correctly returned by retrieve_mode(). Hence init_single_clk() ends up returning -EINVAL, and the whole board hangs in serial_init(). The quickest fix is to simply pretend that clock is invalid for all, since nobody can have been relying on it. Adding proper support seems to be a bit more involved than just handling TYPE_SCCR_ONOFF: - The power-on-reset value of SCCR[PCICM] is 0, so mpc83xx_clk_enable() would probably need to be tought to enable the clock. - The frequency of PCI_SYNC_OUT is either SYS_CLK_IN or SYS_CLK_IN/2 depending on the CFG_CLKIN_DIV configuration input, but that can't be read from software, so to properly fill out ->speed[MPC83XX_CLK_PCI] I think one would need guidance from Kconfig or dtb. Partially fixes: 07d538d281 clk: Add MPC83xx clock driver Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- drivers/clk/mpc83xx_clk.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/clk/mpc83xx_clk.c b/drivers/clk/mpc83xx_clk.c index 32d2db9eda..1b2b216596 100644 --- a/drivers/clk/mpc83xx_clk.c +++ b/drivers/clk/mpc83xx_clk.c @@ -65,7 +65,10 @@ static inline bool is_clk_valid(struct udevice *clk, int id) case MPC83XX_CLK_DMAC: return (type == SOC_MPC8308) || (type == SOC_MPC8309); case MPC83XX_CLK_PCI: - return mpc83xx_has_pci(type); + /* + * FIXME: implement proper support for this. + */ + return 0 && mpc83xx_has_pci(type); case MPC83XX_CLK_CSB: return true; case MPC83XX_CLK_I2C2: -- 2.23.0

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