January 2020 - U-Boot

Please pull u-boot-marvell/master v2
by Stefan Roese 22 Jan '20

22 Jan '20

Hi Tom, please pull the 2nd batch of MVEBU related patches in this merge window: ---------------------------------------------------------------- - Clearfog: Add run-time board detection with TLV EEPROM support (Baruch) ---------------------------------------------------------------- Thanks, Stefan The following changes since commit c7819d409ab7671991bf906482b7adcc21266f75: Merge branch '2020-01-17-reduce-size-of-common-h-even-more' (2020-01-20 12:23:33 -0500) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to 584a3d2622e9107d09434b05df8b6c50e25fe73f: ARM: mvebu: clearfog: add Clearfog Base serdes configuration (2020-01-21 15:56:15 +0100) ---------------------------------------------------------------- Baruch Siach (10): ddr: marvell: a38x: allow board specific clock out setup arm: mvebu: clearfog: enable both DDR clocks ARM: mvebu: clearfog: add EEPROM devices cmd: add tlv_eeprom command ARM: mvebu: clearfog: add support for EEPROM TLV info ARM: mvebu: clearfog: read basic TLV data ARM: mvebu: clearfog: print TLV stored product name ARM: mvebu: clearfog: run-time selection of DT file ARM: mvebu: clearfog: add Clearfog GTR support ARM: mvebu: clearfog: add Clearfog Base serdes configuration arch/arm/dts/armada-388-clearfog-u-boot.dtsi | 12 + arch/arm/dts/armada-388-clearfog.dts | 6 + arch/arm/dts/armada-38x-solidrun-microsom.dtsi | 8 + arch/arm/mach-mvebu/Kconfig | 1 + board/solidrun/clearfog/clearfog.c | 72 +- board/solidrun/common/Makefile | 5 + board/solidrun/common/tlv_data.c | 102 +++ board/solidrun/common/tlv_data.h | 18 + cmd/Kconfig | 14 + cmd/Makefile | 2 + cmd/tlv_eeprom.c | 1105 ++++++++++++++++++++++++ configs/clearfog_defconfig | 4 + drivers/ddr/marvell/a38x/ddr3_training.c | 10 +- drivers/ddr/marvell/a38x/ddr_topology_def.h | 3 + include/tlv_eeprom.h | 152 ++++ 15 files changed, 1510 insertions(+), 4 deletions(-) create mode 100644 board/solidrun/common/Makefile create mode 100644 board/solidrun/common/tlv_data.c create mode 100644 board/solidrun/common/tlv_data.h create mode 100644 cmd/tlv_eeprom.c create mode 100644 include/tlv_eeprom.h

2 1

[PATCH] arm: Enable VIDEO_BPP32 on pinebook.
by Vagrant Cascadian 22 Jan '20

22 Jan '20

Video output on the pinebook LCD screen was broken by: commit 2cc393f32fd9 ("video: make BPP and ANSI configs optional"). Enable VIDEO_BPP32 which was previously enabled by default when DM_VIDEO was set. Signed-off-by: Vagrant Cascadian <vagrant(a)debian.org> --- configs/pinebook_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig index 929434e25a..306a6bc6b9 100644 --- a/configs/pinebook_defconfig +++ b/configs/pinebook_defconfig @@ -22,3 +22,4 @@ CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y # CONFIG_USB_GADGET is not set CONFIG_VIDEO_BRIDGE=y CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y +CONFIG_VIDEO_BPP32=y -- 2.20.1

4 5

RE: [PATCH v3] board_f.c: Insure gd->new_bootstage alignment
by Patrick DELAUNAY 22 Jan '20

22 Jan '20

Hi Patrice and Tom > Sent: mercredi 18 décembre 2019 10:10 > > Hi Simon, > > > From: Simon Glass <sjg(a)chromium.org> > > Sent: mardi 17 décembre 2019 16:46 > > > > Hi Patrice, > > > > On Wed, 27 Nov 2019 at 02:11, Patrice Chotard <patrice.chotard(a)st.com> > wrote: > > > > > > In reserve_bootstage(), in case size is odd, gd->new_bootstage is > > > not aligned. In bootstage_relocate(), the platform hangs when > > > getting access to data->record[i].name. > > > To avoid this issue, make gd->new_bootstage 16 byte aligned. > > > > > > To insure that new_bootstage is 16 byte aligned (at least needed for > > > x86_64 and ARMv8) and new_bootstage starts down to get enough space, > > > ALIGN_DOWN macro is used. > > > > > > Fixes: ac9cd4805c8b ("bootstage: Correct relocation algorithm") > > > > > > Signed-off-by: Patrice Chotard <patrice.chotard(a)st.com> > > > Reviewed-by: Vikas MANOCHA <vikas.manocha(a)st.com> > > > Reviewed-by: Patrick Delaunay <patrick.delaunay(a)st.com> > > > Tested-by: Patrick Delaunay <patrick.delaunay(a)st.com> > > For information, Patrice is absent for personal reason up to beginning next year. > Don't wait a fast answer. > > > For this patch I think it would be better to update reserve_fdt() to > > keep things aligned, assuming that is the problem. > > I don't sure that solve the issue, > for me the problem is only for the bootstage struct (gd->bootstage) And > reserve_fdt() already alligne size on 32 bytes > > If I remember the Patrice analysis: > > 1- bootstage_get_size return a odd value (or at least not 16 bytes aligned I don't > remember). > > 2- In reserve_bootstage() > int size = bootstage_get_size(); > gd->start_addr_sp -= size > => it is a unaligned address even if gd->start_addr_sp is 32 bytes alligned > > gd->new_bootstage = map_sysmem(gd->start_addr_sp, size); > => also unaligned > > 3- Then during relocation, in reloc_bootstage() > gd->bootstage = gd->new_bootstage; > > > 4- crash occur because in next bootstage function beaucse the boostage address > don't respect pointer to struct allignement... > > struct bootstage_data *data = gd->bootstage > > > > At some point we should also document that reservations must keep > > things aligned. > > > > Perhaps this should be handled by a separate function called from all > > these places, which subtracts gd->start_addr_sp and ensures 16-byte alignment. > > Yes that can be a improvement, but perhaps ia a second step / second serie.... > > Do you think about a function called in all reversed_ functions (when start_addr_sp > is modified)... > > static int reserved_allign_check(void) > { > /* make stack pointer 16-byte aligned */ > if (gd->start_addr_sp & 0xf) { > gd->start_addr_sp -= 16; > gd->start_addr_sp &= ~0xf; > } > } > > I prefer a function to reserved a size wich replace in any reserve_ function the line > : > gd->start_addr_sp -= ... > > /* reserve size and make stack pointer 16-byte aligned */ > static int reserve(size_t size) { > gd->start_addr_sp -= size; > /* make stack pointer 16-byte aligned */ > gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp, 16); > } > > I think I will push it, when the patrice patch will be accepted. I am preparing this patch.... Do you think it is ok to merge the Patrice v3 proposal first on master branch for v2020.04 release (he just align the reserved memory for bootstage), and after I make my patch (16-byte align all reserved area). or it is better to make a more generic patch v4 to replace the Patrice one. Regards Patrick

2 3

[PATCH] mx6sabresd: Convert PCI to driver model
by Alifer Moraes 22 Jan '20

22 Jan '20

Convert imx6sabresd PCI to driver model to fix the following warning: ===================== WARNING ====================== This board does not use CONFIG_DM_PCI Please update the board to use CONFIG_DM_PCI before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== After the conversion the following commands were used for testing: => pci enum PCI: Failed autoconfig bar 10 PCI: Failed autoconfig bar 10 => pci 1 Scanning PCI devices on bus 1 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 01.00.00 0x8086 0x08b1 Network controller 0x80 Signed-off-by: Alifer Moraes <alifer.wsdm(a)gmail.com> --- board/freescale/mx6sabresd/mx6sabresd.c | 11 ----------- configs/mx6sabresd_defconfig | 1 + 2 files changed, 1 insertion(+), 11 deletions(-) diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index b346ca4ced..4a208277ac 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -231,16 +231,6 @@ static void setup_spi(void) SETUP_IOMUX_PADS(ecspi1_pads); } -iomux_v3_cfg_t const pcie_pads[] = { - IOMUX_PADS(PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* POWER */ - IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* RESET */ -}; - -static void setup_pcie(void) -{ - SETUP_IOMUX_PADS(pcie_pads); -} - iomux_v3_cfg_t const di0_pads[] = { IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK), /* DISP0_CLK */ IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02), /* DISP0_HSYNC */ @@ -508,7 +498,6 @@ int overwrite_console(void) int board_eth_init(bd_t *bis) { setup_iomux_enet(); - setup_pcie(); return cpu_eth_init(bis); } diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 0bd686ec86..e3b8908928 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -83,6 +83,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y -- 2.17.1

2 2

[PATCH] Output information about device look up failure.
by Nikita Ermakov 22 Jan '20

22 Jan '20

In the case of error while device look up (e.g. wrong interface type was specified) put a message about it even if debug was not enable. Signed-off-by: Nikita Ermakov <coffe92(a)gmail.com> --- disk/part.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/disk/part.c b/disk/part.c index 8982ef3bae..280e3e4f42 100644 --- a/disk/part.c +++ b/disk/part.c @@ -513,7 +513,10 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str, /* Look up the device */ dev = blk_get_device_by_str(ifname, dev_str, dev_desc); if (dev < 0) + { + printf("** Look up for the device %s %s failed **\n", ifname, dev_str); goto cleanup; + } /* Convert partition ID string to number */ if (!part_str || !*part_str) { -- 2.24.1

2 1

[PATCH 1/2] armv8: ls1046a: Updates secure boot headers offset
by Priyanka Singh 22 Jan '20

22 Jan '20

Updates the secure boot headers offsets of Kernel and other firmware images for SD and QSPI boot sources used by esbc_validate command. Signed-off-by: Priyanka Singh <priyanka.singh(a)nxp.com> --- include/configs/ls1046a_common.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 77805479c9..07570187f5 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2016 Freescale Semiconductor - * Copyright 2019 NXP + * Copyright 2019-2020 NXP */ #ifndef __LS1046A_COMMON_H @@ -237,13 +237,13 @@ "fdt_addr_r=0x90000000\0" \ "ramdisk_addr_r=0xa0000000\0" \ "kernel_start=0x1000000\0" \ - "kernelheader_start=0x800000\0" \ + "kernelheader_start=0x600000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "kernelheader_size=0x40000\0" \ "kernel_addr_sd=0x8000\0" \ "kernel_size_sd=0x14000\0" \ - "kernelhdr_addr_sd=0x4000\0" \ + "kernelhdr_addr_sd=0x3000\0" \ "kernelhdr_size_sd=0x10\0" \ "console=ttyS0,115200\0" \ CONFIG_MTDPARTS_DEFAULT "\0" \ -- 2.17.1

1 1

RE: [PATCH v2] armv8: fsl-layerscape: LS1084A: Fix DPMAC1 support
by Priyanka Jain (OSS) 22 Jan '20

22 Jan '20

>-----Original Message----- >From: Pramod Kumar <pramod.kumar_1(a)nxp.com> >Sent: Thursday, January 9, 2020 2:24 PM >To: u-boot(a)lists.denx.de >Cc: Priyanka Jain <priyanka.jain(a)nxp.com>; Pramod Kumar ><pramod.kumar_1(a)nxp.com> >Subject: [PATCH v2] armv8: fsl-layerscape: LS1084A: Fix DPMAC1 support > >LS1088A has four personalities, LS1088A, LS1084A, LS1048A and LS1044A. >LS1088A and LS1084A support 2x 10G DPMAC however DPMAC1 is currently >disabled for LS1084A, Enable to support both 2x 10G DPMAC. > >Signed-off-by: Pramod Kumar <pramod.kumar_1(a)nxp.com> This patch looks to be enhancing another patch "http://patchwork.ozlabs.org/patch/1220239/" Can we combine both in single patch? -Priyanka

1 0

RE: [PATCH 2/2] pci: layerscape: Fix the BARs disable function
by Priyanka Jain 22 Jan '20

22 Jan '20

>-----Original Message----- >From: Z.q. Hou <zhiqiang.hou(a)nxp.com> >Sent: Tuesday, December 17, 2019 3:41 PM >To: u-boot(a)lists.denx.de; Priyanka Jain <priyanka.jain(a)nxp.com>; M.h. >Lian <minghuan.lian(a)nxp.com> >Cc: Z.q. Hou <zhiqiang.hou(a)nxp.com> >Subject: [PATCH 2/2] pci: layerscape: Fix the BARs disable function > >From: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> > >There is not any difference for disabling BARs in RC mode between PCIe >controllers with and without SRIOV. > >Fixes: 80afc63fc342 ("pci: layerscape: add pci driver based on DM") >Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> >--- > drivers/pci/pcie_layerscape.c | 11 ----------- > 1 file changed, 11 deletions(-) > >diff --git a/drivers/pci/pcie_layerscape.c >b/drivers/pci/pcie_layerscape.c index >96533cb2d9..d8ca7e71f8 100644 >--- a/drivers/pci/pcie_layerscape.c >+++ b/drivers/pci/pcie_layerscape.c >@@ -312,17 +312,6 @@ static void ls_pcie_drop_msg_tlp(struct ls_pcie >*pcie) > /* Disable all bars in RC mode */ > static void ls_pcie_disable_bars(struct ls_pcie *pcie) { >- u32 sriov; >- >- sriov = in_le32(pcie->dbi + PCIE_SRIOV); >- >- /* >- * TODO: For PCIe controller with SRIOV, the method to disable bars >- * is different and more complex, so will add later. >- */ Patch description and code comment statement looks contradictory. Is method to disable BAR same or different for with and without SRIOV. >- if (PCI_EXT_CAP_ID(sriov) == PCI_EXT_CAP_ID_SRIOV) >- return; >- > dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_0); > dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_1); > dbi_writel(pcie, 0xfffffffe, PCIE_CS2_OFFSET + PCI_ROM_ADDRESS1); >-- >2.17.1 Priyanka

1 0

[RFC PATCH] Provide mechanism for build-time default env entries
by Joel Johnson 22 Jan '20

22 Jan '20

This enables the building user to specify environment values to be included in the static default_environment with an image. This is useful to build multiple otherwise like configured images, varying by environment unique entries. --- I expected something like this to already be present, but couldn't find such a mechanism. I also assumed that something similar may have been proposed previously, but also couldn't find anything via searching. Signed-off-by: Joel Johnson <mrjoel(a)lixil.net> --- env/Kconfig | 19 +++++++++++++++---- include/env_default.h | 3 +++ 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/env/Kconfig b/env/Kconfig index ed12609f6a..5049cb78be 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -556,14 +556,25 @@ config SYS_RELOC_GD_ENV_ADDR Relocate the early env_addr pointer so we know it is not inside the binary. Some systems need this and for the rest, it doesn't hurt. +config USER_ENV_SETTINGS + string "User build-time additional environment entries" + help + This value is reserved for the building user to provide custom + environment entries to be added to the default environment. Care must + be taken to not break the environment, incompatible entries may cause + failure to compile, or failure of the target board to properly + initialize or boot. The format is key=value pairs, with entries + separated by C-style escaped null terminated values, such as: + "key1=valueA\0key2=valueB\0key3=valueC". + config USE_DEFAULT_ENV_FILE bool "Create default environment from file" help Normally, the default environment is automatically generated - based on the settings of various CONFIG_* options, as well - as the CONFIG_EXTRA_ENV_SETTINGS. By selecting this option, - you can instead define the entire default environment in an - external file. + based on the settings of various CONFIG_* options, combined with values + of board specific CONFIG_EXTRA_ENV_SETTINGS and user provided + CONFIG_USER_ENV_SETTINGS. By selecting this option, you can instead + define the entire default environment in an external file. config DEFAULT_ENV_FILE string "Path to default environment file" diff --git a/include/env_default.h b/include/env_default.h index 56a8bae39a..9396a34715 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -109,6 +109,9 @@ const uchar default_environment[] = { #endif #ifdef CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS +#endif +#ifdef CONFIG_USER_ENV_SETTINGS + CONFIG_USER_ENV_SETTINGS #endif "\0" #else /* CONFIG_USE_DEFAULT_ENV_FILE */ -- 2.20.1

3 10

[PATCH v2 0/9] RISC-V SiFive FU540 support SPL
by Pragnesh Patel 22 Jan '20

22 Jan '20

This series add support for SPL to FU540. This series depends on https://patchwork.ozlabs.org/patch/1196703/ (riscv: dts: Add hifive-unleashed-a00 dts from Linux) U-Boot SPL can boot from L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and U-Boot proper from MMC devices. How to test this patch: 1) Go to OpenSBI-dir : make PLATFORM=sifive/fu540 O=build_dir I=install_dir FW_DYNAMIC=y install 2) cp install_dir/platform/sifive/fu540/firmware/fw_dynamic.bin <u-boot-dir>/ 3) Change to u-boot-dir 4) make sifive_fu540_spl_defconfig 5) make all 6) SD card partition which contains "fw_payload.bin" previously /dev/sdc1 - SiFive bare-metal (or s ->5202) should be now of /dev/sdc1 - 8300 Linux filesystem. 6) sudo dd if=spl/u-boot-spl.bin of=/dev/sdc4 bs=1M 7) sudo dd if=u-boot.itb of=/dev/sdc1 bs=1M Following are the boot messages on FU540 five cores SMP platform: U-Boot SPL 2020.01-00177-ga3fabe50f9 (Jan 17 2020 - 14:20:12 +0530) Trying to boot from MMC1 U-Boot 2020.01-00177-ga3fabe50f9 (Jan 17 2020 - 14:20:12 +0530) CPU: rv64imafdc Model: SiFive HiFive Unleashed A00 DRAM: 8 GiB MMC: spi@10050000:mmc@0: 0 In: serial@10010000 Out: serial@10010000 Err: serial@10010000 Board serial number should not be 0 !! Net: Warning: ethernet@10090000 (eth0) using random MAC address - c6:3a:5b:53:64:8b eth0: ethernet@10090000 Hit any key to stop autoboot: 0 => setenv serverip 172.16.35.74;setenv ipaddr 172.16.35.40;tftpboot 0x83000000 fit.itb;bootm 0x83000000 ethernet@10090000: PHY present at 0 ethernet@10090000: Starting autonegotiation... ethernet@10090000: Autonegotiation complete ethernet@10090000: link up, 100Mbps full-duplex (lpa: 0x41e1) Using ethernet@10090000 device TFTP from server 172.16.35.74; our IP address is 172.16.35.40 Filename 'fit.itb'. Load address: 0x83000000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################### 879.9 KiB/s done Bytes transferred = 13823823 (d2ef4f hex) ## Loading kernel from FIT Image at 83000000 ... Using 'config-1' configuration Trying 'kernel@1' kernel subimage Description: Linux kernel Type: Kernel Image Compression: uncompressed Data Start: 0x830000d8 Data Size: 9247260 Bytes = 8.8 MiB Architecture: RISC-V OS: Linux Load Address: 0x80200000 Entry Point: 0x80200000 Verifying Hash Integrity ... OK ## Loading ramdisk from FIT Image at 83000000 ... Using 'config-1' configuration Trying 'ramdisk@1' ramdisk subimage Description: ramdisk Type: RAMDisk Image Compression: gzip compressed Data Start: 0x838d3378 Data Size: 4568674 Bytes = 4.4 MiB Architecture: RISC-V OS: Linux Load Address: 0x82000000 Entry Point: unavailable Verifying Hash Integrity ... OK Loading ramdisk from 0x838d3378 to 0x82000000 WARNING: 'compression' nodes for ramdisks are deprecated, please fix your .its file! ## Loading fdt from FIT Image at 83000000 ... Using 'config-1' configuration Trying 'fdt@1' fdt subimage Description: unavailable Type: Flat Device Tree Compression: uncompressed Data Start: 0x838d1b80 Data Size: 6023 Bytes = 5.9 KiB Architecture: RISC-V Verifying Hash Integrity ... OK Booting using the fdt blob at 0x838d1b80 Loading Kernel Image Using Device Tree in place at 00000000838d1b80, end 00000000838d6306 Starting kernel ... [ 0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000 [ 0.000000] Linux version 5.3.0-13236-g97f9a3c4eee5 (pragneshp@sachinj2-OptiPlex-7010) (gcc version 8.2.0 (Buildroot 2018.11-rc2-00003-ga0787e9 [ 0.000000] earlycon: sifive0 at MMIO 0x0000000010010000 (options '') [ 0.000000] printk: bootconsole [sifive0] enabled [ 0.000000] Initial ramdisk at: 0x(____ptrval____) (4568674 bytes) [ 0.000000] Zone ranges: [ 0.000000] DMA32 [mem 0x0000000080200000-0x00000000ffffffff] [ 0.000000] Normal [mem 0x0000000100000000-0x000000027fffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000080200000-0x000000027fffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x000000027fffffff] [ 0.000000] software IO TLB: mapped [mem 0xfbfff000-0xfffff000] (64MB) [ 0.000000] CPU with hartid=0 is not available [ 0.000000] CPU with hartid=0 is not available [ 0.000000] elf_hwcap is 0x112d [ 0.000000] percpu: Embedded 17 pages/cpu s30680 r8192 d30760 u69632 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2067975 [ 0.000000] Kernel command line: earlycon=sifive,0x10010000 console=ttySIF0,115200 [ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear) [ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear) [ 0.000000] Sorting __ex_table... [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Memory: 8179828K/8386560K available (6081K kernel code, 388K rwdata, 2025K rodata, 209K init, 307K bss, 206732K reserved, 0K cma-r) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 [ 0.000000] rcu: Hierarchical RCU implementation. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4 [ 0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0 [ 0.000000] plic: mapped 53 interrupts with 4 handlers for 9 contexts. [ 0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1] [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns [ 0.000007] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns [ 0.008473] Console: colour dummy device 80x25 [ 0.012818] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=4000) [ 0.022844] pid_max: default: 32768 minimum: 301 [ 0.027915] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear) [ 0.035331] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear) [ 0.044785] rcu: Hierarchical SRCU implementation. [ 0.049251] smp: Bringing up secondary CPUs ... [ 0.055022] smp: Brought up 1 node, 4 CPUs [ 0.059654] devtmpfs: initialized [ 0.063816] random: get_random_u32 called from bucket_table_alloc.isra.29+0x4e/0x160 with crng_init=0 [ 0.072584] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.081998] futex hash table entries: 1024 (order: 4, 65536 bytes, linear) [ 0.089509] NET: Registered protocol family 16 [ 0.105911] vgaarb: loaded [ 0.108162] SCSI subsystem initialized [ 0.111945] usbcore: registered new interface driver usbfs [ 0.117105] usbcore: registered new interface driver hub [ 0.122485] usbcore: registered new device driver usb [ 0.128077] clocksource: Switched to clocksource riscv_clocksource [ 0.140269] NET: Registered protocol family 2 [ 0.144444] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear) [ 0.152613] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear) [ 0.162232] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear) [ 0.172151] TCP: Hash tables configured (established 65536 bind 65536) [ 0.178334] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear) [ 0.185134] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear) [ 0.192547] NET: Registered protocol family 1 [ 0.196747] RPC: Registered named UNIX socket transport module. [ 0.202143] RPC: Registered udp transport module. [ 0.206826] RPC: Registered tcp transport module. [ 0.211502] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.217932] PCI: CLS 0 bytes, default 64 [ 0.222136] Unpacking initramfs... [ 0.578833] Freeing initrd memory: 4460K [ 0.583009] workingset: timestamp_bits=62 max_order=21 bucket_order=0 [ 0.596701] NFS: Registering the id_resolver key type [ 0.601051] Key type id_resolver registered [ 0.605147] Key type id_legacy registered [ 0.609146] nfs4filelayout_init: NFSv4 File Layout Driver Registering... [ 0.615983] 9p: Installing v9fs 9p2000 file system support [ 0.621637] NET: Registered protocol family 38 [ 0.625757] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253) [ 0.633107] io scheduler mq-deadline registered [ 0.637615] io scheduler kyber registered [ 0.685677] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled [ 0.692265] 10010000.serial: ttySIF0 at MMIO 0x10010000 (irq = 4, base_baud = 0) is a SiFive UART v0 [ 0.700647] printk: console [ttySIF0] enabled [ 0.700647] printk: console [ttySIF0] enabled [ 0.709309] printk: bootconsole [sifive0] disabled [ 0.709309] printk: bootconsole [sifive0] disabled [ 0.719109] 10011000.serial: ttySIF1 at MMIO 0x10011000 (irq = 1, base_baud = 0) is a SiFive UART v0 [ 0.728428] [drm] radeon kernel modesetting enabled. [ 0.745378] loop: module loaded [ 0.748292] sifive_spi 10040000.spi: mapped; irq=3, cs=1 [ 0.753581] sifive_spi 10050000.spi: mapped; irq=5, cs=1 [ 0.758896] libphy: Fixed MDIO Bus: probed [ 0.762973] macb 10090000.ethernet: Registered clk switch 'sifive-gemgxl-mgmt' [ 0.769730] macb: GEM doesn't support hardware ptp. [ 0.774619] libphy: MACB_mii_bus: probed [ 0.940367] Microsemi VSC8541 SyncE 10090000.ethernet-ffffffff:00: attached PHY driver [Microsemi VSC8541 SyncE] (mii_bus:phy_addr=10090000.et) [ 0.954911] macb 10090000.ethernet eth0: Cadence GEM rev 0x10070109 at 0x10090000 irq 6 (c6:3a:5b:53:64:8b) [ 0.964713] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k [ 0.970434] e1000e: Copyright(c) 1999 - 2015 Intel Corporation. [ 0.976426] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.982850] ehci-pci: EHCI PCI platform driver [ 0.987307] ehci-platform: EHCI generic platform driver [ 0.992565] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 0.998665] ohci-pci: OHCI PCI platform driver [ 1.003110] ohci-platform: OHCI generic platform driver [ 1.008574] usbcore: registered new interface driver uas [ 1.013636] usbcore: registered new interface driver usb-storage [ 1.019712] mousedev: PS/2 mouse device common for all mice [ 1.050585] mmc_spi spi1.0: SD/MMC host mmc0, no DMA, no WP, no poweroff, cd polling [ 1.057730] usbcore: registered new interface driver usbhid [ 1.063114] usbhid: USB HID core driver [ 1.067825] NET: Registered protocol family 10 [ 1.072447] Segment Routing with IPv6 [ 1.075393] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 1.081772] NET: Registered protocol family 17 [ 1.085893] 9pnet: Installing 9P2000 support [ 1.089981] Key type dns_resolver registered [ 1.096414] Freeing unused kernel memory: 208K [ 1.100095] This architecture does not have kernel memory protection. [ 1.106509] Run /init as init process Starting syslogd: OK Starting klogd: OK Starting mdev... /etc/init.d/S10mdev: line 9: can't create /proc/sys/kernel/hotplug: nonexistent directory [ 1.167986] mmc0: host does not support reading read-only switch, assuming write-enable [ 1.175239] mmc0: new SDHC card on SPI [ 1.180374] mmcblk0: mmc0:0000 SC16G 14.8 GiB [ 1.214920] mmcblk0: p1 p2 p4 modprobe: can't change directory to '/lib/modules': No such file or directory Initializing random number generator... [ 1.654626] random: dd: uninitialized urandom read (512 bytes read) done. Starting network: udhcpc: started, v1.29.3 udhcpc: sending discover [ 3.724743] macb 10090000.ethernet eth0: link up (100/Full) [ 3.729562] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready udhcpc: sending discover udhcpc: sending select for 172.16.35.82 udhcpc: lease of 172.16.35.82 obtained, lease time 28800 deleting routers adding dns 172.16.34.150 adding dns 172.16.24.25 OK Starting dropbear sshd: [ 4.885211] random: dropbear: uninitialized urandom read (32 bytes read) OK Welcome to Buildroot buildroot login: [ 10.336594] random: fast init done [ 220.332040] random: crng init done Welcome to Buildroot buildroot login: root Password: # Pragnesh Patel (9): misc: add driver for the Sifive otp controller Sifive: FU540: Add place-holder for FU540 clk Sifive: FU540: Add header files for SoC riscv: Add _image_binary_end for SPL lib: Makefile: build crc7.c when CONFIG_MMC_SPI riscv: sifive: dts: fu540: Add board -u-boot.dtsi files riscv: sifive: fu540: Add U-boot SPL header files riscv: sifive: fu540: add SPL configuration doc: update FU540 RISC-V documentation arch/riscv/cpu/u-boot-spl.lds | 1 + arch/riscv/dts/fu540-c000-u-boot.dtsi | 56 + .../dts/hifive-unleashed-a00-u-boot.dtsi | 24 + arch/riscv/include/asm/arch-fu540/cache.h | 42 + arch/riscv/include/asm/arch-fu540/clk.h | 14 + arch/riscv/include/asm/arch-fu540/gpio.h | 14 + arch/riscv/include/asm/arch-fu540/otp.h | 80 ++ arch/riscv/include/asm/arch-fu540/spi.h | 15 + arch/riscv/include/asm/arch-fu540/uart.h | 14 + arch/riscv/include/asm/arch-generic/gpio.h | 32 +- arch/riscv/include/asm/arch-sifive/gpio.h | 42 + arch/riscv/include/asm/arch-sifive/spi.h | 93 ++ arch/riscv/include/asm/arch-sifive/uart.h | 35 + arch/riscv/include/asm/csr.h | 2 + board/sifive/fu540/Kconfig | 11 + board/sifive/fu540/MAINTAINERS | 1 + board/sifive/fu540/Makefile | 5 + board/sifive/fu540/ccache.h | 43 + board/sifive/fu540/ddrregs.c | 625 +++++++++ board/sifive/fu540/fu540-memory-map.h | 59 + board/sifive/fu540/fu540.c | 140 +- board/sifive/fu540/regconfig-ctl.h | 274 ++++ board/sifive/fu540/regconfig-phy.h | 1224 +++++++++++++++++ board/sifive/fu540/spl.c | 307 +++++ board/sifive/fu540/ux00ddr.h | 276 ++++ board/sifive/fu540/ux00prci.h | 69 + configs/sifive_fu540_defconfig | 2 + configs/sifive_fu540_spl_defconfig | 26 + doc/board/sifive/fu540.rst | 370 +++++ drivers/misc/Kconfig | 7 + drivers/misc/Makefile | 1 + drivers/misc/ememory-otp.c | 206 +++ drivers/spi/spi-sifive.c | 81 +- include/configs/sifive-fu540.h | 18 + lib/Makefile | 1 + 35 files changed, 4027 insertions(+), 183 deletions(-) create mode 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi create mode 100644 arch/riscv/include/asm/arch-fu540/cache.h create mode 100644 arch/riscv/include/asm/arch-fu540/clk.h create mode 100644 arch/riscv/include/asm/arch-fu540/gpio.h create mode 100644 arch/riscv/include/asm/arch-fu540/otp.h create mode 100644 arch/riscv/include/asm/arch-fu540/spi.h create mode 100644 arch/riscv/include/asm/arch-fu540/uart.h create mode 100644 arch/riscv/include/asm/arch-sifive/gpio.h create mode 100644 arch/riscv/include/asm/arch-sifive/spi.h create mode 100644 arch/riscv/include/asm/arch-sifive/uart.h create mode 100644 board/sifive/fu540/ccache.h create mode 100644 board/sifive/fu540/ddrregs.c create mode 100644 board/sifive/fu540/fu540-memory-map.h create mode 100644 board/sifive/fu540/regconfig-ctl.h create mode 100644 board/sifive/fu540/regconfig-phy.h create mode 100644 board/sifive/fu540/spl.c create mode 100644 board/sifive/fu540/ux00ddr.h create mode 100644 board/sifive/fu540/ux00prci.h create mode 100644 configs/sifive_fu540_spl_defconfig create mode 100644 drivers/misc/ememory-otp.c -- 2.17.1

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