January 2020 - U-Boot

[PATCH v3 08/20] mips: add a mtmips-specific field to architecture-specific global data
by Weijie Gao 10 Feb '20

10 Feb '20

SoCs of mtmips can use different CPU frequencies depending on the HW/SW configurations. For example mt7628 uses 580MHz clock if the input xtal frequency is 40MHz, and 575MHz clock if the xtal is 25MHz. Upon cold boot the CPU uses the xtal frequency directly. So hardcoding the timer frequency (half of the CPU frequency) in CONFIG_SYS_MIPS_TIMER_FREQ is not a good idea for this case. This patch adds a mtmips-specific field timer_freq to arch_global_data. This field will be used later in mtmips-specific get_tbclk() to provide accurate timer frequency in different boot stage. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- Changes since v2: none --- arch/mips/include/asm/global_data.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h index 7b4ad083ba..4c30fab871 100644 --- a/arch/mips/include/asm/global_data.h +++ b/arch/mips/include/asm/global_data.h @@ -27,6 +27,9 @@ struct arch_global_data { #ifdef CONFIG_MIPS_L2_CACHE unsigned short l2_line_size; #endif +#ifdef CONFIG_ARCH_MTMIPS + unsigned long timer_freq; +#endif }; #include <asm-generic/global_data.h> -- 2.17.1

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[PATCH v3 07/20] configs: enable CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips boards
by Weijie Gao 10 Feb '20

10 Feb '20

This patch enables CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips boards. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- Changes since v2: none --- configs/gardena-smart-gateway-mt7688-ram_defconfig | 1 + configs/gardena-smart-gateway-mt7688_defconfig | 1 + configs/linkit-smart-7688-ram_defconfig | 1 + configs/linkit-smart-7688_defconfig | 1 + 4 files changed, 4 insertions(+) diff --git a/configs/gardena-smart-gateway-mt7688-ram_defconfig b/configs/gardena-smart-gateway-mt7688-ram_defconfig index 01fbc6e1a2..38c9272723 100644 --- a/configs/gardena-smart-gateway-mt7688-ram_defconfig +++ b/configs/gardena-smart-gateway-mt7688-ram_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ARCH_MTMIPS=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index 9156c70155..cc0fa7f65b 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -10,6 +10,7 @@ CONFIG_ARCH_MTMIPS=y CONFIG_BOOT_ROM=y CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/linkit-smart-7688-ram_defconfig b/configs/linkit-smart-7688-ram_defconfig index 10a0438245..6d8969aacb 100644 --- a/configs/linkit-smart-7688-ram_defconfig +++ b/configs/linkit-smart-7688-ram_defconfig @@ -6,6 +6,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ARCH_MTMIPS=y CONFIG_BOARD_LINKIT_SMART_7688=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_FIT=y diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index 9e12d164e1..9824c77aae 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -9,6 +9,7 @@ CONFIG_BOARD_LINKIT_SMART_7688=y CONFIG_BOOT_ROM=y CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_FIT=y -- 2.17.1

3 2

[PATCH v3 05/20] sysreset: add reset controller based reboot driver
by Weijie Gao 10 Feb '20

10 Feb '20

Some chips provide their sysreset function in reset controller, which is normally a bit written to 1 to perform the sysreset. This patch adds a new sysreset driver to take advantage of it. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- Changes since v2: none --- drivers/sysreset/Kconfig | 6 ++++ drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_resetctl.c | 48 ++++++++++++++++++++++++++++ 3 files changed, 55 insertions(+) create mode 100644 drivers/sysreset/sysreset_resetctl.c diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index f09e138bb8..4be7433404 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -101,6 +101,12 @@ config SYSRESET_WATCHDOG help Reboot support for generic watchdog reset. +config SYSRESET_RESETCTL + bool "Enable support for reset controller reboot driver" + select DM_RESET + help + Reboot support using generic reset controller. + config SYSRESET_X86 bool "Enable support for x86 processor reboot driver" depends on X86 diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index 51af68fad3..3ed4bab9e3 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -16,5 +16,6 @@ obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o +obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o diff --git a/drivers/sysreset/sysreset_resetctl.c b/drivers/sysreset/sysreset_resetctl.c new file mode 100644 index 0000000000..b8203ba605 --- /dev/null +++ b/drivers/sysreset/sysreset_resetctl.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao(a)mediatek.com> + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <sysreset.h> +#include <reset.h> + +struct resetctl_reboot_priv { + struct reset_ctl_bulk resets; +}; + +static int resetctl_reboot_request(struct udevice *dev, enum sysreset_t type) +{ + struct resetctl_reboot_priv *priv = dev_get_priv(dev); + + return reset_assert_bulk(&priv->resets); +} + +static struct sysreset_ops resetctl_reboot_ops = { + .request = resetctl_reboot_request, +}; + +int resetctl_reboot_probe(struct udevice *dev) +{ + struct resetctl_reboot_priv *priv = dev_get_priv(dev); + + return reset_get_bulk(dev, &priv->resets); +} + +static const struct udevice_id resetctl_reboot_ids[] = { + { .compatible = "resetctl-reboot" }, + { } +}; + +U_BOOT_DRIVER(resetctl_reboot) = { + .id = UCLASS_SYSRESET, + .name = "resetctl_reboot", + .of_match = resetctl_reboot_ids, + .ops = &resetctl_reboot_ops, + .priv_auto_alloc_size = sizeof(struct resetctl_reboot_priv), + .probe = resetctl_reboot_probe, +}; -- 2.17.1

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[PATCH v3 06/20] mips: mtmips: make use of sysreset-resetctrl for mt7628 soc
by Weijie Gao 10 Feb '20

10 Feb '20

This patch replaces sysreset-syscon with sysreset-resetctrl for mt7628 soc. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- Changes since v2: none --- arch/mips/dts/mt7628a.dtsi | 10 +++++----- arch/mips/mach-mtmips/Kconfig | 1 + configs/gardena-smart-gateway-mt7688-ram_defconfig | 1 - configs/gardena-smart-gateway-mt7688_defconfig | 1 - configs/linkit-smart-7688-ram_defconfig | 1 - configs/linkit-smart-7688_defconfig | 1 - 6 files changed, 6 insertions(+), 9 deletions(-) diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi index 76a80c8952..409695b5c7 100644 --- a/arch/mips/dts/mt7628a.dtsi +++ b/arch/mips/dts/mt7628a.dtsi @@ -46,11 +46,11 @@ reg = <0x0 0x100>; }; - syscon-reboot { - compatible = "syscon-reboot"; - regmap = <&sysc>; - offset = <0x34>; - mask = <0x1>; + reboot: resetctl-reboot { + compatible = "resetctl-reboot"; + + resets = <&rstctrl MT7628_SYS_RST>; + reset-names = "sysreset"; }; clkctrl: clkctrl@0x2c { diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index 8e10719b27..8cb76c4560 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -27,6 +27,7 @@ config SOC_MT7628 select MIPS_L1_CACHE_SHIFT_5 select PINCTRL_MT7628 select MTK_SERIAL + select SYSRESET_RESETCTL help This supports MediaTek MT7628/MT7688. diff --git a/configs/gardena-smart-gateway-mt7688-ram_defconfig b/configs/gardena-smart-gateway-mt7688-ram_defconfig index 979dcb5920..01fbc6e1a2 100644 --- a/configs/gardena-smart-gateway-mt7688-ram_defconfig +++ b/configs/gardena-smart-gateway-mt7688-ram_defconfig @@ -68,7 +68,6 @@ CONFIG_MT7628_ETH=y CONFIG_PHY=y CONFIG_SPI=y CONFIG_MT7621_SPI=y -CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_MT7621=y CONFIG_LZMA=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index e8403a88fb..9156c70155 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -71,7 +71,6 @@ CONFIG_MT7628_ETH=y CONFIG_PHY=y CONFIG_SPI=y CONFIG_MT7621_SPI=y -CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_MT7621=y CONFIG_LZMA=y diff --git a/configs/linkit-smart-7688-ram_defconfig b/configs/linkit-smart-7688-ram_defconfig index 6d2e9e4298..10a0438245 100644 --- a/configs/linkit-smart-7688-ram_defconfig +++ b/configs/linkit-smart-7688-ram_defconfig @@ -53,7 +53,6 @@ CONFIG_PHY=y CONFIG_MT76X8_USB_PHY=y CONFIG_SPI=y CONFIG_MT7621_SPI=y -CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index 28c8be2d53..9e12d164e1 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -57,7 +57,6 @@ CONFIG_PHY=y CONFIG_MT76X8_USB_PHY=y CONFIG_SPI=y CONFIG_MT7621_SPI=y -CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y -- 2.17.1

3 2

[PATCH v3 04/20] mips: start.S: avoid overwriting outside gd when clearing global data in stack
by Weijie Gao 10 Feb '20

10 Feb '20

When setting up initial stack, global data will also be put in the stack, and being cleared. The assembler instructions for clearing gd is as follows: move t0, k0 1: PTR_S zero, 0(t0) blt t0, t1, 1b PTR_ADDIU t0, PTRSIZE t0 is the start address of gd, t1 is the end address of gd (t0 + GD_SIZE). [PTR_ADDIU t0, PTRSIZE] is in the delay slot of [blt t0, t1, 1b], so it will be executed before the branch operation. However the comparison for the BLT instruction is done before executing the delay slot. This means when the last word just before k1 is cleared, the loop will continue to run once. This will clear an extra word at k1, which is outside the global data. Global data is placed at the top of the stack. If the initial stack is a SRAM or locked cache, the area outside them may be inaccessible. A write operation performed in this area may cause an exception. To solve this, [PTR_ADDIU t0, PTRSIZE] should be placed before the BLT instruction. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Reviewed-by: Stefan Roese <sr(a)denx.de> Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- Changes since v2: none --- arch/mips/cpu/start.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index f9805fa000..dd93df9e4a 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -71,8 +71,9 @@ move t0, k0 1: PTR_S zero, 0(t0) + PTR_ADDIU t0, PTRSIZE blt t0, t1, 1b - PTR_ADDIU t0, PTRSIZE + nop #if CONFIG_VAL(SYS_MALLOC_F_LEN) PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset -- 2.17.1

2 1

[PATCH v3 03/20] mips: add an option to support initialize SRAM for initial stack
by Weijie Gao 10 Feb '20

10 Feb '20

Currently CONFIG_MIPS_INIT_STACK_IN_SRAM assumes the memory space for the initial stack can be used directly. However on some platform the SRAM needs initialization, e.g. lock cache. This patch adds an option to allow a new function mips_sram_init() being called before setup_stack_gd. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck(a)gmail.com> Reviewed-by: Stefan Roese <sr(a)denx.de> Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- Changes since v2: none --- arch/mips/Kconfig | 9 +++++++++ arch/mips/cpu/start.S | 7 +++++++ 2 files changed, 16 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5e20feeefb..bf30a56101 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -419,6 +419,15 @@ config MIPS_INIT_STACK_IN_SRAM lowlevel_init. Thus lowlevel_init does not need to be implemented in assembler. +config MIPS_SRAM_INIT + bool + default n + depends on MIPS_INIT_STACK_IN_SRAM + help + Select this if the SRAM for initial stack needs to be initialized + before it can be used. If enabled, a function mips_sram_init() will + be called just before setup_stack_gd. + config SYS_DCACHE_SIZE int default 0 diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index 1d21b2324a..f9805fa000 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -216,6 +216,13 @@ wr_done: #endif #ifdef CONFIG_MIPS_INIT_STACK_IN_SRAM +#ifdef CONFIG_MIPS_SRAM_INIT + /* Initialize the SRAM first */ + PTR_LA t9, mips_sram_init + jalr t9 + nop +#endif + /* Set up initial stack and global data */ setup_stack_gd -- 2.17.1

2 1

[PATCH v3 02/20] mips: mtmips: add predefined i-cache/d-cache size and linesize
by Weijie Gao 10 Feb '20

10 Feb '20

Both mt7620 and mt7628 has the same cache configuration. There is no need to use CONFIG_SYS_CACHE_SIZE_AUTO to probe it at runtime. Add them into Kconfig to reduce some code size. Reviewed-by: Stefan Roese <sr(a)denx.de> Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- Changes since v2: none --- arch/mips/mach-mtmips/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index c8dcf19c0d..8e10719b27 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -7,6 +7,18 @@ config SYS_MALLOC_F_LEN config SYS_SOC default "mt7628" if SOC_MT7628 +config SYS_DCACHE_SIZE + default 32768 + +config SYS_DCACHE_LINE_SIZE + default 32 + +config SYS_ICACHE_SIZE + default 65536 + +config SYS_ICACHE_LINE_SIZE + default 32 + choice prompt "MediaTek MIPS SoC select" -- 2.17.1

2 1

[PATCH v3 01/20] mips: add support to restore exception vector base before booting linux
by Weijie Gao 10 Feb '20

10 Feb '20

In U-Boot the exception vector base will be moved to top of memory, to be used to display register dump when exception occurs. But some old linux kernel does not honor the base set in CP0_EBASE. A modified exception vector base will cause kernel crash. This patch adds an option to enable reset exception vector base to its previous value, or a user configured value before booting linux kernel. Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- Changes since v2: none --- arch/mips/Kconfig | 30 +++++++++++++++++++++++++++++ arch/mips/include/asm/u-boot-mips.h | 2 ++ arch/mips/lib/bootm.c | 3 +++ arch/mips/lib/traps.c | 19 ++++++++++++++++++ 4 files changed, 54 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a3ae603044..5e20feeefb 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -287,6 +287,36 @@ config MIPS_RELOCATION_TABLE_SIZE If unsure, leave at the default value. +config RESTORE_EXCEPTION_VECTOR_BASE + bool "Restore exception vector base before booting linux kernel" + default n + help + In U-Boot the exception vector base will be moved to top of memory, + to be used to display register dump when exception occurs. + But some old linux kernel does not honor the base set in CP0_EBASE. + A modified exception vector base will cause kernel crash. + + This option will restore the exception vector base to its previous + value. + + If unsure, say N. + +config OVERRIDE_EXCEPTION_VECTOR_BASE + bool "Override the exception vector base to be restored" + depends on RESTORE_EXCEPTION_VECTOR_BASE + default n + help + Enable this option if you want to use a different exception vector + base rather than the previously saved one. + +config NEW_EXCEPTION_VECTOR_BASE + hex "New exception vector base" + depends on OVERRIDE_EXCEPTION_VECTOR_BASE + range 0x80000000 0xbffff000 + default 0x80000000 + help + The exception vector base to be restored before booting linux kernel + endmenu menu "OS boot interface" diff --git a/arch/mips/include/asm/u-boot-mips.h b/arch/mips/include/asm/u-boot-mips.h index 88438b9576..8b37cc4029 100644 --- a/arch/mips/include/asm/u-boot-mips.h +++ b/arch/mips/include/asm/u-boot-mips.h @@ -9,4 +9,6 @@ void except_vec_ejtag_debug(void); int arch_misc_init(void); +void trap_restore(void); + #endif /* _U_BOOT_MIPS_H_ */ diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c index 8c0d7672f2..f1db6d23b8 100644 --- a/arch/mips/lib/bootm.c +++ b/arch/mips/lib/bootm.c @@ -294,6 +294,9 @@ static void boot_jump_linux(bootm_headers_t *images) bootstage_report(); #endif + if (CONFIG_IS_ENABLED(RESTORE_EXCEPTION_VECTOR_BASE)) + trap_restore(); + if (images->ft_len) kernel(-2, (ulong)images->ft_addr, 0, 0); else diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c index 6fe8ebd16b..20f45fc4ed 100644 --- a/arch/mips/lib/traps.c +++ b/arch/mips/lib/traps.c @@ -19,6 +19,8 @@ DECLARE_GLOBAL_DATA_PTR; +static unsigned long saved_ebase; + static void show_regs(const struct pt_regs *regs) { const int field = 2 * sizeof(unsigned long); @@ -101,7 +103,24 @@ void trap_init(ulong reloc_addr) set_handler(0x180, &except_vec3_generic, 0x80); set_handler(0x280, &except_vec_ejtag_debug, 0x80); + saved_ebase = read_c0_ebase() & 0xfffff000; + write_c0_ebase(ebase); clear_c0_status(ST0_BEV); execution_hazard_barrier(); } + +void trap_restore(void) +{ + set_c0_status(ST0_BEV); + execution_hazard_barrier(); + +#ifdef CONFIG_OVERRIDE_EXCEPTION_VECTOR_BASE + write_c0_ebase(CONFIG_NEW_EXCEPTION_VECTOR_BASE & 0xfffff000); +#else + write_c0_ebase(saved_ebase); +#endif + + clear_c0_status(ST0_BEV); + execution_hazard_barrier(); +} -- 2.17.1

2 2

[PATCH 1/5] cmd: env: add option for quiet output on env info
by Patrick Delaunay 10 Feb '20

10 Feb '20

The "env info" can be use for test with -d and -p parameter, in scripting case the output of the command is not needed. This patch allows to deactivate this output with a new option "-q". For example, we can save the environment if default environment is used and persistent storage is managed with: if env info -p -d -q; then env save; fi Without the quiet option, I have the unnecessary traces First boot: Default environment is used Environment can be persisted Saving Environment to EXT4... File System is consistent Next boot: Environment was loaded from persistent storage Environment can be persisted Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- cmd/Kconfig | 1 + cmd/nvedit.c | 26 +++++++++++++++++++------- 2 files changed, 20 insertions(+), 7 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index b1a1cbcab2..458dbcedac 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -567,6 +567,7 @@ config CMD_NVEDIT_INFO This command can be optionally used for evaluation in scripts: [-d] : evaluate whether default environment is used [-p] : evaluate whether environment can be persisted + [-q] : quiet output The result of multiple evaluations will be combined with AND. endmenu diff --git a/cmd/nvedit.c b/cmd/nvedit.c index 81d94cd193..aaa032cd96 100644 --- a/cmd/nvedit.c +++ b/cmd/nvedit.c @@ -1219,12 +1219,15 @@ static int print_env_info(void) * env info - display environment information * env info [-d] - evaluate whether default environment is used * env info [-p] - evaluate whether environment can be persisted + * Add [-q] - quiet mode, use only for command result, for test by example: + * test env info -p -d -q */ static int do_env_info(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int eval_flags = 0; int eval_results = 0; + bool quiet = false; /* display environment information */ if (argc <= 1) @@ -1242,6 +1245,9 @@ static int do_env_info(cmd_tbl_t *cmdtp, int flag, case 'p': eval_flags |= ENV_INFO_IS_PERSISTED; break; + case 'q': + quiet = true; + break; default: return CMD_RET_USAGE; } @@ -1251,20 +1257,24 @@ static int do_env_info(cmd_tbl_t *cmdtp, int flag, /* evaluate whether default environment is used */ if (eval_flags & ENV_INFO_IS_DEFAULT) { if (gd->flags & GD_FLG_ENV_DEFAULT) { - printf("Default environment is used\n"); + if (!quiet) + printf("Default environment is used\n"); eval_results |= ENV_INFO_IS_DEFAULT; } else { - printf("Environment was loaded from persistent storage\n"); + if (!quiet) + printf("Environment was loaded from persistent storage\n"); } } /* evaluate whether environment can be persisted */ if (eval_flags & ENV_INFO_IS_PERSISTED) { #if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_ENV_IS_NOWHERE) - printf("Environment can be persisted\n"); + if (!quiet) + printf("Environment can be persisted\n"); eval_results |= ENV_INFO_IS_PERSISTED; #else - printf("Environment cannot be persisted\n"); + if (!quiet) + printf("Environment cannot be persisted\n"); #endif } @@ -1321,7 +1331,7 @@ static cmd_tbl_t cmd_env_sub[] = { U_BOOT_CMD_MKENT(import, 5, 0, do_env_import, "", ""), #endif #if defined(CONFIG_CMD_NVEDIT_INFO) - U_BOOT_CMD_MKENT(info, 2, 0, do_env_info, "", ""), + U_BOOT_CMD_MKENT(info, 3, 0, do_env_info, "", ""), #endif U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""), #if defined(CONFIG_CMD_RUN) @@ -1400,8 +1410,10 @@ static char env_help_text[] = #endif #if defined(CONFIG_CMD_NVEDIT_INFO) "env info - display environment information\n" - "env info [-d] - whether default environment is used\n" - "env info [-p] - whether environment can be persisted\n" + "env info [-d] [-p] [-q] - evaluate environment information\n" + " \"-d\": default environment is used\n" + " \"-p\": environment can be persisted\n" + " \"-q\": quiet output\n" #endif "env print [-a | name ...] - print environment\n" #if defined(CONFIG_CMD_NVEDIT_EFI) -- 2.17.1

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[PATCH v3 00/10] RISC-V SiFive FU540 support SPL
by Pragnesh Patel 10 Feb '20

10 Feb '20

This series add support for SPL to FU540.U-Boot SPL can boot from L2 LIM (0x0800_0000) and jump to OpenSBI(FW_DYNAMIC firmware) and U-Boot proper from MMC devices. How to test this patch: 1) Go to OpenSBI-dir : make PLATFORM=sifive/fu540 O=build_dir I=install_dir FW_DYNAMIC=y install 2) cp install_dir/platform/sifive/fu540/firmware/fw_dynamic.bin <u-boot-dir>/ 3) Change to u-boot-dir 4) make sifive_fu540_spl_defconfig 5) make all 6) ZSBL loads the U-boot SPL(u-boot-spl.bin) from a partition with GUID type 2e54b353-1271-4842-806f-e436d6af6985 sudo dd if=spl/u-boot-spl.bin of=/dev/sdc4 bs=1M 7) U-boot SPL expects a u-boot FIT image(u-boot.itb) from 1st partition(/dev/sdc1) of SD card irrespective of GUID sudo dd if=u-boot.itb of=/dev/sdc1 bs=1M Following are the boot messages on FU540 five cores SMP platform: U-Boot SPL 2020.01-00178-g30592e8819 (Jan 22 2020 - 14:37:24 +0530) Trying to boot from MMC1 U-Boot 2020.01-00178-g30592e8819 (Jan 22 2020 - 14:37:24 +0530) CPU: rv64imafdc Model: SiFive HiFive Unleashed A00 DRAM: 8 GiB MMC: spi@10050000:mmc@0: 0 In: serial@10010000 Out: serial@10010000 Err: serial@10010000 Board serial number should not be 0 !! Net: Warning: ethernet@10090000 (eth0) using random MAC address - e6:40:50:48:0d:8b eth0: ethernet@10090000 Hit any key to stop autoboot: 0 => setenv serverip 172.16.35.74;setenv ipaddr 172.16.35.40;tftpboot 0x83000000 fit.itb;bootm 0x83000000 ethernet@10090000: PHY present at 0 ethernet@10090000: Starting autonegotiation... ethernet@10090000: Autonegotiation complete ethernet@10090000: link up, 100Mbps full-duplex (lpa: 0x41e1) Using ethernet@10090000 device TFTP from server 172.16.35.74; our IP address is 172.16.35.40 Filename 'fit.itb'. Load address: 0x83000000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################### 940.4 KiB/s done Bytes transferred = 13823823 (d2ef4f hex) ## Loading kernel from FIT Image at 83000000 ... Using 'config-1' configuration Trying 'kernel@1' kernel subimage Description: Linux kernel Type: Kernel Image Compression: uncompressed Data Start: 0x830000d8 Data Size: 9247260 Bytes = 8.8 MiB Architecture: RISC-V OS: Linux Load Address: 0x80200000 Entry Point: 0x80200000 Verifying Hash Integrity ... OK ## Loading ramdisk from FIT Image at 83000000 ... Using 'config-1' configuration Trying 'ramdisk@1' ramdisk subimage Description: ramdisk Type: RAMDisk Image Compression: gzip compressed Data Start: 0x838d3378 Data Size: 4568674 Bytes = 4.4 MiB Architecture: RISC-V OS: Linux Load Address: 0x82000000 Entry Point: unavailable Verifying Hash Integrity ... OK Loading ramdisk from 0x838d3378 to 0x82000000 WARNING: 'compression' nodes for ramdisks are deprecated, please fix your .its file! ## Loading fdt from FIT Image at 83000000 ... Using 'config-1' configuration Trying 'fdt@1' fdt subimage Description: unavailable Type: Flat Device Tree Compression: uncompressed Data Start: 0x838d1b80 Data Size: 6023 Bytes = 5.9 KiB Architecture: RISC-V Verifying Hash Integrity ... OK Booting using the fdt blob at 0x838d1b80 Loading Kernel Image Using Device Tree in place at 00000000838d1b80, end 00000000838d6306 Starting kernel ... [ 0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000 [ 0.000000] Linux version 5.3.0-13236-g97f9a3c4eee5 (pragneshp@sachinj2-OptiPlex-7010) (gcc version 8.2.0 (Buildroot 2018.11-rc2-00003-ga0787e9 [ 0.000000] earlycon: sifive0 at MMIO 0x0000000010010000 (options '') [ 0.000000] printk: bootconsole [sifive0] enabled [ 0.000000] Initial ramdisk at: 0x(____ptrval____) (4568674 bytes) .... .... Welcome to Buildroot buildroot login: root Password: # Changes in v3: - Remove arch-fu540 and arch-sifive from arch/riscv/include/asm/ - Split SPL patches into DDR and SPL and spl defconfig - Update fu540/MAINTAINERS file - Update fu540.rst on how to build and flash U-boot SPL Changes in v2: - Add DM driver Sifive OTP - Split SPL patches into multiple patches - Add a seprate patch for _image_binary_end and crc7.c - Add a seprate patch to add board -u-boot.dtsi files - Update FU540 RISC-V documentation Pragnesh Patel (10): misc: add driver for the Sifive otp controller riscv: Add _image_binary_end for SPL lib: Makefile: build crc7.c when CONFIG_MMC_SPI riscv: sifive: dts: fu540: Add board -u-boot.dtsi files riscv: sifive: fu540: add DDR4 info riscv: sifive: fu540: add SPL configuration configs: fu540: Add config file for U-boot SPL riscv: sifive: fu540: enable all cache ways from u-boot proper sifive: fix palmer's email address and add sifive_fu540_spl_defconfig doc: update FU540 RISC-V documentation arch/riscv/cpu/u-boot-spl.lds | 1 + arch/riscv/dts/fu540-c000-u-boot.dtsi | 55 + .../dts/hifive-unleashed-a00-u-boot.dtsi | 22 + board/sifive/fu540/Kconfig | 8 + board/sifive/fu540/MAINTAINERS | 3 +- board/sifive/fu540/Makefile | 6 + board/sifive/fu540/cache.c | 30 + board/sifive/fu540/cache.h | 13 + board/sifive/fu540/ddr.c | 868 ++++++++++++ board/sifive/fu540/fu540-memory-map.h | 33 + board/sifive/fu540/fu540.c | 139 +- board/sifive/fu540/regconfig-ctl.h | 270 ++++ board/sifive/fu540/regconfig-phy.h | 1220 +++++++++++++++++ board/sifive/fu540/spl.c | 252 ++++ board/sifive/fu540/ux00ddr.h | 45 + board/sifive/fu540/ux00prci.h | 56 + configs/sifive_fu540_defconfig | 2 + configs/sifive_fu540_spl_defconfig | 26 + doc/board/sifive/fu540.rst | 376 +++++ drivers/misc/Kconfig | 7 + drivers/misc/Makefile | 1 + drivers/misc/ememory-otp.c | 207 +++ include/configs/sifive-fu540.h | 18 + lib/Makefile | 1 + 24 files changed, 3585 insertions(+), 74 deletions(-) create mode 100644 arch/riscv/dts/fu540-c000-u-boot.dtsi create mode 100644 arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi create mode 100644 board/sifive/fu540/cache.c create mode 100644 board/sifive/fu540/cache.h create mode 100644 board/sifive/fu540/ddr.c create mode 100644 board/sifive/fu540/fu540-memory-map.h create mode 100644 board/sifive/fu540/regconfig-ctl.h create mode 100644 board/sifive/fu540/regconfig-phy.h create mode 100644 board/sifive/fu540/spl.c create mode 100644 board/sifive/fu540/ux00ddr.h create mode 100644 board/sifive/fu540/ux00prci.h create mode 100644 configs/sifive_fu540_spl_defconfig create mode 100644 drivers/misc/ememory-otp.c -- 2.17.1

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