July 2019 - U-Boot

[U-Boot] [PATCH 1/2] net: Fix Covarity Defect 244093
by Joe Hershberger 04 Sep '19

04 Sep '19

Don't allow unterminated strings Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- net/mdio-uclass.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c index 36a404ff44..1c0d25272a 100644 --- a/net/mdio-uclass.c +++ b/net/mdio-uclass.c @@ -75,7 +75,7 @@ static int dm_mdio_post_probe(struct udevice *dev) pdata->mii_bus->write = mdio_write; pdata->mii_bus->reset = mdio_reset; pdata->mii_bus->priv = dev; - strncpy(pdata->mii_bus->name, dev->name, MDIO_NAME_LEN); + strncpy(pdata->mii_bus->name, dev->name, MDIO_NAME_LEN - 1); return mdio_register(pdata->mii_bus); } -- 2.11.0

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[U-Boot] [PATCH 1/2] libfdt: fdt_address_cells() and fdt_size_cells()
by matthias.bgg＠kernel.org 04 Sep '19

04 Sep '19

From: Matthias Brugger <mbrugger(a)suse.com> Add internal fdt_cells() to avoid copy and paste. Fix typo in fdt_size_cells() documentation comment. This is based in upstream commit: c12b2b0 ("libfdt: fdt_address_cells() and fdt_size_cells()") but misses the test cases, as we don't implement them in u-boot. Signed-off-by: Matthias Brugger <mbrugger(a)suse.com> --- scripts/dtc/libfdt/fdt_addresses.c | 35 +++++++++++------------------- scripts/dtc/libfdt/libfdt.h | 2 +- 2 files changed, 14 insertions(+), 23 deletions(-) diff --git a/scripts/dtc/libfdt/fdt_addresses.c b/scripts/dtc/libfdt/fdt_addresses.c index eff4dbcc72..49537b578d 100644 --- a/scripts/dtc/libfdt/fdt_addresses.c +++ b/scripts/dtc/libfdt/fdt_addresses.c @@ -1,6 +1,7 @@ /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2014 David Gibson <david(a)gibson.dropbear.id.au> + * Copyright (C) 2018 embedded brains GmbH * * libfdt is dual licensed: you can use it either under the terms of * the GPL, or the BSD license, at your option. @@ -55,42 +56,32 @@ #include "libfdt_internal.h" -int fdt_address_cells(const void *fdt, int nodeoffset) +static int fdt_cells(const void *fdt, int nodeoffset, const char *name) { - const fdt32_t *ac; + const fdt32_t *c; int val; int len; - ac = fdt_getprop(fdt, nodeoffset, "#address-cells", &len); - if (!ac) + c = fdt_getprop(fdt, nodeoffset, name, &len); + if (!c) return 2; - if (len != sizeof(*ac)) + if (len != sizeof(*c)) return -FDT_ERR_BADNCELLS; - val = fdt32_to_cpu(*ac); + val = fdt32_to_cpu(*c); if ((val <= 0) || (val > FDT_MAX_NCELLS)) return -FDT_ERR_BADNCELLS; return val; } -int fdt_size_cells(const void *fdt, int nodeoffset) +int fdt_address_cells(const void *fdt, int nodeoffset) { - const fdt32_t *sc; - int val; - int len; - - sc = fdt_getprop(fdt, nodeoffset, "#size-cells", &len); - if (!sc) - return 2; - - if (len != sizeof(*sc)) - return -FDT_ERR_BADNCELLS; - - val = fdt32_to_cpu(*sc); - if ((val < 0) || (val > FDT_MAX_NCELLS)) - return -FDT_ERR_BADNCELLS; + return fdt_cells(fdt, nodeoffset, "#address-cells"); +} - return val; +int fdt_size_cells(const void *fdt, int nodeoffset) +{ + return fdt_cells(fdt, nodeoffset, "#size-cells"); } diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h index cf86ddba88..66f01fec53 100644 --- a/scripts/dtc/libfdt/libfdt.h +++ b/scripts/dtc/libfdt/libfdt.h @@ -1109,7 +1109,7 @@ int fdt_address_cells(const void *fdt, int nodeoffset); * * returns: * 0 <= n < FDT_MAX_NCELLS, on success - * 2, if the node has no #address-cells property + * 2, if the node has no #size-cells property * -FDT_ERR_BADNCELLS, if the node has a badly formatted or invalid * #size-cells property * -FDT_ERR_BADMAGIC, -- 2.21.0

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[U-Boot] [PATCH] rpi3: Enable verified boot from FIT image
by Jun Nie 02 Sep '19

02 Sep '19

Enable verified boot from FIT image with select configs and specify boot script image node in FIT image, the FIT image is verified before it is run. Code that reusing dtb in firmware is disabled, so that the dtb with pubic key packed in u-boot.bin can be used to verify the signature of next stage FIT image. Signed-off-by: Jun Nie <jun.nie(a)linaro.org> --- board/raspberrypi/rpi/rpi.c | 6 ++++++ include/configs/rpi.h | 15 ++++++++++++++- 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 617c892..950ee84 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -297,6 +297,7 @@ static void set_fdtfile(void) env_set("fdtfile", fdtfile); } +#ifndef CONFIG_FIT_SIGNATURE /* * If the firmware provided a valid FDT at boot time, let's expose it in * ${fdt_addr} so it may be passed unmodified to the kernel. @@ -311,6 +312,7 @@ static void set_fdt_addr(void) env_set_hex("fdt_addr", fw_dtb_pointer); } +#endif /* * Prevent relocation from stomping on a firmware provided FDT blob. @@ -393,7 +395,9 @@ static void set_serial_number(void) int misc_init_r(void) { +#ifndef CONFIG_FIT_SIGNATURE set_fdt_addr(); +#endif set_fdtfile(); set_usbethaddr(); #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG @@ -470,6 +474,7 @@ int board_init(void) return bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_USB_HCD); } +#ifndef CONFIG_FIT_SIGNATURE /* * If the firmware passed a device tree use it for U-Boot. */ @@ -479,6 +484,7 @@ void *board_fdt_blob_setup(void) return NULL; return (void *)fw_dtb_pointer; } +#endif int ft_board_setup(void *blob, bd_t *bd) { diff --git a/include/configs/rpi.h b/include/configs/rpi.h index f76c7d1..ba91205 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -180,11 +180,24 @@ #include <config_distro_bootcmd.h> +#ifdef CONFIG_FIT_SIGNATURE +#define FIT_BOOT_CMD \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "iminfo ${scriptaddr};" \ + "if test $? -eq 1; then reset; fi;" \ + "source ${scriptaddr}:bootscr\0" +#else +#define FIT_BOOT_CMD "" +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ "dhcpuboot=usb start; dhcp u-boot.uimg; bootm\0" \ ENV_DEVICE_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ - BOOTENV + BOOTENV \ + FIT_BOOT_CMD #endif -- 2.7.4

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[U-Boot] [PATCH] Fix unreliable detection of DRAM size on Orange Pi 3
by megous＠megous.com 30 Aug '19

30 Aug '19

From: Ondrej Jirman <megous(a)megous.com> Orange Pi 3 has 2 GiB of DRAM, that sometime get misdetected as 4 GiB, due to false negative result from mctl_mem_matches() when detecting number of column address bits. This leads to u-boot detecting more address bits than there are and the boot process hangs shortly after. In mctl_mem_matches() we need to wait for each write to finish, separately. Without this, the check is not reliable for some unknown reason, probably having to do with unpredictable memory access ordering. Patch was made with help from André Przywara, who noticed that my original idea about detection failing due to read-back from cache without involving DRAM was false, because data cache is still of at the time of the DRAM size autodetection. Signed-off-by: Ondrej Jirman <megous(a)megous.com> Cc: André Przywara <andre.przywara(a)arm.com> --- arch/arm/mach-sunxi/dram_helpers.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c index 239ab421a8..6dba448638 100644 --- a/arch/arm/mach-sunxi/dram_helpers.c +++ b/arch/arm/mach-sunxi/dram_helpers.c @@ -30,6 +30,7 @@ bool mctl_mem_matches(u32 offset) { /* Try to write different values to RAM at two addresses */ writel(0, CONFIG_SYS_SDRAM_BASE); + dsb(); writel(0xaa55aa55, (ulong)CONFIG_SYS_SDRAM_BASE + offset); dsb(); /* Check if the same value is actually observed when reading back */ -- 2.22.0

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Re: [U-Boot] [PATCH v2 2/8] ARM: bcm283x: Add BCM283x_BASE define
by Alexander Graf 30 Aug '19

30 Aug '19

On 26.07.19 13:55, Matthias Brugger wrote: > > > On 26/07/2019 13:16, Alexander Graf wrote: >> >> >> On 24.07.19 16:39, Andrei Gherzan wrote: >>> From: Matthias Brugger <mbrugger(a)suse.com> >>> >>> Devices of bcm283x have different base address, depending if they are on >>> bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to >>> build and only add the offset in the header files. >>> >>> Signed-off-by: Matthias Brugger <mbrugger(a)suse.com> >>> Signed-off-by: Andrei Gherzan <andrei(a)balena.io> >>> --- >>> arch/arm/mach-bcm283x/Kconfig | 5 +++++ >>> arch/arm/mach-bcm283x/include/mach/mbox.h | 6 +----- >>> arch/arm/mach-bcm283x/include/mach/sdhci.h | 6 +----- >>> arch/arm/mach-bcm283x/include/mach/timer.h | 6 +----- >>> arch/arm/mach-bcm283x/include/mach/wdog.h | 6 +----- >>> 5 files changed, 9 insertions(+), 20 deletions(-) >>> >>> diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig >>> index 3eb5a9a897..8e69914a83 100644 >>> --- a/arch/arm/mach-bcm283x/Kconfig >>> +++ b/arch/arm/mach-bcm283x/Kconfig >>> @@ -141,4 +141,9 @@ config SYS_SOC >>> config SYS_CONFIG_NAME >>> default "rpi" >>> +config BCM283x_BASE >>> + hex >>> + default "0x20000000" if BCM2835 >>> + default "0x3f000000" if BCM2836 || BCM2837 >> >> How hard would it be to make the base a global variable instead and just set it >> early on board init based on the FDT or maybe even CPU core revision registers? > > Might be possible. Candidates to implement this are board_early_init_f or > misc_init_f, I think. > >> >> That would allow us to support RPi3 & 4 with the same U-Boot binary. > > Good point :) Yeah, then you only need to do the memory map dynamically as well and the rest should all be handled by DT :). Which again means you don't need a new config target at all! Alex

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[U-Boot] [PATCH v1] pci: add DM based mpc85xx driver
by Heiko Schocher 30 Aug '19

30 Aug '19

add DM based PCI Configuration space access support for MPC85xx PCI Bridge Signed-off-by: Heiko Schocher <hs(a)denx.de> --- Travis build, see: https://travis-ci.org/hsdenx/u-boot-test/builds/558855544 MAINTAINERS | 5 ++ drivers/pci/Kconfig | 7 ++ drivers/pci/Makefile | 1 + drivers/pci/pci_mpc85xx.c | 132 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 145 insertions(+) create mode 100644 drivers/pci/pci_mpc85xx.c diff --git a/MAINTAINERS b/MAINTAINERS index e91684191f..01faa67a6d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -639,6 +639,11 @@ S: Maintained F: drivers/pci_endpoint/ F: include/pci_ep.h +PCI MPC85xx +M: Heiko Schocher <hs(a)denx.de> +S: Maintained +F: drivers/pci/pci_mpc85xx.c + POWER M: Jaehoon Chung <jh80.chung(a)samsung.com> S: Maintained diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 3fe38f7315..88db0067b4 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -68,6 +68,13 @@ config PCIE_FSL PowerPC MPC85xx, MPC86xx, B series, P series and T series SoCs. This driver does not support SRIO_PCIE_BOOT feature. +config PCI_MPC85XX + bool "MPC85XX PowerPC PCI support" + depends on DM_PCI + help + Say Y here if you want to enable PCI controller support on FSL + PowerPC MPC85xx SoC. + config PCI_RCAR_GEN2 bool "Renesas RCar Gen2 PCIe driver" depends on DM_PCI diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index b5ebd50c85..929f119fb3 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_PCIE_ECAM_GENERIC) += pcie_ecam_generic.o obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o +obj-$(CONFIG_PCI_MPC85XX) += pci_mpc85xx.o obj-$(CONFIG_PCI_MSC01) += pci_msc01.o obj-$(CONFIG_PCIE_IMX) += pcie_imx.o obj-$(CONFIG_FTPCI100) += pci_ftpci100.o diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c new file mode 100644 index 0000000000..c0d35f7f2c --- /dev/null +++ b/drivers/pci/pci_mpc85xx.c @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2019 + * Heiko Schocher, DENX Software Engineering, hs(a)denx.de. + * + */ +#include <common.h> +#include <asm/cpm_85xx.h> +#include <pci.h> +#include <dm.h> + +struct mpc85xx_pci_priv { + void __iomem *cfg_addr; + void __iomem *cfg_data; +}; + +static int mpc85xx_pci_dm_read_config(struct udevice *dev, pci_dev_t bdf, + uint offset, ulong *value, + enum pci_size_t size) +{ + struct mpc85xx_pci_priv *priv = dev_get_priv(dev); + u32 addr; + + addr = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; + out_be32(priv->cfg_addr, addr); + sync(); + *value = pci_conv_32_to_size(in_le32(priv->cfg_data), offset, size); + + return 0; +} + +static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf, + uint offset, ulong value, + enum pci_size_t size) +{ + struct mpc85xx_pci_priv *priv = dev_get_priv(dev); + u32 addr; + + addr = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; + out_be32(priv->cfg_addr, addr); + sync(); + out_le32(priv->cfg_data, pci_conv_size_to_32(0, value, offset, size)); + + return 0; +} + +static int mpc85xx_pci_dm_probe(struct udevice *dev) +{ + struct mpc85xx_pci_priv *priv = dev_get_priv(dev); + struct pci_region *io; + struct pci_region *mem; + struct pci_region *pre; + int ret; + ccsr_pcix_t *pcix; + + ret = pci_get_regions(dev, &io, &mem, &pre); + if (ret != 2) { + printf("%s: wrong count of regions %d only 2 allowed\n", + __func__, ret); + return -EINVAL; + } + + pcix = priv->cfg_addr; + /* BAR 1: memory */ + out_be32(&pcix->potar1, (mem->bus_start >> 12) & 0x000fffff); + out_be32(&pcix->potear1, 0); + out_be32(&pcix->powbar1, (mem->phys_start >> 12) & 0x000fffff); + out_be32(&pcix->powbear1, 0); + out_be32(&pcix->powar1, (POWAR_EN | POWAR_MEM_READ | + POWAR_MEM_WRITE | (__ilog2(mem->size) - 1))); + + /* BAR 1: IO */ + out_be32(&pcix->potar2, (io->bus_start >> 12) & 0x000fffff); + out_be32(&pcix->potear2, 0); + out_be32(&pcix->powbar2, (io->phys_start >> 12) & 0x000fffff); + out_be32(&pcix->powbear2, 0); + out_be32(&pcix->powar2, (POWAR_EN | POWAR_IO_READ | + POWAR_IO_WRITE | (__ilog2(io->size) - 1))); + + out_be32(&pcix->pitar1, 0); + out_be32(&pcix->piwbar1, 0); + out_be32(&pcix->piwar1, (PIWAR_EN | PIWAR_PF | PIWAR_LOCAL | + PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP | PIWAR_MEM_2G)); + + out_be32(&pcix->powar3, 0); + out_be32(&pcix->powar4, 0); + out_be32(&pcix->piwar2, 0); + out_be32(&pcix->piwar3, 0); + + return 0; +} + +static int mpc85xx_pci_dm_remove(struct udevice *dev) +{ + return 0; +} + +static int mpc85xx_pci_ofdata_to_platdata(struct udevice *dev) +{ + struct mpc85xx_pci_priv *priv = dev_get_priv(dev); + fdt_addr_t addr; + + addr = devfdt_get_addr_index(dev, 0); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + priv->cfg_addr = (void __iomem *)addr; + addr += 4; + priv->cfg_data = (void __iomem *)addr; + + return 0; +} + +static const struct dm_pci_ops mpc85xx_pci_ops = { + .read_config = mpc85xx_pci_dm_read_config, + .write_config = mpc85xx_pci_dm_write_config, +}; + +static const struct udevice_id mpc85xx_pci_ids[] = { + { .compatible = "fsl,mpc8540-pci" }, + { } +}; + +U_BOOT_DRIVER(mpc85xx_pci) = { + .name = "mpc85xx_pci", + .id = UCLASS_PCI, + .of_match = mpc85xx_pci_ids, + .ops = &mpc85xx_pci_ops, + .probe = mpc85xx_pci_dm_probe, + .remove = mpc85xx_pci_dm_remove, + .ofdata_to_platdata = mpc85xx_pci_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct mpc85xx_pci_priv), +}; -- 2.21.0

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[U-Boot] RSA in U-Boot
by AKASHI, Takahiro 28 Aug '19

28 Aug '19

Hi, I'd like to discuss this topic in public. I will appreciate your comments here. # FYI, I now started to experimentally port linux's pkcs7/x509 # parser. Thanks, -Takahiro Akashi ----- Forwarded message from Simon Glass <sjg(a)chromium.org> ----- Date: Thu, 7 Mar 2019 19:56:10 -0700 From: Simon Glass <sjg(a)chromium.org> To: "AKASHI, Takahiro" <takahiro.akashi(a)linaro.org> Subject: Re: RSA in U-Boot Hi Takahiro, On Thu, 7 Mar 2019 at 17:27, AKASHI, Takahiro <takahiro.akashi(a)linaro.org> wrote: > > Hi Simon, > > Before I start discussions publicly, I'd like to hear > your opinion first. I do think it is better to discuss this in public since there will be other opinions. > > I'm now working on implementing "secure boot" > for UEFI U-Boot. > > As you might know, there are a couple of features > required to achieve "secure boot": > (I won't discuss about secure storage here though.) > - x509 certificate decoder > - pkcs7 decoder (for PE file's signature) > - RSA verification > - (hash digest, sha256) > > The original code, which was written by some other guy, > Patrick, uses BearSSL for x509 and RSA and > I'm now wondering what is the best solution. > Obviously, I can think of several options here: > 1. use BearSSL > 1.a just import minimum set of files akin lib/libfdt > 1.b link whole BearSSL as a library, merging the code > as git submodule > 2. use openssl > 3. import linux kernel code, particularly x509 & pkcs7 parser > 4. write our own code > > I suppose that you weighed similar choices when you implemented > "FIT image signing". > Can you share your opinion with me? I think if you can do 3 then it keeps U-Boot self-contained and perhaps provides for simple code. That said, if the amount of code is large and has an upstream there is clear precident for 1a, as you say. I am not sure about 4. If it is a relatively small amount of code, then maybe, but surely it makes sense to use the linux code where possible. That is what I did with the U-Boot livetree code. 1b sounds painful to me. > > Regarding your lib/rsa code, you intentionally avoided to > add formula of inverse-mod and power-mod of R. Do you still > believe that the assumption is appropriate? > (BearSSL implements its own montgomery. If you look at a talk I gave on this, you can see that one of the goals was to implement it efficiently, with minimal extra code at run-time, and minimal memory usage. So unpacking complex key structures did not seem like a good idea. From memory you can do verified boot in about 7KB of extra code in U-Boot and it runs in a small number of milliseconds. UEFI is obviously pretty big, so perhaps efficiency concerns are less important. More important probably is wide compatibility, supporting all possible options, etc. I hope this is helpful. Regards, Simon ----- End forwarded message -----

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[U-Boot] [PATCH 2/2] i2c: mxc_i2c: Remove i2c_idle_bus from probe
by Ye Li 27 Aug '19

27 Aug '19

i2c_idle_bus is already used in i2c_init_transfer. So before each tranfer if the bus is not ready, the i2c_idle_bus will be used to force idle. It is unnecessary to call it again in probe. We found a issue when enabling i2c mux with the mxc_i2c. The mxc_i2c is probed after mux probing. However, at this moment the mux is still in idle state not select any port. So if we call i2c_idle_bus in probe, it will fail and cause mxc_i2c probe failed. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- drivers/i2c/mxc_i2c.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 23119cc..bd00bb5 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -916,13 +916,6 @@ static int mxc_i2c_probe(struct udevice *bus) } } - ret = i2c_idle_bus(i2c_bus); - if (ret < 0) { - /* Disable clk */ - enable_i2c_clk(0, bus->seq); - return ret; - } - /* * Pinmux settings are in board file now, until pinmux is supported, * we can set pinmux here in probe function. -- 2.7.4

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[U-Boot] [PATCH 1/2] i2c-mux-gpio: Fix GPIO request flag issue
by Ye Li 27 Aug '19

27 Aug '19

When requesting GPIO, the GPIOD_IS_OUT is missed in flag, so the GPIO is set the input mode not output and cause mux not work. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- drivers/i2c/muxes/i2c-mux-gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/muxes/i2c-mux-gpio.c b/drivers/i2c/muxes/i2c-mux-gpio.c index 28f6400..e8b124f 100644 --- a/drivers/i2c/muxes/i2c-mux-gpio.c +++ b/drivers/i2c/muxes/i2c-mux-gpio.c @@ -106,7 +106,7 @@ static int i2c_mux_gpio_probe(struct udevice *dev) } ret = gpio_request_list_by_name(dev, "mux-gpios", gpios, mux->n_gpios, - GPIOD_IS_OUT_ACTIVE); + GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); if (ret <= 0) { dev_err(dev, "Failed to request mux-gpios\n"); return ret; -- 2.7.4

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[U-Boot] [PATCH] blk: Invalidate block cache when switching hwpart
by Weijie Gao 27 Aug '19

27 Aug '19

Some storage devices have multiple hw partitions and both address from zero, for example eMMC. However currently block cache invalidation only applies to block write/erase. This can cause a problem that data of current hw partition is cached before switching to another hw partition. And the following read operation of the latter hw partition will get wrong data when reading from the addresses that have been cached previously. To solve this problem, invalidate block cache after a successful select_hwpart operation. Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- drivers/block/blk-uclass.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c index baaf431e5e0..c23b6682a6c 100644 --- a/drivers/block/blk-uclass.c +++ b/drivers/block/blk-uclass.c @@ -208,7 +208,11 @@ int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart) if (ret) return ret; - return blk_select_hwpart(dev, hwpart); + ret = blk_select_hwpart(dev, hwpart); + if (!ret) + blkcache_invalidate(if_type, devnum); + + return ret; } int blk_list_part(enum if_type if_type) @@ -348,7 +352,13 @@ int blk_select_hwpart(struct udevice *dev, int hwpart) int blk_dselect_hwpart(struct blk_desc *desc, int hwpart) { - return blk_select_hwpart(desc->bdev, hwpart); + int ret; + + ret = blk_select_hwpart(desc->bdev, hwpart); + if (!ret) + blkcache_invalidate(desc->if_type, desc->devnum); + + return ret; } int blk_first_device(int if_type, struct udevice **devp) -- 2.18.0

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