March 2019 - U-Boot

[U-Boot] [PATCH] ARM: Fix nand boot of imx6q and imx6qdl boards
by Michael Trimarchi 08 Mar '19

08 Mar '19

The nand boot require a little more memory that we had previosly allocated so it stopped booting. This patch increase CONFIG_SPL_SYS_MALLOC_F_LEN to 0x2000. Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com> --- configs/imx6dl_icore_nand_defconfig | 1 + configs/imx6q_icore_nand_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index c34c515080..69c45b948b 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index cf149d615b..b53a5010e5 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y -- 2.17.1

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[U-Boot] [PATCH] sun50i: a64: Add Oceanic 5205 5inMFD initial support
by Jagan Teki 08 Mar '19

08 Mar '19

Oceanic 5205 5inMFD is a 5 inch Multi function display baseboard designed to mount SoPine SOM. Key features: - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 2GB DDR3 RAM - SD Slot - SPI-NOR flash - EMAC, RTL8211E - MCP2515 CAN - 4-lane, MIPI-DSI panel - Goodix 911 CTP - USB Host - 12V DC power supply Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- arch/arm/dts/Makefile | 1 + .../dts/sun50i-a64-oceanic-5205-5inmfd.dts | 68 +++++++++++++++++++ board/sunxi/MAINTAINERS | 5 ++ configs/oceanic_5205_5inmfd_defconfig | 20 ++++++ 4 files changed, 94 insertions(+) create mode 100644 arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts create mode 100644 configs/oceanic_5205_5inmfd_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2a040b20a5..1fbaefaccb 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -424,6 +424,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-amarula-relic.dtb \ sun50i-a64-bananapi-m64.dtb \ sun50i-a64-nanopi-a64.dtb \ + sun50i-a64-oceanic-5205-5inmfd.dtb \ sun50i-a64-olinuxino.dtb \ sun50i-a64-orangepi-win.dtb \ sun50i-a64-pine64-plus.dtb \ diff --git a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts new file mode 100644 index 0000000000..6a2154525d --- /dev/null +++ b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2019 Oceanic Systems (UK) Ltd. + * Copyright (C) 2019 Amarula Solutions B.V. + * Author: Jagan Teki <jagan(a)amarulasolutions.com> + */ + +/dts-v1/; + +#include "sun50i-a64-sopine.dtsi" + +/ { + model = "Oceanic 5205 5inMFD"; + compatible = "oceanic,5205-5inmfd", "allwinner,sun50i-a64"; + + aliases { + ethernet0 = &emac; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <&reg_dc1sw>; + allwinner,tx-delay-ps = <600>; + status = "okay"; +}; + +&mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&ohci0 { + status = "okay"; +}; + +&reg_dc1sw { + regulator-name = "vcc-phy"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 8e2f90fc68..7f96d2bb1c 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -341,6 +341,11 @@ M: FUKAUMI Naoki <naobsd(a)gmail.com> S: Maintained F: configs/Nintendo_NES_Classic_Edition_defconfig +OCEANIC 5205 5INMFD BOARD +M: Jagan Teki <jagan(a)amarulasolutions.com> +S: Maintained +F: configs/oceanic_5205_5inmfd_defconfig + OLIMEX A20-SOM204 BOARD M: Stefan Mavrodiev <stefan(a)olimex.com> S: Maintained diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig new file mode 100644 index 0000000000..34fe6f5273 --- /dev/null +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN50I=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y +CONFIG_DRAM_CLK=552 +CONFIG_DRAM_ZQ=3881949 +CONFIG_MMC0_CD_PIN="" +CONFIG_SPL_SPI_SUNXI=y +CONFIG_NR_DRAM_BANKS=1 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-oceanic-5205-5inmfd" +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -- 2.18.0.321.gffc6fa0e3

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[U-Boot] [PATCH v2] power: axp818: Fix typo in axp_set_dldo
by megous＠megous.com 08 Mar '19

08 Mar '19

From: Ondrej Jirman <megous(a)megous.com> Fix typo in axp_set_dldo() so that it correctly uses AXP818_DLDO1_CTRL register to configure the voltage instead of setting AXP818_ELDO1_CTRL register which is obviously incorrect. Signed-off-by: Ondřej Jirman <megous(a)megous.com> --- This was previously sent as a part of other series of patches, but it's unrelated to the rest of the patches, so I'm resending it individually. v2: - improved description drivers/power/axp818.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/power/axp818.c b/drivers/power/axp818.c index c737da1180..834919ddd4 100644 --- a/drivers/power/axp818.c +++ b/drivers/power/axp818.c @@ -161,7 +161,7 @@ int axp_set_dldo(int dldo_num, unsigned int mvolt) cfg = axp818_mvolt_to_cfg(mvolt, 700, 3300, 100); if (dldo_num == 2 && mvolt > 3300) cfg += 1 + axp818_mvolt_to_cfg(mvolt, 3400, 4200, 200); - ret = pmic_bus_write(AXP818_ELDO1_CTRL + (dldo_num - 1), cfg); + ret = pmic_bus_write(AXP818_DLDO1_CTRL + (dldo_num - 1), cfg); if (ret) return ret; -- 2.20.1

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[U-Boot] [PATCH 1/2] i2c: i2c_cdns: Fix clearing of all interrupts
by Michal Simek 08 Mar '19

08 Mar '19

From: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> The arbitration lost interrupt was not getting cleared while clearing interrupts. This patch fixes this by adding arbitration lost interrupt as well during clear. This patch also removes hardcoded value and defined a macro for it. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/i2c/i2c-cdns.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c index 4330d28c2b0d..b391c0ba49b8 100644 --- a/drivers/i2c/i2c-cdns.c +++ b/drivers/i2c/i2c-cdns.c @@ -64,6 +64,16 @@ struct cdns_i2c_regs { #define CDNS_I2C_INTERRUPT_RXUNF 0x00000080 #define CDNS_I2C_INTERRUPT_ARBLOST 0x00000200 +#define CDNS_I2C_INTERRUPTS_MASK (CDNS_I2C_INTERRUPT_COMP | \ + CDNS_I2C_INTERRUPT_DATA | \ + CDNS_I2C_INTERRUPT_NACK | \ + CDNS_I2C_INTERRUPT_TO | \ + CDNS_I2C_INTERRUPT_SLVRDY | \ + CDNS_I2C_INTERRUPT_RXOVF | \ + CDNS_I2C_INTERRUPT_TXOVF | \ + CDNS_I2C_INTERRUPT_RXUNF | \ + CDNS_I2C_INTERRUPT_ARBLOST) + #define CDNS_I2C_FIFO_DEPTH 16 #define CDNS_I2C_TRANSFER_SIZE_MAX 255 /* Controller transfer limit */ #define CDNS_I2C_TRANSFER_SIZE (CDNS_I2C_TRANSFER_SIZE_MAX - 3) @@ -241,7 +251,7 @@ static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, setbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD); /* Clear the interrupts in status register */ - writel(0xFF, &regs->interrupt_status); + writel(CDNS_I2C_INTERRUPTS_MASK, &regs->interrupt_status); writel(addr, &regs->address); -- 1.9.1

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[U-Boot] [PATCH v11 0/9] Add support for loading FPGA bitstream
by tien.fong.chee＠intel.com 08 Mar '19

08 Mar '19

From: Tien Fong Chee <tien.fong.chee(a)intel.com> This version mainly assign "-1" to both periph and core images in patch[2/9] because the numeric associates the core and periph images in cases where there are multiple. This series is working on top of u-boot.git http://git.denx.de/u-boot.git These patches are required before applying this series of patches 1. [U-Boot,v4] misc: fs_loader: Add support for initializing block device https://patchwork.ozlabs.org/project/uboot/list/?series=89282(done review) 3. [U-Boot] misc: fs_loader: Replace label with DT phandle https://patchwork.ozlabs.org/project/uboot/list/?series=92167(under review) [v9]: https://www.mail-archive.com/u-boot@lists.denx.de/msg316086.html [v8]: https://www.mail-archive.com/u-boot@lists.denx.de/msg316086.html [v7]: https://www.mail-archive.com/u-boot@lists.denx.de/msg314511.html Tien Fong Chee (9): ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK ARM: socfpga: Cleaning up the messages ARM: socfpga: Move the watchdog reset to the looping location ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK spl : socfpga: Implement fpga bitstream loading with socfpga loadfs ARM: socfpga: Synchronize the configuration for A10 SoCDK ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 17 + .../include/mach/fpga_manager_arria10.h | 40 +- arch/arm/mach-socfpga/spl_a10.c | 31 +- board/altera/arria10-socdk/fit_spl_fpga.its | 38 ++ configs/socfpga_arria10_defconfig | 21 +- .../fpga/altera-socfpga-a10-fpga-mgr.txt | 26 +- drivers/fpga/socfpga_arria10.c | 514 ++++++++++++++++++++- include/configs/socfpga_common.h | 4 +- include/image.h | 4 + 9 files changed, 663 insertions(+), 32 deletions(-) create mode 100644 board/altera/arria10-socdk/fit_spl_fpga.its -- 2.13.0

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[U-Boot] [PATCH 1/4] ARM: socfpga: Disable D cache in SPL
by Marek Vasut 08 Mar '19

08 Mar '19

The bootrom seems to leave the D-cache in messed up state, make sure the SPL disables it so it can not interfere with operation. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Chin Liang See <chin.liang.see(a)intel.com> Cc: Dinh Nguyen <dinguyen(a)kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt(a)gmail.com> Cc: Tien Fong Chee <tien.fong.chee(a)intel.com> --- arch/arm/mach-socfpga/spl_a10.c | 2 ++ include/configs/socfpga_arria10_socdk.h | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index c97eacb424..c8e73d47c0 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -77,6 +77,8 @@ void spl_board_init(void) void board_init_f(ulong dummy) { + dcache_disable(); + socfpga_init_security_policies(); socfpga_sdram_remap_zero(); diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index 58e446b60a..0f116fbf2d 100644 --- a/include/configs/socfpga_arria10_socdk.h +++ b/include/configs/socfpga_arria10_socdk.h @@ -15,8 +15,6 @@ /* * U-Boot general configurations */ -/* Cache options */ -#define CONFIG_SYS_DCACHE_OFF /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 -- 2.20.1

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[U-Boot] [PATCH v2 0/1] efi_loader: support BootNext and BootCurrent
by AKASHI Takahiro 08 Mar '19

08 Mar '19

This patch was originally posted as a single one, but then was merged in my "run -e." Now I would like to post it on its own. With this patch, EFI Boot Manager will handles BootNext and BootCurrent variable as UEFI specification describes. Changes in v2 (Mar 5, 2019) * extract this patch from my "run -e" patch set * use efi_[get|set]_variable instead of 'rs->*' * add EFI_CALL * cosmetic changes AKASHI Takahiro (1): efi_loader: bootmgr: support BootNext and BootCurrent variable behavior lib/efi_loader/efi_bootmgr.c | 40 ++++++++++++++++++++++++++++++++---- 1 file changed, 36 insertions(+), 4 deletions(-) -- 2.20.1

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[U-Boot] [PATCH 1/6] ARM: rmobile: Imply clock drivers per SoC
by Marek Vasut 07 Mar '19

07 Mar '19

Imply preferred clock driver per SoC, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- arch/arm/mach-rmobile/Kconfig.32 | 5 +++++ arch/arm/mach-rmobile/Kconfig.64 | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index 076a019135..5d9da49c92 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -16,25 +16,30 @@ config R8A7790 bool "Renesas SoC R8A7790" select RCAR_GEN2 select ARM_CORTEX_A15_CVE_2017_5715 + imply CLK_R8A7790 config R8A7791 bool "Renesas SoC R8A7791" select RCAR_GEN2 select ARM_CORTEX_A15_CVE_2017_5715 + imply CLK_R8A7791 config R8A7792 bool "Renesas SoC R8A7792" select RCAR_GEN2 select ARM_CORTEX_A15_CVE_2017_5715 + imply CLK_R8A7792 config R8A7793 bool "Renesas SoC R8A7793" select RCAR_GEN2 select ARM_CORTEX_A15_CVE_2017_5715 + imply CLK_R8A7793 config R8A7794 bool "Renesas SoC R8A7794" select RCAR_GEN2 + imply CLK_R8A7794 choice prompt "Renesas ARM SoCs board select" diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index cb9f569e5f..d84c0617d1 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -5,18 +5,23 @@ choice config R8A7795 bool "Renesas SoC R8A7795" + imply CLK_R8A7795 config R8A7796 bool "Renesas SoC R8A7796" + imply CLK_R8A7796 config R8A77970 bool "Renesas SoC R8A77970" + imply CLK_R8A77970 config R8A77990 bool "Renesas SoC R8A77990" + imply CLK_R8A77990 config R8A77995 bool "Renesas SoC R8A77995" + imply CLK_R8A77995 endchoice -- 2.19.2

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[U-Boot] [PATCH v5 0/6] I2C fixes for the R-Car H3
by Ismael Luceno Cortes 07 Mar '19

07 Mar '19

This series is meant to be applied on top of the "i2c: rcar_i2c: Add Gen3 SoC support" patch. v5 is just an edit over v4; a change ended up in the wrong commit in that version. Ismael Luceno (6): i2c: rcar_i2c: Setup SCL/SDA delay at rcar_i2c_set_speed i2c: rcar_i2c: Add comments about registers & values i2c: rcar_i2c: Fix sending of slave addresses i2c: rcar_i2c: Don't mask errors with EREMOTEIO at rcar_i2c_xfer i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer i2c: rcar_i2c: Move FSDA check to rcar_i2c_recover drivers/i2c/rcar_i2c.c | 87 +++++++++++++++++++++++------------------- 1 file changed, 47 insertions(+), 40 deletions(-) base-commit: f08023c07d826fbc8e62fdd3367961b2f0b06844 prerequisite-patch-id: 9e5b0458bc15640eb483ccad91dbe85150f9f7be -- 2.19.1

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[U-Boot] [PATCH v4 0/6] I2C fixes for the R-Car H3
by Ismael Luceno Cortes 07 Mar '19

07 Mar '19

This series is meant to be applied on top of the "i2c: rcar_i2c: Add Gen3 SoC support" patch. Ismael Luceno (6): i2c: rcar_i2c: Setup SCL/SDA delay at rcar_i2c_set_speed i2c: rcar_i2c: Add comments about registers & values i2c: rcar_i2c: Fix sending of slave addresses i2c: rcar_i2c: Don't mask errors with EREMOTEIO at rcar_i2c_xfer i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer i2c: rcar_i2c: Move FSDA check to rcar_i2c_recover drivers/i2c/rcar_i2c.c | 87 +++++++++++++++++++++++------------------- 1 file changed, 47 insertions(+), 40 deletions(-) base-commit: f08023c07d826fbc8e62fdd3367961b2f0b06844 prerequisite-patch-id: 9e5b0458bc15640eb483ccad91dbe85150f9f7be -- 2.19.1

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