February 2019 - U-Boot

[U-Boot] [RFC PATCH 1/3] sunxi: Use clrsetbits_le32 instead of multiple instruction
by Michael Trimarchi 13 Feb '19

13 Feb '19

Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com> --- arch/arm/mach-sunxi/dram_sun8i_a33.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-sunxi/dram_sun8i_a33.c b/arch/arm/mach-sunxi/dram_sun8i_a33.c index 1da2727f98..83212aaddf 100644 --- a/arch/arm/mach-sunxi/dram_sun8i_a33.c +++ b/arch/arm/mach-sunxi/dram_sun8i_a33.c @@ -148,12 +148,8 @@ static void auto_set_timing_para(struct dram_para *para) reg_val = (tcksrx << 24) | (tcksre << 16) | (tckesr << 8) | (tcke << 0); writel(reg_val, &mctl_ctl->dramtmg5); /* Set two rank timing and exit self-refresh timing */ - reg_val = readl(&mctl_ctl->dramtmg8); - reg_val &= ~(0xff << 8); - reg_val &= ~(0xff << 0); - reg_val |= (0x33 << 8); - reg_val |= (0x8 << 0); - writel(reg_val, &mctl_ctl->dramtmg8); + clrsetbits_le32(&mctl_ctl->dramtmg8, (0xff << 8) | (0xff << 0), + 0x33 << 8 | (0x8 << 0)); /* Set phy interface time */ reg_val = (0x2 << 24) | (t_rdata_en << 16) | (0x1 << 8) | (wr_latency << 0); -- 2.17.1

3 8

[U-Boot] [PATCH v3 00/22] imx: vybrid: Update BK4 and PCM052 boards to only use DM/DTS
by Lukasz Majewski 13 Feb '19

13 Feb '19

This patch series converts PCM052 and BK4 to use Driver Model and Device Tree. Some notable changes: - The way how MAC address is read from fuses can now be adjusted - DTS improvement/sync with kernel (also extract u-boot specific properties) - Using generic code instead of one from board The output of u-boot boot: U-Boot 2019.01-rc3-00076-gc149229be0 (Jan 14 2019 - 08:38:48 +0100) CPU: Freescale Vybrid VF610 at 396 MHz Reset cause: POWER ON RESET Model: Liebherr (LVF) BK4 Vybrid Board Board: BK4r1 (L333) DRAM: 512 MiB NAND: 1024 MiB MMC: FSL_SDHC: 0 Loading Environment from NAND... OK In: serial@40028000 Out: serial@40028000 Err: serial@40028000 Net: eth0: fec@400d0000, eth1: fec@400d1000 Enter passphrase to stop autoboot, booting in 3 seconds Buildman CI: ./tools/buildman/buildman.py --branch=HEAD vf610 mx6 vybrid --detail --verbose --show_errors --force-build --count=22 --output-dir=../BUILD/ Travis-CI: https://travis-ci.org/lmajewski/u-boot-dfu/builds/487979522 U-boot master branch: SHA1: db4a29993d207fec33c07de8b8cb8a3fd22c9e6c Changes in v3: - Add code to enable I2C0 code as suggested by Stefan (so the code can be reused by other boards without regressions) - Exclude the pcm052.c related code to a separate patch - New patch (separate board code patch) Changes in v2: - Rename pcm052.dts to vf610-pcm052.dts - Rename bk4r1.dts to vf610-bk4r1.dts - Extract 'u-boot,dm-pre-reloc;' property to separate file (to facilitate sync with Linux kernel dts files) - New patch - Disable EFI related support and commands (as we do not plan to use EFI on this setup) Lukasz Majewski (22): net: FEC: Add compatible for vybrid (vf610) to reuse fec_mxc.c driver net: Kconfig: FEC: Add dependency on VF610 vybrid: ddr: Extend vf610-pinfunc.h with DDR pads definitions vybrid: clock: Provide enable_i2c_clk() function for Vybrid pcm052: board: Do not enable I2C2 code in the board file vybrid: Define the imx_get_mac_from_fuse() as a __weak function pcm052: board: Remove "m4go" command as it is superseded by "bootaux" pcm052: board: vybrid: Update the board name for BK4 device ARM: DTS: vybrid: Update vf.dtsi file to descibe more vf610 hardware pcm052: board: cosmetic: Add copyright notice to pcm052.c ARM: DTS: Update pcm052 based dts files (bk4r1/pcm052) ARM: DTS: Provide vf610-bk4r1-u-boot.dtsi for U-Boot specific properties defconfig: bk4/pcm052: Update bk4r1|pcm052_defconfig to support DM/DT config: pcm052: Use SZ_X{MK} from linux/sizes.h for include/configs/pcm052.h config: bk4: Update include/configs/bk4r1.h file pcm052: board: Remove in-board setup code (it is now replaced by DM setup) config: bk4: Update u-boot script to support recovery via SD card config: bk4: Update u-boot envs to support NOR memories initial setup pcm052: bk4: sdcard: Add support for SD card booting/recovery pcm052: board: Add code to setup LED default states pcm052: mac: Provide board specific imx_get_mac_from_fuse() function pcm052: bk4: Add board_phy_config() for BK4 to setup ksz8081 phy arch/arm/cpu/armv7/vf610/Kconfig | 1 + arch/arm/cpu/armv7/vf610/generic.c | 24 +- arch/arm/dts/Makefile | 4 +- arch/arm/dts/bk4r1.dts | 47 ---- arch/arm/dts/vf.dtsi | 62 +++++ arch/arm/dts/vf610-bk4r1-u-boot.dtsi | 27 ++ arch/arm/dts/vf610-bk4r1.dts | 97 +++++++ arch/arm/dts/{pcm052.dts => vf610-pcm052.dts} | 6 +- arch/arm/dts/vf610-pcm052.dtsi | 259 +++++++++++++++++ arch/arm/dts/vf610-pinfunc.h | 50 ++++ arch/arm/include/asm/arch-vf610/clock.h | 3 + arch/arm/include/asm/arch-vf610/imx-regs.h | 2 + board/phytec/pcm052/pcm052.c | 386 ++++++-------------------- configs/bk4r1_defconfig | 49 +++- configs/pcm052_defconfig | 36 ++- drivers/net/Kconfig | 2 +- drivers/net/fec_mxc.c | 1 + include/configs/bk4r1.h | 263 +++++++++++++++++- include/configs/pcm052.h | 51 +--- 19 files changed, 959 insertions(+), 411 deletions(-) delete mode 100644 arch/arm/dts/bk4r1.dts create mode 100644 arch/arm/dts/vf610-bk4r1-u-boot.dtsi create mode 100644 arch/arm/dts/vf610-bk4r1.dts rename arch/arm/dts/{pcm052.dts => vf610-pcm052.dts} (81%) create mode 100644 arch/arm/dts/vf610-pcm052.dtsi -- 2.11.0

3 33

[U-Boot] [PATCH v4 00/20] SF: Migrate to Linux SPI NOR framework
by Vignesh R 13 Feb '19

13 Feb '19

Here is the v4 of SPI NOR migration(github branch at [1]) with minor cleanups Travis ci report: https://travis-ci.org/r-vignesh/u-boot/builds/488868207 Change log: Since v3: Rebase on to the latest u-boot/master Drop MODULE_LICENSE, EXPORT_SYMBOL_GPL macros Make SPI_FLASH_BAR default for ZYNQ_QSPI as suggested by Jagan. Since v2: Split sync up patches into smaller versions so that its easier for review. Address comments by Jagan and Simon Goldschmidt on v2. Make SPI_FLASH_TINY(read only SF stack) as default for SPL build to offset against size increase due to new code. Since v1: Remove #ifindef __UBOOT__ Add back BAR support, but dont enable as default for all platform (see 10/11 for more details) Enable SPI_FLASH_TINY on boards where there is SPL size constraint as seen on travis ci builds. Drop sf_mtd changes for now as it seems to cause issues. v1: https://patchwork.ozlabs.org/cover/1012146/ Since RFC v2: Fix issues reported by Simon Goldschmidt wrt 4 use of byte addressing opcode Fix issues in compiling SFDP code Re organize file names and Makefile to simply spi-nor-tiny inclusion Remove SPI_FLASH_BAR and SF_DUAL_FLASH as these are no longer used RFC v2: https://patchwork.ozlabs.org/cover/1007589/ Since RFC v1: Add lightweight SPI flash stack for boards with SPL size constraints Provide non DM version of spi-mem Fix build issues on different platforms as reported by travis-ci on v1 RFC v1: https://patchwork.ozlabs.org/cover/1004689/ Background: U-Boot SPI NOR support (sf layer) is quite outdated as it does not support 4 byte addressing opcodes, SFDP table parsing and different types of quad mode enable sequences. Many newer flashes no longer support BANK registers used by sf layer to a access >16MB space. Also, many SPI controllers have special MMIO interfaces which provide accelerated read/write access but require knowledge of flash parameters to make use of it. Recent spi-mem layer provides a way to support such flashes but sf layer isn't using that. This patch series syncs SPI NOR framework from Linux v4.19. It also adds spi-mem support on top. So, we gain 4byte addressing support and SFDP support. This makes migrating to U-Boot MTD framework easier. Tested with few Spansion, micron and macronix flashes with TI's dra7xx, k2g, am43xx EVMs. I dont have access to flashes from other vendors. So, I would greatly appreciate testing on other platforms. Complete series with dependencies here[1] [1] https://github.com/r-vignesh/u-boot.git branch: spi-nor-mig-patch-v4 Vignesh R (20): configs: Move CONFIG_SPI_FLASH into defconfigs bitops: Fix GENMASK definition for Sandbox spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size spi: spi-mem: Claim SPI bus before spi mem access spi: Add non DM version of SPI_MEM sh: bitops: add hweight*() macros mtd: spi: Port SPI NOR framework from Linux mtd: spi: spi-nor-core: Add SPI MEM support mtd: spi: spi-nor-core: Add 4 Byte addressing support mtd: spi: spi-nor-core: Add SFDP support mtd: spi: spi-nor-core: Add back U-Boot specific features mtd: spi: sf_probe: Add "jedec,spi-nor" compatible string mtd: spi: Switch to new SPI NOR framework mtd: spi: Remove unused files mtd: spi: Add lightweight SPI flash stack for SPL spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL configs: Remove SF_DUAL_FLASH configs: Don't use SPI_FLASH_BAR as default MAINTAINERS: Add an entry for SPI NOR MAINTAINERS | 9 + arch/arm/mach-omap2/am33xx/Kconfig | 1 - arch/sh/include/asm/bitops.h | 4 + common/spl/Kconfig | 23 +- configs/alt_defconfig | 1 - configs/am57xx_evm_defconfig | 1 - configs/am57xx_hs_evm_defconfig | 1 - configs/ap121_defconfig | 1 - configs/ap143_defconfig | 1 - configs/avnet_ultra96_rev1_defconfig | 1 - configs/axs101_defconfig | 1 - configs/axs103_defconfig | 1 - configs/bg0900_defconfig | 1 - configs/blanche_defconfig | 1 - configs/cgtqmx6eval_defconfig | 1 + configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/cl-som-am57x_defconfig | 1 - configs/clearfog_defconfig | 1 - configs/cm_t43_defconfig | 1 - configs/db-88f6820-amc_defconfig | 1 - configs/display5_defconfig | 1 - configs/display5_factory_defconfig | 1 - configs/dra7xx_evm_defconfig | 1 - configs/dra7xx_hs_evm_defconfig | 1 - configs/ds109_defconfig | 1 - configs/ds414_defconfig | 1 - configs/evb-rk3036_defconfig | 1 + configs/evb-rk3128_defconfig | 1 + configs/evb-rk3288_defconfig | 1 + configs/evb-rk3328_defconfig | 1 + configs/evb-rv1108_defconfig | 1 - configs/fennec-rk3288_defconfig | 1 + configs/firefly-rk3288_defconfig | 1 + configs/gose_defconfig | 1 - configs/helios4_defconfig | 1 - configs/k2g_evm_defconfig | 1 - configs/k2g_hs_evm_defconfig | 1 - configs/koelsch_defconfig | 1 - configs/kylin-rk3036_defconfig | 1 + configs/lager_defconfig | 1 - configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig | 1 + configs/ls2080aqds_qspi_defconfig | 1 + configs/ls2080aqds_sdcard_defconfig | 1 + configs/maxbcm_defconfig | 1 - configs/miqi-rk3288_defconfig | 1 + configs/mt7629_rfb_defconfig | 1 - configs/mx6sxsabreauto_defconfig | 1 - configs/mx6sxsabresd_defconfig | 1 - configs/mx6ul_14x14_evk_defconfig | 1 - configs/mx6ul_9x9_evk_defconfig | 1 - configs/mx6ull_14x14_evk_defconfig | 1 - configs/mx6ull_14x14_evk_plugin_defconfig | 1 - configs/mx7dsabresd_qspi_defconfig | 1 - configs/phycore-rk3288_defconfig | 1 + configs/popmetal-rk3288_defconfig | 1 + configs/porter_defconfig | 1 - configs/r8a77970_eagle_defconfig | 1 - configs/rock2_defconfig | 1 + configs/rock_defconfig | 1 + configs/silk_defconfig | 1 - configs/socfpga_arria5_defconfig | 1 - configs/socfpga_cyclone5_defconfig | 1 - configs/socfpga_is1_defconfig | 1 - configs/socfpga_sockit_defconfig | 1 - configs/socfpga_socrates_defconfig | 1 - configs/socfpga_sr1500_defconfig | 1 - configs/socfpga_stratix10_defconfig | 1 - configs/stout_defconfig | 1 - configs/tinker-rk3288_defconfig | 1 + configs/topic_miami_defconfig | 1 - configs/topic_miamilite_defconfig | 2 - configs/topic_miamiplus_defconfig | 2 - configs/turris_omnia_defconfig | 1 + configs/vyasa-rk3288_defconfig | 1 + configs/xilinx_versal_virt_defconfig | 1 - configs/xilinx_zynqmp_mini_qspi_defconfig | 2 - configs/xilinx_zynqmp_zc1232_revA_defconfig | 2 - configs/xilinx_zynqmp_zc1254_revA_defconfig | 2 - configs/xilinx_zynqmp_zc1275_revA_defconfig | 2 - configs/xilinx_zynqmp_zc1275_revB_defconfig | 2 - .../xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 - .../xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 - .../xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 - configs/xilinx_zynqmp_zcu100_revC_defconfig | 1 - configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 2 - configs/xilinx_zynqmp_zcu102_revA_defconfig | 2 - configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 - configs/xilinx_zynqmp_zcu104_revA_defconfig | 2 - configs/xilinx_zynqmp_zcu104_revC_defconfig | 2 - configs/xilinx_zynqmp_zcu106_revA_defconfig | 2 - configs/xilinx_zynqmp_zcu111_revA_defconfig | 1 - configs/zynq_cc108_defconfig | 1 - configs/zynq_cse_qspi_defconfig | 1 - configs/zynq_dlc20_rev1_0_defconfig | 1 - configs/zynq_microzed_defconfig | 1 - configs/zynq_minized_defconfig | 1 - configs/zynq_z_turn_defconfig | 1 - configs/zynq_zc702_defconfig | 1 - configs/zynq_zc706_defconfig | 1 - configs/zynq_zc770_xm010_defconfig | 1 - configs/zynq_zc770_xm013_defconfig | 1 - configs/zynq_zed_defconfig | 1 - configs/zynq_zybo_defconfig | 1 - configs/zynq_zybo_z7_defconfig | 1 - doc/SPI/README.dual-flash | 92 - doc/SPI/README.ti_qspi_dra_test | 1 - drivers/mtd/spi/Kconfig | 16 +- drivers/mtd/spi/Makefile | 12 +- drivers/mtd/spi/sandbox.c | 36 +- drivers/mtd/spi/sf_dataflash.c | 11 +- drivers/mtd/spi/sf_internal.h | 225 +- drivers/mtd/spi/sf_probe.c | 33 +- drivers/mtd/spi/spi-nor-core.c | 2414 +++++++++++++++++ drivers/mtd/spi/spi-nor-ids.c | 297 ++ drivers/mtd/spi/spi-nor-tiny.c | 804 ++++++ drivers/mtd/spi/spi_flash.c | 1337 --------- drivers/mtd/spi/spi_flash_ids.c | 211 -- drivers/spi/Kconfig | 10 +- drivers/spi/Makefile | 1 + drivers/spi/spi-mem-nodm.c | 105 + drivers/spi/spi-mem.c | 41 +- drivers/spi/stm32_qspi.c | 4 +- include/configs/T102xQDS.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/cgtqmx6eval.h | 1 - include/configs/gw_ventana.h | 1 - include/configs/km/kmp204x-common.h | 1 - include/configs/ls1021aiot.h | 1 - include/configs/ls2080aqds.h | 2 - include/configs/rk3036_common.h | 1 - include/configs/rk3128_common.h | 1 - include/configs/rk3188_common.h | 1 - include/configs/rk3288_common.h | 1 - include/configs/rk3328_common.h | 1 - include/configs/socfpga_stratix10_socdk.h | 1 - include/configs/turris_omnia.h | 1 - include/linux/bitops.h | 5 + include/linux/mtd/cfi.h | 32 + include/linux/mtd/spi-nor.h | 419 +++ include/spi_flash.h | 105 +- 147 files changed, 4302 insertions(+), 2083 deletions(-) delete mode 100644 doc/SPI/README.dual-flash create mode 100644 drivers/mtd/spi/spi-nor-core.c create mode 100644 drivers/mtd/spi/spi-nor-ids.c create mode 100644 drivers/mtd/spi/spi-nor-tiny.c delete mode 100644 drivers/mtd/spi/spi_flash.c delete mode 100644 drivers/mtd/spi/spi_flash_ids.c create mode 100644 drivers/spi/spi-mem-nodm.c create mode 100644 include/linux/mtd/cfi.h create mode 100644 include/linux/mtd/spi-nor.h -- 2.20.1

6 32

[U-Boot] [PATCH 1/3] arm64: zynqmp: Fix logic around CONFIG_ZYNQ_SDHCI
by Michal Simek 13 Feb '19

13 Feb '19

Replace SDHCI controller listing by Kconfig symbol to let SPL know that this board is using multiple SDHCIs controllers. Kconfig help message should explain why this is needed. Origin symbols were used in full u-boot but with moving to distro boot this was fixed already. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/mach-zynqmp/Kconfig | 11 +++++++++++ arch/arm/mach-zynqmp/spl.c | 2 +- configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 + include/configs/xilinx_zynqmp_zc1275_revB.h | 2 -- include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h | 3 --- include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h | 2 -- include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h | 2 -- include/configs/xilinx_zynqmp_zcu102.h | 1 - include/configs/xilinx_zynqmp_zcu104.h | 2 -- include/configs/xilinx_zynqmp_zcu106.h | 2 -- include/configs/xilinx_zynqmp_zcu111.h | 2 -- 11 files changed, 13 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index e9f7e7e48992..9bb5a5c20201 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -99,6 +99,17 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED config ZYNQ_SDHCI_MAX_FREQ default 200000000 +config SPL_ZYNQMP_TWO_SDHCI + bool "Enable booting from both SDHCIs" + depends on SPL + help + This option reflects that board has two SDHCI controllers which + platform can use as boot device. This option ensures that SPL will + setup BOOT_DEVICE_MMC2 for SDHCI1 controller and BOOT_DEVICE_MMC1 for + SDHCI0 controller. Platforms which have only one SDHCI controller + shouldn't enable this option because it for software SDHCI0 or SDHCI1 + are both covered by BOOT_DEVICE_MMC1. + config SPL_ZYNQMP_ALT_BOOTMODE hex default 0x0 if JTAG_MODE diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c index fb3955c93fdc..f6f5414201b5 100644 --- a/arch/arm/mach-zynqmp/spl.c +++ b/arch/arm/mach-zynqmp/spl.c @@ -85,7 +85,7 @@ u32 spl_boot_device(void) case SD_MODE1: case SD1_LSHFT_MODE: /* not working on silicon v1 */ /* if both controllers enabled, then these two are the second controller */ -#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1) +#if defined(SPL_ZYNQMP_TWO_SDHCI) return BOOT_DEVICE_MMC2; /* else, fall through, the one SDHCI controller that is enabled is number 1 */ #endif diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 59db2131c0c4..5e419822465a 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xff000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y +CONFIG_SPL_ZYNQMP_TWO_SDHCI=y CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/include/configs/xilinx_zynqmp_zc1275_revB.h b/include/configs/xilinx_zynqmp_zc1275_revB.h index f0880db0b05e..244f61edd181 100644 --- a/include/configs/xilinx_zynqmp_zc1275_revB.h +++ b/include/configs/xilinx_zynqmp_zc1275_revB.h @@ -8,8 +8,6 @@ #ifndef __CONFIG_ZYNQMP_ZC1275_REVB_H #define __CONFIG_ZYNQMP_ZC1275_REVB_H -#define CONFIG_ZYNQ_SDHCI1 - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZC1275_REVB_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h index f0ab3f159222..cd72e6f419b3 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h @@ -9,9 +9,6 @@ #ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H #define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H -#define CONFIG_ZYNQ_SDHCI0 -#define CONFIG_ZYNQ_SDHCI1 - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h b/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h index bd4a0c3178b8..dbacfde151df 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H #define __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H -#define CONFIG_ZYNQ_SDHCI1 - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h index f39eeb9bfc90..0b525c88b7d6 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H #define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H -#define CONFIG_ZYNQ_SDHCI0 - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */ diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h index f1504784fdd6..dfa1f7a0a9b7 100644 --- a/include/configs/xilinx_zynqmp_zcu102.h +++ b/include/configs/xilinx_zynqmp_zcu102.h @@ -9,7 +9,6 @@ #ifndef __CONFIG_ZYNQMP_ZCU102_H #define __CONFIG_ZYNQMP_ZCU102_H -#define CONFIG_ZYNQ_SDHCI1 #define CONFIG_SPD_EEPROM #define CONFIG_DDR_SPD diff --git a/include/configs/xilinx_zynqmp_zcu104.h b/include/configs/xilinx_zynqmp_zcu104.h index 9d40955d5d36..a8303756e5ea 100644 --- a/include/configs/xilinx_zynqmp_zcu104.h +++ b/include/configs/xilinx_zynqmp_zcu104.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_ZYNQMP_ZCU104_H #define __CONFIG_ZYNQMP_ZCU104_H -#define CONFIG_ZYNQ_SDHCI1 - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZCU104_H */ diff --git a/include/configs/xilinx_zynqmp_zcu106.h b/include/configs/xilinx_zynqmp_zcu106.h index dc2efc7e059a..bb5cf677cb78 100644 --- a/include/configs/xilinx_zynqmp_zcu106.h +++ b/include/configs/xilinx_zynqmp_zcu106.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_ZYNQMP_ZCU106_H #define __CONFIG_ZYNQMP_ZCU106_H -#define CONFIG_ZYNQ_SDHCI1 - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZCU106_H */ diff --git a/include/configs/xilinx_zynqmp_zcu111.h b/include/configs/xilinx_zynqmp_zcu111.h index dea5e4a4d413..507aee9332c2 100644 --- a/include/configs/xilinx_zynqmp_zcu111.h +++ b/include/configs/xilinx_zynqmp_zcu111.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_ZYNQMP_ZCU111_H #define __CONFIG_ZYNQMP_ZCU111_H -#define CONFIG_ZYNQ_SDHCI1 - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZCU111_H */ -- 1.9.1

1 2

[U-Boot] Compiling UBOOT for MIPS (Reference AP143 board)
by Joan Moreau 13 Feb '19

13 Feb '19

Hi, I am trying to get a uboot image for a AP143 reference board (Mips) The "make" gives the error below Can you help ? Thank you ---- [root/ u-boot]# make menuconfig scripts/kconfig/mconf Kconfig configuration written to .config *** End of the configuration. *** Execute 'make' to start the build or try 'make help'. [root/ u-boot]# make scripts/kconfig/conf --syncconfig Kconfig CHK include/config.h UPD include/config.h CFG u-boot.cfg gcc: error: unrecognized argument in option '-mabi=32' gcc: note: valid arguments to '-mabi=' are: ms sysv gcc: error: 0: No such file or directory gcc: error: unrecognized command line option '-EB'; did you mean '-B'? gcc: error: unrecognized command line option '-G' gcc: error: unrecognized command line option '-mno-abicalls'; did you mean '-Wno-abi'? make[1]: *** [scripts/Makefile.autoconf:77: u-boot.cfg] Error 1 make: *** No rule to make target 'include/config/auto.conf', needed by 'include/config/uboot.release'. Stop.

1 1

[U-Boot] [PATCH v7 0/7] Add support for loading FPGA bitstream
by tien.fong.chee＠intel.com 13 Feb '19

13 Feb '19

From: Tien Fong Chee <tien.fong.chee(a)intel.com> These series of patches enable peripheral bitstream being programmed into FPGA to get the DDR up running. This's also called early IO release, because the peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and DDR. Once DDR is up running, core bitstream from MMC which contains user FPGA design would be loaded into DDR location. socfpga loadfs would be called to program core bitstream into FPGA and entering user mode. Lastly, u-boot-dtb.img from MMC FAT partition would be loaded to DDR, and up running from there. For this whole mechanism to work, the SDMMC flash layout would be designed as shown in below: RAW partition: 1. spl_w_dtb-mkpimage.bin mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin FAT partition contains: FPGA FIT image(fit_spl_fpga.itb) -------------------------------- Early IO release method is recommended for the sake of performance, improve up to 86% compare to full bitstream. To generate FPGA FIT image for Early IO release, runs this command: tools/mkimage -E -p 400 -f board/altera/arria10-socdk/fit_spl_fpga.its fit_spl_fpga.itb Before running above command, ensure U-Boot source directory contains both peripheral bitstream(ghrd_10as066n2.periph.rbf) and core bitstream(ghrd_10as066n2.core.rbf_. For details of describing structure and contents of the FIT image, please refer board/altera/arria10-socdk/fit_spl_fpga.its Additonal note: --------------- There is performance penalty if the memory used for loading the bitstream is unalligned to ARCH_DMA_MINALIGN inside function "static int get_cluster()" in fs/fat/fat.c. Sometimes child functions would alter the memory location and causing unalligned to ARCH_DMA_MINALIGN. This only happend when reading a FAT file by offset. To avoid performance penalty, core bitstream(fpga-2) contains large size should be at 1st then following by peripheral bitstream(fpga-1) as shown in fit_spl_fpga.its. After that, enable the DEBUG in fs/fat/fat.c and ensure no print out "FAT: Misaligned buffer address (%p)" when loading core bitstream on SPL console. Print out when loading peripheral bitstream can be ignored because the size is too small. If there is print out, please set an allign data position by running mkimage with optional -p xxx when generating FIT image. U-Boot image ------------ 3. u-boot-dtb.img For the testing purpose, these 3 series of patches are required to apply 1st before applying this series of patches. 1. [U-Boot] [PATCH v4] misc: fs_loader: Add support for initializing block device https://www.mail-archive.com/u-boot@lists.denx.de/msg314453.html Version 4 under review 2. [U-Boot] [PATCH v2 1/4] spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT https://www.mail-archive.com/u-boot@lists.denx.de/msg313259.html All series Reviewed-by: Tom Rini <trini(a)konsulko.com> Some patches of the series Reviewed-by: Simon Goldschmidt 3. [U-Boot] [PATCH v2 1/2] fs: fat: dynamically allocate memory for temporary buffer https://www.mail-archive.com/u-boot@lists.denx.de/msg314470.html Version 2 under review This series is working on top of u-boot.git - http://git.denx.de/u-boot.git . Tien Fong Chee (7): ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK spl : socfpga: Implement fpga bitstream loading with socfpga loadfs ARM: socfpga: Synchronize the configuration for A10 SoCDK ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 18 + .../include/mach/fpga_manager_arria10.h | 39 +- arch/arm/mach-socfpga/spl_a10.c | 46 ++- board/altera/arria10-socdk/fit_spl_fpga.its | 31 ++ configs/socfpga_arria10_defconfig | 21 +- .../fpga/altera-socfpga-a10-fpga-mgr.txt | 34 +- drivers/fpga/socfpga_arria10.c | 417 ++++++++++++++++++++- include/configs/socfpga_common.h | 4 +- 8 files changed, 584 insertions(+), 26 deletions(-) create mode 100644 board/altera/arria10-socdk/fit_spl_fpga.its -- 2.2.0

5 50

[U-Boot] [PATCH 00/10] spi: Add Allwinner A31 SPI driver
by Jagan Teki 13 Feb '19

13 Feb '19

This series add support for Allwinner A31 SPI controller driver. Compared to previous version[1] separate driver for A31, this patchset is trying to tune the existing sun4i_spi code by adding register set, register bits to support both A10, A31 SPI controllers. Any inputs? Jagan. Jagan Teki (10): spi: sun4i: Poll for rxfifo empty clk: sunxi: Implement SPI clocks, resets spi: sun4i: Simplify reg writes using set/clrbits_le32 spi: sun4i: Access registers and bits via enum offsets spi: sun4i: Support fifo_depth via drvdata spi: sun4i: Add CLK support spi: sun4: Add A31 spi controller support spi: sun4i: Driver cleanup spi: kconfig: Enable SUN4I_SPI by default if ARCH_SUNXI board: sopine: Enable SPI/SPI-FLASH .../sun50i-a64-sopine-baseboard-u-boot.dtsi | 12 + configs/sopine_baseboard_defconfig | 4 + drivers/clk/sunxi/clk_a10.c | 10 + drivers/clk/sunxi/clk_a10s.c | 7 + drivers/clk/sunxi/clk_a23.c | 7 + drivers/clk/sunxi/clk_a31.c | 13 + drivers/clk/sunxi/clk_a64.c | 7 + drivers/clk/sunxi/clk_a80.c | 13 + drivers/clk/sunxi/clk_a83t.c | 7 + drivers/clk/sunxi/clk_h3.c | 7 + drivers/clk/sunxi/clk_h6.c | 9 + drivers/clk/sunxi/clk_r40.c | 13 + drivers/clk/sunxi/clk_v3s.c | 4 + drivers/spi/Kconfig | 5 +- drivers/spi/sun4i_spi.c | 436 ++++++++++++------ 15 files changed, 418 insertions(+), 136 deletions(-) create mode 100644 arch/arm/dts/sun50i-a64-sopine-baseboard-u-boot.dtsi -- 2.18.0.321.gffc6fa0e3

4 26

[U-Boot] [PATCH 0/3] Add Ethernet support for Poplar board
by Shawn Guo 13 Feb '19

13 Feb '19

The series adds Ethernet support for Poplar board. It firstly creates a reset driver for HiSilicon platform, then introduces higmacv300 Ethernet driver, and finally enables Ethernet support for Poplar board. Shawn Guo (3): reset: add reset driver for HiSilicon platform net: add higmacv300 Ethernet driver for HiSilicon platform poplar: enable Ethernet driver support arch/arm/dts/hi3798cv200-u-boot.dtsi | 6 + configs/poplar_defconfig | 3 + drivers/net/Kconfig | 9 + drivers/net/Makefile | 1 + drivers/net/higmacv300.c | 592 +++++++++++++++++++++++++++ drivers/reset/Kconfig | 6 + drivers/reset/Makefile | 1 + drivers/reset/reset-hisilicon.c | 95 +++++ 8 files changed, 713 insertions(+) create mode 100644 drivers/net/higmacv300.c create mode 100644 drivers/reset/reset-hisilicon.c -- 2.18.0

4 11

[U-Boot] [PATCH v2 0/4] Update stm32_sdmmc2 driver and DT bindings
by Patrice Chotard 13 Feb '19

13 Feb '19

This series: - Update stm32_sdmmc2 driver to be synced with v4.19 kernel DT bindings. - Fix r1b timeout issue for stm32_sdmmc2 driver. - Update stm32h743i-eval and stm32mp157c-ed1 DT to be synced with new sdmmc DT bindings. Changes in v2: - Remove a "Reviewed-by: CITOOLS ..." Christophe Kerello (1): mmc: stm32_sdmmc2: Fix r1b timeout issue Patrice Chotard (1): ARM: dts: stm32: Update sdmmc binding for stm32mp157c-ed1 Patrick Delaunay (2): ARM: dts: stm32: Update sdmmc binding for stm32h743i-eval mmc: stm32_sdmmc2: Update DT properties with v4.19 bindings arch/arm/dts/stm32h743i-eval.dts | 2 +- arch/arm/dts/stm32mp157c-ed1.dts | 10 +++--- drivers/mmc/stm32_sdmmc2.c | 67 ++++++++++++++++++++++++++++++++++------ 3 files changed, 64 insertions(+), 15 deletions(-) -- 1.9.1

1 4

[U-Boot] [PATCH v5 0/7] Add support for symlink creation in EXT4
by Jean-Jacques Hiblot 13 Feb '19

13 Feb '19

This series adds support for the creation of symbolic links on ext4 file-systems. The motivation behind this work is to have the ability to "do" the job of update-alternatives in u-boot. Firmware on TI's platform are usually managed with update-alternatives and are thus targeted by a symbolic link. In some situations we need the ability to select an alternate firmware before the linux kernel is started so that when a early driver needing the firmware comes up, it can be fed the firmware of our choice. Tested on a am57xx_evm, using a EXT4 partition on external SDcard. The filesystem can be checked later with: fsck.ext4 -f <dev> usage example: => ln mmc 0:2 zImage /boot/the_linux_kernel Changes in v5: - Added filesystem integrity checks - Fix bug in ext4fs_delete_file(). The type must be read from the inode. Changes in v4: - replaced u64 and u32 with uint64_t and uint32_t Changes in v3: - reworded commit log - removed FS integrity test (fsck) in python tests Changes in v2: - Prevent write access if metadata checksum is enabled - Fix issue in ext4fs_delete_file() when target in not stored in an allocated block - Added python tests for symlinks under sandbox Jean-Jacques Hiblot (7): fs: ext4: do not allow writes if metadata checksum is active test: fs: disable the metadata checksums on ext4 filesystems test: fs: Add filesystem integrity checks fs: ext4: constify the buffer passed to write functions fs: ext4: Add support for the creation of symbolic links fs: Add a new command to create symbolic links test: fs: Added tests for symlinks cmd/fs.c | 14 +++ fs/ext4/ext4_common.c | 4 +- fs/ext4/ext4_common.h | 2 +- fs/ext4/ext4_write.c | 74 +++++++++++--- fs/fs.c | 44 ++++++++ include/ext4fs.h | 6 +- include/fs.h | 2 + test/py/tests/test_fs/conftest.py | 77 ++++++++++++++ test/py/tests/test_fs/fstest_defs.py | 3 + test/py/tests/test_fs/fstest_helpers.py | 15 +++ test/py/tests/test_fs/test_basic.py | 4 + test/py/tests/test_fs/test_ext.py | 10 ++ test/py/tests/test_fs/test_mkdir.py | 8 ++ test/py/tests/test_fs/test_symlink.py | 129 ++++++++++++++++++++++++ test/py/tests/test_fs/test_unlink.py | 14 ++- 15 files changed, 382 insertions(+), 24 deletions(-) create mode 100644 test/py/tests/test_fs/fstest_helpers.py create mode 100644 test/py/tests/test_fs/test_symlink.py -- 2.17.1

1 8