May 2018 - U-Boot

Re: [U-Boot] [PATCH v10 3/3] Adding wget
by Duncan Hare 14 May '18

14 May '18

>From: Simon Glass <sjg(a)chromium.org> >To: Duncan Hare <dh(a)synoia.com> >Sent: Sunday, April 22, 2018 1:10 PM >Subject: Re: [PATCH v10 3/3] Adding wget > >Hi Duncan, >On 17 April 2018 at 15:58, Duncan Hare <dh(a)synoia.com> wrote: >> From: Simon Glass <sjg(a)chromium.org> >> It has been through patman, and the only errors flagged a packed structures, >> necessary for packed headers. >It should be possible in the Python test to enable an http server on localhost with a few lines of code, and then connect to it in the test? Yes server at port 80. The server can be tested with the wget command which can be installed on linux.I doubt that loop-back like this will produce the scrambling of packet order which is a feature of push down stacks for packet queuesin the internet. The pi is easy to overrun when testing on a low latency network, because the TCP send window size is defined by the number ofnet_rx_buffers, which is controlled the CONFIG_SYS_RX_ETH_BUFFER in include.net.h, which sets PKTBUFSRX at the beginning of include/net.h, which in-turn defines a buffer pool in net/net.c, array named net_pkt_buf. Hence my comment in a different thread about buffering on the pi. Few of the socs appear to use net_pkt_buf buffers for net traffic. If there are too many transmission errors the sending tcp drops the connection. My solution to this is to halve the size of CONFIG_SYS_RX_ETH_BUFFER until transmission works. If I was thinking about a buffer pool for in the drivers, I'd implement it in net/net.c. Interface "getbuffer," returns a pointer, and increments an index to the next net_rx_buffer with no protection for overrun. Overrun is managed by ack numbers in TCPand timeout in UDP. Possibly CONFIG_SYS_RX_ETH_BUFFER could come under Kconfig. >Regards, >Simon RegardsDuncan

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[U-Boot] [PATCH] ext4fs: Add ext4 extent tree cache
by evan.g.thompson＠gmail.com 14 May '18

14 May '18

From: Evan Thompson <evan.thompson(a)flukenetworks.com> In ext4, the file inode can store up to 4 extents. If a file requires more (due to size or fragmentation), an extent index tree is used. Currently, u-boot reads a node from each level of the extent tree for every block read, which is very inefficient when extent tree depth is > 0. This patch adds a cache for the extent tree. We cache the 1 most-recently-seen node at each extent tree level. The typical workload is sequential block access, so once we leave a given tree node, it will not be revisited. Therefore, it makes sense to just cache one node per tree level. Cached blocks are lazily allocated. The typical case is extent tree depth = 0, in which case no caching is needed and no allocations will occur. For files with extent tree depth = 1, this patch produces a ~10x improvement in read speed. For deeper extent trees, the improvement is larger. On my test device, a 3MB file which previously took 9s to read now takes 150ms. Cache size is configurable with CONFIG_EXT4_EXTENT_CACHE_SIZE. However the default of 5 (the maximum depth of well-formed extent trees) is recommended. Signed-off-by: Evan Thompson <evan.thompson(a)flukenetworks.com> --- doc/README.ext4 | 7 +++++ fs/ext4/ext4_common.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 76 insertions(+), 5 deletions(-) diff --git a/doc/README.ext4 b/doc/README.ext4 index 8ecd21eee3..a501b92396 100644 --- a/doc/README.ext4 +++ b/doc/README.ext4 @@ -33,6 +33,13 @@ In addition, to get the write access command "ext4write", enable: which automatically selects CONFIG_EXT4_WRITE if it wasn't defined already. +For files with extents, an ext4 extent tree cache improves performance: + + CONFIG_EXT4_EXTENT_CACHE_SIZE <#> + +The above cache size defaults to 5 if not defined. This default is +strongly recommended. 0 will turn off extent caching. + Also relevant are the generic filesystem commands, selected by: CONFIG_CMD_FS_GENERIC diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index e3cc30a1e0..61aade1ced 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -1523,6 +1523,47 @@ void ext4fs_allocate_blocks(struct ext2_inode *file_inode, #endif +/* Extent tree cache caches one entry per tree level + * eg, ext_block->eh_depth is used as the index into the cache + * + * If the tree is deeper than CONFIG_EXT4_EXTENT_CACHE_SIZE (very unlikely), + * file read performance will be impacted by repeated re-reads + * of those index nodes. + */ + +#ifndef CONFIG_EXT4_EXTENT_CACHE_SIZE +#define CONFIG_EXT4_EXTENT_CACHE_SIZE 5 +#endif + +struct extent_cache_entry { + unsigned long long block; + struct ext4_extent_header *ext_block; +}; + +static struct extent_cache_entry + extent_cache[CONFIG_EXT4_EXTENT_CACHE_SIZE]; + +static void ext4fs_init_extent_block_cache(void) +{ + int i; + + for (i = 0; i < CONFIG_EXT4_EXTENT_CACHE_SIZE; i++) { + extent_cache[i].block = 0; + extent_cache[i].ext_block = NULL; + } +} + +static void ext4fs_free_extent_block_cache(void) +{ + int i; + + for (i = 0; i < CONFIG_EXT4_EXTENT_CACHE_SIZE; i++) { + extent_cache[i].block = 0; + free(extent_cache[i].ext_block); + extent_cache[i].ext_block = NULL; + } +} + static struct ext4_extent_header *ext4fs_get_extent_block (struct ext2_data *data, char *buf, struct ext4_extent_header *ext_block, @@ -1532,6 +1573,7 @@ static struct ext4_extent_header *ext4fs_get_extent_block unsigned long long block; int blksz = EXT2_BLOCK_SIZE(data); int i; + unsigned int cache_item; while (1) { index = (struct ext4_extent_idx *)(ext_block + 1); @@ -1554,11 +1596,31 @@ static struct ext4_extent_header *ext4fs_get_extent_block block = le16_to_cpu(index[i].ei_leaf_hi); block = (block << 32) + le32_to_cpu(index[i].ei_leaf_lo); - if (ext4fs_devread((lbaint_t)block << log2_blksz, 0, blksz, - buf)) - ext_block = (struct ext4_extent_header *)buf; - else - return NULL; + // check cache, read block from device if not found + cache_item = le16_to_cpu(ext_block->eh_depth) - 1; + if (cache_item < CONFIG_EXT4_EXTENT_CACHE_SIZE && + extent_cache[cache_item].block == block) { + ext_block = extent_cache[cache_item].ext_block; + } else { + if (ext4fs_devread((lbaint_t)block << log2_blksz, 0, + blksz, buf)) + ext_block = (struct ext4_extent_header *)buf; + else + return NULL; + // put in cache + if (cache_item < CONFIG_EXT4_EXTENT_CACHE_SIZE) { + struct extent_cache_entry *cache_entry = + &extent_cache[cache_item]; + if (!cache_entry->ext_block) + cache_entry->ext_block = zalloc(blksz); + if (!cache_entry->ext_block) { + printf("ext4 cache alloc failed\n"); + return NULL; + } + memcpy(cache_entry->ext_block, buf, blksz); + cache_entry->block = block; + } + } } } @@ -2000,6 +2062,7 @@ void ext4fs_close(void) if (ext4fs_root != NULL) { free(ext4fs_root); ext4fs_root = NULL; + ext4fs_free_extent_block_cache(); } ext4fs_reinit_global(); @@ -2376,6 +2439,7 @@ int ext4fs_mount(unsigned part_length) ext4fs_root = data; + ext4fs_init_extent_block_cache(); return 1; fail: printf("Failed to mount ext2 filesystem...\n"); -- 2.14.1

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[U-Boot] u-boot on raspberry pi cm3
by Jan Leonhardt 14 May '18

14 May '18

Hello List, i am new here and in embedded development (more a Javascript/Java developer) currently i have to port android to an raspberry pi cm3 and like to use u-boot. what works already: * boot into u-boot * boot into android * boot into u-boot into android so far so good. now i have to store a variable into the environment of u-boot. here i got stuck. any try to write somewhere from u-boot leads in a endless loop of the following message: fsm 1, hsts 00000001 it doesn't matter if i use saveenv, fatwrite or ext4write some google result on that says the sd-card is bat and should be changed. but on cm3 there is no sd-card. its a flash storage directly on the compute module itself. and i tried more than on module. all with the same result. and i can write in usb-storage mode from any other device and from inside the booted android to this storage. so i think there might be a fundamental problem with writing to the flash from u-boot. does anybody have some hints/points to look into? i tried current master (v2018.05) and next branches. same result. here some serial output: U-Boot 2018.05-00181-g62d77cea31-dirty (May 14 2018 - 13:41:23 +0200) DRAM: 944 MiB RPI Compute Module 3 (0xa020a0) MMC: mmc@7e202000: 0, sdhci@7e300000: 1 Loading Environment from FAT... WARNING at drivers/mmc/bcm2835_sdhost.c:435/bcm2835_send_command()! WARNING at drivers/mmc/bcm2835_sdhost.c:435/bcm2835_send_command()! *** Warning - bad CRC, using default environment Failed (-5) In: serial Out: vidconsole Err: vidconsole Net: No ethernet found. starting USB... USB0: scanning bus 0 for devices... Error: smsc95xx_eth address not set. 2 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 WARNING at drivers/mmc/bcm2835_sdhost.c:435/bcm2835_send_command()! WARNING at drivers/mmc/bcm2835_sdhost.c:435/bcm2835_send_command()! switch to partitions #0, OK mmc0(part 0) is current device Scanning mmc 0:1... Found U-Boot script /boot.scr.uimg 4489 bytes read in 3 ms (1.4 MiB/s) ## Executing script at 02000000 Loading uImage... 6143256 bytes read in 785 ms (7.5 MiB/s) Loading uRamdisk... 1562965 bytes read in 202 ms (7.4 MiB/s) -- Mit freundlichen Grüßen / With kind regards Jan Leonhardt IT-Dienstleistungen IT-Konsultant Administration Softwareentwicklung

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[U-Boot] [GIT PULL] Xilinx changes for v2018.07
by Michal Simek 14 May '18

14 May '18

Hi Tom, please pull these changes to your tree. Buildman looks good and travis build is not showing any issue too. https://travis-ci.org/michalsimek/u-boot/builds/377645974 As we have discussed I have grab pending mmc patches for fixing timer issue and adding sd3.0 support because there was no reaction from Jaehoon. And will see that will come from coverity in connection to zynqmp bif support. Thanks, Michal The following changes since commit da342f06b30399fbbebbb53aadfc018713c65c24: Merge git://git.denx.de/u-boot-ubi (2018-05-10 07:17:14 -0400) are available in the Git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07 for you to fetch changes up to 4b87f2d500e94f877f38d9c11e4e47e1721f3fbe: arm64: zynqmp: Enable UHS support for ZCU102 Rev1.0 board (2018-05-11 11:13:54 +0200) ---------------------------------------------------------------- Xilinx changes for v2018.07 microblaze: - Align defconfig zynq: - Rework fpga initialization and cpuinfo handling zynqmp: - Add ZynqMP R5 support - Wire and enable watchdog on zcu100-revC - Setup MMU map for DDR at run time - Show board info based on DT and cleanup IDENT_STRING zynqmp tools: - Add read partition support - Add initial support for Xilinx bif format for boot.bin generation mmc: - Fix get_timer usage on 64bit cpus - Add support for SD3.0 UHS mode nand-zynq: - Add support for 16bit buswidth - Use address cycles from onfi params scsi: - convert ceva sata to UCLASS_AHCI timer: - Add Cadence TTC for ZynqMP r5 watchdog: - Minor cadence driver cleanup ---------------------------------------------------------------- Alexander Graf (4): tools: zynqmpimage: Add partition read support tools: zynqmpimage: Move defines to header MAINTAINERS: Declare tools/zynqmp* as Xilinx maintained tools: zynqmpimage: Add bif support Michal Simek (14): arm: zynq: Enable debug_uart_init in spl when enabled arm: zynq: Rework FPGA initialization arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO scsi: ceva: Convert driver to use UCLASS_AHCI instead of SCSI timer: Add Cadence TTC timer counter support serial: zynq: Remove header depedency on arm header structure MAINTAINERS: zynqmp: Point to proper zynqmp folder arm64: zynqmp: Reset FPD Watchdog on zcu100 watchdog: cadence: Show used timeout value arm64: zynqmp: Wire watchdog internals arm64: zynqmp: Enable cadence WDT for zcu100 arm64: zynqmp: Simplify boot_target variable composition arm64: zynqmp: Show model information instead of custom IDENT_STRING arm: zynqmp: Add ZynqMP minimal R5 support Nitin Jain (1): arm64: zynqmp: Setup MMU map for DDR at run time Siva Durga Prasad Paladugu (11): arm64: zynqmp: Add new defconfig for zc1275 revB microblaze: Dont enable UBI support by default nand: zynq: Add support for 16-bit buswidth nand: zynq: Send address cycles as per onfi parameter page mmc: sdhci: Add support for disabling clock mmc: sdhci: Handle execute tuning command in sdhci_send_command sdhci: Add new sdhci ops for platform specific tuning and delays mmc: sdhci: Invoke platform specific tuning and delay routines mmc: sdhci: Read capabilities register1 and update host caps mmc: zynq_sdhci: Add support for SD3.0 arm64: zynqmp: Enable UHS support for ZCU102 Rev1.0 board Vipul Kumar (1): mmc: Changed the datatype of the variable to handle 64-bit arch MAINTAINERS | 11 +- arch/arm/Kconfig | 11 ++ arch/arm/Makefile | 1 + arch/arm/cpu/armv8/zynqmp/cpu.c | 84 ++++++++----- arch/arm/dts/Makefile | 3 + arch/arm/dts/zynqmp-clk.dtsi | 2 +- arch/arm/dts/zynqmp-r5.dts | 73 +++++++++++ arch/arm/dts/zynqmp-zc1275-revB.dts | 79 ++++++++++++ arch/arm/dts/zynqmp-zcu100-revC.dts | 1 + arch/arm/include/asm/arch-zynqmp/sys_proto.h | 2 +- arch/arm/mach-zynq/cpu.c | 85 ++++++++++++- arch/arm/mach-zynq/spl.c | 11 +- arch/arm/mach-zynqmp-r5/Kconfig | 27 ++++ arch/arm/mach-zynqmp-r5/Makefile | 3 + arch/arm/mach-zynqmp-r5/cpu.c | 37 ++++++ board/xilinx/zynq/board.c | 80 ------------ board/xilinx/zynqmp/Makefile | 2 + board/xilinx/zynqmp/tap_delays.c | 229 ++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zc1275-revB/psu_init_gpl.c | 523 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c | 2 +- board/xilinx/zynqmp/zynqmp.c | 80 ++++++++++-- board/xilinx/zynqmp_r5/MAINTAINERS | 7 ++ board/xilinx/zynqmp_r5/Makefile | 6 + board/xilinx/zynqmp_r5/board.c | 25 ++++ common/image.c | 1 + configs/microblaze-generic_defconfig | 4 - configs/syzygy_hub_defconfig | 1 - configs/topic_miami_defconfig | 1 - configs/topic_miamilite_defconfig | 1 - configs/topic_miamiplus_defconfig | 1 - configs/xilinx_zynqmp_r5_defconfig | 16 +++ configs/xilinx_zynqmp_zc1232_revA_defconfig | 2 - configs/xilinx_zynqmp_zc1254_revA_defconfig | 2 - configs/xilinx_zynqmp_zc1275_revA_defconfig | 2 - configs/xilinx_zynqmp_zc1275_revB_defconfig | 53 ++++++++ configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 - configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 2 - configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig | 2 - configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 2 - configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 2 - configs/xilinx_zynqmp_zcu100_revC_defconfig | 4 +- configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 4 +- configs/xilinx_zynqmp_zcu102_revA_defconfig | 2 - configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 - configs/xilinx_zynqmp_zcu104_revA_defconfig | 2 - configs/xilinx_zynqmp_zcu104_revC_defconfig | 2 - configs/xilinx_zynqmp_zcu106_revA_defconfig | 2 - configs/xilinx_zynqmp_zcu111_revA_defconfig | 2 - configs/zynq_cc108_defconfig | 1 - configs/zynq_cse_qspi_defconfig | 1 + configs/zynq_microzed_defconfig | 1 - configs/zynq_picozed_defconfig | 1 - configs/zynq_z_turn_defconfig | 1 - configs/zynq_zc702_defconfig | 1 - configs/zynq_zc706_defconfig | 1 - configs/zynq_zc770_xm010_defconfig | 1 - configs/zynq_zc770_xm011_defconfig | 1 - configs/zynq_zc770_xm011_x16_defconfig | 1 - configs/zynq_zc770_xm012_defconfig | 1 - configs/zynq_zc770_xm013_defconfig | 1 - configs/zynq_zed_defconfig | 1 - configs/zynq_zybo_defconfig | 1 - drivers/ata/sata_ceva.c | 36 +++--- drivers/mmc/mmc.c | 4 +- drivers/mmc/sdhci.c | 65 +++++++++- drivers/mmc/zynq_sdhci.c | 231 ++++++++++++++++++++++++++++++++++- drivers/mtd/nand/zynq_nand.c | 54 +++++++- drivers/serial/Kconfig | 2 +- drivers/serial/serial_zynq.c | 1 - drivers/timer/Kconfig | 7 ++ drivers/timer/Makefile | 1 + drivers/timer/cadence-ttc.c | 91 ++++++++++++++ drivers/watchdog/cdns_wdt.c | 4 +- include/configs/xilinx_zynqmp_r5.h | 51 ++++++++ include/configs/xilinx_zynqmp_zc1275_revB.h | 16 +++ include/image.h | 1 + include/sdhci.h | 8 ++ include/zynqmp_tap_delay.h | 19 +++ include/zynqpl.h | 89 ++++++-------- tools/Makefile | 1 + tools/imagetool.h | 1 + tools/mkimage.c | 7 ++ tools/zynqmpbif.c | 1008 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ tools/zynqmpimage.c | 142 ++++++++++++++------- tools/zynqmpimage.h | 139 +++++++++++++++++++++ 85 files changed, 3176 insertions(+), 314 deletions(-) create mode 100644 arch/arm/dts/zynqmp-r5.dts create mode 100644 arch/arm/dts/zynqmp-zc1275-revB.dts create mode 100644 arch/arm/mach-zynqmp-r5/Kconfig create mode 100644 arch/arm/mach-zynqmp-r5/Makefile create mode 100644 arch/arm/mach-zynqmp-r5/cpu.c create mode 100644 board/xilinx/zynqmp/tap_delays.c create mode 100644 board/xilinx/zynqmp/zynqmp-zc1275-revB/psu_init_gpl.c create mode 100644 board/xilinx/zynqmp_r5/MAINTAINERS create mode 100644 board/xilinx/zynqmp_r5/Makefile create mode 100644 board/xilinx/zynqmp_r5/board.c create mode 100644 configs/xilinx_zynqmp_r5_defconfig create mode 100644 configs/xilinx_zynqmp_zc1275_revB_defconfig create mode 100644 drivers/timer/cadence-ttc.c create mode 100644 include/configs/xilinx_zynqmp_r5.h create mode 100644 include/configs/xilinx_zynqmp_zc1275_revB.h create mode 100644 include/zynqmp_tap_delay.h create mode 100644 tools/zynqmpbif.c create mode 100644 tools/zynqmpimage.h -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs

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[U-Boot] [PATCH] rockchip: clk: rk3288: handle clk_enable requests for GMAC
by Jonathan Gray 14 May '18

14 May '18

Since b0ba1e7e9d9b9441a18048ec67a3b3100c096975 (rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC) Ethernet no longer probes on RK3288. Add no-ops for GMAC clocks observed to be requested which match the clk_enable cases in RK3368 and RK3399. Signed-off-by: Jonathan Gray <jsg(a)jsg.id.au> Cc: Wadim Egorov <w.egorov(a)phytec.de> Cc: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- drivers/clk/rockchip/clk_rk3288.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 9375681187..4a6e5c7113 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -898,6 +898,16 @@ static int rk3288_clk_enable(struct clk *clk) case HCLK_USBHOST0: case HCLK_HSIC: return 0; + + case SCLK_MAC: + case SCLK_MAC_RX: + case SCLK_MAC_TX: + case SCLK_MACREF: + case SCLK_MACREF_OUT: + case ACLK_GMAC: + case PCLK_GMAC: + /* Required to successfully probe the Designware GMAC driver */ + return 0; } debug("%s: unsupported clk %ld\n", __func__, clk->id); -- 2.16.2

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[U-Boot] [PATCH] arm64: zynqmp: Get rid of emulatio platforms
by Michal Simek 14 May '18

14 May '18

ZynqMP emulation platforms are no longer tested and supported that's why remove macros and code around. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/cpu/armv8/zynqmp/clk.c | 4 ---- arch/arm/cpu/armv8/zynqmp/cpu.c | 4 ---- arch/arm/include/asm/arch-zynqmp/hardware.h | 2 -- 3 files changed, 10 deletions(-) diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c index 13e1977bfa1a..82fdbf886cdf 100644 --- a/arch/arm/cpu/armv8/zynqmp/clk.c +++ b/arch/arm/cpu/armv8/zynqmp/clk.c @@ -16,10 +16,6 @@ unsigned long zynqmp_get_system_timer_freq(void) u32 ver = zynqmp_get_silicon_version(); switch (ver) { - case ZYNQMP_CSU_VERSION_VELOCE: - return 10000; - case ZYNQMP_CSU_VERSION_EP108: - return 4000000; case ZYNQMP_CSU_VERSION_QEMU: return 50000000; } diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index 2748d65d14b4..792a3e1b655f 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -135,12 +135,8 @@ unsigned int zynqmp_get_silicon_version(void) gd->cpu_clk = get_tbclk(); switch (gd->cpu_clk) { - case 0 ... 1000000: - return ZYNQMP_CSU_VERSION_VELOCE; case 50000000: return ZYNQMP_CSU_VERSION_QEMU; - case 4000000: - return ZYNQMP_CSU_VERSION_EP108; } return ZYNQMP_CSU_VERSION_SILICON; diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index dfd6097b4beb..3f1f9498e356 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -123,8 +123,6 @@ struct apu_regs { /* Board version value */ #define ZYNQMP_CSU_BASEADDR 0xFFCA0000 #define ZYNQMP_CSU_VERSION_SILICON 0x0 -#define ZYNQMP_CSU_VERSION_EP108 0x1 -#define ZYNQMP_CSU_VERSION_VELOCE 0x2 #define ZYNQMP_CSU_VERSION_QEMU 0x3 #define ZYNQMP_CSU_VERSION_EMPTY_SHIFT 20 -- 2.17.0

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[U-Boot] [PATCH v1 00/11] Update STM32 QSPI driver
by Patrice Chotard 14 May '18

14 May '18

This series : _ removes useless CONFIG_CLK flag _ fixes checkpatch warnings _ sorts include files in alphabetical order _ align DT bindings with kernel in DT and in driver code _ updates mode management _ add chip select management _ uses dev_read_xxx API _ add reset support Christophe Kerello (4): spi: stm32_qspi: Align reg-names with kernel 4.12 RC1 spi: stm32_qspi: Add st,stm32f469-qspi compatible string spi: stm32_qspi: Update mode management spi: stm32_qspi: Add chip select management Patrice Chotard (6): spi: stm32_qspi: Remove CONFIG_CLK flag spi: stm32_qspi: Sort include files alphabetically spi: stm32_qspi: Use dev_read_xxx API spi: stm32_qspi: Add reset support ARM: dts: stm32: Add quadspi reset for stm32f746 ARM: dts: stm32: Update qspi bindings for stm32f746 Patrick Delaunay (1): spi: stm32_qspi: Solve issue detected by checkpatch arch/arm/dts/stm32f746.dtsi | 3 +- drivers/spi/stm32_qspi.c | 121 ++++++++++++++++++++++++++++---------------- 2 files changed, 80 insertions(+), 44 deletions(-) -- 1.9.1

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[U-Boot] [PATCH v2 00/20] More support for Armada 37xx boards (for Turris Mox)
by Marek Behún 14 May '18

14 May '18

This is the second version of patches for updating the support of Armada 37xx devices. Here I also send first version of code which adds basic support for the Turris Mox board, a router currently being developed here at CZ.NIC, which is being crowdfunded now on Indiegogo. Changes since v1: - these patches were removed, since the update has already been merged into U-Boot: arm64: mvebu_armada_37xx: Use Armada 37xx pinctrl driver by default armada-37xx: Fix SB pinctrl groups according to new revision - I have changed the names of the functions SGMIIPHY_ADDR and PHY_ADDR to lowercase, as Stefan requested - I have used checkpatch on the patches. There still are come warnings, like "added, moved or deleted file(s), does MAINTAINERS need updating?" or "line over 80 characters" (long string constant in dts). How should I solve these? - some minor changes based on comments from Stefan - added a patch to fix SGMII register addresses - added a patch which adds support for the CPU watchdog on Armada 3720 - added a patch which adds basic support for the Turris Mox board Please review. Marek Behun

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[U-Boot] [PATCH v3 0/6] ARM: mvebu: a38x: updates to ddr training code
by Chris Packham 14 May '18

14 May '18

This series updates the ddr training code in u-boot with the latest publicly available version from Marvell which can be found at https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git (mv_ddr-armada-17.10 branch). I've tried to make the delta as small as possible without breaking bisect-ability. The first 2 patches have already been sent as http://patchwork.ozlabs.org/patch/894866/ and http://patchwork.ozlabs.org/patch/894865/ The bulk of the changes are in patch 4. Naturally this doesn't pass checkpatch.pl but I'm erring on the side of being able to diff with the upstream source. Also due to it's size this patch may not make it to the mailing list so the full series can be retrieved from the mv-ddr branch of https://github.com/cpackham/u-boot.git. I've tested this series on the db-88f6820-amc board and on a custom board that is not upstream (yet). I've also build tested the other a38x boards. More testing on actual hardware would be greatly appreciated. This version is rebased against master to mop up the SPDX changes. Changes in v3: - Update to current SPDX style Changes in v2: - remove unused #include Chris Packham (6): ARM: mvebu: a38x: move definition of PEX_CFG_DIRECT_ACCESS ARM: mvebu: a38x: move sys_env_device_rev_get ARM: mvebu: a38x: remove some unused code ARM: mvebu: a38x: sync ddr training code with upstream ARM: mvebu: a38x: restore support for setting timing ARM: mvebu: a38x: use non-zero size for ddr scrubbing arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h | 1 + arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c | 26 +- arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h | 1 - board/CZ.NIC/turris_omnia/turris_omnia.c | 38 +- board/Marvell/db-88f6820-amc/db-88f6820-amc.c | 21 +- board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 21 +- board/gdsys/a38x/controlcenterdc.c | 22 +- board/solidrun/clearfog/clearfog.c | 21 +- drivers/ddr/marvell/a38x/Makefile | 10 +- drivers/ddr/marvell/a38x/ddr3_a38x.c | 736 -------- drivers/ddr/marvell/a38x/ddr3_a38x.h | 92 - .../ddr/marvell/a38x/ddr3_a38x_mc_static.h | 225 --- drivers/ddr/marvell/a38x/ddr3_a38x_topology.h | 21 - drivers/ddr/marvell/a38x/ddr3_a38x_training.c | 39 - drivers/ddr/marvell/a38x/ddr3_debug.c | 742 +++++--- .../ddr/marvell/a38x/ddr3_hws_hw_training.c | 147 -- .../ddr/marvell/a38x/ddr3_hws_hw_training.h | 48 - .../marvell/a38x/ddr3_hws_hw_training_def.h | 463 ----- .../ddr/marvell/a38x/ddr3_hws_sil_training.h | 16 - drivers/ddr/marvell/a38x/ddr3_init.c | 798 ++------- drivers/ddr/marvell/a38x/ddr3_init.h | 300 +--- drivers/ddr/marvell/a38x/ddr3_logging_def.h | 10 +- .../ddr/marvell/a38x/ddr3_patterns_64bit.h | 1 + drivers/ddr/marvell/a38x/ddr3_topology_def.h | 6 +- drivers/ddr/marvell/a38x/ddr3_training.c | 1491 ++++++++++------- drivers/ddr/marvell/a38x/ddr3_training_bist.c | 548 ++++-- .../a38x/ddr3_training_centralization.c | 108 +- drivers/ddr/marvell/a38x/ddr3_training_db.c | 267 ++- .../ddr/marvell/a38x/ddr3_training_hw_algo.c | 98 +- drivers/ddr/marvell/a38x/ddr3_training_ip.h | 19 +- .../ddr/marvell/a38x/ddr3_training_ip_bist.h | 6 +- .../ddr/marvell/a38x/ddr3_training_ip_db.h | 71 +- .../ddr/marvell/a38x/ddr3_training_ip_def.h | 34 +- .../marvell/a38x/ddr3_training_ip_engine.c | 1134 ++++++++----- .../marvell/a38x/ddr3_training_ip_engine.h | 9 +- .../ddr/marvell/a38x/ddr3_training_ip_flow.h | 305 +--- .../marvell/a38x/ddr3_training_ip_prv_if.h | 17 +- .../marvell/a38x/ddr3_training_ip_static.h | 30 - .../ddr/marvell/a38x/ddr3_training_leveling.c | 1347 ++++++++------- .../ddr/marvell/a38x/ddr3_training_leveling.h | 2 +- drivers/ddr/marvell/a38x/ddr3_training_pbs.c | 201 ++- .../ddr/marvell/a38x/ddr3_training_static.c | 538 ------ drivers/ddr/marvell/a38x/ddr_ml_wrapper.h | 148 ++ drivers/ddr/marvell/a38x/ddr_topology_def.h | 82 +- .../ddr/marvell/a38x/mv_ddr_build_message.c | 1 + drivers/ddr/marvell/a38x/mv_ddr_common.c | 47 + drivers/ddr/marvell/a38x/mv_ddr_common.h | 20 + drivers/ddr/marvell/a38x/mv_ddr_plat.c | 1450 ++++++++++++++++ drivers/ddr/marvell/a38x/mv_ddr_plat.h | 236 +++ drivers/ddr/marvell/a38x/mv_ddr_regs.h | 446 +++++ drivers/ddr/marvell/a38x/mv_ddr_spd.c | 377 +++++ drivers/ddr/marvell/a38x/mv_ddr_spd.h | 289 ++++ drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.c | 102 ++ drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h | 117 ++ drivers/ddr/marvell/a38x/mv_ddr_topology.c | 197 +++ drivers/ddr/marvell/a38x/mv_ddr_topology.h | 129 ++ drivers/ddr/marvell/a38x/seq_exec.h | 64 + drivers/ddr/marvell/a38x/silicon_if.h | 16 - drivers/ddr/marvell/a38x/xor.c | 185 +- drivers/ddr/marvell/a38x/xor.h | 3 +- 60 files changed, 7984 insertions(+), 5955 deletions(-) delete mode 100644 drivers/ddr/marvell/a38x/ddr3_a38x.c delete mode 100644 drivers/ddr/marvell/a38x/ddr3_a38x.h delete mode 100644 drivers/ddr/marvell/a38x/ddr3_a38x_mc_static.h delete mode 100644 drivers/ddr/marvell/a38x/ddr3_a38x_topology.h delete mode 100644 drivers/ddr/marvell/a38x/ddr3_a38x_training.c delete mode 100644 drivers/ddr/marvell/a38x/ddr3_hws_hw_training.c delete mode 100644 drivers/ddr/marvell/a38x/ddr3_hws_hw_training.h delete mode 100644 drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h delete mode 100644 drivers/ddr/marvell/a38x/ddr3_hws_sil_training.h delete mode 100644 drivers/ddr/marvell/a38x/ddr3_training_ip_static.h delete mode 100644 drivers/ddr/marvell/a38x/ddr3_training_static.c create mode 100644 drivers/ddr/marvell/a38x/ddr_ml_wrapper.h create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_build_message.c create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_common.c create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_common.h create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_plat.c create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_plat.h create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_regs.h create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_spd.c create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_spd.h create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.c create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_topology.c create mode 100644 drivers/ddr/marvell/a38x/mv_ddr_topology.h create mode 100644 drivers/ddr/marvell/a38x/seq_exec.h delete mode 100644 drivers/ddr/marvell/a38x/silicon_if.h -- 2.17.0

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[U-Boot] [PATCH] phy: marvell: a3700: Fix compatible string for ehci
by Marek Behún 14 May '18

14 May '18

The DTS file for armada-37xx uses the string "marvell,armada3700-ehci", but the code searched for "marvell,armada-3700-ehci". Signed-off-by: Marek Behun <marek.behun(a)nic.cz> --- drivers/phy/marvell/comphy_a3700.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c index 7f5371afe9..a70b602b02 100644 --- a/drivers/phy/marvell/comphy_a3700.c +++ b/drivers/phy/marvell/comphy_a3700.c @@ -901,7 +901,7 @@ void comphy_dedicated_phys_init(void) */ if (usb32 == 0) { node = fdt_node_offset_by_compatible( - blob, -1, "marvell,armada-3700-ehci"); + blob, -1, "marvell,armada3700-ehci"); } else { node = fdt_node_offset_by_compatible( blob, -1, "marvell,armada3700-xhci"); -- 2.16.1

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